STM32L486xx HAL User Manual
Functions
APB2
BUS Exported Functions

Functions

__STATIC_INLINE void LL_APB2_GRP1_EnableClock (uint32_t Periphs)
 Enable APB2 peripherals clock.
__STATIC_INLINE uint32_t LL_APB2_GRP1_IsEnabledClock (uint32_t Periphs)
 Check if APB2 peripheral clock is enabled or not.
__STATIC_INLINE void LL_APB2_GRP1_DisableClock (uint32_t Periphs)
 Disable APB2 peripherals clock.
__STATIC_INLINE void LL_APB2_GRP1_ForceReset (uint32_t Periphs)
 Force APB2 peripherals reset.
__STATIC_INLINE void LL_APB2_GRP1_ReleaseReset (uint32_t Periphs)
 Release APB2 peripherals reset.
__STATIC_INLINE void LL_APB2_GRP1_EnableClockStopSleep (uint32_t Periphs)
 Enable APB2 peripheral clocks in Sleep and Stop modes.
__STATIC_INLINE void LL_APB2_GRP1_DisableClockStopSleep (uint32_t Periphs)
 Disable APB2 peripheral clocks in Sleep and Stop modes.

Function Documentation

__STATIC_INLINE void LL_APB2_GRP1_DisableClock ( uint32_t  Periphs)

Disable APB2 peripherals clock.

Reference Manual to LL API cross reference:
APB2ENR SYSCFGEN LL_APB2_GRP1_DisableClock
APB2ENR SDMMC1EN LL_APB2_GRP1_DisableClock
APB2ENR TIM1EN LL_APB2_GRP1_DisableClock
APB2ENR SPI1EN LL_APB2_GRP1_DisableClock
APB2ENR TIM8EN LL_APB2_GRP1_DisableClock
APB2ENR USART1EN LL_APB2_GRP1_DisableClock
APB2ENR TIM15EN LL_APB2_GRP1_DisableClock
APB2ENR TIM16EN LL_APB2_GRP1_DisableClock
APB2ENR TIM17EN LL_APB2_GRP1_DisableClock
APB2ENR SAI1EN LL_APB2_GRP1_DisableClock
APB2ENR SAI2EN LL_APB2_GRP1_DisableClock
APB2ENR DFSDM1EN LL_APB2_GRP1_DisableClock
APB2ENR LTDCEN LL_APB2_GRP1_DisableClock
APB2ENR DSIEN LL_APB2_GRP1_DisableClock
Parameters:
PeriphsThis parameter can be a combination of the following values: (*) value not defined in all devices.
Return values:
None

Definition at line 1774 of file stm32l4xx_ll_bus.h.

__STATIC_INLINE void LL_APB2_GRP1_DisableClockStopSleep ( uint32_t  Periphs)

Disable APB2 peripheral clocks in Sleep and Stop modes.

Reference Manual to LL API cross reference:
APB2SMENR SYSCFGSMEN LL_APB2_GRP1_DisableClockStopSleep
APB2SMENR SDMMC1SMEN LL_APB2_GRP1_DisableClockStopSleep
APB2SMENR TIM1SMEN LL_APB2_GRP1_DisableClockStopSleep
APB2SMENR SPI1SMEN LL_APB2_GRP1_DisableClockStopSleep
APB2SMENR TIM8SMEN LL_APB2_GRP1_DisableClockStopSleep
APB2SMENR USART1SMEN LL_APB2_GRP1_DisableClockStopSleep
APB2SMENR TIM15SMEN LL_APB2_GRP1_DisableClockStopSleep
APB2SMENR TIM16SMEN LL_APB2_GRP1_DisableClockStopSleep
APB2SMENR TIM17SMEN LL_APB2_GRP1_DisableClockStopSleep
APB2SMENR SAI1SMEN LL_APB2_GRP1_DisableClockStopSleep
APB2SMENR SAI2SMEN LL_APB2_GRP1_DisableClockStopSleep
APB2SMENR DFSDM1SMEN LL_APB2_GRP1_DisableClockStopSleep
APB2SMENR LTDCSMEN LL_APB2_GRP1_DisableClockStopSleep
APB2SMENR DSISMEN LL_APB2_GRP1_DisableClockStopSleep
Parameters:
PeriphsThis parameter can be a combination of the following values: (*) value not defined in all devices.
Return values:
None

Definition at line 1940 of file stm32l4xx_ll_bus.h.

__STATIC_INLINE void LL_APB2_GRP1_EnableClock ( uint32_t  Periphs)

Enable APB2 peripherals clock.

Reference Manual to LL API cross reference:
APB2ENR SYSCFGEN LL_APB2_GRP1_EnableClock
APB2ENR FWEN LL_APB2_GRP1_EnableClock
APB2ENR SDMMC1EN LL_APB2_GRP1_EnableClock
APB2ENR TIM1EN LL_APB2_GRP1_EnableClock
APB2ENR SPI1EN LL_APB2_GRP1_EnableClock
APB2ENR TIM8EN LL_APB2_GRP1_EnableClock
APB2ENR USART1EN LL_APB2_GRP1_EnableClock
APB2ENR TIM15EN LL_APB2_GRP1_EnableClock
APB2ENR TIM16EN LL_APB2_GRP1_EnableClock
APB2ENR TIM17EN LL_APB2_GRP1_EnableClock
APB2ENR SAI1EN LL_APB2_GRP1_EnableClock
APB2ENR SAI2EN LL_APB2_GRP1_EnableClock
APB2ENR DFSDM1EN LL_APB2_GRP1_EnableClock
APB2ENR LTDCEN LL_APB2_GRP1_EnableClock
APB2ENR DSIEN LL_APB2_GRP1_EnableClock
Parameters:
PeriphsThis parameter can be a combination of the following values: (*) value not defined in all devices.
Return values:
None

Definition at line 1688 of file stm32l4xx_ll_bus.h.

__STATIC_INLINE void LL_APB2_GRP1_EnableClockStopSleep ( uint32_t  Periphs)

Enable APB2 peripheral clocks in Sleep and Stop modes.

Reference Manual to LL API cross reference:
APB2SMENR SYSCFGSMEN LL_APB2_GRP1_EnableClockStopSleep
APB2SMENR SDMMC1SMEN LL_APB2_GRP1_EnableClockStopSleep
APB2SMENR TIM1SMEN LL_APB2_GRP1_EnableClockStopSleep
APB2SMENR SPI1SMEN LL_APB2_GRP1_EnableClockStopSleep
APB2SMENR TIM8SMEN LL_APB2_GRP1_EnableClockStopSleep
APB2SMENR USART1SMEN LL_APB2_GRP1_EnableClockStopSleep
APB2SMENR TIM15SMEN LL_APB2_GRP1_EnableClockStopSleep
APB2SMENR TIM16SMEN LL_APB2_GRP1_EnableClockStopSleep
APB2SMENR TIM17SMEN LL_APB2_GRP1_EnableClockStopSleep
APB2SMENR SAI1SMEN LL_APB2_GRP1_EnableClockStopSleep
APB2SMENR SAI2SMEN LL_APB2_GRP1_EnableClockStopSleep
APB2SMENR DFSDM1SMEN LL_APB2_GRP1_EnableClockStopSleep
APB2SMENR LTDCSMEN LL_APB2_GRP1_EnableClockStopSleep
APB2SMENR DSISMEN LL_APB2_GRP1_EnableClockStopSleep
Parameters:
PeriphsThis parameter can be a combination of the following values: (*) value not defined in all devices.
Return values:
None

Definition at line 1896 of file stm32l4xx_ll_bus.h.

__STATIC_INLINE void LL_APB2_GRP1_ForceReset ( uint32_t  Periphs)

Force APB2 peripherals reset.

Reference Manual to LL API cross reference:
APB2RSTR SYSCFGRST LL_APB2_GRP1_ForceReset
APB2RSTR SDMMC1RST LL_APB2_GRP1_ForceReset
APB2RSTR TIM1RST LL_APB2_GRP1_ForceReset
APB2RSTR SPI1RST LL_APB2_GRP1_ForceReset
APB2RSTR TIM8RST LL_APB2_GRP1_ForceReset
APB2RSTR USART1RST LL_APB2_GRP1_ForceReset
APB2RSTR TIM15RST LL_APB2_GRP1_ForceReset
APB2RSTR TIM16RST LL_APB2_GRP1_ForceReset
APB2RSTR TIM17RST LL_APB2_GRP1_ForceReset
APB2RSTR SAI1RST LL_APB2_GRP1_ForceReset
APB2RSTR SAI2RST LL_APB2_GRP1_ForceReset
APB2RSTR DFSDM1RST LL_APB2_GRP1_ForceReset
APB2RSTR LTDCRST LL_APB2_GRP1_ForceReset
APB2RSTR DSIRST LL_APB2_GRP1_ForceReset
Parameters:
PeriphsThis parameter can be a combination of the following values: (*) value not defined in all devices.
Return values:
None

Definition at line 1815 of file stm32l4xx_ll_bus.h.

Referenced by LL_SPI_DeInit(), LL_TIM_DeInit(), and LL_USART_DeInit().

__STATIC_INLINE uint32_t LL_APB2_GRP1_IsEnabledClock ( uint32_t  Periphs)

Check if APB2 peripheral clock is enabled or not.

Reference Manual to LL API cross reference:
APB2ENR SYSCFGEN LL_APB2_GRP1_IsEnabledClock
APB2ENR FWEN LL_APB2_GRP1_IsEnabledClock
APB2ENR SDMMC1EN LL_APB2_GRP1_IsEnabledClock
APB2ENR TIM1EN LL_APB2_GRP1_IsEnabledClock
APB2ENR SPI1EN LL_APB2_GRP1_IsEnabledClock
APB2ENR TIM8EN LL_APB2_GRP1_IsEnabledClock
APB2ENR USART1EN LL_APB2_GRP1_IsEnabledClock
APB2ENR TIM15EN LL_APB2_GRP1_IsEnabledClock
APB2ENR TIM16EN LL_APB2_GRP1_IsEnabledClock
APB2ENR TIM17EN LL_APB2_GRP1_IsEnabledClock
APB2ENR SAI1EN LL_APB2_GRP1_IsEnabledClock
APB2ENR SAI2EN LL_APB2_GRP1_IsEnabledClock
APB2ENR DFSDM1EN LL_APB2_GRP1_IsEnabledClock
APB2ENR LTDCEN LL_APB2_GRP1_IsEnabledClock
APB2ENR DSIEN LL_APB2_GRP1_IsEnabledClock
Parameters:
PeriphsThis parameter can be a combination of the following values: (*) value not defined in all devices.
Return values:
Stateof Periphs (1 or 0).

Definition at line 1734 of file stm32l4xx_ll_bus.h.

__STATIC_INLINE void LL_APB2_GRP1_ReleaseReset ( uint32_t  Periphs)

Release APB2 peripherals reset.

Reference Manual to LL API cross reference:
APB2RSTR SYSCFGRST LL_APB2_GRP1_ReleaseReset
APB2RSTR SDMMC1RST LL_APB2_GRP1_ReleaseReset
APB2RSTR TIM1RST LL_APB2_GRP1_ReleaseReset
APB2RSTR SPI1RST LL_APB2_GRP1_ReleaseReset
APB2RSTR TIM8RST LL_APB2_GRP1_ReleaseReset
APB2RSTR USART1RST LL_APB2_GRP1_ReleaseReset
APB2RSTR TIM15RST LL_APB2_GRP1_ReleaseReset
APB2RSTR TIM16RST LL_APB2_GRP1_ReleaseReset
APB2RSTR TIM17RST LL_APB2_GRP1_ReleaseReset
APB2RSTR SAI1RST LL_APB2_GRP1_ReleaseReset
APB2RSTR SAI2RST LL_APB2_GRP1_ReleaseReset
APB2RSTR DFSDM1RST LL_APB2_GRP1_ReleaseReset
APB2RSTR LTDCRST LL_APB2_GRP1_ReleaseReset
APB2RSTR DSIRST LL_APB2_GRP1_ReleaseReset
Parameters:
PeriphsThis parameter can be a combination of the following values: (*) value not defined in all devices.
Return values:
None

Definition at line 1856 of file stm32l4xx_ll_bus.h.

Referenced by LL_SPI_DeInit(), LL_TIM_DeInit(), and LL_USART_DeInit().