STM32L486xx HAL User Manual
stm32l4xx_ll_spi.c
Go to the documentation of this file.
00001 /**
00002   ******************************************************************************
00003   * @file    stm32l4xx_ll_spi.c
00004   * @author  MCD Application Team
00005   * @brief   SPI LL module driver.
00006   ******************************************************************************
00007   * @attention
00008   *
00009   * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
00010   *
00011   * Redistribution and use in source and binary forms, with or without modification,
00012   * are permitted provided that the following conditions are met:
00013   *   1. Redistributions of source code must retain the above copyright notice,
00014   *      this list of conditions and the following disclaimer.
00015   *   2. Redistributions in binary form must reproduce the above copyright notice,
00016   *      this list of conditions and the following disclaimer in the documentation
00017   *      and/or other materials provided with the distribution.
00018   *   3. Neither the name of STMicroelectronics nor the names of its contributors
00019   *      may be used to endorse or promote products derived from this software
00020   *      without specific prior written permission.
00021   *
00022   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
00023   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00024   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
00025   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
00026   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00027   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
00028   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
00029   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00030   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
00031   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00032   *
00033   ******************************************************************************
00034   */
00035 #if defined(USE_FULL_LL_DRIVER)
00036 
00037 /* Includes ------------------------------------------------------------------*/
00038 #include "stm32l4xx_ll_spi.h"
00039 #include "stm32l4xx_ll_bus.h"
00040 
00041 #ifdef  USE_FULL_ASSERT
00042 #include "stm32_assert.h"
00043 #else
00044 #define assert_param(expr) ((void)0U)
00045 #endif
00046 
00047 /** @addtogroup STM32L4xx_LL_Driver
00048   * @{
00049   */
00050 
00051 #if defined (SPI1) || defined (SPI2) || defined (SPI3)
00052 
00053 /** @addtogroup SPI_LL
00054   * @{
00055   */
00056 
00057 /* Private types -------------------------------------------------------------*/
00058 /* Private variables ---------------------------------------------------------*/
00059 
00060 /* Private constants ---------------------------------------------------------*/
00061 /** @defgroup SPI_LL_Private_Constants SPI Private Constants
00062   * @{
00063   */
00064 /* SPI registers Masks */
00065 #define SPI_CR1_CLEAR_MASK                 (SPI_CR1_CPHA    | SPI_CR1_CPOL     | SPI_CR1_MSTR   | \
00066                                             SPI_CR1_BR      | SPI_CR1_LSBFIRST | SPI_CR1_SSI    | \
00067                                             SPI_CR1_SSM     | SPI_CR1_RXONLY   | SPI_CR1_CRCL   | \
00068                                             SPI_CR1_CRCNEXT | SPI_CR1_CRCEN    | SPI_CR1_BIDIOE | \
00069                                             SPI_CR1_BIDIMODE)
00070 /**
00071   * @}
00072   */
00073 
00074 /* Private macros ------------------------------------------------------------*/
00075 /** @defgroup SPI_LL_Private_Macros SPI Private Macros
00076   * @{
00077   */
00078 #define IS_LL_SPI_TRANSFER_DIRECTION(__VALUE__) (((__VALUE__) == LL_SPI_FULL_DUPLEX)    \
00079                                               || ((__VALUE__) == LL_SPI_SIMPLEX_RX)     \
00080                                               || ((__VALUE__) == LL_SPI_HALF_DUPLEX_RX) \
00081                                               || ((__VALUE__) == LL_SPI_HALF_DUPLEX_TX))
00082 
00083 #define IS_LL_SPI_MODE(__VALUE__) (((__VALUE__) == LL_SPI_MODE_MASTER) \
00084                                 || ((__VALUE__) == LL_SPI_MODE_SLAVE))
00085 
00086 #define IS_LL_SPI_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_SPI_DATAWIDTH_4BIT)  \
00087                                      || ((__VALUE__) == LL_SPI_DATAWIDTH_5BIT)  \
00088                                      || ((__VALUE__) == LL_SPI_DATAWIDTH_6BIT)  \
00089                                      || ((__VALUE__) == LL_SPI_DATAWIDTH_7BIT)  \
00090                                      || ((__VALUE__) == LL_SPI_DATAWIDTH_8BIT)  \
00091                                      || ((__VALUE__) == LL_SPI_DATAWIDTH_9BIT)  \
00092                                      || ((__VALUE__) == LL_SPI_DATAWIDTH_10BIT) \
00093                                      || ((__VALUE__) == LL_SPI_DATAWIDTH_11BIT) \
00094                                      || ((__VALUE__) == LL_SPI_DATAWIDTH_12BIT) \
00095                                      || ((__VALUE__) == LL_SPI_DATAWIDTH_13BIT) \
00096                                      || ((__VALUE__) == LL_SPI_DATAWIDTH_14BIT) \
00097                                      || ((__VALUE__) == LL_SPI_DATAWIDTH_15BIT) \
00098                                      || ((__VALUE__) == LL_SPI_DATAWIDTH_16BIT))
00099 
00100 #define IS_LL_SPI_POLARITY(__VALUE__) (((__VALUE__) == LL_SPI_POLARITY_LOW) \
00101                                     || ((__VALUE__) == LL_SPI_POLARITY_HIGH))
00102 
00103 #define IS_LL_SPI_PHASE(__VALUE__) (((__VALUE__) == LL_SPI_PHASE_1EDGE) \
00104                                  || ((__VALUE__) == LL_SPI_PHASE_2EDGE))
00105 
00106 #define IS_LL_SPI_NSS(__VALUE__) (((__VALUE__) == LL_SPI_NSS_SOFT) \
00107                                || ((__VALUE__) == LL_SPI_NSS_HARD_INPUT) \
00108                                || ((__VALUE__) == LL_SPI_NSS_HARD_OUTPUT))
00109 
00110 #define IS_LL_SPI_BAUDRATE(__VALUE__) (((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV2)   \
00111                                     || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV4)   \
00112                                     || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV8)   \
00113                                     || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV16)  \
00114                                     || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV32)  \
00115                                     || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV64)  \
00116                                     || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV128) \
00117                                     || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV256))
00118 
00119 #define IS_LL_SPI_BITORDER(__VALUE__) (((__VALUE__) == LL_SPI_LSB_FIRST) \
00120                                     || ((__VALUE__) == LL_SPI_MSB_FIRST))
00121 
00122 #define IS_LL_SPI_CRCCALCULATION(__VALUE__) (((__VALUE__) == LL_SPI_CRCCALCULATION_ENABLE) \
00123                                           || ((__VALUE__) == LL_SPI_CRCCALCULATION_DISABLE))
00124 
00125 #define IS_LL_SPI_CRC_POLYNOMIAL(__VALUE__) ((__VALUE__) >= 0x1U)
00126 
00127 /**
00128   * @}
00129   */
00130 
00131 /* Private function prototypes -----------------------------------------------*/
00132 
00133 /* Exported functions --------------------------------------------------------*/
00134 /** @addtogroup SPI_LL_Exported_Functions
00135   * @{
00136   */
00137 
00138 /** @addtogroup SPI_LL_EF_Init
00139   * @{
00140   */
00141 
00142 /**
00143   * @brief  De-initialize the SPI registers to their default reset values.
00144   * @param  SPIx SPI Instance
00145   * @retval An ErrorStatus enumeration value:
00146   *          - SUCCESS: SPI registers are de-initialized
00147   *          - ERROR: SPI registers are not de-initialized
00148   */
00149 ErrorStatus LL_SPI_DeInit(SPI_TypeDef *SPIx)
00150 {
00151   ErrorStatus status = ERROR;
00152 
00153   /* Check the parameters */
00154   assert_param(IS_SPI_ALL_INSTANCE(SPIx));
00155 
00156 #if defined(SPI1)
00157   if (SPIx == SPI1)
00158   {
00159     /* Force reset of SPI clock */
00160     LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_SPI1);
00161 
00162     /* Release reset of SPI clock */
00163     LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_SPI1);
00164 
00165     status = SUCCESS;
00166   }
00167 #endif /* SPI1 */
00168 #if defined(SPI2)
00169   if (SPIx == SPI2)
00170   {
00171     /* Force reset of SPI clock */
00172     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_SPI2);
00173 
00174     /* Release reset of SPI clock */
00175     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_SPI2);
00176 
00177     status = SUCCESS;
00178   }
00179 #endif /* SPI2 */
00180 #if defined(SPI3)
00181   if (SPIx == SPI3)
00182   {
00183     /* Force reset of SPI clock */
00184     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_SPI3);
00185 
00186     /* Release reset of SPI clock */
00187     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_SPI3);
00188 
00189     status = SUCCESS;
00190   }
00191 #endif /* SPI3 */
00192 
00193   return status;
00194 }
00195 
00196 /**
00197   * @brief  Initialize the SPI registers according to the specified parameters in SPI_InitStruct.
00198   * @note   As some bits in SPI configuration registers can only be written when the SPI is disabled (SPI_CR1_SPE bit =0),
00199   *         SPI IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
00200   * @param  SPIx SPI Instance
00201   * @param  SPI_InitStruct pointer to a @ref LL_SPI_InitTypeDef structure
00202   * @retval An ErrorStatus enumeration value. (Return always SUCCESS)
00203   */
00204 ErrorStatus LL_SPI_Init(SPI_TypeDef *SPIx, LL_SPI_InitTypeDef *SPI_InitStruct)
00205 {
00206   ErrorStatus status = ERROR;
00207 
00208   /* Check the SPI Instance SPIx*/
00209   assert_param(IS_SPI_ALL_INSTANCE(SPIx));
00210 
00211   /* Check the SPI parameters from SPI_InitStruct*/
00212   assert_param(IS_LL_SPI_TRANSFER_DIRECTION(SPI_InitStruct->TransferDirection));
00213   assert_param(IS_LL_SPI_MODE(SPI_InitStruct->Mode));
00214   assert_param(IS_LL_SPI_DATAWIDTH(SPI_InitStruct->DataWidth));
00215   assert_param(IS_LL_SPI_POLARITY(SPI_InitStruct->ClockPolarity));
00216   assert_param(IS_LL_SPI_PHASE(SPI_InitStruct->ClockPhase));
00217   assert_param(IS_LL_SPI_NSS(SPI_InitStruct->NSS));
00218   assert_param(IS_LL_SPI_BAUDRATE(SPI_InitStruct->BaudRate));
00219   assert_param(IS_LL_SPI_BITORDER(SPI_InitStruct->BitOrder));
00220   assert_param(IS_LL_SPI_CRCCALCULATION(SPI_InitStruct->CRCCalculation));
00221 
00222   if (LL_SPI_IsEnabled(SPIx) == 0x00000000U)
00223   {
00224     /*---------------------------- SPIx CR1 Configuration ------------------------
00225      * Configure SPIx CR1 with parameters:
00226      * - TransferDirection:  SPI_CR1_BIDIMODE, SPI_CR1_BIDIOE and SPI_CR1_RXONLY bits
00227      * - Master/Slave Mode:  SPI_CR1_MSTR bit
00228      * - ClockPolarity:      SPI_CR1_CPOL bit
00229      * - ClockPhase:         SPI_CR1_CPHA bit
00230      * - NSS management:     SPI_CR1_SSM bit
00231      * - BaudRate prescaler: SPI_CR1_BR[2:0] bits
00232      * - BitOrder:           SPI_CR1_LSBFIRST bit
00233      * - CRCCalculation:     SPI_CR1_CRCEN bit
00234      */
00235     MODIFY_REG(SPIx->CR1,
00236                SPI_CR1_CLEAR_MASK,
00237                SPI_InitStruct->TransferDirection | SPI_InitStruct->Mode |
00238                SPI_InitStruct->ClockPolarity | SPI_InitStruct->ClockPhase |
00239                SPI_InitStruct->NSS | SPI_InitStruct->BaudRate |
00240                SPI_InitStruct->BitOrder | SPI_InitStruct->CRCCalculation);
00241 
00242     /*---------------------------- SPIx CR2 Configuration ------------------------
00243      * Configure SPIx CR2 with parameters:
00244      * - DataWidth:          DS[3:0] bits
00245      * - NSS management:     SSOE bit
00246      */
00247     MODIFY_REG(SPIx->CR2,
00248                SPI_CR2_DS | SPI_CR2_SSOE,
00249                SPI_InitStruct->DataWidth | (SPI_InitStruct->NSS >> 16U));
00250 
00251     /*---------------------------- SPIx CRCPR Configuration ----------------------
00252      * Configure SPIx CRCPR with parameters:
00253      * - CRCPoly:            CRCPOLY[15:0] bits
00254      */
00255     if (SPI_InitStruct->CRCCalculation == LL_SPI_CRCCALCULATION_ENABLE)
00256     {
00257       assert_param(IS_LL_SPI_CRC_POLYNOMIAL(SPI_InitStruct->CRCPoly));
00258       LL_SPI_SetCRCPolynomial(SPIx, SPI_InitStruct->CRCPoly);
00259     }
00260     status = SUCCESS;
00261   }
00262 
00263   return status;
00264 }
00265 
00266 /**
00267   * @brief  Set each @ref LL_SPI_InitTypeDef field to default value.
00268   * @param  SPI_InitStruct pointer to a @ref LL_SPI_InitTypeDef structure
00269   * whose fields will be set to default values.
00270   * @retval None
00271   */
00272 void LL_SPI_StructInit(LL_SPI_InitTypeDef *SPI_InitStruct)
00273 {
00274   /* Set SPI_InitStruct fields to default values */
00275   SPI_InitStruct->TransferDirection = LL_SPI_FULL_DUPLEX;
00276   SPI_InitStruct->Mode              = LL_SPI_MODE_SLAVE;
00277   SPI_InitStruct->DataWidth         = LL_SPI_DATAWIDTH_8BIT;
00278   SPI_InitStruct->ClockPolarity     = LL_SPI_POLARITY_LOW;
00279   SPI_InitStruct->ClockPhase        = LL_SPI_PHASE_1EDGE;
00280   SPI_InitStruct->NSS               = LL_SPI_NSS_HARD_INPUT;
00281   SPI_InitStruct->BaudRate          = LL_SPI_BAUDRATEPRESCALER_DIV2;
00282   SPI_InitStruct->BitOrder          = LL_SPI_MSB_FIRST;
00283   SPI_InitStruct->CRCCalculation    = LL_SPI_CRCCALCULATION_DISABLE;
00284   SPI_InitStruct->CRCPoly           = 7U;
00285 }
00286 
00287 /**
00288   * @}
00289   */
00290 
00291 /**
00292   * @}
00293   */
00294 
00295 /**
00296   * @}
00297   */
00298 
00299 #endif /* defined (SPI1) || defined (SPI2) || defined (SPI3) */
00300 
00301 /**
00302   * @}
00303   */
00304 
00305 #endif /* USE_FULL_LL_DRIVER */
00306 
00307 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/