STM32L486xx HAL User Manual
stm32l4xx_ll_usart.c
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00001 /**
00002   ******************************************************************************
00003   * @file    stm32l4xx_ll_usart.c
00004   * @author  MCD Application Team
00005   * @brief   USART LL module driver.
00006   ******************************************************************************
00007   * @attention
00008   *
00009   * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
00010   *
00011   * Redistribution and use in source and binary forms, with or without modification,
00012   * are permitted provided that the following conditions are met:
00013   *   1. Redistributions of source code must retain the above copyright notice,
00014   *      this list of conditions and the following disclaimer.
00015   *   2. Redistributions in binary form must reproduce the above copyright notice,
00016   *      this list of conditions and the following disclaimer in the documentation
00017   *      and/or other materials provided with the distribution.
00018   *   3. Neither the name of STMicroelectronics nor the names of its contributors
00019   *      may be used to endorse or promote products derived from this software
00020   *      without specific prior written permission.
00021   *
00022   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
00023   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00024   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
00025   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
00026   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00027   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
00028   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
00029   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00030   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
00031   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00032   *
00033   ******************************************************************************
00034   */
00035 #if defined(USE_FULL_LL_DRIVER)
00036 
00037 /* Includes ------------------------------------------------------------------*/
00038 #include "stm32l4xx_ll_usart.h"
00039 #include "stm32l4xx_ll_rcc.h"
00040 #include "stm32l4xx_ll_bus.h"
00041 #ifdef  USE_FULL_ASSERT
00042 #include "stm32_assert.h"
00043 #else
00044 #define assert_param(expr) ((void)0U)
00045 #endif
00046 
00047 /** @addtogroup STM32L4xx_LL_Driver
00048   * @{
00049   */
00050 
00051 #if defined (USART1) || defined (USART2) || defined (USART3) || defined (UART4) || defined (UART5)
00052 
00053 /** @addtogroup USART_LL
00054   * @{
00055   */
00056 
00057 /* Private types -------------------------------------------------------------*/
00058 /* Private variables ---------------------------------------------------------*/
00059 /* Private constants ---------------------------------------------------------*/
00060 /** @addtogroup USART_LL_Private_Constants
00061   * @{
00062   */
00063 
00064 /**
00065   * @}
00066   */
00067 
00068 
00069 /* Private macros ------------------------------------------------------------*/
00070 /** @addtogroup USART_LL_Private_Macros
00071   * @{
00072   */
00073 
00074 #if defined(USART_PRESC_PRESCALER)
00075 #define IS_LL_USART_PRESCALER(__VALUE__)  (((__VALUE__) == LL_USART_PRESCALER_DIV1) \
00076                                         || ((__VALUE__) == LL_USART_PRESCALER_DIV2) \
00077                                         || ((__VALUE__) == LL_USART_PRESCALER_DIV4) \
00078                                         || ((__VALUE__) == LL_USART_PRESCALER_DIV6) \
00079                                         || ((__VALUE__) == LL_USART_PRESCALER_DIV8) \
00080                                         || ((__VALUE__) == LL_USART_PRESCALER_DIV10) \
00081                                         || ((__VALUE__) == LL_USART_PRESCALER_DIV12) \
00082                                         || ((__VALUE__) == LL_USART_PRESCALER_DIV16) \
00083                                         || ((__VALUE__) == LL_USART_PRESCALER_DIV32) \
00084                                         || ((__VALUE__) == LL_USART_PRESCALER_DIV64) \
00085                                         || ((__VALUE__) == LL_USART_PRESCALER_DIV128) \
00086                                         || ((__VALUE__) == LL_USART_PRESCALER_DIV256))
00087 #endif
00088 
00089 /* __BAUDRATE__ The maximum Baud Rate is derived from the maximum clock available
00090  *              divided by the smallest oversampling used on the USART (i.e. 8)    */
00091 #if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
00092 #define IS_LL_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) <= 15000000U)
00093 #else
00094 #define IS_LL_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) <= 10000000U)
00095 #endif
00096 
00097 /* __VALUE__ In case of oversampling by 16 and 8, BRR content must be greater than or equal to 16d. */
00098 #define IS_LL_USART_BRR_MIN(__VALUE__) ((__VALUE__) >= 16U)
00099 
00100 /* __VALUE__ BRR content must be lower than or equal to 0xFFFF. */
00101 #define IS_LL_USART_BRR_MAX(__VALUE__) ((__VALUE__) <= 0x0000FFFFU)
00102 
00103 #define IS_LL_USART_DIRECTION(__VALUE__) (((__VALUE__) == LL_USART_DIRECTION_NONE) \
00104                                        || ((__VALUE__) == LL_USART_DIRECTION_RX) \
00105                                        || ((__VALUE__) == LL_USART_DIRECTION_TX) \
00106                                        || ((__VALUE__) == LL_USART_DIRECTION_TX_RX))
00107 
00108 #define IS_LL_USART_PARITY(__VALUE__) (((__VALUE__) == LL_USART_PARITY_NONE) \
00109                                     || ((__VALUE__) == LL_USART_PARITY_EVEN) \
00110                                     || ((__VALUE__) == LL_USART_PARITY_ODD))
00111 
00112 #define IS_LL_USART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_USART_DATAWIDTH_7B) \
00113                                        || ((__VALUE__) == LL_USART_DATAWIDTH_8B) \
00114                                        || ((__VALUE__) == LL_USART_DATAWIDTH_9B))
00115 
00116 #define IS_LL_USART_OVERSAMPLING(__VALUE__) (((__VALUE__) == LL_USART_OVERSAMPLING_16) \
00117                                           || ((__VALUE__) == LL_USART_OVERSAMPLING_8))
00118 
00119 #define IS_LL_USART_LASTBITCLKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_LASTCLKPULSE_NO_OUTPUT) \
00120                                               || ((__VALUE__) == LL_USART_LASTCLKPULSE_OUTPUT))
00121 
00122 #define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \
00123                                         || ((__VALUE__) == LL_USART_PHASE_2EDGE))
00124 
00125 #define IS_LL_USART_CLOCKPOLARITY(__VALUE__) (((__VALUE__) == LL_USART_POLARITY_LOW) \
00126                                            || ((__VALUE__) == LL_USART_POLARITY_HIGH))
00127 
00128 #define IS_LL_USART_CLOCKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_CLOCK_DISABLE) \
00129                                          || ((__VALUE__) == LL_USART_CLOCK_ENABLE))
00130 
00131 #define IS_LL_USART_STOPBITS(__VALUE__) (((__VALUE__) == LL_USART_STOPBITS_0_5) \
00132                                       || ((__VALUE__) == LL_USART_STOPBITS_1) \
00133                                       || ((__VALUE__) == LL_USART_STOPBITS_1_5) \
00134                                       || ((__VALUE__) == LL_USART_STOPBITS_2))
00135 
00136 #define IS_LL_USART_HWCONTROL(__VALUE__) (((__VALUE__) == LL_USART_HWCONTROL_NONE) \
00137                                        || ((__VALUE__) == LL_USART_HWCONTROL_RTS) \
00138                                        || ((__VALUE__) == LL_USART_HWCONTROL_CTS) \
00139                                        || ((__VALUE__) == LL_USART_HWCONTROL_RTS_CTS))
00140 
00141 /**
00142   * @}
00143   */
00144 
00145 /* Private function prototypes -----------------------------------------------*/
00146 
00147 /* Exported functions --------------------------------------------------------*/
00148 /** @addtogroup USART_LL_Exported_Functions
00149   * @{
00150   */
00151 
00152 /** @addtogroup USART_LL_EF_Init
00153   * @{
00154   */
00155 
00156 /**
00157   * @brief  De-initialize USART registers (Registers restored to their default values).
00158   * @param  USARTx USART Instance
00159   * @retval An ErrorStatus enumeration value:
00160   *          - SUCCESS: USART registers are de-initialized
00161   *          - ERROR: USART registers are not de-initialized
00162   */
00163 ErrorStatus LL_USART_DeInit(USART_TypeDef *USARTx)
00164 {
00165   ErrorStatus status = SUCCESS;
00166 
00167   /* Check the parameters */
00168   assert_param(IS_UART_INSTANCE(USARTx));
00169 
00170   if (USARTx == USART1)
00171   {
00172     /* Force reset of USART clock */
00173     LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_USART1);
00174 
00175     /* Release reset of USART clock */
00176     LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_USART1);
00177   }
00178   else if (USARTx == USART2)
00179   {
00180     /* Force reset of USART clock */
00181     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART2);
00182 
00183     /* Release reset of USART clock */
00184     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART2);
00185   }
00186 #if defined(USART3)
00187   else if (USARTx == USART3)
00188   {
00189     /* Force reset of USART clock */
00190     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART3);
00191 
00192     /* Release reset of USART clock */
00193     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART3);
00194   }
00195 #endif /* USART3 */
00196 #if defined(UART4)
00197   else if (USARTx == UART4)
00198   {
00199     /* Force reset of UART clock */
00200     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART4);
00201 
00202     /* Release reset of UART clock */
00203     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART4);
00204   }
00205 #endif /* UART4 */
00206 #if defined(UART5)
00207   else if (USARTx == UART5)
00208   {
00209     /* Force reset of UART clock */
00210     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART5);
00211 
00212     /* Release reset of UART clock */
00213     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART5);
00214   }
00215 #endif /* UART5 */
00216   else
00217   {
00218     status = ERROR;
00219   }
00220 
00221   return (status);
00222 }
00223 
00224 /**
00225   * @brief  Initialize USART registers according to the specified
00226   *         parameters in USART_InitStruct.
00227   * @note   As some bits in USART configuration registers can only be written when the USART is disabled (USART_CR1_UE bit =0),
00228   *         USART IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
00229   * @note   Baud rate value stored in USART_InitStruct BaudRate field, should be valid (different from 0).
00230   * @param  USARTx USART Instance
00231   * @param  USART_InitStruct pointer to a LL_USART_InitTypeDef structure
00232   *         that contains the configuration information for the specified USART peripheral.
00233   * @retval An ErrorStatus enumeration value:
00234   *          - SUCCESS: USART registers are initialized according to USART_InitStruct content
00235   *          - ERROR: Problem occurred during USART Registers initialization
00236   */
00237 ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, LL_USART_InitTypeDef *USART_InitStruct)
00238 {
00239   ErrorStatus status = ERROR;
00240   uint32_t periphclk = LL_RCC_PERIPH_FREQUENCY_NO;
00241 
00242   /* Check the parameters */
00243   assert_param(IS_UART_INSTANCE(USARTx));
00244 #if defined(USART_PRESC_PRESCALER)
00245   assert_param(IS_LL_USART_PRESCALER(USART_InitStruct->PrescalerValue));
00246 #endif
00247   assert_param(IS_LL_USART_BAUDRATE(USART_InitStruct->BaudRate));
00248   assert_param(IS_LL_USART_DATAWIDTH(USART_InitStruct->DataWidth));
00249   assert_param(IS_LL_USART_STOPBITS(USART_InitStruct->StopBits));
00250   assert_param(IS_LL_USART_PARITY(USART_InitStruct->Parity));
00251   assert_param(IS_LL_USART_DIRECTION(USART_InitStruct->TransferDirection));
00252   assert_param(IS_LL_USART_HWCONTROL(USART_InitStruct->HardwareFlowControl));
00253   assert_param(IS_LL_USART_OVERSAMPLING(USART_InitStruct->OverSampling));
00254 
00255   /* USART needs to be in disabled state, in order to be able to configure some bits in
00256      CRx registers */
00257   if (LL_USART_IsEnabled(USARTx) == 0U)
00258   {
00259     /*---------------------------- USART CR1 Configuration ---------------------
00260      * Configure USARTx CR1 (USART Word Length, Parity, Mode and Oversampling bits) with parameters:
00261      * - DataWidth:          USART_CR1_M bits according to USART_InitStruct->DataWidth value
00262      * - Parity:             USART_CR1_PCE, USART_CR1_PS bits according to USART_InitStruct->Parity value
00263      * - TransferDirection:  USART_CR1_TE, USART_CR1_RE bits according to USART_InitStruct->TransferDirection value
00264      * - Oversampling:       USART_CR1_OVER8 bit according to USART_InitStruct->OverSampling value.
00265      */
00266     MODIFY_REG(USARTx->CR1,
00267                (USART_CR1_M | USART_CR1_PCE | USART_CR1_PS |
00268                 USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
00269                (USART_InitStruct->DataWidth | USART_InitStruct->Parity |
00270                 USART_InitStruct->TransferDirection | USART_InitStruct->OverSampling));
00271 
00272     /*---------------------------- USART CR2 Configuration ---------------------
00273      * Configure USARTx CR2 (Stop bits) with parameters:
00274      * - Stop Bits:          USART_CR2_STOP bits according to USART_InitStruct->StopBits value.
00275      * - CLKEN, CPOL, CPHA and LBCL bits are to be configured using LL_USART_ClockInit().
00276      */
00277     LL_USART_SetStopBitsLength(USARTx, USART_InitStruct->StopBits);
00278 
00279     /*---------------------------- USART CR3 Configuration ---------------------
00280      * Configure USARTx CR3 (Hardware Flow Control) with parameters:
00281      * - HardwareFlowControl: USART_CR3_RTSE, USART_CR3_CTSE bits according to USART_InitStruct->HardwareFlowControl value.
00282      */
00283     LL_USART_SetHWFlowCtrl(USARTx, USART_InitStruct->HardwareFlowControl);
00284 
00285     /*---------------------------- USART BRR Configuration ---------------------
00286      * Retrieve Clock frequency used for USART Peripheral
00287      */
00288     if (USARTx == USART1)
00289     {
00290       periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART1_CLKSOURCE);
00291     }
00292     else if (USARTx == USART2)
00293     {
00294       periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART2_CLKSOURCE);
00295     }
00296 #if defined(USART3)
00297     else if (USARTx == USART3)
00298     {
00299       periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART3_CLKSOURCE);
00300     }
00301 #endif /* USART3 */
00302 #if defined(UART4)
00303     else if (USARTx == UART4)
00304     {
00305       periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_UART4_CLKSOURCE);
00306     }
00307 #endif /* UART4 */
00308 #if defined(UART5)
00309     else if (USARTx == UART5)
00310     {
00311       periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_UART5_CLKSOURCE);
00312     }
00313 #endif /* UART5 */
00314     else
00315     {
00316       /* Nothing to do, as error code is already assigned to ERROR value */
00317     }
00318 
00319     /* Configure the USART Baud Rate :
00320     #if defined(USART_PRESC_PRESCALER)
00321        - prescaler value is required
00322     #endif
00323        - valid baud rate value (different from 0) is required
00324        - Peripheral clock as returned by RCC service, should be valid (different from 0).
00325     */
00326     if ((periphclk != LL_RCC_PERIPH_FREQUENCY_NO)
00327         && (USART_InitStruct->BaudRate != 0U))
00328     {
00329       status = SUCCESS;
00330       LL_USART_SetBaudRate(USARTx,
00331                            periphclk,
00332 #if defined(USART_PRESC_PRESCALER)
00333                            USART_InitStruct->PrescalerValue,
00334 #endif
00335                            USART_InitStruct->OverSampling,
00336                            USART_InitStruct->BaudRate);
00337 
00338       /* Check BRR is greater than or equal to 16d */
00339       assert_param(IS_LL_USART_BRR_MIN(USARTx->BRR));
00340 
00341       /* Check BRR is lower than or equal to 0xFFFF */
00342       assert_param(IS_LL_USART_BRR_MAX(USARTx->BRR));
00343     }
00344 
00345 #if defined(USART_PRESC_PRESCALER)
00346     /*---------------------------- USART PRESC Configuration -----------------------
00347      * Configure USARTx PRESC (Prescaler) with parameters:
00348      * - PrescalerValue: USART_PRESC_PRESCALER bits according to USART_InitStruct->PrescalerValue value.
00349      */
00350     LL_USART_SetPrescaler(USARTx, USART_InitStruct->PrescalerValue);
00351 #endif
00352   }
00353   /* Endif (=> USART not in Disabled state => return ERROR) */
00354 
00355   return (status);
00356 }
00357 
00358 /**
00359   * @brief Set each @ref LL_USART_InitTypeDef field to default value.
00360   * @param USART_InitStruct pointer to a @ref LL_USART_InitTypeDef structure
00361   *                         whose fields will be set to default values.
00362   * @retval None
00363   */
00364 
00365 void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct)
00366 {
00367   /* Set USART_InitStruct fields to default values */
00368 #if defined(USART_PRESC_PRESCALER)
00369   USART_InitStruct->PrescalerValue      = LL_USART_PRESCALER_DIV1;
00370 #endif
00371   USART_InitStruct->BaudRate            = 9600U;
00372   USART_InitStruct->DataWidth           = LL_USART_DATAWIDTH_8B;
00373   USART_InitStruct->StopBits            = LL_USART_STOPBITS_1;
00374   USART_InitStruct->Parity              = LL_USART_PARITY_NONE ;
00375   USART_InitStruct->TransferDirection   = LL_USART_DIRECTION_TX_RX;
00376   USART_InitStruct->HardwareFlowControl = LL_USART_HWCONTROL_NONE;
00377   USART_InitStruct->OverSampling        = LL_USART_OVERSAMPLING_16;
00378 }
00379 
00380 /**
00381   * @brief  Initialize USART Clock related settings according to the
00382   *         specified parameters in the USART_ClockInitStruct.
00383   * @note   As some bits in USART configuration registers can only be written when the USART is disabled (USART_CR1_UE bit =0),
00384   *         USART IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
00385   * @param  USARTx USART Instance
00386   * @param  USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure
00387   *         that contains the Clock configuration information for the specified USART peripheral.
00388   * @retval An ErrorStatus enumeration value:
00389   *          - SUCCESS: USART registers related to Clock settings are initialized according to USART_ClockInitStruct content
00390   *          - ERROR: Problem occurred during USART Registers initialization
00391   */
00392 ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
00393 {
00394   ErrorStatus status = SUCCESS;
00395 
00396   /* Check USART Instance and Clock signal output parameters */
00397   assert_param(IS_UART_INSTANCE(USARTx));
00398   assert_param(IS_LL_USART_CLOCKOUTPUT(USART_ClockInitStruct->ClockOutput));
00399 
00400   /* USART needs to be in disabled state, in order to be able to configure some bits in
00401      CRx registers */
00402   if (LL_USART_IsEnabled(USARTx) == 0U)
00403   {
00404     /*---------------------------- USART CR2 Configuration -----------------------*/
00405     /* If Clock signal has to be output */
00406     if (USART_ClockInitStruct->ClockOutput == LL_USART_CLOCK_DISABLE)
00407     {
00408       /* Deactivate Clock signal delivery :
00409        * - Disable Clock Output:        USART_CR2_CLKEN cleared
00410        */
00411       LL_USART_DisableSCLKOutput(USARTx);
00412     }
00413     else
00414     {
00415       /* Ensure USART instance is USART capable */
00416       assert_param(IS_USART_INSTANCE(USARTx));
00417 
00418       /* Check clock related parameters */
00419       assert_param(IS_LL_USART_CLOCKPOLARITY(USART_ClockInitStruct->ClockPolarity));
00420       assert_param(IS_LL_USART_CLOCKPHASE(USART_ClockInitStruct->ClockPhase));
00421       assert_param(IS_LL_USART_LASTBITCLKOUTPUT(USART_ClockInitStruct->LastBitClockPulse));
00422 
00423       /*---------------------------- USART CR2 Configuration -----------------------
00424        * Configure USARTx CR2 (Clock signal related bits) with parameters:
00425        * - Enable Clock Output:         USART_CR2_CLKEN set
00426        * - Clock Polarity:              USART_CR2_CPOL bit according to USART_ClockInitStruct->ClockPolarity value
00427        * - Clock Phase:                 USART_CR2_CPHA bit according to USART_ClockInitStruct->ClockPhase value
00428        * - Last Bit Clock Pulse Output: USART_CR2_LBCL bit according to USART_ClockInitStruct->LastBitClockPulse value.
00429        */
00430       MODIFY_REG(USARTx->CR2,
00431                  USART_CR2_CLKEN | USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL,
00432                  USART_CR2_CLKEN | USART_ClockInitStruct->ClockPolarity |
00433                  USART_ClockInitStruct->ClockPhase | USART_ClockInitStruct->LastBitClockPulse);
00434     }
00435   }
00436   /* Else (USART not in Disabled state => return ERROR */
00437   else
00438   {
00439     status = ERROR;
00440   }
00441 
00442   return (status);
00443 }
00444 
00445 /**
00446   * @brief Set each field of a @ref LL_USART_ClockInitTypeDef type structure to default value.
00447   * @param USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure
00448   *                              whose fields will be set to default values.
00449   * @retval None
00450   */
00451 void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
00452 {
00453   /* Set LL_USART_ClockInitStruct fields with default values */
00454   USART_ClockInitStruct->ClockOutput       = LL_USART_CLOCK_DISABLE;
00455   USART_ClockInitStruct->ClockPolarity     = LL_USART_POLARITY_LOW;            /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
00456   USART_ClockInitStruct->ClockPhase        = LL_USART_PHASE_1EDGE;             /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
00457   USART_ClockInitStruct->LastBitClockPulse = LL_USART_LASTCLKPULSE_NO_OUTPUT;  /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
00458 }
00459 
00460 /**
00461   * @}
00462   */
00463 
00464 /**
00465   * @}
00466   */
00467 
00468 /**
00469   * @}
00470   */
00471 
00472 #endif /* USART1 || USART2 || USART3 || UART4 || UART5 */
00473 
00474 /**
00475   * @}
00476   */
00477 
00478 #endif /* USE_FULL_LL_DRIVER */
00479 
00480 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
00481