STM32L486xx HAL User Manual
Data Fields
ADC_MultiModeTypeDef Struct Reference

Structure definition of ADC multimode. More...

#include <stm32l4xx_hal_adc_ex.h>

Data Fields

uint32_t Mode
uint32_t DMAAccessMode
uint32_t TwoSamplingDelay

Detailed Description

Structure definition of ADC multimode.

Note:
The setting of these parameters by function HAL_ADCEx_MultiModeConfigChannel() is conditioned by ADCs state (both Master and Slave ADCs). Both Master and Slave ADCs must be disabled.

Definition at line 196 of file stm32l4xx_hal_adc_ex.h.


Field Documentation

Configures the DMA mode for multimode ADC: selection whether 2 DMA channels (each ADC uses its own DMA channel) or 1 DMA channel (one DMA channel for both ADC, DMA of ADC master) This parameter can be a value of Multimode - DMA transfer mode depending on ADC resolution.

Definition at line 201 of file stm32l4xx_hal_adc_ex.h.

Referenced by HAL_ADCEx_MultiModeConfigChannel().

Configures the ADC to operate in independent or multimode. This parameter can be a value of Multimode - Mode.

Definition at line 198 of file stm32l4xx_hal_adc_ex.h.

Referenced by HAL_ADCEx_MultiModeConfigChannel().

Configures the Delay between 2 sampling phases. This parameter can be a value of Multimode - Delay between two sampling phases. Delay range depends on selected resolution: from 1 to 12 clock cycles for 12 bits, from 1 to 10 clock cycles for 10 bits, from 1 to 8 clock cycles for 8 bits, from 1 to 6 clock cycles for 6 bits.

Definition at line 205 of file stm32l4xx_hal_adc_ex.h.

Referenced by HAL_ADCEx_MultiModeConfigChannel().


The documentation for this struct was generated from the following file: