|
STM32L486xx HAL User Manual
|
00001 /** 00002 ****************************************************************************** 00003 * @file stm32l4xx_hal_tim_ex.h 00004 * @author MCD Application Team 00005 * @brief Header file of TIM HAL Extended module. 00006 ****************************************************************************** 00007 * @attention 00008 * 00009 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> 00010 * 00011 * Redistribution and use in source and binary forms, with or without modification, 00012 * are permitted provided that the following conditions are met: 00013 * 1. Redistributions of source code must retain the above copyright notice, 00014 * this list of conditions and the following disclaimer. 00015 * 2. Redistributions in binary form must reproduce the above copyright notice, 00016 * this list of conditions and the following disclaimer in the documentation 00017 * and/or other materials provided with the distribution. 00018 * 3. Neither the name of STMicroelectronics nor the names of its contributors 00019 * may be used to endorse or promote products derived from this software 00020 * without specific prior written permission. 00021 * 00022 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 00023 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 00024 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 00025 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 00026 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 00027 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 00028 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00029 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 00030 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 00031 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00032 * 00033 ****************************************************************************** 00034 */ 00035 00036 /* Define to prevent recursive inclusion -------------------------------------*/ 00037 #ifndef STM32L4xx_HAL_TIM_EX_H 00038 #define STM32L4xx_HAL_TIM_EX_H 00039 00040 #ifdef __cplusplus 00041 extern "C" { 00042 #endif 00043 00044 /* Includes ------------------------------------------------------------------*/ 00045 #include "stm32l4xx_hal_def.h" 00046 00047 /** @addtogroup STM32L4xx_HAL_Driver 00048 * @{ 00049 */ 00050 00051 /** @addtogroup TIMEx 00052 * @{ 00053 */ 00054 00055 /* Exported types ------------------------------------------------------------*/ 00056 /** @defgroup TIMEx_Exported_Types TIM Extended Exported Types 00057 * @{ 00058 */ 00059 00060 /** 00061 * @brief TIM Hall sensor Configuration Structure definition 00062 */ 00063 00064 typedef struct 00065 { 00066 uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal. 00067 This parameter can be a value of @ref TIM_Input_Capture_Polarity */ 00068 00069 uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler. 00070 This parameter can be a value of @ref TIM_Input_Capture_Prescaler */ 00071 00072 uint32_t IC1Filter; /*!< Specifies the input capture filter. 00073 This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ 00074 00075 uint32_t Commutation_Delay; /*!< Specifies the pulse value to be loaded into the Capture Compare Register. 00076 This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */ 00077 } TIM_HallSensor_InitTypeDef; 00078 00079 /** 00080 * @brief TIM Break/Break2 input configuration 00081 */ 00082 typedef struct 00083 { 00084 uint32_t Source; /*!< Specifies the source of the timer break input. 00085 This parameter can be a value of @ref TIMEx_Break_Input_Source */ 00086 uint32_t Enable; /*!< Specifies whether or not the break input source is enabled. 00087 This parameter can be a value of @ref TIMEx_Break_Input_Source_Enable */ 00088 uint32_t Polarity; /*!< Specifies the break input source polarity. 00089 This parameter can be a value of @ref TIMEx_Break_Input_Source_Polarity 00090 Not relevant when analog watchdog output of the DFSDM1 used as break input source */ 00091 } 00092 TIMEx_BreakInputConfigTypeDef; 00093 00094 /** 00095 * @} 00096 */ 00097 /* End of exported types -----------------------------------------------------*/ 00098 00099 /* Exported constants --------------------------------------------------------*/ 00100 /** @defgroup TIMEx_Exported_Constants TIM Extended Exported Constants 00101 * @{ 00102 */ 00103 00104 /** @defgroup TIMEx_Remap TIM Extended Remapping 00105 * @{ 00106 */ 00107 #define TIM_TIM1_ETR_ADC1_NONE 0x00000000U /* !< TIM1_ETR is not connected to any AWD (analog watchdog)*/ 00108 #define TIM_TIM1_ETR_ADC1_AWD1 TIM1_OR1_ETR_ADC1_RMP_0 /* !< TIM1_ETR is connected to ADC1 AWD1 */ 00109 #define TIM_TIM1_ETR_ADC1_AWD2 TIM1_OR1_ETR_ADC1_RMP_1 /* !< TIM1_ETR is connected to ADC1 AWD2 */ 00110 #define TIM_TIM1_ETR_ADC1_AWD3 (TIM1_OR1_ETR_ADC1_RMP_1 | TIM1_OR1_ETR_ADC1_RMP_0) /* !< TIM1_ETR is connected to ADC1 AWD3 */ 00111 #if defined (ADC3) 00112 #define TIM_TIM1_ETR_ADC3_NONE 0x00000000U /* !< TIM1_ETR is not connected to any AWD (analog watchdog)*/ 00113 #define TIM_TIM1_ETR_ADC3_AWD1 TIM1_OR1_ETR_ADC3_RMP_0 /* !< TIM1_ETR is connected to ADC3 AWD1 */ 00114 #define TIM_TIM1_ETR_ADC3_AWD2 TIM1_OR1_ETR_ADC3_RMP_1 /* !< TIM1_ETR is connected to ADC3 AWD2 */ 00115 #define TIM_TIM1_ETR_ADC3_AWD3 (TIM1_OR1_ETR_ADC3_RMP_1 | TIM1_OR1_ETR_ADC3_RMP_0) /* !< TIM1_ETR is connected to ADC3 AWD3 */ 00116 #endif /* ADC3 */ 00117 #define TIM_TIM1_TI1_GPIO 0x00000000U /* !< TIM1 TI1 is connected to GPIO */ 00118 #define TIM_TIM1_TI1_COMP1 TIM1_OR1_TI1_RMP /* !< TIM1 TI1 is connected to COMP1 */ 00119 #define TIM_TIM1_ETR_GPIO 0x00000000U /* !< TIM1_ETR is connected to GPIO */ 00120 #define TIM_TIM1_ETR_COMP1 TIM1_OR2_ETRSEL_0 /* !< TIM1_ETR is connected to COMP1 output */ 00121 #define TIM_TIM1_ETR_COMP2 TIM1_OR2_ETRSEL_1 /* !< TIM1_ETR is connected to COMP2 output */ 00122 00123 #if defined (USB_OTG_FS) 00124 #define TIM_TIM2_ITR1_TIM8_TRGO 0x00000000U /* !< TIM2_ITR1 is connected to TIM8_TRGO */ 00125 #define TIM_TIM2_ITR1_OTG_FS_SOF TIM2_OR1_ITR1_RMP /* !< TIM2_ITR1 is connected to OTG_FS SOF */ 00126 #else 00127 #if defined(STM32L471xx) 00128 #define TIM_TIM2_ITR1_TIM8_TRGO 0x00000000U /* !< TIM2_ITR1 is connected to TIM8_TRGO */ 00129 #define TIM_TIM2_ITR1_NONE TIM2_OR1_ITR1_RMP /* !< No internal trigger on TIM2_ITR1 */ 00130 #else 00131 #define TIM_TIM2_ITR1_NONE 0x00000000U /* !< No internal trigger on TIM2_ITR1 */ 00132 #define TIM_TIM2_ITR1_USB_SOF TIM2_OR1_ITR1_RMP /* !< TIM2_ITR1 is connected to USB SOF */ 00133 #endif /* STM32L471xx */ 00134 #endif /* USB_OTG_FS */ 00135 #define TIM_TIM2_ETR_GPIO 0x00000000U /* !< TIM2_ETR is connected to GPIO */ 00136 #define TIM_TIM2_ETR_LSE TIM2_OR1_ETR1_RMP /* !< TIM2_ETR is connected to LSE */ 00137 #define TIM_TIM2_ETR_COMP1 TIM2_OR2_ETRSEL_0 /* !< TIM2_ETR is connected to COMP1 output */ 00138 #define TIM_TIM2_ETR_COMP2 TIM2_OR2_ETRSEL_1 /* !< TIM2_ETR is connected to COMP2 output */ 00139 #define TIM_TIM2_TI4_GPIO 0x00000000U /* !< TIM2 TI4 is connected to GPIO */ 00140 #define TIM_TIM2_TI4_COMP1 TIM2_OR1_TI4_RMP_0 /* !< TIM2 TI4 is connected to COMP1 output */ 00141 #define TIM_TIM2_TI4_COMP2 TIM2_OR1_TI4_RMP_1 /* !< TIM2 TI4 is connected to COMP2 output */ 00142 #define TIM_TIM2_TI4_COMP1_COMP2 (TIM2_OR1_TI4_RMP_1| TIM2_OR1_TI4_RMP_0) /* !< TIM2 TI4 is connected to logical OR between COMP1 and COMP2 output2 */ 00143 00144 #if defined (TIM3) 00145 #define TIM_TIM3_TI1_GPIO 0x00000000U /* !< TIM3 TI1 is connected to GPIO */ 00146 #define TIM_TIM3_TI1_COMP1 TIM3_OR1_TI1_RMP_0 /* !< TIM3 TI1 is connected to COMP1 output */ 00147 #define TIM_TIM3_TI1_COMP2 TIM3_OR1_TI1_RMP_1 /* !< TIM3 TI1 is connected to COMP2 output */ 00148 #define TIM_TIM3_TI1_COMP1_COMP2 (TIM3_OR1_TI1_RMP_1 | TIM3_OR1_TI1_RMP_0) /* !< TIM3 TI1 is connected to logical OR between COMP1 and COMP2 output2 */ 00149 #define TIM_TIM3_ETR_GPIO 0x00000000U /* !< TIM3_ETR is connected to GPIO */ 00150 #define TIM_TIM3_ETR_COMP1 TIM3_OR2_ETRSEL_0 /* !< TIM3_ETR is connected to COMP1 output */ 00151 #endif /* TIM3 */ 00152 00153 #if defined (TIM8) 00154 #if defined(ADC2) && defined(ADC3) 00155 #define TIM_TIM8_ETR_ADC2_NONE 0x00000000U /* !< TIM8_ETR is not connected to any AWD (analog watchdog)*/ 00156 #define TIM_TIM8_ETR_ADC2_AWD1 TIM8_OR1_ETR_ADC2_RMP_0 /* !< TIM8_ETR is connected to ADC2 AWD1 */ 00157 #define TIM_TIM8_ETR_ADC2_AWD2 TIM8_OR1_ETR_ADC2_RMP_1 /* !< TIM8_ETR is connected to ADC2 AWD2 */ 00158 #define TIM_TIM8_ETR_ADC2_AWD3 (TIM8_OR1_ETR_ADC2_RMP_1 | TIM8_OR1_ETR_ADC2_RMP_0) /* !< TIM8_ETR is connected to ADC2 AWD3 */ 00159 #define TIM_TIM8_ETR_ADC3_NONE 0x00000000U /* !< TIM8_ETR is not connected to any AWD (analog watchdog)*/ 00160 #define TIM_TIM8_ETR_ADC3_AWD1 TIM8_OR1_ETR_ADC3_RMP_0 /* !< TIM8_ETR is connected to ADC3 AWD1 */ 00161 #define TIM_TIM8_ETR_ADC3_AWD2 TIM8_OR1_ETR_ADC3_RMP_1 /* !< TIM8_ETR is connected to ADC3 AWD2 */ 00162 #define TIM_TIM8_ETR_ADC3_AWD3 (TIM8_OR1_ETR_ADC3_RMP_1 | TIM8_OR1_ETR_ADC3_RMP_0) /* !< TIM8_ETR is connected to ADC3 AWD3 */ 00163 #endif /* ADC2 && ADC3 */ 00164 00165 #define TIM_TIM8_TI1_GPIO 0x00000000U /* !< TIM8 TI1 is connected to GPIO */ 00166 #define TIM_TIM8_TI1_COMP2 TIM8_OR1_TI1_RMP /* !< TIM8 TI1 is connected to COMP1 */ 00167 #define TIM_TIM8_ETR_GPIO 0x00000000U /* !< TIM8_ETR is connected to GPIO */ 00168 #define TIM_TIM8_ETR_COMP1 TIM8_OR2_ETRSEL_0 /* !< TIM8_ETR is connected to COMP1 output */ 00169 #define TIM_TIM8_ETR_COMP2 TIM8_OR2_ETRSEL_1 /* !< TIM8_ETR is connected to COMP2 output */ 00170 #endif /* TIM8 */ 00171 00172 #define TIM_TIM15_TI1_GPIO 0x00000000U /* !< TIM15 TI1 is connected to GPIO */ 00173 #define TIM_TIM15_TI1_LSE TIM15_OR1_TI1_RMP /* !< TIM15 TI1 is connected to LSE */ 00174 #define TIM_TIM15_ENCODERMODE_NONE 0x00000000U /* !< No redirection */ 00175 #define TIM_TIM15_ENCODERMODE_TIM2 TIM15_OR1_ENCODER_MODE_0 /* !< TIM2 IC1 and TIM2 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively */ 00176 #if defined (TIM3) 00177 #define TIM_TIM15_ENCODERMODE_TIM3 TIM15_OR1_ENCODER_MODE_1 /* !< TIM3 IC1 and TIM3 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively */ 00178 #endif /* TIM3 */ 00179 #if defined (TIM4) 00180 #define TIM_TIM15_ENCODERMODE_TIM4 (TIM15_OR1_ENCODER_MODE_1 | TIM15_OR1_ENCODER_MODE_0) /* !< TIM4 IC1 and TIM4 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively */ 00181 #endif /* TIM4 */ 00182 00183 #define TIM_TIM16_TI1_GPIO 0x00000000U /* !< TIM16 TI1 is connected to GPIO */ 00184 #define TIM_TIM16_TI1_LSI TIM16_OR1_TI1_RMP_0 /* !< TIM16 TI1 is connected to LSI */ 00185 #define TIM_TIM16_TI1_LSE TIM16_OR1_TI1_RMP_1 /* !< TIM16 TI1 is connected to LSE */ 00186 #define TIM_TIM16_TI1_RTC (TIM16_OR1_TI1_RMP_1 | TIM16_OR1_TI1_RMP_0) /* !< TIM16 TI1 is connected to RTC wakeup interrupt */ 00187 #if defined (TIM16_OR1_TI1_RMP_2) 00188 #define TIM_TIM16_TI1_MSI TIM16_OR1_TI1_RMP_2 /* !< TIM16 TI1 is connected to MSI */ 00189 #define TIM_TIM16_TI1_HSE_32 (TIM16_OR1_TI1_RMP_2 | TIM16_OR1_TI1_RMP_0) /* !< TIM16 TI1 is connected to HSE div 32 */ 00190 #define TIM_TIM16_TI1_MCO (TIM16_OR1_TI1_RMP_2 | TIM16_OR1_TI1_RMP_1) /* !< TIM16 TI1 is connected to MCO */ 00191 #endif /* TIM16_OR1_TI1_RMP_2 */ 00192 00193 #if defined (TIM17) 00194 #define TIM_TIM17_TI1_GPIO 0x00000000U /* !< TIM17 TI1 is connected to GPIO */ 00195 #define TIM_TIM17_TI1_MSI TIM17_OR1_TI1_RMP_0 /* !< TIM17 TI1 is connected to MSI */ 00196 #define TIM_TIM17_TI1_HSE_32 TIM17_OR1_TI1_RMP_1 /* !< TIM17 TI1 is connected to HSE div 32 */ 00197 #define TIM_TIM17_TI1_MCO (TIM17_OR1_TI1_RMP_1 | TIM17_OR1_TI1_RMP_0) /* !< TIM17 TI1 is connected to MCO */ 00198 #endif /* TIM17 */ 00199 /** 00200 * @} 00201 */ 00202 00203 /** @defgroup TIMEx_Break_Input TIM Extended Break input 00204 * @{ 00205 */ 00206 #define TIM_BREAKINPUT_BRK 0x00000001U /* !< Timer break input */ 00207 #define TIM_BREAKINPUT_BRK2 0x00000002U /* !< Timer break2 input */ 00208 /** 00209 * @} 00210 */ 00211 00212 /** @defgroup TIMEx_Break_Input_Source TIM Extended Break input source 00213 * @{ 00214 */ 00215 #define TIM_BREAKINPUTSOURCE_BKIN 0x00000001U /* !< An external source (GPIO) is connected to the BKIN pin */ 00216 #define TIM_BREAKINPUTSOURCE_COMP1 0x00000002U /* !< The COMP1 output is connected to the break input */ 00217 #define TIM_BREAKINPUTSOURCE_COMP2 0x00000004U /* !< The COMP2 output is connected to the break input */ 00218 #if defined (DFSDM1_Channel0) 00219 #define TIM_BREAKINPUTSOURCE_DFSDM1 0x00000008U /* !< The analog watchdog output of the DFSDM1 peripheral is connected to the break input */ 00220 #endif /* DFSDM1_Channel0 */ 00221 /** 00222 * @} 00223 */ 00224 00225 /** @defgroup TIMEx_Break_Input_Source_Enable TIM Extended Break input source enabling 00226 * @{ 00227 */ 00228 #define TIM_BREAKINPUTSOURCE_DISABLE 0x00000000U /* !< Break input source is disabled */ 00229 #define TIM_BREAKINPUTSOURCE_ENABLE 0x00000001U /* !< Break input source is enabled */ 00230 /** 00231 * @} 00232 */ 00233 00234 /** @defgroup TIMEx_Break_Input_Source_Polarity TIM Extended Break input polarity 00235 * @{ 00236 */ 00237 #define TIM_BREAKINPUTSOURCE_POLARITY_LOW 0x00000001U /* !< Break input source is active low */ 00238 #define TIM_BREAKINPUTSOURCE_POLARITY_HIGH 0x00000000U /* !< Break input source is active_high */ 00239 /** 00240 * @} 00241 */ 00242 00243 /** 00244 * @} 00245 */ 00246 /* End of exported constants -------------------------------------------------*/ 00247 00248 /* Exported macro ------------------------------------------------------------*/ 00249 /** @defgroup TIMEx_Exported_Macros TIM Extended Exported Macros 00250 * @{ 00251 */ 00252 00253 /** 00254 * @} 00255 */ 00256 /* End of exported macro -----------------------------------------------------*/ 00257 00258 /* Private macro -------------------------------------------------------------*/ 00259 /** @defgroup TIMEx_Private_Macros TIM Extended Private Macros 00260 * @{ 00261 */ 00262 #define IS_TIM_REMAP(__REMAP__) (((__REMAP__) <= (uint32_t)0x0001C01F)) 00263 00264 #define IS_TIM_BREAKINPUT(__BREAKINPUT__) (((__BREAKINPUT__) == TIM_BREAKINPUT_BRK) || \ 00265 ((__BREAKINPUT__) == TIM_BREAKINPUT_BRK2)) 00266 00267 #if defined (DFSDM1_Channel0) 00268 #define IS_TIM_BREAKINPUTSOURCE(__SOURCE__) (((__SOURCE__) == TIM_BREAKINPUTSOURCE_BKIN) || \ 00269 ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP1) || \ 00270 ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP2) || \ 00271 ((__SOURCE__) == TIM_BREAKINPUTSOURCE_DFSDM1)) 00272 #else 00273 #define IS_TIM_BREAKINPUTSOURCE(__SOURCE__) (((__SOURCE__) == TIM_BREAKINPUTSOURCE_BKIN) || \ 00274 ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP1) || \ 00275 ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP2)) 00276 #endif /* DFSDM1_Channel0 */ 00277 00278 #define IS_TIM_BREAKINPUTSOURCE_STATE(__STATE__) (((__STATE__) == TIM_BREAKINPUTSOURCE_DISABLE) || \ 00279 ((__STATE__) == TIM_BREAKINPUTSOURCE_ENABLE)) 00280 00281 #define IS_TIM_BREAKINPUTSOURCE_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_BREAKINPUTSOURCE_POLARITY_LOW) || \ 00282 ((__POLARITY__) == TIM_BREAKINPUTSOURCE_POLARITY_HIGH)) 00283 00284 /** 00285 * @} 00286 */ 00287 /* End of private macro ------------------------------------------------------*/ 00288 00289 /* Exported functions --------------------------------------------------------*/ 00290 /** @addtogroup TIMEx_Exported_Functions TIM Extended Exported Functions 00291 * @{ 00292 */ 00293 00294 /** @addtogroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions 00295 * @brief Timer Hall Sensor functions 00296 * @{ 00297 */ 00298 /* Timer Hall Sensor functions **********************************************/ 00299 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef *sConfig); 00300 HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim); 00301 00302 void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim); 00303 void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim); 00304 00305 /* Blocking mode: Polling */ 00306 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim); 00307 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim); 00308 /* Non-Blocking mode: Interrupt */ 00309 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim); 00310 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim); 00311 /* Non-Blocking mode: DMA */ 00312 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length); 00313 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim); 00314 /** 00315 * @} 00316 */ 00317 00318 /** @addtogroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions 00319 * @brief Timer Complementary Output Compare functions 00320 * @{ 00321 */ 00322 /* Timer Complementary Output Compare functions *****************************/ 00323 /* Blocking mode: Polling */ 00324 HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel); 00325 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel); 00326 00327 /* Non-Blocking mode: Interrupt */ 00328 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel); 00329 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel); 00330 00331 /* Non-Blocking mode: DMA */ 00332 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length); 00333 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel); 00334 /** 00335 * @} 00336 */ 00337 00338 /** @addtogroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions 00339 * @brief Timer Complementary PWM functions 00340 * @{ 00341 */ 00342 /* Timer Complementary PWM functions ****************************************/ 00343 /* Blocking mode: Polling */ 00344 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel); 00345 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel); 00346 00347 /* Non-Blocking mode: Interrupt */ 00348 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel); 00349 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel); 00350 /* Non-Blocking mode: DMA */ 00351 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length); 00352 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel); 00353 /** 00354 * @} 00355 */ 00356 00357 /** @addtogroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions 00358 * @brief Timer Complementary One Pulse functions 00359 * @{ 00360 */ 00361 /* Timer Complementary One Pulse functions **********************************/ 00362 /* Blocking mode: Polling */ 00363 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel); 00364 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel); 00365 00366 /* Non-Blocking mode: Interrupt */ 00367 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel); 00368 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel); 00369 /** 00370 * @} 00371 */ 00372 00373 /** @addtogroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions 00374 * @brief Peripheral Control functions 00375 * @{ 00376 */ 00377 /* Extended Control functions ************************************************/ 00378 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource); 00379 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource); 00380 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource); 00381 HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, TIM_MasterConfigTypeDef *sMasterConfig); 00382 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim, TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig); 00383 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput, TIMEx_BreakInputConfigTypeDef *sBreakInputConfig); 00384 HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t Channels); 00385 HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap); 00386 /** 00387 * @} 00388 */ 00389 00390 /** @addtogroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions 00391 * @brief Extended Callbacks functions 00392 * @{ 00393 */ 00394 /* Extended Callback **********************************************************/ 00395 void HAL_TIMEx_CommutationCallback(TIM_HandleTypeDef *htim); 00396 void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim); 00397 void HAL_TIMEx_Break2Callback(TIM_HandleTypeDef *htim); 00398 /** 00399 * @} 00400 */ 00401 00402 /** @addtogroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions 00403 * @brief Extended Peripheral State functions 00404 * @{ 00405 */ 00406 /* Extended Peripheral State functions ***************************************/ 00407 HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim); 00408 /** 00409 * @} 00410 */ 00411 00412 /** 00413 * @} 00414 */ 00415 /* End of exported functions -------------------------------------------------*/ 00416 00417 /* Private functions----------------------------------------------------------*/ 00418 /** @defgroup TIMEx_Private_Functions TIMEx Private Functions 00419 * @{ 00420 */ 00421 void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma); 00422 /** 00423 * @} 00424 */ 00425 /* End of private functions --------------------------------------------------*/ 00426 00427 /** 00428 * @} 00429 */ 00430 00431 /** 00432 * @} 00433 */ 00434 00435 #ifdef __cplusplus 00436 } 00437 #endif 00438 00439 00440 #endif /* STM32L4xx_HAL_TIM_EX_H */ 00441 00442 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
1.7.6.1