STM32F439xx HAL User Manual
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32f4xx_hal_tim_ex.c 00004 * @author MCD Application Team 00005 * @brief TIM HAL module driver. 00006 * This file provides firmware functions to manage the following 00007 * functionalities of the Timer extension peripheral: 00008 * + Time Hall Sensor Interface Initialization 00009 * + Time Hall Sensor Interface Start 00010 * + Time Complementary signal bread and dead time configuration 00011 * + Time Master and Slave synchronization configuration 00012 @verbatim 00013 ============================================================================== 00014 ##### TIMER Extended features ##### 00015 ============================================================================== 00016 [..] 00017 The Timer Extension features include: 00018 (#) Complementary outputs with programmable dead-time for : 00019 (++) Input Capture 00020 (++) Output Compare 00021 (++) PWM generation (Edge and Center-aligned Mode) 00022 (++) One-pulse mode output 00023 (#) Synchronization circuit to control the timer with external signals and to 00024 interconnect several timers together. 00025 (#) Break input to put the timer output signals in reset state or in a known state. 00026 (#) Supports incremental (quadrature) encoder and hall-sensor circuitry for 00027 positioning purposes 00028 00029 ##### How to use this driver ##### 00030 ============================================================================== 00031 [..] 00032 (#) Initialize the TIM low level resources by implementing the following functions 00033 depending from feature used : 00034 (++) Complementary Output Compare : HAL_TIM_OC_MspInit() 00035 (++) Complementary PWM generation : HAL_TIM_PWM_MspInit() 00036 (++) Complementary One-pulse mode output : HAL_TIM_OnePulse_MspInit() 00037 (++) Hall Sensor output : HAL_TIM_HallSensor_MspInit() 00038 00039 (#) Initialize the TIM low level resources : 00040 (##) Enable the TIM interface clock using __TIMx_CLK_ENABLE(); 00041 (##) TIM pins configuration 00042 (+++) Enable the clock for the TIM GPIOs using the following function: 00043 __GPIOx_CLK_ENABLE(); 00044 (+++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init(); 00045 00046 (#) The external Clock can be configured, if needed (the default clock is the 00047 internal clock from the APBx), using the following function: 00048 HAL_TIM_ConfigClockSource, the clock configuration should be done before 00049 any start function. 00050 00051 (#) Configure the TIM in the desired functioning mode using one of the 00052 initialization function of this driver: 00053 (++) HAL_TIMEx_HallSensor_Init and HAL_TIMEx_ConfigCommutationEvent: to use the 00054 Timer Hall Sensor Interface and the commutation event with the corresponding 00055 Interrupt and DMA request if needed (Note that One Timer is used to interface 00056 with the Hall sensor Interface and another Timer should be used to use 00057 the commutation event). 00058 00059 (#) Activate the TIM peripheral using one of the start functions: 00060 (++) Complementary Output Compare : HAL_TIMEx_OCN_Start(), HAL_TIMEx_OCN_Start_DMA(), HAL_TIMEx_OC_Start_IT() 00061 (++) Complementary PWM generation : HAL_TIMEx_PWMN_Start(), HAL_TIMEx_PWMN_Start_DMA(), HAL_TIMEx_PWMN_Start_IT() 00062 (++) Complementary One-pulse mode output : HAL_TIMEx_OnePulseN_Start(), HAL_TIMEx_OnePulseN_Start_IT() 00063 (++) Hall Sensor output : HAL_TIMEx_HallSensor_Start(), HAL_TIMEx_HallSensor_Start_DMA(), HAL_TIMEx_HallSensor_Start_IT(). 00064 00065 00066 @endverbatim 00067 ****************************************************************************** 00068 * @attention 00069 * 00070 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> 00071 * 00072 * Redistribution and use in source and binary forms, with or without modification, 00073 * are permitted provided that the following conditions are met: 00074 * 1. Redistributions of source code must retain the above copyright notice, 00075 * this list of conditions and the following disclaimer. 00076 * 2. Redistributions in binary form must reproduce the above copyright notice, 00077 * this list of conditions and the following disclaimer in the documentation 00078 * and/or other materials provided with the distribution. 00079 * 3. Neither the name of STMicroelectronics nor the names of its contributors 00080 * may be used to endorse or promote products derived from this software 00081 * without specific prior written permission. 00082 * 00083 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 00084 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 00085 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 00086 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 00087 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 00088 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 00089 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00090 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 00091 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 00092 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00093 * 00094 ****************************************************************************** 00095 */ 00096 00097 /* Includes ------------------------------------------------------------------*/ 00098 #include "stm32f4xx_hal.h" 00099 00100 /** @addtogroup STM32F4xx_HAL_Driver 00101 * @{ 00102 */ 00103 00104 /** @defgroup TIMEx TIMEx 00105 * @brief TIM HAL module driver 00106 * @{ 00107 */ 00108 00109 #ifdef HAL_TIM_MODULE_ENABLED 00110 00111 /* Private typedef -----------------------------------------------------------*/ 00112 /* Private define ------------------------------------------------------------*/ 00113 /* Private macro -------------------------------------------------------------*/ 00114 /* Private variables ---------------------------------------------------------*/ 00115 /** @addtogroup TIMEx_Private_Functions 00116 * @{ 00117 */ 00118 /* Private function prototypes -----------------------------------------------*/ 00119 static void TIM_CCxNChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelNState); 00120 /** 00121 * @} 00122 */ 00123 00124 /* Exported functions --------------------------------------------------------*/ 00125 /** @defgroup TIMEx_Exported_Functions TIM Exported Functions 00126 * @{ 00127 */ 00128 00129 /** @defgroup TIMEx_Exported_Functions_Group1 Timer Hall Sensor functions 00130 * @brief Timer Hall Sensor functions 00131 * 00132 @verbatim 00133 ============================================================================== 00134 ##### Timer Hall Sensor functions ##### 00135 ============================================================================== 00136 [..] 00137 This section provides functions allowing to: 00138 (+) Initialize and configure TIM HAL Sensor. 00139 (+) De-initialize TIM HAL Sensor. 00140 (+) Start the Hall Sensor Interface. 00141 (+) Stop the Hall Sensor Interface. 00142 (+) Start the Hall Sensor Interface and enable interrupts. 00143 (+) Stop the Hall Sensor Interface and disable interrupts. 00144 (+) Start the Hall Sensor Interface and enable DMA transfers. 00145 (+) Stop the Hall Sensor Interface and disable DMA transfers. 00146 00147 @endverbatim 00148 * @{ 00149 */ 00150 /** 00151 * @brief Initializes the TIM Hall Sensor Interface and create the associated handle. 00152 * @param htim pointer to a TIM_HandleTypeDef structure that contains 00153 * the configuration information for TIM module. 00154 * @param sConfig TIM Hall Sensor configuration structure 00155 * @retval HAL status 00156 */ 00157 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef* sConfig) 00158 { 00159 TIM_OC_InitTypeDef OC_Config; 00160 00161 /* Check the TIM handle allocation */ 00162 if(htim == NULL) 00163 { 00164 return HAL_ERROR; 00165 } 00166 00167 assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); 00168 assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); 00169 assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); 00170 assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity)); 00171 assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler)); 00172 assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter)); 00173 00174 /* Set the TIM state */ 00175 htim->State= HAL_TIM_STATE_BUSY; 00176 00177 /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ 00178 HAL_TIMEx_HallSensor_MspInit(htim); 00179 00180 /* Configure the Time base in the Encoder Mode */ 00181 TIM_Base_SetConfig(htim->Instance, &htim->Init); 00182 00183 /* Configure the Channel 1 as Input Channel to interface with the three Outputs of the Hall sensor */ 00184 TIM_TI1_SetConfig(htim->Instance, sConfig->IC1Polarity, TIM_ICSELECTION_TRC, sConfig->IC1Filter); 00185 00186 /* Reset the IC1PSC Bits */ 00187 htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC; 00188 /* Set the IC1PSC value */ 00189 htim->Instance->CCMR1 |= sConfig->IC1Prescaler; 00190 00191 /* Enable the Hall sensor interface (XOR function of the three inputs) */ 00192 htim->Instance->CR2 |= TIM_CR2_TI1S; 00193 00194 /* Select the TIM_TS_TI1F_ED signal as Input trigger for the TIM */ 00195 htim->Instance->SMCR &= ~TIM_SMCR_TS; 00196 htim->Instance->SMCR |= TIM_TS_TI1F_ED; 00197 00198 /* Use the TIM_TS_TI1F_ED signal to reset the TIM counter each edge detection */ 00199 htim->Instance->SMCR &= ~TIM_SMCR_SMS; 00200 htim->Instance->SMCR |= TIM_SLAVEMODE_RESET; 00201 00202 /* Program channel 2 in PWM 2 mode with the desired Commutation_Delay*/ 00203 OC_Config.OCFastMode = TIM_OCFAST_DISABLE; 00204 OC_Config.OCIdleState = TIM_OCIDLESTATE_RESET; 00205 OC_Config.OCMode = TIM_OCMODE_PWM2; 00206 OC_Config.OCNIdleState = TIM_OCNIDLESTATE_RESET; 00207 OC_Config.OCNPolarity = TIM_OCNPOLARITY_HIGH; 00208 OC_Config.OCPolarity = TIM_OCPOLARITY_HIGH; 00209 OC_Config.Pulse = sConfig->Commutation_Delay; 00210 00211 TIM_OC2_SetConfig(htim->Instance, &OC_Config); 00212 00213 /* Select OC2REF as trigger output on TRGO: write the MMS bits in the TIMx_CR2 00214 register to 101 */ 00215 htim->Instance->CR2 &= ~TIM_CR2_MMS; 00216 htim->Instance->CR2 |= TIM_TRGO_OC2REF; 00217 00218 /* Initialize the TIM state*/ 00219 htim->State= HAL_TIM_STATE_READY; 00220 00221 return HAL_OK; 00222 } 00223 00224 /** 00225 * @brief DeInitializes the TIM Hall Sensor interface 00226 * @param htim pointer to a TIM_HandleTypeDef structure that contains 00227 * the configuration information for TIM module. 00228 * @retval HAL status 00229 */ 00230 HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim) 00231 { 00232 /* Check the parameters */ 00233 assert_param(IS_TIM_INSTANCE(htim->Instance)); 00234 00235 htim->State = HAL_TIM_STATE_BUSY; 00236 00237 /* Disable the TIM Peripheral Clock */ 00238 __HAL_TIM_DISABLE(htim); 00239 00240 /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ 00241 HAL_TIMEx_HallSensor_MspDeInit(htim); 00242 00243 /* Change TIM state */ 00244 htim->State = HAL_TIM_STATE_RESET; 00245 00246 /* Release Lock */ 00247 __HAL_UNLOCK(htim); 00248 00249 return HAL_OK; 00250 } 00251 00252 /** 00253 * @brief Initializes the TIM Hall Sensor MSP. 00254 * @param htim pointer to a TIM_HandleTypeDef structure that contains 00255 * the configuration information for TIM module. 00256 * @retval None 00257 */ 00258 __weak void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim) 00259 { 00260 /* Prevent unused argument(s) compilation warning */ 00261 UNUSED(htim); 00262 /* NOTE : This function Should not be modified, when the callback is needed, 00263 the HAL_TIMEx_HallSensor_MspInit could be implemented in the user file 00264 */ 00265 } 00266 00267 /** 00268 * @brief DeInitializes TIM Hall Sensor MSP. 00269 * @param htim pointer to a TIM_HandleTypeDef structure that contains 00270 * the configuration information for TIM module. 00271 * @retval None 00272 */ 00273 __weak void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim) 00274 { 00275 /* Prevent unused argument(s) compilation warning */ 00276 UNUSED(htim); 00277 /* NOTE : This function Should not be modified, when the callback is needed, 00278 the HAL_TIMEx_HallSensor_MspDeInit could be implemented in the user file 00279 */ 00280 } 00281 00282 /** 00283 * @brief Starts the TIM Hall Sensor Interface. 00284 * @param htim pointer to a TIM_HandleTypeDef structure that contains 00285 * the configuration information for TIM module. 00286 * @retval HAL status 00287 */ 00288 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim) 00289 { 00290 /* Check the parameters */ 00291 assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); 00292 00293 /* Enable the Input Capture channels 1 00294 (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ 00295 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); 00296 00297 /* Enable the Peripheral */ 00298 __HAL_TIM_ENABLE(htim); 00299 00300 /* Return function status */ 00301 return HAL_OK; 00302 } 00303 00304 /** 00305 * @brief Stops the TIM Hall sensor Interface. 00306 * @param htim pointer to a TIM_HandleTypeDef structure that contains 00307 * the configuration information for TIM module. 00308 * @retval HAL status 00309 */ 00310 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim) 00311 { 00312 /* Check the parameters */ 00313 assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); 00314 00315 /* Disable the Input Capture channels 1, 2 and 3 00316 (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ 00317 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); 00318 00319 /* Disable the Peripheral */ 00320 __HAL_TIM_DISABLE(htim); 00321 00322 /* Return function status */ 00323 return HAL_OK; 00324 } 00325 00326 /** 00327 * @brief Starts the TIM Hall Sensor Interface in interrupt mode. 00328 * @param htim pointer to a TIM_HandleTypeDef structure that contains 00329 * the configuration information for TIM module. 00330 * @retval HAL status 00331 */ 00332 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim) 00333 { 00334 /* Check the parameters */ 00335 assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); 00336 00337 /* Enable the capture compare Interrupts 1 event */ 00338 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); 00339 00340 /* Enable the Input Capture channels 1 00341 (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ 00342 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); 00343 00344 /* Enable the Peripheral */ 00345 __HAL_TIM_ENABLE(htim); 00346 00347 /* Return function status */ 00348 return HAL_OK; 00349 } 00350 00351 /** 00352 * @brief Stops the TIM Hall Sensor Interface in interrupt mode. 00353 * @param htim pointer to a TIM_HandleTypeDef structure that contains 00354 * the configuration information for TIM module. 00355 * @retval HAL status 00356 */ 00357 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim) 00358 { 00359 /* Check the parameters */ 00360 assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); 00361 00362 /* Disable the Input Capture channels 1 00363 (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ 00364 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); 00365 00366 /* Disable the capture compare Interrupts event */ 00367 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); 00368 00369 /* Disable the Peripheral */ 00370 __HAL_TIM_DISABLE(htim); 00371 00372 /* Return function status */ 00373 return HAL_OK; 00374 } 00375 00376 /** 00377 * @brief Starts the TIM Hall Sensor Interface in DMA mode. 00378 * @param htim pointer to a TIM_HandleTypeDef structure that contains 00379 * the configuration information for TIM module. 00380 * @param pData The destination Buffer address. 00381 * @param Length The length of data to be transferred from TIM peripheral to memory. 00382 * @retval HAL status 00383 */ 00384 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length) 00385 { 00386 /* Check the parameters */ 00387 assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); 00388 00389 if((htim->State == HAL_TIM_STATE_BUSY)) 00390 { 00391 return HAL_BUSY; 00392 } 00393 else if((htim->State == HAL_TIM_STATE_READY)) 00394 { 00395 if(((uint32_t)pData == 0U) && (Length > 0)) 00396 { 00397 return HAL_ERROR; 00398 } 00399 else 00400 { 00401 htim->State = HAL_TIM_STATE_BUSY; 00402 } 00403 } 00404 /* Enable the Input Capture channels 1 00405 (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ 00406 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); 00407 00408 /* Set the DMA Input Capture 1 Callback */ 00409 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt; 00410 /* Set the DMA error callback */ 00411 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; 00412 00413 /* Enable the DMA Stream for Capture 1*/ 00414 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData, Length); 00415 00416 /* Enable the capture compare 1 Interrupt */ 00417 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); 00418 00419 /* Enable the Peripheral */ 00420 __HAL_TIM_ENABLE(htim); 00421 00422 /* Return function status */ 00423 return HAL_OK; 00424 } 00425 00426 /** 00427 * @brief Stops the TIM Hall Sensor Interface in DMA mode. 00428 * @param htim pointer to a TIM_HandleTypeDef structure that contains 00429 * the configuration information for TIM module. 00430 * @retval HAL status 00431 */ 00432 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim) 00433 { 00434 /* Check the parameters */ 00435 assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); 00436 00437 /* Disable the Input Capture channels 1 00438 (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ 00439 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); 00440 00441 00442 /* Disable the capture compare Interrupts 1 event */ 00443 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); 00444 00445 /* Disable the Peripheral */ 00446 __HAL_TIM_DISABLE(htim); 00447 00448 /* Return function status */ 00449 return HAL_OK; 00450 } 00451 /** 00452 * @} 00453 */ 00454 00455 /** @defgroup TIMEx_Exported_Functions_Group2 Timer Complementary Output Compare functions 00456 * @brief Timer Complementary Output Compare functions 00457 * 00458 @verbatim 00459 ============================================================================== 00460 ##### Timer Complementary Output Compare functions ##### 00461 ============================================================================== 00462 [..] 00463 This section provides functions allowing to: 00464 (+) Start the Complementary Output Compare/PWM. 00465 (+) Stop the Complementary Output Compare/PWM. 00466 (+) Start the Complementary Output Compare/PWM and enable interrupts. 00467 (+) Stop the Complementary Output Compare/PWM and disable interrupts. 00468 (+) Start the Complementary Output Compare/PWM and enable DMA transfers. 00469 (+) Stop the Complementary Output Compare/PWM and disable DMA transfers. 00470 00471 @endverbatim 00472 * @{ 00473 */ 00474 00475 /** 00476 * @brief Starts the TIM Output Compare signal generation on the complementary 00477 * output. 00478 * @param htim pointer to a TIM_HandleTypeDef structure that contains 00479 * the configuration information for TIM module. 00480 * @param Channel TIM Channel to be enabled. 00481 * This parameter can be one of the following values: 00482 * @arg TIM_CHANNEL_1: TIM Channel 1 selected 00483 * @arg TIM_CHANNEL_2: TIM Channel 2 selected 00484 * @arg TIM_CHANNEL_3: TIM Channel 3 selected 00485 * @retval HAL status 00486 */ 00487 HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel) 00488 { 00489 /* Check the parameters */ 00490 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); 00491 00492 /* Enable the Capture compare channel N */ 00493 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); 00494 00495 /* Enable the Main Output */ 00496 __HAL_TIM_MOE_ENABLE(htim); 00497 00498 /* Enable the Peripheral */ 00499 __HAL_TIM_ENABLE(htim); 00500 00501 /* Return function status */ 00502 return HAL_OK; 00503 } 00504 00505 /** 00506 * @brief Stops the TIM Output Compare signal generation on the complementary 00507 * output. 00508 * @param htim pointer to a TIM_HandleTypeDef structure that contains 00509 * the configuration information for TIM module. 00510 * @param Channel TIM Channel to be disabled. 00511 * This parameter can be one of the following values: 00512 * @arg TIM_CHANNEL_1: TIM Channel 1 selected 00513 * @arg TIM_CHANNEL_2: TIM Channel 2 selected 00514 * @arg TIM_CHANNEL_3: TIM Channel 3 selected 00515 * @retval HAL status 00516 */ 00517 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) 00518 { 00519 /* Check the parameters */ 00520 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); 00521 00522 /* Disable the Capture compare channel N */ 00523 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); 00524 00525 /* Disable the Main Output */ 00526 __HAL_TIM_MOE_DISABLE(htim); 00527 00528 /* Disable the Peripheral */ 00529 __HAL_TIM_DISABLE(htim); 00530 00531 /* Return function status */ 00532 return HAL_OK; 00533 } 00534 00535 /** 00536 * @brief Starts the TIM Output Compare signal generation in interrupt mode 00537 * on the complementary output. 00538 * @param htim pointer to a TIM_HandleTypeDef structure that contains 00539 * the configuration information for TIM module. 00540 * @param Channel TIM Channel to be enabled. 00541 * This parameter can be one of the following values: 00542 * @arg TIM_CHANNEL_1: TIM Channel 1 selected 00543 * @arg TIM_CHANNEL_2: TIM Channel 2 selected 00544 * @arg TIM_CHANNEL_3: TIM Channel 3 selected 00545 * @retval HAL status 00546 */ 00547 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) 00548 { 00549 /* Check the parameters */ 00550 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); 00551 00552 switch (Channel) 00553 { 00554 case TIM_CHANNEL_1: 00555 { 00556 /* Enable the TIM Output Compare interrupt */ 00557 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); 00558 } 00559 break; 00560 00561 case TIM_CHANNEL_2: 00562 { 00563 /* Enable the TIM Output Compare interrupt */ 00564 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); 00565 } 00566 break; 00567 00568 case TIM_CHANNEL_3: 00569 { 00570 /* Enable the TIM Output Compare interrupt */ 00571 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); 00572 } 00573 break; 00574 00575 case TIM_CHANNEL_4: 00576 { 00577 /* Enable the TIM Output Compare interrupt */ 00578 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4); 00579 } 00580 break; 00581 00582 default: 00583 break; 00584 } 00585 00586 /* Enable the TIM Break interrupt */ 00587 __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK); 00588 00589 /* Enable the Capture compare channel N */ 00590 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); 00591 00592 /* Enable the Main Output */ 00593 __HAL_TIM_MOE_ENABLE(htim); 00594 00595 /* Enable the Peripheral */ 00596 __HAL_TIM_ENABLE(htim); 00597 00598 /* Return function status */ 00599 return HAL_OK; 00600 } 00601 00602 /** 00603 * @brief Stops the TIM Output Compare signal generation in interrupt mode 00604 * on the complementary output. 00605 * @param htim pointer to a TIM_HandleTypeDef structure that contains 00606 * the configuration information for TIM module. 00607 * @param Channel TIM Channel to be disabled. 00608 * This parameter can be one of the following values: 00609 * @arg TIM_CHANNEL_1: TIM Channel 1 selected 00610 * @arg TIM_CHANNEL_2: TIM Channel 2 selected 00611 * @arg TIM_CHANNEL_3: TIM Channel 3 selected 00612 * @retval HAL status 00613 */ 00614 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) 00615 { 00616 /* Check the parameters */ 00617 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); 00618 00619 switch (Channel) 00620 { 00621 case TIM_CHANNEL_1: 00622 { 00623 /* Disable the TIM Output Compare interrupt */ 00624 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); 00625 } 00626 break; 00627 00628 case TIM_CHANNEL_2: 00629 { 00630 /* Disable the TIM Output Compare interrupt */ 00631 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); 00632 } 00633 break; 00634 00635 case TIM_CHANNEL_3: 00636 { 00637 /* Disable the TIM Output Compare interrupt */ 00638 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3); 00639 } 00640 break; 00641 00642 case TIM_CHANNEL_4: 00643 { 00644 /* Disable the TIM Output Compare interrupt */ 00645 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4); 00646 } 00647 break; 00648 00649 default: 00650 break; 00651 } 00652 00653 /* Disable the Capture compare channel N */ 00654 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); 00655 00656 /* Disable the TIM Break interrupt (only if no more channel is active) */ 00657 if((READ_REG(htim->Instance->CCER) & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == RESET) 00658 { 00659 __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK); 00660 } 00661 00662 /* Disable the Main Output */ 00663 __HAL_TIM_MOE_DISABLE(htim); 00664 00665 /* Disable the Peripheral */ 00666 __HAL_TIM_DISABLE(htim); 00667 00668 /* Return function status */ 00669 return HAL_OK; 00670 } 00671 00672 /** 00673 * @brief Starts the TIM Output Compare signal generation in DMA mode 00674 * on the complementary output. 00675 * @param htim pointer to a TIM_HandleTypeDef structure that contains 00676 * the configuration information for TIM module. 00677 * @param Channel TIM Channel to be enabled. 00678 * This parameter can be one of the following values: 00679 * @arg TIM_CHANNEL_1: TIM Channel 1 selected 00680 * @arg TIM_CHANNEL_2: TIM Channel 2 selected 00681 * @arg TIM_CHANNEL_3: TIM Channel 3 selected 00682 * @param pData The source Buffer address. 00683 * @param Length The length of data to be transferred from memory to TIM peripheral 00684 * @retval HAL status 00685 */ 00686 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length) 00687 { 00688 /* Check the parameters */ 00689 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); 00690 00691 if((htim->State == HAL_TIM_STATE_BUSY)) 00692 { 00693 return HAL_BUSY; 00694 } 00695 else if((htim->State == HAL_TIM_STATE_READY)) 00696 { 00697 if(((uint32_t)pData == 0U) && (Length > 0)) 00698 { 00699 return HAL_ERROR; 00700 } 00701 else 00702 { 00703 htim->State = HAL_TIM_STATE_BUSY; 00704 } 00705 } 00706 switch (Channel) 00707 { 00708 case TIM_CHANNEL_1: 00709 { 00710 /* Set the DMA Period elapsed callback */ 00711 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt; 00712 00713 /* Set the DMA error callback */ 00714 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; 00715 00716 /* Enable the DMA Stream */ 00717 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length); 00718 00719 /* Enable the TIM Output Compare DMA request */ 00720 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); 00721 } 00722 break; 00723 00724 case TIM_CHANNEL_2: 00725 { 00726 /* Set the DMA Period elapsed callback */ 00727 htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt; 00728 00729 /* Set the DMA error callback */ 00730 htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; 00731 00732 /* Enable the DMA Stream */ 00733 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length); 00734 00735 /* Enable the TIM Output Compare DMA request */ 00736 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); 00737 } 00738 break; 00739 00740 case TIM_CHANNEL_3: 00741 { 00742 /* Set the DMA Period elapsed callback */ 00743 htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt; 00744 00745 /* Set the DMA error callback */ 00746 htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ; 00747 00748 /* Enable the DMA Stream */ 00749 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length); 00750 00751 /* Enable the TIM Output Compare DMA request */ 00752 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3); 00753 } 00754 break; 00755 00756 case TIM_CHANNEL_4: 00757 { 00758 /* Set the DMA Period elapsed callback */ 00759 htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt; 00760 00761 /* Set the DMA error callback */ 00762 htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ; 00763 00764 /* Enable the DMA Stream */ 00765 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length); 00766 00767 /* Enable the TIM Output Compare DMA request */ 00768 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4); 00769 } 00770 break; 00771 00772 default: 00773 break; 00774 } 00775 00776 /* Enable the Capture compare channel N */ 00777 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); 00778 00779 /* Enable the Main Output */ 00780 __HAL_TIM_MOE_ENABLE(htim); 00781 00782 /* Enable the Peripheral */ 00783 __HAL_TIM_ENABLE(htim); 00784 00785 /* Return function status */ 00786 return HAL_OK; 00787 } 00788 00789 /** 00790 * @brief Stops the TIM Output Compare signal generation in DMA mode 00791 * on the complementary output. 00792 * @param htim pointer to a TIM_HandleTypeDef structure that contains 00793 * the configuration information for TIM module. 00794 * @param Channel TIM Channel to be disabled. 00795 * This parameter can be one of the following values: 00796 * @arg TIM_CHANNEL_1: TIM Channel 1 selected 00797 * @arg TIM_CHANNEL_2: TIM Channel 2 selected 00798 * @arg TIM_CHANNEL_3: TIM Channel 3 selected 00799 * @retval HAL status 00800 */ 00801 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) 00802 { 00803 /* Check the parameters */ 00804 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); 00805 00806 switch (Channel) 00807 { 00808 case TIM_CHANNEL_1: 00809 { 00810 /* Disable the TIM Output Compare DMA request */ 00811 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); 00812 } 00813 break; 00814 00815 case TIM_CHANNEL_2: 00816 { 00817 /* Disable the TIM Output Compare DMA request */ 00818 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); 00819 } 00820 break; 00821 00822 case TIM_CHANNEL_3: 00823 { 00824 /* Disable the TIM Output Compare DMA request */ 00825 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3); 00826 } 00827 break; 00828 00829 case TIM_CHANNEL_4: 00830 { 00831 /* Disable the TIM Output Compare interrupt */ 00832 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4); 00833 } 00834 break; 00835 00836 default: 00837 break; 00838 } 00839 00840 /* Disable the Capture compare channel N */ 00841 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); 00842 00843 /* Disable the Main Output */ 00844 __HAL_TIM_MOE_DISABLE(htim); 00845 00846 /* Disable the Peripheral */ 00847 __HAL_TIM_DISABLE(htim); 00848 00849 /* Change the htim state */ 00850 htim->State = HAL_TIM_STATE_READY; 00851 00852 /* Return function status */ 00853 return HAL_OK; 00854 } 00855 /** 00856 * @} 00857 */ 00858 00859 /** @defgroup TIMEx_Exported_Functions_Group3 Timer Complementary PWM functions 00860 * @brief Timer Complementary PWM functions 00861 * 00862 @verbatim 00863 ============================================================================== 00864 ##### Timer Complementary PWM functions ##### 00865 ============================================================================== 00866 [..] 00867 This section provides functions allowing to: 00868 (+) Start the Complementary PWM. 00869 (+) Stop the Complementary PWM. 00870 (+) Start the Complementary PWM and enable interrupts. 00871 (+) Stop the Complementary PWM and disable interrupts. 00872 (+) Start the Complementary PWM and enable DMA transfers. 00873 (+) Stop the Complementary PWM and disable DMA transfers. 00874 (+) Start the Complementary Input Capture measurement. 00875 (+) Stop the Complementary Input Capture. 00876 (+) Start the Complementary Input Capture and enable interrupts. 00877 (+) Stop the Complementary Input Capture and disable interrupts. 00878 (+) Start the Complementary Input Capture and enable DMA transfers. 00879 (+) Stop the Complementary Input Capture and disable DMA transfers. 00880 (+) Start the Complementary One Pulse generation. 00881 (+) Stop the Complementary One Pulse. 00882 (+) Start the Complementary One Pulse and enable interrupts. 00883 (+) Stop the Complementary One Pulse and disable interrupts. 00884 00885 @endverbatim 00886 * @{ 00887 */ 00888 00889 /** 00890 * @brief Starts the PWM signal generation on the complementary output. 00891 * @param htim pointer to a TIM_HandleTypeDef structure that contains 00892 * the configuration information for TIM module. 00893 * @param Channel TIM Channel to be enabled. 00894 * This parameter can be one of the following values: 00895 * @arg TIM_CHANNEL_1: TIM Channel 1 selected 00896 * @arg TIM_CHANNEL_2: TIM Channel 2 selected 00897 * @arg TIM_CHANNEL_3: TIM Channel 3 selected 00898 * @retval HAL status 00899 */ 00900 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel) 00901 { 00902 /* Check the parameters */ 00903 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); 00904 00905 /* Enable the complementary PWM output */ 00906 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); 00907 00908 /* Enable the Main Output */ 00909 __HAL_TIM_MOE_ENABLE(htim); 00910 00911 /* Enable the Peripheral */ 00912 __HAL_TIM_ENABLE(htim); 00913 00914 /* Return function status */ 00915 return HAL_OK; 00916 } 00917 00918 /** 00919 * @brief Stops the PWM signal generation on the complementary output. 00920 * @param htim pointer to a TIM_HandleTypeDef structure that contains 00921 * the configuration information for TIM module. 00922 * @param Channel TIM Channel to be disabled. 00923 * This parameter can be one of the following values: 00924 * @arg TIM_CHANNEL_1: TIM Channel 1 selected 00925 * @arg TIM_CHANNEL_2: TIM Channel 2 selected 00926 * @arg TIM_CHANNEL_3: TIM Channel 3 selected 00927 * @retval HAL status 00928 */ 00929 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) 00930 { 00931 /* Check the parameters */ 00932 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); 00933 00934 /* Disable the complementary PWM output */ 00935 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); 00936 00937 /* Disable the Main Output */ 00938 __HAL_TIM_MOE_DISABLE(htim); 00939 00940 /* Disable the Peripheral */ 00941 __HAL_TIM_DISABLE(htim); 00942 00943 /* Return function status */ 00944 return HAL_OK; 00945 } 00946 00947 /** 00948 * @brief Starts the PWM signal generation in interrupt mode on the 00949 * complementary output. 00950 * @param htim pointer to a TIM_HandleTypeDef structure that contains 00951 * the configuration information for TIM module. 00952 * @param Channel TIM Channel to be disabled. 00953 * This parameter can be one of the following values: 00954 * @arg TIM_CHANNEL_1: TIM Channel 1 selected 00955 * @arg TIM_CHANNEL_2: TIM Channel 2 selected 00956 * @arg TIM_CHANNEL_3: TIM Channel 3 selected 00957 * @retval HAL status 00958 */ 00959 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) 00960 { 00961 /* Check the parameters */ 00962 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); 00963 00964 switch (Channel) 00965 { 00966 case TIM_CHANNEL_1: 00967 { 00968 /* Enable the TIM Capture/Compare 1 interrupt */ 00969 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); 00970 } 00971 break; 00972 00973 case TIM_CHANNEL_2: 00974 { 00975 /* Enable the TIM Capture/Compare 2 interrupt */ 00976 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); 00977 } 00978 break; 00979 00980 case TIM_CHANNEL_3: 00981 { 00982 /* Enable the TIM Capture/Compare 3 interrupt */ 00983 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); 00984 } 00985 break; 00986 00987 case TIM_CHANNEL_4: 00988 { 00989 /* Enable the TIM Capture/Compare 4 interrupt */ 00990 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4); 00991 } 00992 break; 00993 00994 default: 00995 break; 00996 } 00997 00998 /* Enable the TIM Break interrupt */ 00999 __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK); 01000 01001 /* Enable the complementary PWM output */ 01002 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); 01003 01004 /* Enable the Main Output */ 01005 __HAL_TIM_MOE_ENABLE(htim); 01006 01007 /* Enable the Peripheral */ 01008 __HAL_TIM_ENABLE(htim); 01009 01010 /* Return function status */ 01011 return HAL_OK; 01012 } 01013 01014 /** 01015 * @brief Stops the PWM signal generation in interrupt mode on the 01016 * complementary output. 01017 * @param htim pointer to a TIM_HandleTypeDef structure that contains 01018 * the configuration information for TIM module. 01019 * @param Channel TIM Channel to be disabled. 01020 * This parameter can be one of the following values: 01021 * @arg TIM_CHANNEL_1: TIM Channel 1 selected 01022 * @arg TIM_CHANNEL_2: TIM Channel 2 selected 01023 * @arg TIM_CHANNEL_3: TIM Channel 3 selected 01024 * @retval HAL status 01025 */ 01026 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT (TIM_HandleTypeDef *htim, uint32_t Channel) 01027 { 01028 /* Check the parameters */ 01029 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); 01030 01031 switch (Channel) 01032 { 01033 case TIM_CHANNEL_1: 01034 { 01035 /* Disable the TIM Capture/Compare 1 interrupt */ 01036 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); 01037 } 01038 break; 01039 01040 case TIM_CHANNEL_2: 01041 { 01042 /* Disable the TIM Capture/Compare 2 interrupt */ 01043 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); 01044 } 01045 break; 01046 01047 case TIM_CHANNEL_3: 01048 { 01049 /* Disable the TIM Capture/Compare 3 interrupt */ 01050 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3); 01051 } 01052 break; 01053 01054 case TIM_CHANNEL_4: 01055 { 01056 /* Disable the TIM Capture/Compare 3 interrupt */ 01057 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4); 01058 } 01059 break; 01060 01061 default: 01062 break; 01063 } 01064 01065 /* Disable the complementary PWM output */ 01066 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); 01067 01068 /* Disable the TIM Break interrupt (only if no more channel is active) */ 01069 if((READ_REG(htim->Instance->CCER) & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == RESET) 01070 { 01071 __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK); 01072 } 01073 01074 /* Disable the Main Output */ 01075 __HAL_TIM_MOE_DISABLE(htim); 01076 01077 /* Disable the Peripheral */ 01078 __HAL_TIM_DISABLE(htim); 01079 01080 /* Return function status */ 01081 return HAL_OK; 01082 } 01083 01084 /** 01085 * @brief Starts the TIM PWM signal generation in DMA mode on the 01086 * complementary output 01087 * @param htim pointer to a TIM_HandleTypeDef structure that contains 01088 * the configuration information for TIM module. 01089 * @param Channel TIM Channel to be enabled. 01090 * This parameter can be one of the following values: 01091 * @arg TIM_CHANNEL_1: TIM Channel 1 selected 01092 * @arg TIM_CHANNEL_2: TIM Channel 2 selected 01093 * @arg TIM_CHANNEL_3: TIM Channel 3 selected 01094 * @param pData The source Buffer address. 01095 * @param Length The length of data to be transferred from memory to TIM peripheral 01096 * @retval HAL status 01097 */ 01098 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length) 01099 { 01100 /* Check the parameters */ 01101 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); 01102 01103 if((htim->State == HAL_TIM_STATE_BUSY)) 01104 { 01105 return HAL_BUSY; 01106 } 01107 else if((htim->State == HAL_TIM_STATE_READY)) 01108 { 01109 if(((uint32_t)pData == 0U) && (Length > 0)) 01110 { 01111 return HAL_ERROR; 01112 } 01113 else 01114 { 01115 htim->State = HAL_TIM_STATE_BUSY; 01116 } 01117 } 01118 switch (Channel) 01119 { 01120 case TIM_CHANNEL_1: 01121 { 01122 /* Set the DMA Period elapsed callback */ 01123 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt; 01124 01125 /* Set the DMA error callback */ 01126 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; 01127 01128 /* Enable the DMA Stream */ 01129 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length); 01130 01131 /* Enable the TIM Capture/Compare 1 DMA request */ 01132 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); 01133 } 01134 break; 01135 01136 case TIM_CHANNEL_2: 01137 { 01138 /* Set the DMA Period elapsed callback */ 01139 htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt; 01140 01141 /* Set the DMA error callback */ 01142 htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; 01143 01144 /* Enable the DMA Stream */ 01145 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length); 01146 01147 /* Enable the TIM Capture/Compare 2 DMA request */ 01148 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); 01149 } 01150 break; 01151 01152 case TIM_CHANNEL_3: 01153 { 01154 /* Set the DMA Period elapsed callback */ 01155 htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt; 01156 01157 /* Set the DMA error callback */ 01158 htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ; 01159 01160 /* Enable the DMA Stream */ 01161 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length); 01162 01163 /* Enable the TIM Capture/Compare 3 DMA request */ 01164 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3); 01165 } 01166 break; 01167 01168 case TIM_CHANNEL_4: 01169 { 01170 /* Set the DMA Period elapsed callback */ 01171 htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt; 01172 01173 /* Set the DMA error callback */ 01174 htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ; 01175 01176 /* Enable the DMA Stream */ 01177 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length); 01178 01179 /* Enable the TIM Capture/Compare 4 DMA request */ 01180 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4); 01181 } 01182 break; 01183 01184 default: 01185 break; 01186 } 01187 01188 /* Enable the complementary PWM output */ 01189 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); 01190 01191 /* Enable the Main Output */ 01192 __HAL_TIM_MOE_ENABLE(htim); 01193 01194 /* Enable the Peripheral */ 01195 __HAL_TIM_ENABLE(htim); 01196 01197 /* Return function status */ 01198 return HAL_OK; 01199 } 01200 01201 /** 01202 * @brief Stops the TIM PWM signal generation in DMA mode on the complementary 01203 * output 01204 * @param htim pointer to a TIM_HandleTypeDef structure that contains 01205 * the configuration information for TIM module. 01206 * @param Channel TIM Channel to be disabled. 01207 * This parameter can be one of the following values: 01208 * @arg TIM_CHANNEL_1: TIM Channel 1 selected 01209 * @arg TIM_CHANNEL_2: TIM Channel 2 selected 01210 * @arg TIM_CHANNEL_3: TIM Channel 3 selected 01211 * @retval HAL status 01212 */ 01213 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) 01214 { 01215 /* Check the parameters */ 01216 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); 01217 01218 switch (Channel) 01219 { 01220 case TIM_CHANNEL_1: 01221 { 01222 /* Disable the TIM Capture/Compare 1 DMA request */ 01223 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); 01224 } 01225 break; 01226 01227 case TIM_CHANNEL_2: 01228 { 01229 /* Disable the TIM Capture/Compare 2 DMA request */ 01230 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); 01231 } 01232 break; 01233 01234 case TIM_CHANNEL_3: 01235 { 01236 /* Disable the TIM Capture/Compare 3 DMA request */ 01237 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3); 01238 } 01239 break; 01240 01241 case TIM_CHANNEL_4: 01242 { 01243 /* Disable the TIM Capture/Compare 4 DMA request */ 01244 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4); 01245 } 01246 break; 01247 01248 default: 01249 break; 01250 } 01251 01252 /* Disable the complementary PWM output */ 01253 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); 01254 01255 /* Disable the Main Output */ 01256 __HAL_TIM_MOE_DISABLE(htim); 01257 01258 /* Disable the Peripheral */ 01259 __HAL_TIM_DISABLE(htim); 01260 01261 /* Change the htim state */ 01262 htim->State = HAL_TIM_STATE_READY; 01263 01264 /* Return function status */ 01265 return HAL_OK; 01266 } 01267 01268 /** 01269 * @} 01270 */ 01271 01272 /** @defgroup TIMEx_Exported_Functions_Group4 Timer Complementary One Pulse functions 01273 * @brief Timer Complementary One Pulse functions 01274 * 01275 @verbatim 01276 ============================================================================== 01277 ##### Timer Complementary One Pulse functions ##### 01278 ============================================================================== 01279 [..] 01280 This section provides functions allowing to: 01281 (+) Start the Complementary One Pulse generation. 01282 (+) Stop the Complementary One Pulse. 01283 (+) Start the Complementary One Pulse and enable interrupts. 01284 (+) Stop the Complementary One Pulse and disable interrupts. 01285 01286 @endverbatim 01287 * @{ 01288 */ 01289 01290 /** 01291 * @brief Starts the TIM One Pulse signal generation on the complementary 01292 * output. 01293 * @param htim pointer to a TIM_HandleTypeDef structure that contains 01294 * the configuration information for TIM module. 01295 * @param OutputChannel TIM Channel to be enabled. 01296 * This parameter can be one of the following values: 01297 * @arg TIM_CHANNEL_1: TIM Channel 1 selected 01298 * @arg TIM_CHANNEL_2: TIM Channel 2 selected 01299 * @retval HAL status 01300 */ 01301 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel) 01302 { 01303 /* Check the parameters */ 01304 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); 01305 01306 /* Enable the complementary One Pulse output */ 01307 TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE); 01308 01309 /* Enable the Main Output */ 01310 __HAL_TIM_MOE_ENABLE(htim); 01311 01312 /* Return function status */ 01313 return HAL_OK; 01314 } 01315 01316 /** 01317 * @brief Stops the TIM One Pulse signal generation on the complementary 01318 * output. 01319 * @param htim pointer to a TIM_HandleTypeDef structure that contains 01320 * the configuration information for TIM module. 01321 * @param OutputChannel TIM Channel to be disabled. 01322 * This parameter can be one of the following values: 01323 * @arg TIM_CHANNEL_1: TIM Channel 1 selected 01324 * @arg TIM_CHANNEL_2: TIM Channel 2 selected 01325 * @retval HAL status 01326 */ 01327 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel) 01328 { 01329 01330 /* Check the parameters */ 01331 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); 01332 01333 /* Disable the complementary One Pulse output */ 01334 TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE); 01335 01336 /* Disable the Main Output */ 01337 __HAL_TIM_MOE_DISABLE(htim); 01338 01339 /* Disable the Peripheral */ 01340 __HAL_TIM_DISABLE(htim); 01341 01342 /* Return function status */ 01343 return HAL_OK; 01344 } 01345 01346 /** 01347 * @brief Starts the TIM One Pulse signal generation in interrupt mode on the 01348 * complementary channel. 01349 * @param htim pointer to a TIM_HandleTypeDef structure that contains 01350 * the configuration information for TIM module. 01351 * @param OutputChannel TIM Channel to be enabled. 01352 * This parameter can be one of the following values: 01353 * @arg TIM_CHANNEL_1: TIM Channel 1 selected 01354 * @arg TIM_CHANNEL_2: TIM Channel 2 selected 01355 * @retval HAL status 01356 */ 01357 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel) 01358 { 01359 /* Check the parameters */ 01360 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); 01361 01362 /* Enable the TIM Capture/Compare 1 interrupt */ 01363 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); 01364 01365 /* Enable the TIM Capture/Compare 2 interrupt */ 01366 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); 01367 01368 /* Enable the complementary One Pulse output */ 01369 TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE); 01370 01371 /* Enable the Main Output */ 01372 __HAL_TIM_MOE_ENABLE(htim); 01373 01374 /* Return function status */ 01375 return HAL_OK; 01376 } 01377 01378 /** 01379 * @brief Stops the TIM One Pulse signal generation in interrupt mode on the 01380 * complementary channel. 01381 * @param htim pointer to a TIM_HandleTypeDef structure that contains 01382 * the configuration information for TIM module. 01383 * @param OutputChannel TIM Channel to be disabled. 01384 * This parameter can be one of the following values: 01385 * @arg TIM_CHANNEL_1: TIM Channel 1 selected 01386 * @arg TIM_CHANNEL_2: TIM Channel 2 selected 01387 * @retval HAL status 01388 */ 01389 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel) 01390 { 01391 /* Check the parameters */ 01392 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); 01393 01394 /* Disable the TIM Capture/Compare 1 interrupt */ 01395 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); 01396 01397 /* Disable the TIM Capture/Compare 2 interrupt */ 01398 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); 01399 01400 /* Disable the complementary One Pulse output */ 01401 TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE); 01402 01403 /* Disable the Main Output */ 01404 __HAL_TIM_MOE_DISABLE(htim); 01405 01406 /* Disable the Peripheral */ 01407 __HAL_TIM_DISABLE(htim); 01408 01409 /* Return function status */ 01410 return HAL_OK; 01411 } 01412 /** 01413 * @} 01414 */ 01415 01416 /** @defgroup TIMEx_Exported_Functions_Group5 Peripheral Control functions 01417 * @brief Peripheral Control functions 01418 * 01419 @verbatim 01420 ============================================================================== 01421 ##### Peripheral Control functions ##### 01422 ============================================================================== 01423 [..] 01424 This section provides functions allowing to: 01425 (+) Configure The Input Output channels for OC, PWM, IC or One Pulse mode. 01426 (+) Configure External Clock source. 01427 (+) Configure Complementary channels, break features and dead time. 01428 (+) Configure Master and the Slave synchronization. 01429 (+) Configure the commutation event in case of use of the Hall sensor interface. 01430 (+) Configure the DMA Burst Mode. 01431 01432 @endverbatim 01433 * @{ 01434 */ 01435 /** 01436 * @brief Configure the TIM commutation event sequence. 01437 * @note This function is mandatory to use the commutation event in order to 01438 * update the configuration at each commutation detection on the TRGI input of the Timer, 01439 * the typical use of this feature is with the use of another Timer(interface Timer) 01440 * configured in Hall sensor interface, this interface Timer will generate the 01441 * commutation at its TRGO output (connected to Timer used in this function) each time 01442 * the TI1 of the Interface Timer detect a commutation at its input TI1. 01443 * @param htim pointer to a TIM_HandleTypeDef structure that contains 01444 * the configuration information for TIM module. 01445 * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor. 01446 * This parameter can be one of the following values: 01447 * @arg TIM_TS_ITR0: Internal trigger 0 selected 01448 * @arg TIM_TS_ITR1: Internal trigger 1 selected 01449 * @arg TIM_TS_ITR2: Internal trigger 2 selected 01450 * @arg TIM_TS_ITR3: Internal trigger 3 selected 01451 * @arg TIM_TS_NONE: No trigger is needed 01452 * @param CommutationSource the Commutation Event source. 01453 * This parameter can be one of the following values: 01454 * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer 01455 * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit 01456 * @retval HAL status 01457 */ 01458 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource) 01459 { 01460 /* Check the parameters */ 01461 assert_param(IS_TIM_ADVANCED_INSTANCE(htim->Instance)); 01462 assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); 01463 01464 __HAL_LOCK(htim); 01465 01466 if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) || 01467 (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) 01468 { 01469 /* Select the Input trigger */ 01470 htim->Instance->SMCR &= ~TIM_SMCR_TS; 01471 htim->Instance->SMCR |= InputTrigger; 01472 } 01473 01474 /* Select the Capture Compare preload feature */ 01475 htim->Instance->CR2 |= TIM_CR2_CCPC; 01476 /* Select the Commutation event source */ 01477 htim->Instance->CR2 &= ~TIM_CR2_CCUS; 01478 htim->Instance->CR2 |= CommutationSource; 01479 01480 __HAL_UNLOCK(htim); 01481 01482 return HAL_OK; 01483 } 01484 01485 /** 01486 * @brief Configure the TIM commutation event sequence with interrupt. 01487 * @note This function is mandatory to use the commutation event in order to 01488 * update the configuration at each commutation detection on the TRGI input of the Timer, 01489 * the typical use of this feature is with the use of another Timer(interface Timer) 01490 * configured in Hall sensor interface, this interface Timer will generate the 01491 * commutation at its TRGO output (connected to Timer used in this function) each time 01492 * the TI1 of the Interface Timer detect a commutation at its input TI1. 01493 * @param htim pointer to a TIM_HandleTypeDef structure that contains 01494 * the configuration information for TIM module. 01495 * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor. 01496 * This parameter can be one of the following values: 01497 * @arg TIM_TS_ITR0: Internal trigger 0 selected 01498 * @arg TIM_TS_ITR1: Internal trigger 1 selected 01499 * @arg TIM_TS_ITR2: Internal trigger 2 selected 01500 * @arg TIM_TS_ITR3: Internal trigger 3 selected 01501 * @arg TIM_TS_NONE: No trigger is needed 01502 * @param CommutationSource the Commutation Event source. 01503 * This parameter can be one of the following values: 01504 * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer 01505 * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit 01506 * @retval HAL status 01507 */ 01508 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource) 01509 { 01510 /* Check the parameters */ 01511 assert_param(IS_TIM_ADVANCED_INSTANCE(htim->Instance)); 01512 assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); 01513 01514 __HAL_LOCK(htim); 01515 01516 if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) || 01517 (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) 01518 { 01519 /* Select the Input trigger */ 01520 htim->Instance->SMCR &= ~TIM_SMCR_TS; 01521 htim->Instance->SMCR |= InputTrigger; 01522 } 01523 01524 /* Select the Capture Compare preload feature */ 01525 htim->Instance->CR2 |= TIM_CR2_CCPC; 01526 /* Select the Commutation event source */ 01527 htim->Instance->CR2 &= ~TIM_CR2_CCUS; 01528 htim->Instance->CR2 |= CommutationSource; 01529 01530 /* Enable the Commutation Interrupt Request */ 01531 __HAL_TIM_ENABLE_IT(htim, TIM_IT_COM); 01532 01533 __HAL_UNLOCK(htim); 01534 01535 return HAL_OK; 01536 } 01537 01538 /** 01539 * @brief Configure the TIM commutation event sequence with DMA. 01540 * @note This function is mandatory to use the commutation event in order to 01541 * update the configuration at each commutation detection on the TRGI input of the Timer, 01542 * the typical use of this feature is with the use of another Timer(interface Timer) 01543 * configured in Hall sensor interface, this interface Timer will generate the 01544 * commutation at its TRGO output (connected to Timer used in this function) each time 01545 * the TI1 of the Interface Timer detect a commutation at its input TI1. 01546 * @note: The user should configure the DMA in his own software, in This function only the COMDE bit is set 01547 * @param htim pointer to a TIM_HandleTypeDef structure that contains 01548 * the configuration information for TIM module. 01549 * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor. 01550 * This parameter can be one of the following values: 01551 * @arg TIM_TS_ITR0: Internal trigger 0 selected 01552 * @arg TIM_TS_ITR1: Internal trigger 1 selected 01553 * @arg TIM_TS_ITR2: Internal trigger 2 selected 01554 * @arg TIM_TS_ITR3: Internal trigger 3 selected 01555 * @arg TIM_TS_NONE: No trigger is needed 01556 * @param CommutationSource the Commutation Event source. 01557 * This parameter can be one of the following values: 01558 * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer 01559 * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit 01560 * @retval HAL status 01561 */ 01562 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource) 01563 { 01564 /* Check the parameters */ 01565 assert_param(IS_TIM_ADVANCED_INSTANCE(htim->Instance)); 01566 assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); 01567 01568 __HAL_LOCK(htim); 01569 01570 if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) || 01571 (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) 01572 { 01573 /* Select the Input trigger */ 01574 htim->Instance->SMCR &= ~TIM_SMCR_TS; 01575 htim->Instance->SMCR |= InputTrigger; 01576 } 01577 01578 /* Select the Capture Compare preload feature */ 01579 htim->Instance->CR2 |= TIM_CR2_CCPC; 01580 /* Select the Commutation event source */ 01581 htim->Instance->CR2 &= ~TIM_CR2_CCUS; 01582 htim->Instance->CR2 |= CommutationSource; 01583 01584 /* Enable the Commutation DMA Request */ 01585 /* Set the DMA Commutation Callback */ 01586 htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = TIMEx_DMACommutationCplt; 01587 /* Set the DMA error callback */ 01588 htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError; 01589 01590 /* Enable the Commutation DMA Request */ 01591 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_COM); 01592 01593 __HAL_UNLOCK(htim); 01594 01595 return HAL_OK; 01596 } 01597 01598 /** 01599 * @brief Configures the TIM in master mode. 01600 * @param htim pointer to a TIM_HandleTypeDef structure that contains 01601 * the configuration information for TIM module. 01602 * @param sMasterConfig pointer to a TIM_MasterConfigTypeDef structure that 01603 * contains the selected trigger output (TRGO) and the Master/Slave 01604 * mode. 01605 * @retval HAL status 01606 */ 01607 HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, TIM_MasterConfigTypeDef * sMasterConfig) 01608 { 01609 /* Check the parameters */ 01610 assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance)); 01611 assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); 01612 assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); 01613 01614 __HAL_LOCK(htim); 01615 01616 htim->State = HAL_TIM_STATE_BUSY; 01617 01618 /* Reset the MMS Bits */ 01619 htim->Instance->CR2 &= ~TIM_CR2_MMS; 01620 /* Select the TRGO source */ 01621 htim->Instance->CR2 |= sMasterConfig->MasterOutputTrigger; 01622 01623 /* Reset the MSM Bit */ 01624 htim->Instance->SMCR &= ~TIM_SMCR_MSM; 01625 /* Set or Reset the MSM Bit */ 01626 htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode; 01627 01628 htim->State = HAL_TIM_STATE_READY; 01629 01630 __HAL_UNLOCK(htim); 01631 01632 return HAL_OK; 01633 } 01634 01635 /** 01636 * @brief Configures the Break feature, dead time, Lock level, OSSI/OSSR State 01637 * and the AOE(automatic output enable). 01638 * @param htim pointer to a TIM_HandleTypeDef structure that contains 01639 * the configuration information for TIM module. 01640 * @param sBreakDeadTimeConfig pointer to a TIM_ConfigBreakDeadConfig_TypeDef structure that 01641 * contains the BDTR Register configuration information for the TIM peripheral. 01642 * @retval HAL status 01643 */ 01644 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim, 01645 TIM_BreakDeadTimeConfigTypeDef * sBreakDeadTimeConfig) 01646 { 01647 uint32_t tmpbdtr = 0U; 01648 01649 /* Check the parameters */ 01650 assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance)); 01651 assert_param(IS_TIM_OSSR_STATE(sBreakDeadTimeConfig->OffStateRunMode)); 01652 assert_param(IS_TIM_OSSI_STATE(sBreakDeadTimeConfig->OffStateIDLEMode)); 01653 assert_param(IS_TIM_LOCK_LEVEL(sBreakDeadTimeConfig->LockLevel)); 01654 assert_param(IS_TIM_DEADTIME(sBreakDeadTimeConfig->DeadTime)); 01655 assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState)); 01656 assert_param(IS_TIM_BREAK_POLARITY(sBreakDeadTimeConfig->BreakPolarity)); 01657 assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(sBreakDeadTimeConfig->AutomaticOutput)); 01658 01659 /* Check input state */ 01660 __HAL_LOCK(htim); 01661 01662 /* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State, 01663 the OSSI State, the dead time value and the Automatic Output Enable Bit */ 01664 01665 /* Set the BDTR bits */ 01666 MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, sBreakDeadTimeConfig->DeadTime); 01667 MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, sBreakDeadTimeConfig->LockLevel); 01668 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode); 01669 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode); 01670 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState); 01671 MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity); 01672 MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput); 01673 MODIFY_REG(tmpbdtr, TIM_BDTR_MOE, sBreakDeadTimeConfig->AutomaticOutput); 01674 01675 /* Set TIMx_BDTR */ 01676 htim->Instance->BDTR = tmpbdtr; 01677 01678 __HAL_UNLOCK(htim); 01679 01680 return HAL_OK; 01681 } 01682 01683 /** 01684 * @brief Configures the TIM2, TIM5 and TIM11 Remapping input capabilities. 01685 * @param htim pointer to a TIM_HandleTypeDef structure that contains 01686 * the configuration information for TIM module. 01687 * @param Remap specifies the TIM input remapping source. 01688 * This parameter can be one of the following values: 01689 * @arg TIM_TIM2_TIM8_TRGO: TIM2 ITR1 input is connected to TIM8 Trigger output(default) 01690 * @arg TIM_TIM2_ETH_PTP: TIM2 ITR1 input is connected to ETH PTP trigger output. 01691 * @arg TIM_TIM2_USBFS_SOF: TIM2 ITR1 input is connected to USB FS SOF. 01692 * @arg TIM_TIM2_USBHS_SOF: TIM2 ITR1 input is connected to USB HS SOF. 01693 * @arg TIM_TIM5_GPIO: TIM5 CH4 input is connected to dedicated Timer pin(default) 01694 * @arg TIM_TIM5_LSI: TIM5 CH4 input is connected to LSI clock. 01695 * @arg TIM_TIM5_LSE: TIM5 CH4 input is connected to LSE clock. 01696 * @arg TIM_TIM5_RTC: TIM5 CH4 input is connected to RTC Output event. 01697 * @arg TIM_TIM11_GPIO: TIM11 CH4 input is connected to dedicated Timer pin(default) 01698 * @arg TIM_TIM11_HSE: TIM11 CH4 input is connected to HSE_RTC clock 01699 * (HSE divided by a programmable prescaler) 01700 * @arg TIM_TIM9_TIM3_TRGO: TIM9 ITR1 input is connected to TIM3 Trigger output(default) 01701 * @arg TIM_TIM9_LPTIM: TIM9 ITR1 input is connected to LPTIM. 01702 * @arg TIM_TIM5_TIM3_TRGO: TIM5 ITR1 input is connected to TIM3 Trigger output(default) 01703 * @arg TIM_TIM5_LPTIM: TIM5 ITR1 input is connected to LPTIM. 01704 * @arg TIM_TIM1_TIM3_TRGO: TIM1 ITR2 input is connected to TIM3 Trigger output(default) 01705 * @arg TIM_TIM1_LPTIM: TIM1 ITR2 input is connected to LPTIM. 01706 * @retval HAL status 01707 */ 01708 HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap) 01709 { 01710 __HAL_LOCK(htim); 01711 01712 /* Check parameters */ 01713 assert_param(IS_TIM_REMAP_INSTANCE(htim->Instance)); 01714 assert_param(IS_TIM_REMAP(Remap)); 01715 01716 #if defined(LPTIM_OR_TIM1_ITR2_RMP) 01717 if ((Remap == TIM_TIM9_TIM3_TRGO)|| (Remap == TIM_TIM9_LPTIM)||(Remap ==TIM_TIM5_TIM3_TRGO)||\ 01718 (Remap == TIM_TIM5_LPTIM)||(Remap == TIM_TIM1_TIM3_TRGO)|| (Remap == TIM_TIM1_LPTIM)) 01719 { 01720 __HAL_RCC_LPTIM1_CLK_ENABLE(); 01721 01722 LPTIM1->OR = (Remap& 0xEFFFFFFFU); 01723 } 01724 else 01725 { 01726 /* Set the Timer remapping configuration */ 01727 htim->Instance->OR = Remap; 01728 } 01729 #else 01730 /* Set the Timer remapping configuration */ 01731 htim->Instance->OR = Remap; 01732 #endif 01733 htim->State = HAL_TIM_STATE_READY; 01734 01735 __HAL_UNLOCK(htim); 01736 01737 return HAL_OK; 01738 } 01739 01740 /** 01741 * @} 01742 */ 01743 01744 /** @defgroup TIMEx_Exported_Functions_Group6 Extension Callbacks functions 01745 * @brief Extension Callbacks functions 01746 * 01747 @verbatim 01748 ============================================================================== 01749 ##### Extension Callbacks functions ##### 01750 ============================================================================== 01751 [..] 01752 This section provides Extension TIM callback functions: 01753 (+) Timer Commutation callback 01754 (+) Timer Break callback 01755 01756 @endverbatim 01757 * @{ 01758 */ 01759 01760 /** 01761 * @brief Hall commutation changed callback in non blocking mode 01762 * @param htim pointer to a TIM_HandleTypeDef structure that contains 01763 * the configuration information for TIM module. 01764 * @retval None 01765 */ 01766 __weak void HAL_TIMEx_CommutationCallback(TIM_HandleTypeDef *htim) 01767 { 01768 /* Prevent unused argument(s) compilation warning */ 01769 UNUSED(htim); 01770 /* NOTE : This function Should not be modified, when the callback is needed, 01771 the HAL_TIMEx_CommutationCallback could be implemented in the user file 01772 */ 01773 } 01774 01775 /** 01776 * @brief Hall Break detection callback in non blocking mode 01777 * @param htim pointer to a TIM_HandleTypeDef structure that contains 01778 * the configuration information for TIM module. 01779 * @retval None 01780 */ 01781 __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim) 01782 { 01783 /* Prevent unused argument(s) compilation warning */ 01784 UNUSED(htim); 01785 /* NOTE : This function Should not be modified, when the callback is needed, 01786 the HAL_TIMEx_BreakCallback could be implemented in the user file 01787 */ 01788 } 01789 /** 01790 * @} 01791 */ 01792 01793 /** @defgroup TIMEx_Exported_Functions_Group7 Extension Peripheral State functions 01794 * @brief Extension Peripheral State functions 01795 * 01796 @verbatim 01797 ============================================================================== 01798 ##### Extension Peripheral State functions ##### 01799 ============================================================================== 01800 [..] 01801 This subsection permits to get in run-time the status of the peripheral 01802 and the data flow. 01803 01804 @endverbatim 01805 * @{ 01806 */ 01807 01808 /** 01809 * @brief Return the TIM Hall Sensor interface state 01810 * @param htim pointer to a TIM_HandleTypeDef structure that contains 01811 * the configuration information for TIM module. 01812 * @retval HAL state 01813 */ 01814 HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim) 01815 { 01816 return htim->State; 01817 } 01818 01819 /** 01820 * @} 01821 */ 01822 01823 /** 01824 * @brief TIM DMA Commutation callback. 01825 * @param hdma pointer to a DMA_HandleTypeDef structure that contains 01826 * the configuration information for the specified DMA module. 01827 * @retval None 01828 */ 01829 void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma) 01830 { 01831 TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 01832 01833 htim->State= HAL_TIM_STATE_READY; 01834 01835 HAL_TIMEx_CommutationCallback(htim); 01836 } 01837 /** 01838 * @} 01839 */ 01840 01841 /** 01842 * @brief Enables or disables the TIM Capture Compare Channel xN. 01843 * @param TIMx to select the TIM peripheral 01844 * @param Channel specifies the TIM Channel 01845 * This parameter can be one of the following values: 01846 * @arg TIM_Channel_1: TIM Channel 1 01847 * @arg TIM_Channel_2: TIM Channel 2 01848 * @arg TIM_Channel_3: TIM Channel 3 01849 * @param ChannelNState specifies the TIM Channel CCxNE bit new state. 01850 * This parameter can be: TIM_CCxN_ENABLE or TIM_CCxN_Disable. 01851 * @retval None 01852 */ 01853 static void TIM_CCxNChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelNState) 01854 { 01855 uint32_t tmp = 0U; 01856 01857 /* Check the parameters */ 01858 assert_param(IS_TIM_CC4_INSTANCE(TIMx)); 01859 assert_param(IS_TIM_COMPLEMENTARY_CHANNELS(Channel)); 01860 01861 tmp = TIM_CCER_CC1NE << Channel; 01862 01863 /* Reset the CCxNE Bit */ 01864 TIMx->CCER &= ~tmp; 01865 01866 /* Set or reset the CCxNE Bit */ 01867 TIMx->CCER |= (uint32_t)(ChannelNState << Channel); 01868 } 01869 01870 /** 01871 * @} 01872 */ 01873 01874 #endif /* HAL_TIM_MODULE_ENABLED */ 01875 /** 01876 * @} 01877 */ 01878 01879 /** 01880 * @} 01881 */ 01882 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/