STM32L486xx HAL User Manual: stm32l4xx_ll

Header file of SYSTEM LL module. More...

#include "stm32l4xx.h"

Defines
#define	FLASH_PDKEY1 0x04152637U
	Power-down in Run mode Flash key.
#define	FLASH_PDKEY2 0xFAFBFCFDU
#define	LL_SYSCFG_REMAP_FLASH 0x00000000U
#define	LL_SYSCFG_REMAP_SYSTEMFLASH SYSCFG_MEMRMP_MEM_MODE_0
#define	LL_SYSCFG_REMAP_SRAM (SYSCFG_MEMRMP_MEM_MODE_1 \| SYSCFG_MEMRMP_MEM_MODE_0)
#define	LL_SYSCFG_REMAP_FMC SYSCFG_MEMRMP_MEM_MODE_1
#define	LL_SYSCFG_REMAP_QUADSPI (SYSCFG_MEMRMP_MEM_MODE_2 \| SYSCFG_MEMRMP_MEM_MODE_1)
#define	LL_SYSCFG_BANKMODE_BANK1 0x00000000U
#define	LL_SYSCFG_BANKMODE_BANK2 SYSCFG_MEMRMP_FB_MODE
#define	LL_SYSCFG_I2C_FASTMODEPLUS_PB6 SYSCFG_CFGR1_I2C_PB6_FMP
#define	LL_SYSCFG_I2C_FASTMODEPLUS_PB7 SYSCFG_CFGR1_I2C_PB7_FMP
#define	LL_SYSCFG_I2C_FASTMODEPLUS_PB8 SYSCFG_CFGR1_I2C_PB8_FMP
#define	LL_SYSCFG_I2C_FASTMODEPLUS_PB9 SYSCFG_CFGR1_I2C_PB9_FMP
#define	LL_SYSCFG_I2C_FASTMODEPLUS_I2C1 SYSCFG_CFGR1_I2C1_FMP
#define	LL_SYSCFG_I2C_FASTMODEPLUS_I2C2 SYSCFG_CFGR1_I2C2_FMP
#define	LL_SYSCFG_I2C_FASTMODEPLUS_I2C3 SYSCFG_CFGR1_I2C3_FMP
#define	LL_SYSCFG_EXTI_PORTA 0U
#define	LL_SYSCFG_EXTI_PORTB 1U
#define	LL_SYSCFG_EXTI_PORTC 2U
#define	LL_SYSCFG_EXTI_PORTD 3U
#define	LL_SYSCFG_EXTI_PORTE 4U
#define	LL_SYSCFG_EXTI_PORTF 5U
#define	LL_SYSCFG_EXTI_PORTG 6U
#define	LL_SYSCFG_EXTI_PORTH 7U
#define	LL_SYSCFG_EXTI_LINE0 (uint32_t)(0x000FU << 16U \| 0U) /* !< EXTI_POSITION_0 \| EXTICR[0] */
#define	LL_SYSCFG_EXTI_LINE1 (uint32_t)(0x00F0U << 16U \| 0U) /* !< EXTI_POSITION_4 \| EXTICR[0] */
#define	LL_SYSCFG_EXTI_LINE2 (uint32_t)(0x0F00U << 16U \| 0U) /* !< EXTI_POSITION_8 \| EXTICR[0] */
#define	LL_SYSCFG_EXTI_LINE3 (uint32_t)(0xF000U << 16U \| 0U) /* !< EXTI_POSITION_12 \| EXTICR[0] */
#define	LL_SYSCFG_EXTI_LINE4 (uint32_t)(0x000FU << 16U \| 1U) /* !< EXTI_POSITION_0 \| EXTICR[1] */
#define	LL_SYSCFG_EXTI_LINE5 (uint32_t)(0x00F0U << 16U \| 1U) /* !< EXTI_POSITION_4 \| EXTICR[1] */
#define	LL_SYSCFG_EXTI_LINE6 (uint32_t)(0x0F00U << 16U \| 1U) /* !< EXTI_POSITION_8 \| EXTICR[1] */
#define	LL_SYSCFG_EXTI_LINE7 (uint32_t)(0xF000U << 16U \| 1U) /* !< EXTI_POSITION_12 \| EXTICR[1] */
#define	LL_SYSCFG_EXTI_LINE8 (uint32_t)(0x000FU << 16U \| 2U) /* !< EXTI_POSITION_0 \| EXTICR[2] */
#define	LL_SYSCFG_EXTI_LINE9 (uint32_t)(0x00F0U << 16U \| 2U) /* !< EXTI_POSITION_4 \| EXTICR[2] */
#define	LL_SYSCFG_EXTI_LINE10 (uint32_t)(0x0F00U << 16U \| 2U) /* !< EXTI_POSITION_8 \| EXTICR[2] */
#define	LL_SYSCFG_EXTI_LINE11 (uint32_t)(0xF000U << 16U \| 2U) /* !< EXTI_POSITION_12 \| EXTICR[2] */
#define	LL_SYSCFG_EXTI_LINE12 (uint32_t)(0x000FU << 16U \| 3U) /* !< EXTI_POSITION_0 \| EXTICR[3] */
#define	LL_SYSCFG_EXTI_LINE13 (uint32_t)(0x00F0U << 16U \| 3U) /* !< EXTI_POSITION_4 \| EXTICR[3] */
#define	LL_SYSCFG_EXTI_LINE14 (uint32_t)(0x0F00U << 16U \| 3U) /* !< EXTI_POSITION_8 \| EXTICR[3] */
#define	LL_SYSCFG_EXTI_LINE15 (uint32_t)(0xF000U << 16U \| 3U) /* !< EXTI_POSITION_12 \| EXTICR[3] */
#define	LL_SYSCFG_TIMBREAK_ECC SYSCFG_CFGR2_ECCL
#define	LL_SYSCFG_TIMBREAK_PVD SYSCFG_CFGR2_PVDL
#define	LL_SYSCFG_TIMBREAK_SRAM2_PARITY SYSCFG_CFGR2_SPL
#define	LL_SYSCFG_TIMBREAK_LOCKUP SYSCFG_CFGR2_CLL
#define	LL_SYSCFG_SRAM2WRP_PAGE0 SYSCFG_SWPR_PAGE0
#define	LL_SYSCFG_SRAM2WRP_PAGE1 SYSCFG_SWPR_PAGE1
#define	LL_SYSCFG_SRAM2WRP_PAGE2 SYSCFG_SWPR_PAGE2
#define	LL_SYSCFG_SRAM2WRP_PAGE3 SYSCFG_SWPR_PAGE3
#define	LL_SYSCFG_SRAM2WRP_PAGE4 SYSCFG_SWPR_PAGE4
#define	LL_SYSCFG_SRAM2WRP_PAGE5 SYSCFG_SWPR_PAGE5
#define	LL_SYSCFG_SRAM2WRP_PAGE6 SYSCFG_SWPR_PAGE6
#define	LL_SYSCFG_SRAM2WRP_PAGE7 SYSCFG_SWPR_PAGE7
#define	LL_SYSCFG_SRAM2WRP_PAGE8 SYSCFG_SWPR_PAGE8
#define	LL_SYSCFG_SRAM2WRP_PAGE9 SYSCFG_SWPR_PAGE9
#define	LL_SYSCFG_SRAM2WRP_PAGE10 SYSCFG_SWPR_PAGE10
#define	LL_SYSCFG_SRAM2WRP_PAGE11 SYSCFG_SWPR_PAGE11
#define	LL_SYSCFG_SRAM2WRP_PAGE12 SYSCFG_SWPR_PAGE12
#define	LL_SYSCFG_SRAM2WRP_PAGE13 SYSCFG_SWPR_PAGE13
#define	LL_SYSCFG_SRAM2WRP_PAGE14 SYSCFG_SWPR_PAGE14
#define	LL_SYSCFG_SRAM2WRP_PAGE15 SYSCFG_SWPR_PAGE15
#define	LL_SYSCFG_SRAM2WRP_PAGE16 SYSCFG_SWPR_PAGE16
#define	LL_SYSCFG_SRAM2WRP_PAGE17 SYSCFG_SWPR_PAGE17
#define	LL_SYSCFG_SRAM2WRP_PAGE18 SYSCFG_SWPR_PAGE18
#define	LL_SYSCFG_SRAM2WRP_PAGE19 SYSCFG_SWPR_PAGE19
#define	LL_SYSCFG_SRAM2WRP_PAGE20 SYSCFG_SWPR_PAGE20
#define	LL_SYSCFG_SRAM2WRP_PAGE21 SYSCFG_SWPR_PAGE21
#define	LL_SYSCFG_SRAM2WRP_PAGE22 SYSCFG_SWPR_PAGE22
#define	LL_SYSCFG_SRAM2WRP_PAGE23 SYSCFG_SWPR_PAGE23
#define	LL_SYSCFG_SRAM2WRP_PAGE24 SYSCFG_SWPR_PAGE24
#define	LL_SYSCFG_SRAM2WRP_PAGE25 SYSCFG_SWPR_PAGE25
#define	LL_SYSCFG_SRAM2WRP_PAGE26 SYSCFG_SWPR_PAGE26
#define	LL_SYSCFG_SRAM2WRP_PAGE27 SYSCFG_SWPR_PAGE27
#define	LL_SYSCFG_SRAM2WRP_PAGE28 SYSCFG_SWPR_PAGE28
#define	LL_SYSCFG_SRAM2WRP_PAGE29 SYSCFG_SWPR_PAGE29
#define	LL_SYSCFG_SRAM2WRP_PAGE30 SYSCFG_SWPR_PAGE30
#define	LL_SYSCFG_SRAM2WRP_PAGE31 SYSCFG_SWPR_PAGE31
#define	LL_DBGMCU_TRACE_NONE 0x00000000U
#define	LL_DBGMCU_TRACE_ASYNCH DBGMCU_CR_TRACE_IOEN
#define	LL_DBGMCU_TRACE_SYNCH_SIZE1 (DBGMCU_CR_TRACE_IOEN \| DBGMCU_CR_TRACE_MODE_0)
#define	LL_DBGMCU_TRACE_SYNCH_SIZE2 (DBGMCU_CR_TRACE_IOEN \| DBGMCU_CR_TRACE_MODE_1)
#define	LL_DBGMCU_TRACE_SYNCH_SIZE4 (DBGMCU_CR_TRACE_IOEN \| DBGMCU_CR_TRACE_MODE)
#define	LL_DBGMCU_APB1_GRP1_TIM2_STOP DBGMCU_APB1FZR1_DBG_TIM2_STOP
#define	LL_DBGMCU_APB1_GRP1_TIM3_STOP DBGMCU_APB1FZR1_DBG_TIM3_STOP
#define	LL_DBGMCU_APB1_GRP1_TIM4_STOP DBGMCU_APB1FZR1_DBG_TIM4_STOP
#define	LL_DBGMCU_APB1_GRP1_TIM5_STOP DBGMCU_APB1FZR1_DBG_TIM5_STOP
#define	LL_DBGMCU_APB1_GRP1_TIM6_STOP DBGMCU_APB1FZR1_DBG_TIM6_STOP
#define	LL_DBGMCU_APB1_GRP1_TIM7_STOP DBGMCU_APB1FZR1_DBG_TIM7_STOP
#define	LL_DBGMCU_APB1_GRP1_RTC_STOP DBGMCU_APB1FZR1_DBG_RTC_STOP
#define	LL_DBGMCU_APB1_GRP1_WWDG_STOP DBGMCU_APB1FZR1_DBG_WWDG_STOP
#define	LL_DBGMCU_APB1_GRP1_IWDG_STOP DBGMCU_APB1FZR1_DBG_IWDG_STOP
#define	LL_DBGMCU_APB1_GRP1_I2C1_STOP DBGMCU_APB1FZR1_DBG_I2C1_STOP
#define	LL_DBGMCU_APB1_GRP1_I2C2_STOP DBGMCU_APB1FZR1_DBG_I2C2_STOP
#define	LL_DBGMCU_APB1_GRP1_I2C3_STOP DBGMCU_APB1FZR1_DBG_I2C3_STOP
#define	LL_DBGMCU_APB1_GRP1_CAN_STOP DBGMCU_APB1FZR1_DBG_CAN_STOP
#define	LL_DBGMCU_APB1_GRP1_LPTIM1_STOP DBGMCU_APB1FZR1_DBG_LPTIM1_STOP
#define	LL_DBGMCU_APB1_GRP2_LPTIM2_STOP DBGMCU_APB1FZR2_DBG_LPTIM2_STOP
#define	LL_DBGMCU_APB2_GRP1_TIM1_STOP DBGMCU_APB2FZ_DBG_TIM1_STOP
#define	LL_DBGMCU_APB2_GRP1_TIM8_STOP DBGMCU_APB2FZ_DBG_TIM8_STOP
#define	LL_DBGMCU_APB2_GRP1_TIM15_STOP DBGMCU_APB2FZ_DBG_TIM15_STOP
#define	LL_DBGMCU_APB2_GRP1_TIM16_STOP DBGMCU_APB2FZ_DBG_TIM16_STOP
#define	LL_DBGMCU_APB2_GRP1_TIM17_STOP DBGMCU_APB2FZ_DBG_TIM17_STOP
#define	LL_VREFBUF_VOLTAGE_SCALE0 ((uint32_t)0x00000000)
#define	LL_VREFBUF_VOLTAGE_SCALE1 VREFBUF_CSR_VRS
#define	LL_FLASH_LATENCY_0 FLASH_ACR_LATENCY_0WS
#define	LL_FLASH_LATENCY_1 FLASH_ACR_LATENCY_1WS
#define	LL_FLASH_LATENCY_2 FLASH_ACR_LATENCY_2WS
#define	LL_FLASH_LATENCY_3 FLASH_ACR_LATENCY_3WS
#define	LL_FLASH_LATENCY_4 FLASH_ACR_LATENCY_4WS
#define	LL_SYSCFG_EnableSRAM2PageWRP LL_SYSCFG_EnableSRAM2PageWRP_0_31
	Enable SRAM2 page write protection for Pages in range 0 to 31.
Functions
__STATIC_INLINE void	LL_SYSCFG_SetRemapMemory (uint32_t Memory)
	Set memory mapping at address 0x00000000.
__STATIC_INLINE uint32_t	LL_SYSCFG_GetRemapMemory (void)
	Get memory mapping at address 0x00000000.
__STATIC_INLINE void	LL_SYSCFG_SetFlashBankMode (uint32_t Bank)
	Select Flash bank mode (Bank flashed at 0x08000000)
__STATIC_INLINE uint32_t	LL_SYSCFG_GetFlashBankMode (void)
	Get Flash bank mode (Bank flashed at 0x08000000)
__STATIC_INLINE void	LL_SYSCFG_EnableFirewall (void)
	Firewall protection enabled.
__STATIC_INLINE uint32_t	LL_SYSCFG_IsEnabledFirewall (void)
	Check if Firewall protection is enabled or not.
__STATIC_INLINE void	LL_SYSCFG_EnableAnalogBooster (void)
	Enable I/O analog switch voltage booster.
__STATIC_INLINE void	LL_SYSCFG_DisableAnalogBooster (void)
	Disable I/O analog switch voltage booster.
__STATIC_INLINE void	LL_SYSCFG_EnableFastModePlus (uint32_t ConfigFastModePlus)
	Enable the I2C fast mode plus driving capability.
__STATIC_INLINE void	LL_SYSCFG_DisableFastModePlus (uint32_t ConfigFastModePlus)
	Disable the I2C fast mode plus driving capability.
__STATIC_INLINE void	LL_SYSCFG_EnableIT_FPU_IOC (void)
	Enable Floating Point Unit Invalid operation Interrupt.
__STATIC_INLINE void	LL_SYSCFG_EnableIT_FPU_DZC (void)
	Enable Floating Point Unit Divide-by-zero Interrupt.
__STATIC_INLINE void	LL_SYSCFG_EnableIT_FPU_UFC (void)
	Enable Floating Point Unit Underflow Interrupt.
__STATIC_INLINE void	LL_SYSCFG_EnableIT_FPU_OFC (void)
	Enable Floating Point Unit Overflow Interrupt.
__STATIC_INLINE void	LL_SYSCFG_EnableIT_FPU_IDC (void)
	Enable Floating Point Unit Input denormal Interrupt.
__STATIC_INLINE void	LL_SYSCFG_EnableIT_FPU_IXC (void)
	Enable Floating Point Unit Inexact Interrupt.
__STATIC_INLINE void	LL_SYSCFG_DisableIT_FPU_IOC (void)
	Disable Floating Point Unit Invalid operation Interrupt.
__STATIC_INLINE void	LL_SYSCFG_DisableIT_FPU_DZC (void)
	Disable Floating Point Unit Divide-by-zero Interrupt.
__STATIC_INLINE void	LL_SYSCFG_DisableIT_FPU_UFC (void)
	Disable Floating Point Unit Underflow Interrupt.
__STATIC_INLINE void	LL_SYSCFG_DisableIT_FPU_OFC (void)
	Disable Floating Point Unit Overflow Interrupt.
__STATIC_INLINE void	LL_SYSCFG_DisableIT_FPU_IDC (void)
	Disable Floating Point Unit Input denormal Interrupt.
__STATIC_INLINE void	LL_SYSCFG_DisableIT_FPU_IXC (void)
	Disable Floating Point Unit Inexact Interrupt.
__STATIC_INLINE uint32_t	LL_SYSCFG_IsEnabledIT_FPU_IOC (void)
	Check if Floating Point Unit Invalid operation Interrupt source is enabled or disabled.
__STATIC_INLINE uint32_t	LL_SYSCFG_IsEnabledIT_FPU_DZC (void)
	Check if Floating Point Unit Divide-by-zero Interrupt source is enabled or disabled.
__STATIC_INLINE uint32_t	LL_SYSCFG_IsEnabledIT_FPU_UFC (void)
	Check if Floating Point Unit Underflow Interrupt source is enabled or disabled.
__STATIC_INLINE uint32_t	LL_SYSCFG_IsEnabledIT_FPU_OFC (void)
	Check if Floating Point Unit Overflow Interrupt source is enabled or disabled.
__STATIC_INLINE uint32_t	LL_SYSCFG_IsEnabledIT_FPU_IDC (void)
	Check if Floating Point Unit Input denormal Interrupt source is enabled or disabled.
__STATIC_INLINE uint32_t	LL_SYSCFG_IsEnabledIT_FPU_IXC (void)
	Check if Floating Point Unit Inexact Interrupt source is enabled or disabled.
__STATIC_INLINE void	LL_SYSCFG_SetEXTISource (uint32_t Port, uint32_t Line)
	Configure source input for the EXTI external interrupt.
__STATIC_INLINE uint32_t	LL_SYSCFG_GetEXTISource (uint32_t Line)
	Get the configured defined for specific EXTI Line.
__STATIC_INLINE void	LL_SYSCFG_EnableSRAM2Erase (void)
	Enable SRAM2 Erase (starts a hardware SRAM2 erase operation.
__STATIC_INLINE uint32_t	LL_SYSCFG_IsSRAM2EraseOngoing (void)
	Check if SRAM2 erase operation is on going.
__STATIC_INLINE void	LL_SYSCFG_SetTIMBreakInputs (uint32_t Break)
	Set connections to TIM1/8/15/16/17 Break inputs.
__STATIC_INLINE uint32_t	LL_SYSCFG_GetTIMBreakInputs (void)
	Get connections to TIM1/8/15/16/17 Break inputs.
__STATIC_INLINE uint32_t	LL_SYSCFG_IsActiveFlag_SP (void)
	Check if SRAM2 parity error detected.
__STATIC_INLINE void	LL_SYSCFG_ClearFlag_SP (void)
	Clear SRAM2 parity error flag.
__STATIC_INLINE void	LL_SYSCFG_EnableSRAM2PageWRP_0_31 (uint32_t SRAM2WRP)
__STATIC_INLINE void	LL_SYSCFG_LockSRAM2WRP (void)
	SRAM2 page write protection lock prior to erase.
__STATIC_INLINE void	LL_SYSCFG_UnlockSRAM2WRP (void)
	SRAM2 page write protection unlock prior to erase.
__STATIC_INLINE uint32_t	LL_DBGMCU_GetDeviceID (void)
	Return the device identifier.
__STATIC_INLINE uint32_t	LL_DBGMCU_GetRevisionID (void)
	Return the device revision identifier.
__STATIC_INLINE void	LL_DBGMCU_EnableDBGSleepMode (void)
	Enable the Debug Module during SLEEP mode.
__STATIC_INLINE void	LL_DBGMCU_DisableDBGSleepMode (void)
	Disable the Debug Module during SLEEP mode.
__STATIC_INLINE void	LL_DBGMCU_EnableDBGStopMode (void)
	Enable the Debug Module during STOP mode.
__STATIC_INLINE void	LL_DBGMCU_DisableDBGStopMode (void)
	Disable the Debug Module during STOP mode.
__STATIC_INLINE void	LL_DBGMCU_EnableDBGStandbyMode (void)
	Enable the Debug Module during STANDBY mode.
__STATIC_INLINE void	LL_DBGMCU_DisableDBGStandbyMode (void)
	Disable the Debug Module during STANDBY mode.
__STATIC_INLINE void	LL_DBGMCU_SetTracePinAssignment (uint32_t PinAssignment)
	Set Trace pin assignment control.
__STATIC_INLINE uint32_t	LL_DBGMCU_GetTracePinAssignment (void)
	Get Trace pin assignment control.
__STATIC_INLINE void	LL_DBGMCU_APB1_GRP1_FreezePeriph (uint32_t Periphs)
	Freeze APB1 peripherals (group1 peripherals)
__STATIC_INLINE void	LL_DBGMCU_APB1_GRP2_FreezePeriph (uint32_t Periphs)
	Freeze APB1 peripherals (group2 peripherals)
__STATIC_INLINE void	LL_DBGMCU_APB1_GRP1_UnFreezePeriph (uint32_t Periphs)
	Unfreeze APB1 peripherals (group1 peripherals)
__STATIC_INLINE void	LL_DBGMCU_APB1_GRP2_UnFreezePeriph (uint32_t Periphs)
	Unfreeze APB1 peripherals (group2 peripherals)
__STATIC_INLINE void	LL_DBGMCU_APB2_GRP1_FreezePeriph (uint32_t Periphs)
	Freeze APB2 peripherals.
__STATIC_INLINE void	LL_DBGMCU_APB2_GRP1_UnFreezePeriph (uint32_t Periphs)
	Unfreeze APB2 peripherals.
__STATIC_INLINE void	LL_VREFBUF_Enable (void)
	Enable Internal voltage reference.
__STATIC_INLINE void	LL_VREFBUF_Disable (void)
	Disable Internal voltage reference.
__STATIC_INLINE void	LL_VREFBUF_EnableHIZ (void)
	Enable high impedance (VREF+pin is high impedance)
__STATIC_INLINE void	LL_VREFBUF_DisableHIZ (void)
	Disable high impedance (VREF+pin is internally connected to the voltage reference buffer output)
__STATIC_INLINE void	LL_VREFBUF_SetVoltageScaling (uint32_t Scale)
	Set the Voltage reference scale.
__STATIC_INLINE uint32_t	LL_VREFBUF_GetVoltageScaling (void)
	Get the Voltage reference scale.
__STATIC_INLINE uint32_t	LL_VREFBUF_IsVREFReady (void)
	Check if Voltage reference buffer is ready.
__STATIC_INLINE uint32_t	LL_VREFBUF_GetTrimming (void)
	Get the trimming code for VREFBUF calibration.
__STATIC_INLINE void	LL_VREFBUF_SetTrimming (uint32_t Value)
	Set the trimming code for VREFBUF calibration (Tune the internal reference buffer voltage)
__STATIC_INLINE void	LL_FLASH_SetLatency (uint32_t Latency)
	Set FLASH Latency.
__STATIC_INLINE uint32_t	LL_FLASH_GetLatency (void)
	Get FLASH Latency.
__STATIC_INLINE void	LL_FLASH_EnablePrefetch (void)
	Enable Prefetch.
__STATIC_INLINE void	LL_FLASH_DisablePrefetch (void)
	Disable Prefetch.
__STATIC_INLINE uint32_t	LL_FLASH_IsPrefetchEnabled (void)
	Check if Prefetch buffer is enabled.
__STATIC_INLINE void	LL_FLASH_EnableInstCache (void)
	Enable Instruction cache.
__STATIC_INLINE void	LL_FLASH_DisableInstCache (void)
	Disable Instruction cache.
__STATIC_INLINE void	LL_FLASH_EnableDataCache (void)
	Enable Data cache.
__STATIC_INLINE void	LL_FLASH_DisableDataCache (void)
	Disable Data cache.
__STATIC_INLINE void	LL_FLASH_EnableInstCacheReset (void)
	Enable Instruction cache reset.
__STATIC_INLINE void	LL_FLASH_DisableInstCacheReset (void)
	Disable Instruction cache reset.
__STATIC_INLINE void	LL_FLASH_EnableDataCacheReset (void)
	Enable Data cache reset.
__STATIC_INLINE void	LL_FLASH_DisableDataCacheReset (void)
	Disable Data cache reset.
__STATIC_INLINE void	LL_FLASH_EnableRunPowerDown (void)
	Enable Flash Power-down mode during run mode or Low-power run mode.
__STATIC_INLINE void	LL_FLASH_DisableRunPowerDown (void)
	Disable Flash Power-down mode during run mode or Low-power run mode.
__STATIC_INLINE void	LL_FLASH_EnableSleepPowerDown (void)
	Enable Flash Power-down mode during Sleep or Low-power sleep mode.
__STATIC_INLINE void	LL_FLASH_DisableSleepPowerDown (void)
	Disable Flash Power-down mode during Sleep or Low-power sleep mode.

Detailed Description

Header file of SYSTEM LL module.

Author:

MCD Application Team

  ==============================================================================
                     ##### How to use this driver #####
  ==============================================================================
    [..]
    The LL SYSTEM driver contains a set of generic APIs that can be
    used by user:
      (+) Some of the FLASH features need to be handled in the SYSTEM file.
      (+) Access to DBGCMU registers
      (+) Access to SYSCFG registers
      (+) Access to VREFBUF registers

Attention:

Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. 3. Neither the name of STMicroelectronics nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.

THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

Definition in file stm32l4xx_ll_system.h.

Defines

Functions

Detailed Description

© COPYRIGHT(c) 2017 STMicroelectronics