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STM32L486xx HAL User Manual
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Defines | |
| #define | LL_DBGMCU_APB1_GRP1_TIM2_STOP DBGMCU_APB1FZR1_DBG_TIM2_STOP |
| #define | LL_DBGMCU_APB1_GRP1_TIM3_STOP DBGMCU_APB1FZR1_DBG_TIM3_STOP |
| #define | LL_DBGMCU_APB1_GRP1_TIM4_STOP DBGMCU_APB1FZR1_DBG_TIM4_STOP |
| #define | LL_DBGMCU_APB1_GRP1_TIM5_STOP DBGMCU_APB1FZR1_DBG_TIM5_STOP |
| #define | LL_DBGMCU_APB1_GRP1_TIM6_STOP DBGMCU_APB1FZR1_DBG_TIM6_STOP |
| #define | LL_DBGMCU_APB1_GRP1_TIM7_STOP DBGMCU_APB1FZR1_DBG_TIM7_STOP |
| #define | LL_DBGMCU_APB1_GRP1_RTC_STOP DBGMCU_APB1FZR1_DBG_RTC_STOP |
| #define | LL_DBGMCU_APB1_GRP1_WWDG_STOP DBGMCU_APB1FZR1_DBG_WWDG_STOP |
| #define | LL_DBGMCU_APB1_GRP1_IWDG_STOP DBGMCU_APB1FZR1_DBG_IWDG_STOP |
| #define | LL_DBGMCU_APB1_GRP1_I2C1_STOP DBGMCU_APB1FZR1_DBG_I2C1_STOP |
| #define | LL_DBGMCU_APB1_GRP1_I2C2_STOP DBGMCU_APB1FZR1_DBG_I2C2_STOP |
| #define | LL_DBGMCU_APB1_GRP1_I2C3_STOP DBGMCU_APB1FZR1_DBG_I2C3_STOP |
| #define | LL_DBGMCU_APB1_GRP1_CAN_STOP DBGMCU_APB1FZR1_DBG_CAN_STOP |
| #define | LL_DBGMCU_APB1_GRP1_LPTIM1_STOP DBGMCU_APB1FZR1_DBG_LPTIM1_STOP |
| #define LL_DBGMCU_APB1_GRP1_CAN_STOP DBGMCU_APB1FZR1_DBG_CAN_STOP |
The bxCAN receive registers are frozen
Definition at line 320 of file stm32l4xx_ll_system.h.
| #define LL_DBGMCU_APB1_GRP1_I2C1_STOP DBGMCU_APB1FZR1_DBG_I2C1_STOP |
The I2C1 SMBus timeout is frozen
Definition at line 315 of file stm32l4xx_ll_system.h.
| #define LL_DBGMCU_APB1_GRP1_I2C2_STOP DBGMCU_APB1FZR1_DBG_I2C2_STOP |
The I2C2 SMBus timeout is frozen
Definition at line 317 of file stm32l4xx_ll_system.h.
| #define LL_DBGMCU_APB1_GRP1_I2C3_STOP DBGMCU_APB1FZR1_DBG_I2C3_STOP |
The I2C3 SMBus timeout is frozen
Definition at line 319 of file stm32l4xx_ll_system.h.
| #define LL_DBGMCU_APB1_GRP1_IWDG_STOP DBGMCU_APB1FZR1_DBG_IWDG_STOP |
The independent watchdog counter clock is stopped when the core is halted
Definition at line 314 of file stm32l4xx_ll_system.h.
| #define LL_DBGMCU_APB1_GRP1_LPTIM1_STOP DBGMCU_APB1FZR1_DBG_LPTIM1_STOP |
The counter clock of LPTIM1 is stopped when the core is halted
Definition at line 324 of file stm32l4xx_ll_system.h.
| #define LL_DBGMCU_APB1_GRP1_RTC_STOP DBGMCU_APB1FZR1_DBG_RTC_STOP |
The clock of the RTC counter is stopped when the core is halted
Definition at line 312 of file stm32l4xx_ll_system.h.
| #define LL_DBGMCU_APB1_GRP1_TIM2_STOP DBGMCU_APB1FZR1_DBG_TIM2_STOP |
The counter clock of TIM2 is stopped when the core is halted
Definition at line 298 of file stm32l4xx_ll_system.h.
| #define LL_DBGMCU_APB1_GRP1_TIM3_STOP DBGMCU_APB1FZR1_DBG_TIM3_STOP |
The counter clock of TIM3 is stopped when the core is halted
Definition at line 300 of file stm32l4xx_ll_system.h.
| #define LL_DBGMCU_APB1_GRP1_TIM4_STOP DBGMCU_APB1FZR1_DBG_TIM4_STOP |
The counter clock of TIM4 is stopped when the core is halted
Definition at line 303 of file stm32l4xx_ll_system.h.
| #define LL_DBGMCU_APB1_GRP1_TIM5_STOP DBGMCU_APB1FZR1_DBG_TIM5_STOP |
The counter clock of TIM5 is stopped when the core is halted
Definition at line 306 of file stm32l4xx_ll_system.h.
| #define LL_DBGMCU_APB1_GRP1_TIM6_STOP DBGMCU_APB1FZR1_DBG_TIM6_STOP |
The counter clock of TIM6 is stopped when the core is halted
Definition at line 308 of file stm32l4xx_ll_system.h.
| #define LL_DBGMCU_APB1_GRP1_TIM7_STOP DBGMCU_APB1FZR1_DBG_TIM7_STOP |
The counter clock of TIM7 is stopped when the core is halted
Definition at line 310 of file stm32l4xx_ll_system.h.
| #define LL_DBGMCU_APB1_GRP1_WWDG_STOP DBGMCU_APB1FZR1_DBG_WWDG_STOP |
The window watchdog counter clock is stopped when the core is halted
Definition at line 313 of file stm32l4xx_ll_system.h.
1.7.6.1