STM32L486xx HAL User Manual
|
Header file of TSC HAL module. More...
#include "stm32l4xx_hal_def.h"
Go to the source code of this file.
Data Structures | |
struct | TSC_InitTypeDef |
TSC init structure definition. More... | |
struct | TSC_IOConfigTypeDef |
TSC IOs configuration structure definition. More... | |
struct | __TSC_HandleTypeDef |
TSC handle Structure definition. More... | |
Defines | |
#define | HAL_TSC_ERROR_NONE 0x00000000U |
#define | HAL_TSC_ERROR_INVALID_CALLBACK (0x00000001U) |
#define | TSC_CTPH_1CYCLE 0x00000000U |
#define | TSC_CTPH_2CYCLES TSC_CR_CTPH_0 |
#define | TSC_CTPH_3CYCLES TSC_CR_CTPH_1 |
#define | TSC_CTPH_4CYCLES (TSC_CR_CTPH_1 | TSC_CR_CTPH_0) |
#define | TSC_CTPH_5CYCLES TSC_CR_CTPH_2 |
#define | TSC_CTPH_6CYCLES (TSC_CR_CTPH_2 | TSC_CR_CTPH_0) |
#define | TSC_CTPH_7CYCLES (TSC_CR_CTPH_2 | TSC_CR_CTPH_1) |
#define | TSC_CTPH_8CYCLES (TSC_CR_CTPH_2 | TSC_CR_CTPH_1 | TSC_CR_CTPH_0) |
#define | TSC_CTPH_9CYCLES TSC_CR_CTPH_3 |
#define | TSC_CTPH_10CYCLES (TSC_CR_CTPH_3 | TSC_CR_CTPH_0) |
#define | TSC_CTPH_11CYCLES (TSC_CR_CTPH_3 | TSC_CR_CTPH_1) |
#define | TSC_CTPH_12CYCLES (TSC_CR_CTPH_3 | TSC_CR_CTPH_1 | TSC_CR_CTPH_0) |
#define | TSC_CTPH_13CYCLES (TSC_CR_CTPH_3 | TSC_CR_CTPH_2) |
#define | TSC_CTPH_14CYCLES (TSC_CR_CTPH_3 | TSC_CR_CTPH_2 | TSC_CR_CTPH_0) |
#define | TSC_CTPH_15CYCLES (TSC_CR_CTPH_3 | TSC_CR_CTPH_2 | TSC_CR_CTPH_1) |
#define | TSC_CTPH_16CYCLES (TSC_CR_CTPH_3 | TSC_CR_CTPH_2 | TSC_CR_CTPH_1 | TSC_CR_CTPH_0) |
#define | TSC_CTPL_1CYCLE 0x00000000U |
#define | TSC_CTPL_2CYCLES TSC_CR_CTPL_0 |
#define | TSC_CTPL_3CYCLES TSC_CR_CTPL_1 |
#define | TSC_CTPL_4CYCLES (TSC_CR_CTPL_1 | TSC_CR_CTPL_0) |
#define | TSC_CTPL_5CYCLES TSC_CR_CTPL_2 |
#define | TSC_CTPL_6CYCLES (TSC_CR_CTPL_2 | TSC_CR_CTPL_0) |
#define | TSC_CTPL_7CYCLES (TSC_CR_CTPL_2 | TSC_CR_CTPL_1) |
#define | TSC_CTPL_8CYCLES (TSC_CR_CTPL_2 | TSC_CR_CTPL_1 | TSC_CR_CTPL_0) |
#define | TSC_CTPL_9CYCLES TSC_CR_CTPL_3 |
#define | TSC_CTPL_10CYCLES (TSC_CR_CTPL_3 | TSC_CR_CTPL_0) |
#define | TSC_CTPL_11CYCLES (TSC_CR_CTPL_3 | TSC_CR_CTPL_1) |
#define | TSC_CTPL_12CYCLES (TSC_CR_CTPL_3 | TSC_CR_CTPL_1 | TSC_CR_CTPL_0) |
#define | TSC_CTPL_13CYCLES (TSC_CR_CTPL_3 | TSC_CR_CTPL_2) |
#define | TSC_CTPL_14CYCLES (TSC_CR_CTPL_3 | TSC_CR_CTPL_2 | TSC_CR_CTPL_0) |
#define | TSC_CTPL_15CYCLES (TSC_CR_CTPL_3 | TSC_CR_CTPL_2 | TSC_CR_CTPL_1) |
#define | TSC_CTPL_16CYCLES (TSC_CR_CTPL_3 | TSC_CR_CTPL_2 | TSC_CR_CTPL_1 | TSC_CR_CTPL_0) |
#define | TSC_SS_PRESC_DIV1 0x00000000U |
#define | TSC_SS_PRESC_DIV2 TSC_CR_SSPSC |
#define | TSC_PG_PRESC_DIV1 0x00000000U |
#define | TSC_PG_PRESC_DIV2 TSC_CR_PGPSC_0 |
#define | TSC_PG_PRESC_DIV4 TSC_CR_PGPSC_1 |
#define | TSC_PG_PRESC_DIV8 (TSC_CR_PGPSC_1 | TSC_CR_PGPSC_0) |
#define | TSC_PG_PRESC_DIV16 TSC_CR_PGPSC_2 |
#define | TSC_PG_PRESC_DIV32 (TSC_CR_PGPSC_2 | TSC_CR_PGPSC_0) |
#define | TSC_PG_PRESC_DIV64 (TSC_CR_PGPSC_2 | TSC_CR_PGPSC_1) |
#define | TSC_PG_PRESC_DIV128 (TSC_CR_PGPSC_2 | TSC_CR_PGPSC_1 | TSC_CR_PGPSC_0) |
#define | TSC_MCV_255 0x00000000U |
#define | TSC_MCV_511 TSC_CR_MCV_0 |
#define | TSC_MCV_1023 TSC_CR_MCV_1 |
#define | TSC_MCV_2047 (TSC_CR_MCV_1 | TSC_CR_MCV_0) |
#define | TSC_MCV_4095 TSC_CR_MCV_2 |
#define | TSC_MCV_8191 (TSC_CR_MCV_2 | TSC_CR_MCV_0) |
#define | TSC_MCV_16383 (TSC_CR_MCV_2 | TSC_CR_MCV_1) |
#define | TSC_IODEF_OUT_PP_LOW 0x00000000U |
#define | TSC_IODEF_IN_FLOAT TSC_CR_IODEF |
#define | TSC_SYNC_POLARITY_FALLING 0x00000000U |
#define | TSC_SYNC_POLARITY_RISING TSC_CR_SYNCPOL |
#define | TSC_ACQ_MODE_NORMAL 0x00000000U |
#define | TSC_ACQ_MODE_SYNCHRO TSC_CR_AM |
#define | TSC_IT_EOA TSC_IER_EOAIE |
#define | TSC_IT_MCE TSC_IER_MCEIE |
#define | TSC_FLAG_EOA TSC_ISR_EOAF |
#define | TSC_FLAG_MCE TSC_ISR_MCEF |
#define | TSC_GROUP1 (uint32_t)(0x1U << TSC_GROUP1_IDX) |
#define | TSC_GROUP2 (uint32_t)(0x1U << TSC_GROUP2_IDX) |
#define | TSC_GROUP3 (uint32_t)(0x1U << TSC_GROUP3_IDX) |
#define | TSC_GROUP4 (uint32_t)(0x1U << TSC_GROUP4_IDX) |
#define | TSC_GROUP5 (uint32_t)(0x1U << TSC_GROUP5_IDX) |
#define | TSC_GROUP6 (uint32_t)(0x1U << TSC_GROUP6_IDX) |
#define | TSC_GROUP7 (uint32_t)(0x1U << TSC_GROUP7_IDX) |
#define | TSC_GROUP8 (uint32_t)(0x1U << TSC_GROUP8_IDX) |
#define | TSC_GROUPX_NOT_SUPPORTED 0xFF000000U |
#define | TSC_GROUP1_IO1 TSC_IOCCR_G1_IO1 |
#define | TSC_GROUP1_IO2 TSC_IOCCR_G1_IO2 |
#define | TSC_GROUP1_IO3 TSC_IOCCR_G1_IO3 |
#define | TSC_GROUP1_IO4 TSC_IOCCR_G1_IO4 |
#define | TSC_GROUP2_IO1 TSC_IOCCR_G2_IO1 |
#define | TSC_GROUP2_IO2 TSC_IOCCR_G2_IO2 |
#define | TSC_GROUP2_IO3 TSC_IOCCR_G2_IO3 |
#define | TSC_GROUP2_IO4 TSC_IOCCR_G2_IO4 |
#define | TSC_GROUP3_IO1 TSC_IOCCR_G3_IO1 |
#define | TSC_GROUP3_IO2 TSC_IOCCR_G3_IO2 |
#define | TSC_GROUP3_IO3 TSC_IOCCR_G3_IO3 |
#define | TSC_GROUP3_IO4 TSC_IOCCR_G3_IO4 |
#define | TSC_GROUP4_IO1 TSC_IOCCR_G4_IO1 |
#define | TSC_GROUP4_IO2 TSC_IOCCR_G4_IO2 |
#define | TSC_GROUP4_IO3 TSC_IOCCR_G4_IO3 |
#define | TSC_GROUP4_IO4 TSC_IOCCR_G4_IO4 |
#define | TSC_GROUP5_IO1 TSC_IOCCR_G5_IO1 |
#define | TSC_GROUP5_IO2 TSC_IOCCR_G5_IO2 |
#define | TSC_GROUP5_IO3 TSC_IOCCR_G5_IO3 |
#define | TSC_GROUP5_IO4 TSC_IOCCR_G5_IO4 |
#define | TSC_GROUP6_IO1 TSC_IOCCR_G6_IO1 |
#define | TSC_GROUP6_IO2 TSC_IOCCR_G6_IO2 |
#define | TSC_GROUP6_IO3 TSC_IOCCR_G6_IO3 |
#define | TSC_GROUP6_IO4 TSC_IOCCR_G6_IO4 |
#define | TSC_GROUP7_IO1 TSC_IOCCR_G7_IO1 |
#define | TSC_GROUP7_IO2 TSC_IOCCR_G7_IO2 |
#define | TSC_GROUP7_IO3 TSC_IOCCR_G7_IO3 |
#define | TSC_GROUP7_IO4 TSC_IOCCR_G7_IO4 |
#define | TSC_GROUP8_IO1 TSC_IOCCR_G8_IO1 |
#define | TSC_GROUP8_IO2 TSC_IOCCR_G8_IO2 |
#define | TSC_GROUP8_IO3 TSC_IOCCR_G8_IO3 |
#define | TSC_GROUP8_IO4 TSC_IOCCR_G8_IO4 |
#define | __HAL_TSC_RESET_HANDLE_STATE(__HANDLE__) |
Reset TSC handle state. | |
#define | __HAL_TSC_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= TSC_CR_TSCE) |
Enable the TSC peripheral. | |
#define | __HAL_TSC_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= (uint32_t)(~TSC_CR_TSCE)) |
Disable the TSC peripheral. | |
#define | __HAL_TSC_START_ACQ(__HANDLE__) ((__HANDLE__)->Instance->CR |= TSC_CR_START) |
Start acquisition. | |
#define | __HAL_TSC_STOP_ACQ(__HANDLE__) ((__HANDLE__)->Instance->CR &= (uint32_t)(~TSC_CR_START)) |
Stop acquisition. | |
#define | __HAL_TSC_SET_IODEF_OUTPPLOW(__HANDLE__) ((__HANDLE__)->Instance->CR &= (uint32_t)(~TSC_CR_IODEF)) |
Set IO default mode to output push-pull low. | |
#define | __HAL_TSC_SET_IODEF_INFLOAT(__HANDLE__) ((__HANDLE__)->Instance->CR |= TSC_CR_IODEF) |
Set IO default mode to input floating. | |
#define | __HAL_TSC_SET_SYNC_POL_FALL(__HANDLE__) ((__HANDLE__)->Instance->CR &= (uint32_t)(~TSC_CR_SYNCPOL)) |
Set synchronization polarity to falling edge. | |
#define | __HAL_TSC_SET_SYNC_POL_RISE_HIGH(__HANDLE__) ((__HANDLE__)->Instance->CR |= TSC_CR_SYNCPOL) |
Set synchronization polarity to rising edge and high level. | |
#define | __HAL_TSC_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__)) |
Enable TSC interrupt. | |
#define | __HAL_TSC_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= (uint32_t)(~(__INTERRUPT__))) |
Disable TSC interrupt. | |
#define | __HAL_TSC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) |
Check whether the specified TSC interrupt source is enabled or not. | |
#define | __HAL_TSC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__)) ? SET : RESET) |
Check whether the specified TSC flag is set or not. | |
#define | __HAL_TSC_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) |
Clear the TSC's pending flag. | |
#define | __HAL_TSC_ENABLE_HYSTERESIS(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOHCR |= (__GX_IOY_MASK__)) |
Enable schmitt trigger hysteresis on a group of IOs. | |
#define | __HAL_TSC_DISABLE_HYSTERESIS(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOHCR &= (uint32_t)(~(__GX_IOY_MASK__))) |
Disable schmitt trigger hysteresis on a group of IOs. | |
#define | __HAL_TSC_OPEN_ANALOG_SWITCH(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOASCR &= (uint32_t)(~(__GX_IOY_MASK__))) |
Open analog switch on a group of IOs. | |
#define | __HAL_TSC_CLOSE_ANALOG_SWITCH(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOASCR |= (__GX_IOY_MASK__)) |
Close analog switch on a group of IOs. | |
#define | __HAL_TSC_ENABLE_CHANNEL(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOCCR |= (__GX_IOY_MASK__)) |
Enable a group of IOs in channel mode. | |
#define | __HAL_TSC_DISABLE_CHANNEL(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOCCR &= (uint32_t)(~(__GX_IOY_MASK__))) |
Disable a group of channel IOs. | |
#define | __HAL_TSC_ENABLE_SAMPLING(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOSCR |= (__GX_IOY_MASK__)) |
Enable a group of IOs in sampling mode. | |
#define | __HAL_TSC_DISABLE_SAMPLING(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOSCR &= (uint32_t)(~(__GX_IOY_MASK__))) |
Disable a group of sampling IOs. | |
#define | __HAL_TSC_ENABLE_GROUP(__HANDLE__, __GX_MASK__) ((__HANDLE__)->Instance->IOGCSR |= (__GX_MASK__)) |
Enable acquisition groups. | |
#define | __HAL_TSC_DISABLE_GROUP(__HANDLE__, __GX_MASK__) ((__HANDLE__)->Instance->IOGCSR &= (uint32_t)(~(__GX_MASK__))) |
Disable acquisition groups. | |
#define | __HAL_TSC_GET_GROUP_STATUS(__HANDLE__, __GX_INDEX__) ((((__HANDLE__)->Instance->IOGCSR & (uint32_t)((uint32_t)1U << ((__GX_INDEX__) + (uint32_t)16U))) == (uint32_t)((uint32_t)1U << ((__GX_INDEX__) + (uint32_t)16U))) ? TSC_GROUP_COMPLETED : TSC_GROUP_ONGOING) |
Gets acquisition group status. | |
#define | IS_TSC_CTPH(__VALUE__) |
#define | IS_TSC_CTPL(__VALUE__) |
#define | IS_TSC_SS(__VALUE__) (((__VALUE__) == DISABLE) || ((__VALUE__) == ENABLE)) |
#define | IS_TSC_SSD(__VALUE__) (((__VALUE__) == 0U) || (((__VALUE__) > 0U) && ((__VALUE__) < 128U))) |
#define | IS_TSC_SS_PRESC(__VALUE__) (((__VALUE__) == TSC_SS_PRESC_DIV1) || ((__VALUE__) == TSC_SS_PRESC_DIV2)) |
#define | IS_TSC_PG_PRESC(__VALUE__) |
#define | IS_TSC_MCV(__VALUE__) |
#define | IS_TSC_IODEF(__VALUE__) (((__VALUE__) == TSC_IODEF_OUT_PP_LOW) || ((__VALUE__) == TSC_IODEF_IN_FLOAT)) |
#define | IS_TSC_SYNC_POL(__VALUE__) (((__VALUE__) == TSC_SYNC_POLARITY_FALLING) || ((__VALUE__) == TSC_SYNC_POLARITY_RISING)) |
#define | IS_TSC_ACQ_MODE(__VALUE__) (((__VALUE__) == TSC_ACQ_MODE_NORMAL) || ((__VALUE__) == TSC_ACQ_MODE_SYNCHRO)) |
#define | IS_TSC_MCE_IT(__VALUE__) (((__VALUE__) == DISABLE) || ((__VALUE__) == ENABLE)) |
#define | IS_TSC_GROUP_INDEX(__VALUE__) (((__VALUE__) == 0U) || (((__VALUE__) > 0U) && ((__VALUE__) < TSC_NB_OF_GROUPS))) |
#define | IS_TSC_GROUP(__VALUE__) |
Typedefs | |
typedef struct __TSC_HandleTypeDef | TSC_HandleTypeDef |
TSC handle Structure definition. | |
typedef void(* | pTSC_CallbackTypeDef )(TSC_HandleTypeDef *htsc) |
HAL TSC Callback pointer definition. | |
Enumerations | |
enum | HAL_TSC_StateTypeDef { HAL_TSC_STATE_RESET = 0x00U, HAL_TSC_STATE_READY = 0x01U, HAL_TSC_STATE_BUSY = 0x02U, HAL_TSC_STATE_ERROR = 0x03U } |
TSC state structure definition. More... | |
enum | TSC_GroupStatusTypeDef { TSC_GROUP_ONGOING = 0x00U, TSC_GROUP_COMPLETED = 0x01U } |
TSC group status structure definition. More... | |
enum | TSC_GroupIndexTypeDef { TSC_GROUP1_IDX = 0x00U, TSC_GROUP2_IDX, TSC_GROUP3_IDX, TSC_GROUP4_IDX, TSC_GROUP5_IDX, TSC_GROUP6_IDX, TSC_GROUP7_IDX, TSC_GROUP8_IDX, TSC_NB_OF_GROUPS } |
TSC Group Index Structure definition. More... | |
enum | HAL_TSC_CallbackIDTypeDef { HAL_TSC_CONV_COMPLETE_CB_ID = 0x00U, HAL_TSC_ERROR_CB_ID = 0x01U, HAL_TSC_MSPINIT_CB_ID = 0x02U, HAL_TSC_MSPDEINIT_CB_ID = 0x03U } |
HAL TSC Callback ID enumeration definition. More... | |
Functions | |
HAL_StatusTypeDef | HAL_TSC_Init (TSC_HandleTypeDef *htsc) |
Initialize the TSC peripheral according to the specified parameters in the TSC_InitTypeDef structure and initialize the associated handle. | |
HAL_StatusTypeDef | HAL_TSC_DeInit (TSC_HandleTypeDef *htsc) |
Deinitialize the TSC peripheral registers to their default reset values. | |
__weak void | HAL_TSC_MspInit (TSC_HandleTypeDef *htsc) |
Initialize the TSC MSP. | |
__weak void | HAL_TSC_MspDeInit (TSC_HandleTypeDef *htsc) |
DeInitialize the TSC MSP. | |
HAL_StatusTypeDef | HAL_TSC_RegisterCallback (TSC_HandleTypeDef *htsc, HAL_TSC_CallbackIDTypeDef CallbackID, pTSC_CallbackTypeDef pCallback) |
Register a User TSC Callback To be used instead of the weak predefined callback. | |
HAL_StatusTypeDef | HAL_TSC_UnRegisterCallback (TSC_HandleTypeDef *htsc, HAL_TSC_CallbackIDTypeDef CallbackID) |
Unregister an TSC Callback TSC callback is redirected to the weak predefined callback. | |
HAL_StatusTypeDef | HAL_TSC_Start (TSC_HandleTypeDef *htsc) |
Start the acquisition. | |
HAL_StatusTypeDef | HAL_TSC_Start_IT (TSC_HandleTypeDef *htsc) |
Start the acquisition in interrupt mode. | |
HAL_StatusTypeDef | HAL_TSC_Stop (TSC_HandleTypeDef *htsc) |
Stop the acquisition previously launched in polling mode. | |
HAL_StatusTypeDef | HAL_TSC_Stop_IT (TSC_HandleTypeDef *htsc) |
Stop the acquisition previously launched in interrupt mode. | |
HAL_StatusTypeDef | HAL_TSC_PollForAcquisition (TSC_HandleTypeDef *htsc) |
Start acquisition and wait until completion. | |
TSC_GroupStatusTypeDef | HAL_TSC_GroupGetStatus (TSC_HandleTypeDef *htsc, uint32_t gx_index) |
Get the acquisition status for a group. | |
uint32_t | HAL_TSC_GroupGetValue (TSC_HandleTypeDef *htsc, uint32_t gx_index) |
Get the acquisition measure for a group. | |
HAL_StatusTypeDef | HAL_TSC_IOConfig (TSC_HandleTypeDef *htsc, TSC_IOConfigTypeDef *config) |
Configure TSC IOs. | |
HAL_StatusTypeDef | HAL_TSC_IODischarge (TSC_HandleTypeDef *htsc, uint32_t choice) |
Discharge TSC IOs. | |
HAL_TSC_StateTypeDef | HAL_TSC_GetState (TSC_HandleTypeDef *htsc) |
Return the TSC handle state. | |
void | HAL_TSC_IRQHandler (TSC_HandleTypeDef *htsc) |
Handle TSC interrupt request. | |
__weak void | HAL_TSC_ConvCpltCallback (TSC_HandleTypeDef *htsc) |
Acquisition completed callback in non-blocking mode. | |
__weak void | HAL_TSC_ErrorCallback (TSC_HandleTypeDef *htsc) |
Error callback in non-blocking mode. |
Header file of TSC HAL module.
Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. 3. Neither the name of STMicroelectronics nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Definition in file stm32l4xx_hal_tsc.h.