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STM32L486xx HAL User Manual
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Defines | |
| #define | TSC_CTPH_1CYCLE 0x00000000U |
| #define | TSC_CTPH_2CYCLES TSC_CR_CTPH_0 |
| #define | TSC_CTPH_3CYCLES TSC_CR_CTPH_1 |
| #define | TSC_CTPH_4CYCLES (TSC_CR_CTPH_1 | TSC_CR_CTPH_0) |
| #define | TSC_CTPH_5CYCLES TSC_CR_CTPH_2 |
| #define | TSC_CTPH_6CYCLES (TSC_CR_CTPH_2 | TSC_CR_CTPH_0) |
| #define | TSC_CTPH_7CYCLES (TSC_CR_CTPH_2 | TSC_CR_CTPH_1) |
| #define | TSC_CTPH_8CYCLES (TSC_CR_CTPH_2 | TSC_CR_CTPH_1 | TSC_CR_CTPH_0) |
| #define | TSC_CTPH_9CYCLES TSC_CR_CTPH_3 |
| #define | TSC_CTPH_10CYCLES (TSC_CR_CTPH_3 | TSC_CR_CTPH_0) |
| #define | TSC_CTPH_11CYCLES (TSC_CR_CTPH_3 | TSC_CR_CTPH_1) |
| #define | TSC_CTPH_12CYCLES (TSC_CR_CTPH_3 | TSC_CR_CTPH_1 | TSC_CR_CTPH_0) |
| #define | TSC_CTPH_13CYCLES (TSC_CR_CTPH_3 | TSC_CR_CTPH_2) |
| #define | TSC_CTPH_14CYCLES (TSC_CR_CTPH_3 | TSC_CR_CTPH_2 | TSC_CR_CTPH_0) |
| #define | TSC_CTPH_15CYCLES (TSC_CR_CTPH_3 | TSC_CR_CTPH_2 | TSC_CR_CTPH_1) |
| #define | TSC_CTPH_16CYCLES (TSC_CR_CTPH_3 | TSC_CR_CTPH_2 | TSC_CR_CTPH_1 | TSC_CR_CTPH_0) |
| #define TSC_CTPH_10CYCLES (TSC_CR_CTPH_3 | TSC_CR_CTPH_0) |
Charge transfer pulse high during 10 cycles (PGCLK)
Definition at line 221 of file stm32l4xx_hal_tsc.h.
| #define TSC_CTPH_11CYCLES (TSC_CR_CTPH_3 | TSC_CR_CTPH_1) |
Charge transfer pulse high during 11 cycles (PGCLK)
Definition at line 222 of file stm32l4xx_hal_tsc.h.
| #define TSC_CTPH_12CYCLES (TSC_CR_CTPH_3 | TSC_CR_CTPH_1 | TSC_CR_CTPH_0) |
Charge transfer pulse high during 12 cycles (PGCLK)
Definition at line 223 of file stm32l4xx_hal_tsc.h.
| #define TSC_CTPH_13CYCLES (TSC_CR_CTPH_3 | TSC_CR_CTPH_2) |
Charge transfer pulse high during 13 cycles (PGCLK)
Definition at line 224 of file stm32l4xx_hal_tsc.h.
| #define TSC_CTPH_14CYCLES (TSC_CR_CTPH_3 | TSC_CR_CTPH_2 | TSC_CR_CTPH_0) |
Charge transfer pulse high during 14 cycles (PGCLK)
Definition at line 225 of file stm32l4xx_hal_tsc.h.
| #define TSC_CTPH_15CYCLES (TSC_CR_CTPH_3 | TSC_CR_CTPH_2 | TSC_CR_CTPH_1) |
Charge transfer pulse high during 15 cycles (PGCLK)
Definition at line 226 of file stm32l4xx_hal_tsc.h.
| #define TSC_CTPH_16CYCLES (TSC_CR_CTPH_3 | TSC_CR_CTPH_2 | TSC_CR_CTPH_1 | TSC_CR_CTPH_0) |
Charge transfer pulse high during 16 cycles (PGCLK)
Definition at line 227 of file stm32l4xx_hal_tsc.h.
| #define TSC_CTPH_1CYCLE 0x00000000U |
Charge transfer pulse high during 1 cycle (PGCLK)
Definition at line 212 of file stm32l4xx_hal_tsc.h.
| #define TSC_CTPH_2CYCLES TSC_CR_CTPH_0 |
Charge transfer pulse high during 2 cycles (PGCLK)
Definition at line 213 of file stm32l4xx_hal_tsc.h.
| #define TSC_CTPH_3CYCLES TSC_CR_CTPH_1 |
Charge transfer pulse high during 3 cycles (PGCLK)
Definition at line 214 of file stm32l4xx_hal_tsc.h.
| #define TSC_CTPH_4CYCLES (TSC_CR_CTPH_1 | TSC_CR_CTPH_0) |
Charge transfer pulse high during 4 cycles (PGCLK)
Definition at line 215 of file stm32l4xx_hal_tsc.h.
| #define TSC_CTPH_5CYCLES TSC_CR_CTPH_2 |
Charge transfer pulse high during 5 cycles (PGCLK)
Definition at line 216 of file stm32l4xx_hal_tsc.h.
| #define TSC_CTPH_6CYCLES (TSC_CR_CTPH_2 | TSC_CR_CTPH_0) |
Charge transfer pulse high during 6 cycles (PGCLK)
Definition at line 217 of file stm32l4xx_hal_tsc.h.
| #define TSC_CTPH_7CYCLES (TSC_CR_CTPH_2 | TSC_CR_CTPH_1) |
Charge transfer pulse high during 7 cycles (PGCLK)
Definition at line 218 of file stm32l4xx_hal_tsc.h.
| #define TSC_CTPH_8CYCLES (TSC_CR_CTPH_2 | TSC_CR_CTPH_1 | TSC_CR_CTPH_0) |
Charge transfer pulse high during 8 cycles (PGCLK)
Definition at line 219 of file stm32l4xx_hal_tsc.h.
| #define TSC_CTPH_9CYCLES TSC_CR_CTPH_3 |
Charge transfer pulse high during 9 cycles (PGCLK)
Definition at line 220 of file stm32l4xx_hal_tsc.h.
1.7.6.1