STM32L486xx HAL User Manual
Defines
APB1 Peripheral Clock Enabled or Disabled Status
RCC Exported Macros

Check whether the APB1 peripheral clock is enabled or not. More...

Defines

#define __HAL_RCC_TIM2_IS_CLK_ENABLED()   (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM2EN) != RESET)
#define __HAL_RCC_TIM3_IS_CLK_ENABLED()   (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM3EN) != RESET)
#define __HAL_RCC_TIM4_IS_CLK_ENABLED()   (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM4EN) != RESET)
#define __HAL_RCC_TIM5_IS_CLK_ENABLED()   (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM5EN) != RESET)
#define __HAL_RCC_TIM6_IS_CLK_ENABLED()   (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM6EN) != RESET)
#define __HAL_RCC_TIM7_IS_CLK_ENABLED()   (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM7EN) != RESET)
#define __HAL_RCC_LCD_IS_CLK_ENABLED()   (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_LCDEN) != RESET)
#define __HAL_RCC_WWDG_IS_CLK_ENABLED()   (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_WWDGEN) != RESET)
#define __HAL_RCC_SPI2_IS_CLK_ENABLED()   (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_SPI2EN) != RESET)
#define __HAL_RCC_SPI3_IS_CLK_ENABLED()   (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_SPI3EN) != RESET)
#define __HAL_RCC_USART2_IS_CLK_ENABLED()   (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_USART2EN) != RESET)
#define __HAL_RCC_USART3_IS_CLK_ENABLED()   (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_USART3EN) != RESET)
#define __HAL_RCC_UART4_IS_CLK_ENABLED()   (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_UART4EN) != RESET)
#define __HAL_RCC_UART5_IS_CLK_ENABLED()   (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_UART5EN) != RESET)
#define __HAL_RCC_I2C1_IS_CLK_ENABLED()   (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_I2C1EN) != RESET)
#define __HAL_RCC_I2C2_IS_CLK_ENABLED()   (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_I2C2EN) != RESET)
#define __HAL_RCC_I2C3_IS_CLK_ENABLED()   (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_I2C3EN) != RESET)
#define __HAL_RCC_CAN1_IS_CLK_ENABLED()   (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CAN1EN) != RESET)
#define __HAL_RCC_PWR_IS_CLK_ENABLED()   (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_PWREN) != RESET)
#define __HAL_RCC_DAC1_IS_CLK_ENABLED()   (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_DAC1EN) != RESET)
#define __HAL_RCC_OPAMP_IS_CLK_ENABLED()   (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_OPAMPEN) != RESET)
#define __HAL_RCC_LPTIM1_IS_CLK_ENABLED()   (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_LPTIM1EN) != RESET)
#define __HAL_RCC_LPUART1_IS_CLK_ENABLED()   (READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPUART1EN) != RESET)
#define __HAL_RCC_SWPMI1_IS_CLK_ENABLED()   (READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_SWPMI1EN) != RESET)
#define __HAL_RCC_LPTIM2_IS_CLK_ENABLED()   (READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPTIM2EN) != RESET)
#define __HAL_RCC_TIM2_IS_CLK_DISABLED()   (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM2EN) == RESET)
#define __HAL_RCC_TIM3_IS_CLK_DISABLED()   (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM3EN) == RESET)
#define __HAL_RCC_TIM4_IS_CLK_DISABLED()   (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM4EN) == RESET)
#define __HAL_RCC_TIM5_IS_CLK_DISABLED()   (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM5EN) == RESET)
#define __HAL_RCC_TIM6_IS_CLK_DISABLED()   (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM6EN) == RESET)
#define __HAL_RCC_TIM7_IS_CLK_DISABLED()   (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM7EN) == RESET)
#define __HAL_RCC_LCD_IS_CLK_DISABLED()   (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_LCDEN) == RESET)
#define __HAL_RCC_WWDG_IS_CLK_DISABLED()   (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_WWDGEN) == RESET)
#define __HAL_RCC_SPI2_IS_CLK_DISABLED()   (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_SPI2EN) == RESET)
#define __HAL_RCC_SPI3_IS_CLK_DISABLED()   (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_SPI3EN) == RESET)
#define __HAL_RCC_USART2_IS_CLK_DISABLED()   (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_USART2EN) == RESET)
#define __HAL_RCC_USART3_IS_CLK_DISABLED()   (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_USART3EN) == RESET)
#define __HAL_RCC_UART4_IS_CLK_DISABLED()   (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_UART4EN) == RESET)
#define __HAL_RCC_UART5_IS_CLK_DISABLED()   (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_UART5EN) == RESET)
#define __HAL_RCC_I2C1_IS_CLK_DISABLED()   (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_I2C1EN) == RESET)
#define __HAL_RCC_I2C2_IS_CLK_DISABLED()   (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_I2C2EN) == RESET)
#define __HAL_RCC_I2C3_IS_CLK_DISABLED()   (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_I2C3EN) == RESET)
#define __HAL_RCC_CAN1_IS_CLK_DISABLED()   (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CAN1EN) == RESET)
#define __HAL_RCC_PWR_IS_CLK_DISABLED()   (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_PWREN) == RESET)
#define __HAL_RCC_DAC1_IS_CLK_DISABLED()   (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_DAC1EN) == RESET)
#define __HAL_RCC_OPAMP_IS_CLK_DISABLED()   (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_OPAMPEN) == RESET)
#define __HAL_RCC_LPTIM1_IS_CLK_DISABLED()   (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_LPTIM1EN) == RESET)
#define __HAL_RCC_LPUART1_IS_CLK_DISABLED()   (READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPUART1EN) == RESET)
#define __HAL_RCC_SWPMI1_IS_CLK_DISABLED()   (READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_SWPMI1EN) == RESET)
#define __HAL_RCC_LPTIM2_IS_CLK_DISABLED()   (READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPTIM2EN) == RESET)

Detailed Description

Check whether the APB1 peripheral clock is enabled or not.

Note:
After reset, the peripheral clock (used for registers read/write access) is disabled and the application software has to enable this clock before using it.

Define Documentation

#define __HAL_RCC_CAN1_IS_CLK_DISABLED ( )    (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CAN1EN) == RESET)

Definition at line 1935 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_CAN1_IS_CLK_ENABLED ( )    (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CAN1EN) != RESET)

Definition at line 1844 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_DAC1_IS_CLK_DISABLED ( )    (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_DAC1EN) == RESET)

Definition at line 1947 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_DAC1_IS_CLK_ENABLED ( )    (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_DAC1EN) != RESET)

Definition at line 1856 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_I2C1_IS_CLK_DISABLED ( )    (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_I2C1EN) == RESET)

Definition at line 1919 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_I2C1_IS_CLK_ENABLED ( )    (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_I2C1EN) != RESET)

Definition at line 1828 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_I2C2_IS_CLK_DISABLED ( )    (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_I2C2EN) == RESET)

Definition at line 1922 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_I2C2_IS_CLK_ENABLED ( )    (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_I2C2EN) != RESET)

Definition at line 1831 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_I2C3_IS_CLK_DISABLED ( )    (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_I2C3EN) == RESET)

Definition at line 1925 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_I2C3_IS_CLK_ENABLED ( )    (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_I2C3EN) != RESET)

Definition at line 1834 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_LCD_IS_CLK_DISABLED ( )    (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_LCDEN) == RESET)

Definition at line 1890 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_LCD_IS_CLK_ENABLED ( )    (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_LCDEN) != RESET)

Definition at line 1799 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_LPTIM1_IS_CLK_DISABLED ( )    (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_LPTIM1EN) == RESET)

Definition at line 1951 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_LPTIM1_IS_CLK_ENABLED ( )    (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_LPTIM1EN) != RESET)

Definition at line 1860 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_LPTIM2_IS_CLK_DISABLED ( )    (READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPTIM2EN) == RESET)

Definition at line 1959 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_LPTIM2_IS_CLK_ENABLED ( )    (READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPTIM2EN) != RESET)

Definition at line 1868 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_LPUART1_IS_CLK_DISABLED ( )    (READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPUART1EN) == RESET)

Definition at line 1953 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_LPUART1_IS_CLK_ENABLED ( )    (READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPUART1EN) != RESET)

Definition at line 1862 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_OPAMP_IS_CLK_DISABLED ( )    (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_OPAMPEN) == RESET)

Definition at line 1949 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_OPAMP_IS_CLK_ENABLED ( )    (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_OPAMPEN) != RESET)

Definition at line 1858 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_PWR_IS_CLK_DISABLED ( )    (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_PWREN) == RESET)
#define __HAL_RCC_PWR_IS_CLK_ENABLED ( )    (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_PWREN) != RESET)

Definition at line 1854 of file stm32l4xx_hal_rcc.h.

Referenced by RCC_SetFlashLatencyFromMSIRange().

#define __HAL_RCC_SPI2_IS_CLK_DISABLED ( )    (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_SPI2EN) == RESET)

Definition at line 1900 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_SPI2_IS_CLK_ENABLED ( )    (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_SPI2EN) != RESET)

Definition at line 1809 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_SPI3_IS_CLK_DISABLED ( )    (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_SPI3EN) == RESET)

Definition at line 1903 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_SPI3_IS_CLK_ENABLED ( )    (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_SPI3EN) != RESET)

Definition at line 1812 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_SWPMI1_IS_CLK_DISABLED ( )    (READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_SWPMI1EN) == RESET)

Definition at line 1956 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_SWPMI1_IS_CLK_ENABLED ( )    (READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_SWPMI1EN) != RESET)

Definition at line 1865 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_TIM2_IS_CLK_DISABLED ( )    (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM2EN) == RESET)

Definition at line 1871 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_TIM2_IS_CLK_ENABLED ( )    (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM2EN) != RESET)

Definition at line 1780 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_TIM3_IS_CLK_DISABLED ( )    (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM3EN) == RESET)

Definition at line 1874 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_TIM3_IS_CLK_ENABLED ( )    (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM3EN) != RESET)

Definition at line 1783 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_TIM4_IS_CLK_DISABLED ( )    (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM4EN) == RESET)

Definition at line 1878 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_TIM4_IS_CLK_ENABLED ( )    (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM4EN) != RESET)

Definition at line 1787 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_TIM5_IS_CLK_DISABLED ( )    (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM5EN) == RESET)

Definition at line 1882 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_TIM5_IS_CLK_ENABLED ( )    (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM5EN) != RESET)

Definition at line 1791 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_TIM6_IS_CLK_DISABLED ( )    (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM6EN) == RESET)

Definition at line 1885 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_TIM6_IS_CLK_ENABLED ( )    (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM6EN) != RESET)

Definition at line 1794 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_TIM7_IS_CLK_DISABLED ( )    (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM7EN) == RESET)

Definition at line 1887 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_TIM7_IS_CLK_ENABLED ( )    (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM7EN) != RESET)

Definition at line 1796 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_UART4_IS_CLK_DISABLED ( )    (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_UART4EN) == RESET)

Definition at line 1912 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_UART4_IS_CLK_ENABLED ( )    (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_UART4EN) != RESET)

Definition at line 1821 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_UART5_IS_CLK_DISABLED ( )    (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_UART5EN) == RESET)

Definition at line 1916 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_UART5_IS_CLK_ENABLED ( )    (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_UART5EN) != RESET)

Definition at line 1825 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_USART2_IS_CLK_DISABLED ( )    (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_USART2EN) == RESET)

Definition at line 1905 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_USART2_IS_CLK_ENABLED ( )    (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_USART2EN) != RESET)

Definition at line 1814 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_USART3_IS_CLK_DISABLED ( )    (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_USART3EN) == RESET)

Definition at line 1908 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_USART3_IS_CLK_ENABLED ( )    (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_USART3EN) != RESET)

Definition at line 1817 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_WWDG_IS_CLK_DISABLED ( )    (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_WWDGEN) == RESET)

Definition at line 1897 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_WWDG_IS_CLK_ENABLED ( )    (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_WWDGEN) != RESET)

Definition at line 1806 of file stm32l4xx_hal_rcc.h.