STM32L486xx HAL User Manual
Defines
ADC group injected - Trigger source
ADC Exported Constants

Defines

#define LL_ADC_INJ_TRIG_SOFTWARE   (0x00000000U)
#define LL_ADC_INJ_TRIG_EXT_TIM1_TRGO   (ADC_INJ_TRIG_EXT_EDGE_DEFAULT)
#define LL_ADC_INJ_TRIG_EXT_TIM1_TRGO2   (ADC_JSQR_JEXTSEL_3 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT)
#define LL_ADC_INJ_TRIG_EXT_TIM1_CH4   (ADC_JSQR_JEXTSEL_0 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT)
#define LL_ADC_INJ_TRIG_EXT_TIM2_TRGO   (ADC_JSQR_JEXTSEL_1 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT)
#define LL_ADC_INJ_TRIG_EXT_TIM2_CH1   (ADC_JSQR_JEXTSEL_1 | ADC_JSQR_JEXTSEL_0 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT)
#define LL_ADC_INJ_TRIG_EXT_TIM3_TRGO   (ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_2 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT)
#define LL_ADC_INJ_TRIG_EXT_TIM3_CH1   (ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXTSEL_0 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT)
#define LL_ADC_INJ_TRIG_EXT_TIM3_CH3   (ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_1 | ADC_JSQR_JEXTSEL_0 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT)
#define LL_ADC_INJ_TRIG_EXT_TIM3_CH4   (ADC_JSQR_JEXTSEL_2 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT)
#define LL_ADC_INJ_TRIG_EXT_TIM4_TRGO   (ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXTSEL_0 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT)
#define LL_ADC_INJ_TRIG_EXT_TIM6_TRGO   (ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXTSEL_1 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT)
#define LL_ADC_INJ_TRIG_EXT_TIM8_CH4   (ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXTSEL_1 | ADC_JSQR_JEXTSEL_0 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT)
#define LL_ADC_INJ_TRIG_EXT_TIM8_TRGO   (ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_0 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT)
#define LL_ADC_INJ_TRIG_EXT_TIM8_TRGO2   (ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_1 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT)
#define LL_ADC_INJ_TRIG_EXT_TIM15_TRGO   (ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXTSEL_1 | ADC_JSQR_JEXTSEL_0 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT)
#define LL_ADC_INJ_TRIG_EXT_EXTI_LINE15   (ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXTSEL_1 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT)

Define Documentation

#define LL_ADC_INJ_TRIG_EXT_EXTI_LINE15   (ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXTSEL_1 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT)

ADC group injected conversion trigger from external IP: external interrupt line 15. Trigger edge set to rising edge (default setting).

Definition at line 999 of file stm32l4xx_ll_adc.h.

#define LL_ADC_INJ_TRIG_EXT_TIM15_TRGO   (ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXTSEL_1 | ADC_JSQR_JEXTSEL_0 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT)

ADC group injected conversion trigger from external IP: TIM15 TRGO. Trigger edge set to rising edge (default setting).

Definition at line 998 of file stm32l4xx_ll_adc.h.

#define LL_ADC_INJ_TRIG_EXT_TIM1_CH4   (ADC_JSQR_JEXTSEL_0 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT)

ADC group injected conversion trigger from external IP: TIM1 channel 4 event (capture compare: input capture or output capture). Trigger edge set to rising edge (default setting).

Definition at line 986 of file stm32l4xx_ll_adc.h.

ADC group injected conversion trigger from external IP: TIM1 TRGO. Trigger edge set to rising edge (default setting).

Definition at line 984 of file stm32l4xx_ll_adc.h.

ADC group injected conversion trigger from external IP: TIM1 TRGO2. Trigger edge set to rising edge (default setting).

Definition at line 985 of file stm32l4xx_ll_adc.h.

#define LL_ADC_INJ_TRIG_EXT_TIM2_CH1   (ADC_JSQR_JEXTSEL_1 | ADC_JSQR_JEXTSEL_0 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT)

ADC group injected conversion trigger from external IP: TIM2 channel 1 event (capture compare: input capture or output capture). Trigger edge set to rising edge (default setting).

Definition at line 988 of file stm32l4xx_ll_adc.h.

#define LL_ADC_INJ_TRIG_EXT_TIM2_TRGO   (ADC_JSQR_JEXTSEL_1 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT)

ADC group injected conversion trigger from external IP: TIM2 TRGO. Trigger edge set to rising edge (default setting).

Definition at line 987 of file stm32l4xx_ll_adc.h.

#define LL_ADC_INJ_TRIG_EXT_TIM3_CH1   (ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXTSEL_0 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT)

ADC group injected conversion trigger from external IP: TIM3 channel 1 event (capture compare: input capture or output capture). Trigger edge set to rising edge (default setting).

Definition at line 990 of file stm32l4xx_ll_adc.h.

#define LL_ADC_INJ_TRIG_EXT_TIM3_CH3   (ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_1 | ADC_JSQR_JEXTSEL_0 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT)

ADC group injected conversion trigger from external IP: TIM3 channel 3 event (capture compare: input capture or output capture). Trigger edge set to rising edge (default setting).

Definition at line 991 of file stm32l4xx_ll_adc.h.

#define LL_ADC_INJ_TRIG_EXT_TIM3_CH4   (ADC_JSQR_JEXTSEL_2 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT)

ADC group injected conversion trigger from external IP: TIM3 channel 4 event (capture compare: input capture or output capture). Trigger edge set to rising edge (default setting).

Definition at line 992 of file stm32l4xx_ll_adc.h.

#define LL_ADC_INJ_TRIG_EXT_TIM3_TRGO   (ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_2 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT)

ADC group injected conversion trigger from external IP: TIM3 TRGO. Trigger edge set to rising edge (default setting).

Definition at line 989 of file stm32l4xx_ll_adc.h.

#define LL_ADC_INJ_TRIG_EXT_TIM4_TRGO   (ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXTSEL_0 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT)

ADC group injected conversion trigger from external IP: TIM4 TRGO. Trigger edge set to rising edge (default setting).

Definition at line 993 of file stm32l4xx_ll_adc.h.

#define LL_ADC_INJ_TRIG_EXT_TIM6_TRGO   (ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXTSEL_1 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT)

ADC group injected conversion trigger from external IP: TIM6 TRGO. Trigger edge set to rising edge (default setting).

Definition at line 994 of file stm32l4xx_ll_adc.h.

#define LL_ADC_INJ_TRIG_EXT_TIM8_CH4   (ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXTSEL_1 | ADC_JSQR_JEXTSEL_0 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT)

ADC group injected conversion trigger from external IP: TIM8 channel 4 event (capture compare: input capture or output capture). Trigger edge set to rising edge (default setting).

Definition at line 995 of file stm32l4xx_ll_adc.h.

#define LL_ADC_INJ_TRIG_EXT_TIM8_TRGO   (ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_0 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT)

ADC group injected conversion trigger from external IP: TIM8 TRGO. Trigger edge set to rising edge (default setting).

Definition at line 996 of file stm32l4xx_ll_adc.h.

#define LL_ADC_INJ_TRIG_EXT_TIM8_TRGO2   (ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_1 | ADC_INJ_TRIG_EXT_EDGE_DEFAULT)

ADC group injected conversion trigger from external IP: TIM8 TRGO2. Trigger edge set to rising edge (default setting).

Definition at line 997 of file stm32l4xx_ll_adc.h.

#define LL_ADC_INJ_TRIG_SOFTWARE   (0x00000000U)

ADC group injected conversion trigger internal: SW start.. Trigger edge set to rising edge (default setting).

Definition at line 983 of file stm32l4xx_ll_adc.h.

Referenced by LL_ADC_DeInit(), LL_ADC_INJ_ConfigQueueContext(), LL_ADC_INJ_IsTriggerSourceSWStart(), and LL_ADC_INJ_StructInit().