AHB2 Peripheral Clock Enable Disable

Enable or disable the AHB2 peripheral clock. More...

Defines
#define	__HAL_RCC_DCMI_CLK_ENABLE()
#define	__HAL_RCC_DCMI_CLK_DISABLE()   (RCC->AHB2ENR &= ~(RCC_AHB2ENR_DCMIEN))
#define	__HAL_RCC_CRYP_CLK_ENABLE()
#define	__HAL_RCC_HASH_CLK_ENABLE()
#define	__HAL_RCC_CRYP_CLK_DISABLE()   (RCC->AHB2ENR &= ~(RCC_AHB2ENR_CRYPEN))
#define	__HAL_RCC_HASH_CLK_DISABLE()   (RCC->AHB2ENR &= ~(RCC_AHB2ENR_HASHEN))
#define	__HAL_RCC_USB_OTG_FS_CLK_ENABLE()
#define	__HAL_RCC_USB_OTG_FS_CLK_DISABLE()   (RCC->AHB2ENR &= ~(RCC_AHB2ENR_OTGFSEN))
#define	__HAL_RCC_RNG_CLK_ENABLE()
#define	__HAL_RCC_RNG_CLK_DISABLE()   (RCC->AHB2ENR &= ~(RCC_AHB2ENR_RNGEN))

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Detailed Description

Enable or disable the AHB2 peripheral clock.

Note:

After reset, the peripheral clock (used for registers read/write access) is disabled and the application software has to enable this clock before using it.

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Define Documentation

#define __HAL_RCC_CRYP_CLK_DISABLE

(

)

(RCC->AHB2ENR &= ~(RCC_AHB2ENR_CRYPEN))

Definition at line 1229 of file stm32f4xx_hal_rcc_ex.h.

#define __HAL_RCC_CRYP_CLK_ENABLE

(

)

Value:

do { \
                                      __IO uint32_t tmpreg = 0x00U; \
                                      SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_CRYPEN);\
                                      /* Delay after an RCC peripheral clock enabling */ \
                                      tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_CRYPEN);\
                                      UNUSED(tmpreg); \
                                      } while(0U)

Definition at line 1214 of file stm32f4xx_hal_rcc_ex.h.

#define __HAL_RCC_DCMI_CLK_DISABLE

(

)

(RCC->AHB2ENR &= ~(RCC_AHB2ENR_DCMIEN))

Definition at line 1211 of file stm32f4xx_hal_rcc_ex.h.

#define __HAL_RCC_DCMI_CLK_ENABLE

(

)

Value:

do { \
                                      __IO uint32_t tmpreg = 0x00U; \
                                      SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_DCMIEN);\
                                      /* Delay after an RCC peripheral clock enabling */ \
                                      tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_DCMIEN);\
                                      UNUSED(tmpreg); \
                                      } while(0U)

Definition at line 1204 of file stm32f4xx_hal_rcc_ex.h.

#define __HAL_RCC_HASH_CLK_DISABLE

(

)

(RCC->AHB2ENR &= ~(RCC_AHB2ENR_HASHEN))

Definition at line 1230 of file stm32f4xx_hal_rcc_ex.h.

#define __HAL_RCC_HASH_CLK_ENABLE

(

)

Value:

do { \
                                      __IO uint32_t tmpreg = 0x00U; \
                                      SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_HASHEN);\
                                      /* Delay after an RCC peripheral clock enabling */ \
                                      tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_HASHEN);\
                                      UNUSED(tmpreg); \
                                      } while(0U)

Definition at line 1221 of file stm32f4xx_hal_rcc_ex.h.

#define __HAL_RCC_RNG_CLK_DISABLE

(

)

(RCC->AHB2ENR &= ~(RCC_AHB2ENR_RNGEN))

Definition at line 1246 of file stm32f4xx_hal_rcc_ex.h.

#define __HAL_RCC_RNG_CLK_ENABLE

(

)

Value:

do { \
                                        __IO uint32_t tmpreg = 0x00U; \
                                        SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_RNGEN);\
                                        /* Delay after an RCC peripheral clock enabling */ \
                                        tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_RNGEN);\
                                        UNUSED(tmpreg); \
                                      } while(0U)

Definition at line 1239 of file stm32f4xx_hal_rcc_ex.h.

#define __HAL_RCC_USB_OTG_FS_CLK_DISABLE

(

)

(RCC->AHB2ENR &= ~(RCC_AHB2ENR_OTGFSEN))

Definition at line 1237 of file stm32f4xx_hal_rcc_ex.h.

#define __HAL_RCC_USB_OTG_FS_CLK_ENABLE

(

)

Value:

do {(RCC->AHB2ENR |= (RCC_AHB2ENR_OTGFSEN));\
                                               __HAL_RCC_SYSCFG_CLK_ENABLE();\
                                              }while(0U)

Definition at line 1233 of file stm32f4xx_hal_rcc_ex.h.