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STM32L486xx HAL User Manual
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32l4xx_ll_exti.h 00004 * @author MCD Application Team 00005 * @brief Header file of EXTI LL module. 00006 ****************************************************************************** 00007 * @attention 00008 * 00009 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> 00010 * 00011 * Redistribution and use in source and binary forms, with or without modification, 00012 * are permitted provided that the following conditions are met: 00013 * 1. Redistributions of source code must retain the above copyright notice, 00014 * this list of conditions and the following disclaimer. 00015 * 2. Redistributions in binary form must reproduce the above copyright notice, 00016 * this list of conditions and the following disclaimer in the documentation 00017 * and/or other materials provided with the distribution. 00018 * 3. Neither the name of STMicroelectronics nor the names of its contributors 00019 * may be used to endorse or promote products derived from this software 00020 * without specific prior written permission. 00021 * 00022 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 00023 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 00024 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 00025 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 00026 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 00027 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 00028 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00029 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 00030 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 00031 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00032 * 00033 ****************************************************************************** 00034 */ 00035 00036 /* Define to prevent recursive inclusion -------------------------------------*/ 00037 #ifndef __STM32L4xx_LL_EXTI_H 00038 #define __STM32L4xx_LL_EXTI_H 00039 00040 #ifdef __cplusplus 00041 extern "C" { 00042 #endif 00043 00044 /* Includes ------------------------------------------------------------------*/ 00045 #include "stm32l4xx.h" 00046 00047 /** @addtogroup STM32L4xx_LL_Driver 00048 * @{ 00049 */ 00050 00051 #if defined (EXTI) 00052 00053 /** @defgroup EXTI_LL EXTI 00054 * @{ 00055 */ 00056 00057 /* Private types -------------------------------------------------------------*/ 00058 /* Private variables ---------------------------------------------------------*/ 00059 /* Private constants ---------------------------------------------------------*/ 00060 /* Private Macros ------------------------------------------------------------*/ 00061 #if defined(USE_FULL_LL_DRIVER) 00062 /** @defgroup EXTI_LL_Private_Macros EXTI Private Macros 00063 * @{ 00064 */ 00065 /** 00066 * @} 00067 */ 00068 #endif /*USE_FULL_LL_DRIVER*/ 00069 /* Exported types ------------------------------------------------------------*/ 00070 #if defined(USE_FULL_LL_DRIVER) 00071 /** @defgroup EXTI_LL_ES_INIT EXTI Exported Init structure 00072 * @{ 00073 */ 00074 typedef struct 00075 { 00076 00077 uint32_t Line_0_31; /*!< Specifies the EXTI lines to be enabled or disabled for Lines in range 0 to 31 00078 This parameter can be any combination of @ref EXTI_LL_EC_LINE */ 00079 00080 uint32_t Line_32_63; /*!< Specifies the EXTI lines to be enabled or disabled for Lines in range 32 to 63 00081 This parameter can be any combination of @ref EXTI_LL_EC_LINE */ 00082 00083 FunctionalState LineCommand; /*!< Specifies the new state of the selected EXTI lines. 00084 This parameter can be set either to ENABLE or DISABLE */ 00085 00086 uint8_t Mode; /*!< Specifies the mode for the EXTI lines. 00087 This parameter can be a value of @ref EXTI_LL_EC_MODE. */ 00088 00089 uint8_t Trigger; /*!< Specifies the trigger signal active edge for the EXTI lines. 00090 This parameter can be a value of @ref EXTI_LL_EC_TRIGGER. */ 00091 } LL_EXTI_InitTypeDef; 00092 00093 /** 00094 * @} 00095 */ 00096 #endif /*USE_FULL_LL_DRIVER*/ 00097 00098 /* Exported constants --------------------------------------------------------*/ 00099 /** @defgroup EXTI_LL_Exported_Constants EXTI Exported Constants 00100 * @{ 00101 */ 00102 00103 /** @defgroup EXTI_LL_EC_LINE LINE 00104 * @{ 00105 */ 00106 #define LL_EXTI_LINE_0 EXTI_IMR1_IM0 /*!< Extended line 0 */ 00107 #define LL_EXTI_LINE_1 EXTI_IMR1_IM1 /*!< Extended line 1 */ 00108 #define LL_EXTI_LINE_2 EXTI_IMR1_IM2 /*!< Extended line 2 */ 00109 #define LL_EXTI_LINE_3 EXTI_IMR1_IM3 /*!< Extended line 3 */ 00110 #define LL_EXTI_LINE_4 EXTI_IMR1_IM4 /*!< Extended line 4 */ 00111 #define LL_EXTI_LINE_5 EXTI_IMR1_IM5 /*!< Extended line 5 */ 00112 #define LL_EXTI_LINE_6 EXTI_IMR1_IM6 /*!< Extended line 6 */ 00113 #define LL_EXTI_LINE_7 EXTI_IMR1_IM7 /*!< Extended line 7 */ 00114 #define LL_EXTI_LINE_8 EXTI_IMR1_IM8 /*!< Extended line 8 */ 00115 #define LL_EXTI_LINE_9 EXTI_IMR1_IM9 /*!< Extended line 9 */ 00116 #define LL_EXTI_LINE_10 EXTI_IMR1_IM10 /*!< Extended line 10 */ 00117 #define LL_EXTI_LINE_11 EXTI_IMR1_IM11 /*!< Extended line 11 */ 00118 #define LL_EXTI_LINE_12 EXTI_IMR1_IM12 /*!< Extended line 12 */ 00119 #define LL_EXTI_LINE_13 EXTI_IMR1_IM13 /*!< Extended line 13 */ 00120 #define LL_EXTI_LINE_14 EXTI_IMR1_IM14 /*!< Extended line 14 */ 00121 #define LL_EXTI_LINE_15 EXTI_IMR1_IM15 /*!< Extended line 15 */ 00122 #if defined(EXTI_IMR1_IM16) 00123 #define LL_EXTI_LINE_16 EXTI_IMR1_IM16 /*!< Extended line 16 */ 00124 #endif 00125 #define LL_EXTI_LINE_17 EXTI_IMR1_IM17 /*!< Extended line 17 */ 00126 #if defined(EXTI_IMR1_IM18) 00127 #define LL_EXTI_LINE_18 EXTI_IMR1_IM18 /*!< Extended line 18 */ 00128 #endif 00129 #define LL_EXTI_LINE_19 EXTI_IMR1_IM19 /*!< Extended line 19 */ 00130 #if defined(EXTI_IMR1_IM20) 00131 #define LL_EXTI_LINE_20 EXTI_IMR1_IM20 /*!< Extended line 20 */ 00132 #endif 00133 #if defined(EXTI_IMR1_IM21) 00134 #define LL_EXTI_LINE_21 EXTI_IMR1_IM21 /*!< Extended line 21 */ 00135 #endif 00136 #if defined(EXTI_IMR1_IM22) 00137 #define LL_EXTI_LINE_22 EXTI_IMR1_IM22 /*!< Extended line 22 */ 00138 #endif 00139 #define LL_EXTI_LINE_23 EXTI_IMR1_IM23 /*!< Extended line 23 */ 00140 #if defined(EXTI_IMR1_IM24) 00141 #define LL_EXTI_LINE_24 EXTI_IMR1_IM24 /*!< Extended line 24 */ 00142 #endif 00143 #if defined(EXTI_IMR1_IM25) 00144 #define LL_EXTI_LINE_25 EXTI_IMR1_IM25 /*!< Extended line 25 */ 00145 #endif 00146 #if defined(EXTI_IMR1_IM26) 00147 #define LL_EXTI_LINE_26 EXTI_IMR1_IM26 /*!< Extended line 26 */ 00148 #endif 00149 #if defined(EXTI_IMR1_IM27) 00150 #define LL_EXTI_LINE_27 EXTI_IMR1_IM27 /*!< Extended line 27 */ 00151 #endif 00152 #if defined(EXTI_IMR1_IM28) 00153 #define LL_EXTI_LINE_28 EXTI_IMR1_IM28 /*!< Extended line 28 */ 00154 #endif 00155 #if defined(EXTI_IMR1_IM29) 00156 #define LL_EXTI_LINE_29 EXTI_IMR1_IM29 /*!< Extended line 29 */ 00157 #endif 00158 #if defined(EXTI_IMR1_IM30) 00159 #define LL_EXTI_LINE_30 EXTI_IMR1_IM30 /*!< Extended line 30 */ 00160 #endif 00161 #if defined(EXTI_IMR1_IM31) 00162 #define LL_EXTI_LINE_31 EXTI_IMR1_IM31 /*!< Extended line 31 */ 00163 #endif 00164 #define LL_EXTI_LINE_ALL_0_31 EXTI_IMR1_IM /*!< All Extended line not reserved*/ 00165 00166 #define LL_EXTI_LINE_32 EXTI_IMR2_IM32 /*!< Extended line 32 */ 00167 #if defined(EXTI_IMR2_IM33) 00168 #define LL_EXTI_LINE_33 EXTI_IMR2_IM33 /*!< Extended line 33 */ 00169 #endif 00170 #if defined(EXTI_IMR2_IM34) 00171 #define LL_EXTI_LINE_34 EXTI_IMR2_IM34 /*!< Extended line 34 */ 00172 #endif 00173 #if defined(EXTI_IMR2_IM35) 00174 #define LL_EXTI_LINE_35 EXTI_IMR2_IM35 /*!< Extended line 35 */ 00175 #endif 00176 #if defined(EXTI_IMR2_IM36) 00177 #define LL_EXTI_LINE_36 EXTI_IMR2_IM36 /*!< Extended line 36 */ 00178 #endif 00179 #if defined(EXTI_IMR2_IM37) 00180 #define LL_EXTI_LINE_37 EXTI_IMR2_IM37 /*!< Extended line 37 */ 00181 #endif 00182 #if defined(EXTI_IMR2_IM38) 00183 #define LL_EXTI_LINE_38 EXTI_IMR2_IM38 /*!< Extended line 38 */ 00184 #endif 00185 #if defined(EXTI_IMR2_IM39) 00186 #define LL_EXTI_LINE_39 EXTI_IMR2_IM39 /*!< Extended line 39 */ 00187 #endif 00188 #if defined(EXTI_IMR2_IM40) 00189 #define LL_EXTI_LINE_40 EXTI_IMR2_IM40 /*!< Extended line 40 */ 00190 #endif 00191 #define LL_EXTI_LINE_ALL_32_63 EXTI_IMR2_IM /*!< All Extended line not reserved*/ 00192 00193 00194 #define LL_EXTI_LINE_ALL (0xFFFFFFFFU) /*!< All Extended line */ 00195 00196 #if defined(USE_FULL_LL_DRIVER) 00197 #define LL_EXTI_LINE_NONE (0x00000000U) /*!< None Extended line */ 00198 #endif /*USE_FULL_LL_DRIVER*/ 00199 00200 /** 00201 * @} 00202 */ 00203 #if defined(USE_FULL_LL_DRIVER) 00204 00205 /** @defgroup EXTI_LL_EC_MODE Mode 00206 * @{ 00207 */ 00208 #define LL_EXTI_MODE_IT ((uint8_t)0x00U) /*!< Interrupt Mode */ 00209 #define LL_EXTI_MODE_EVENT ((uint8_t)0x01U) /*!< Event Mode */ 00210 #define LL_EXTI_MODE_IT_EVENT ((uint8_t)0x02U) /*!< Interrupt & Event Mode */ 00211 /** 00212 * @} 00213 */ 00214 00215 /** @defgroup EXTI_LL_EC_TRIGGER Edge Trigger 00216 * @{ 00217 */ 00218 #define LL_EXTI_TRIGGER_NONE ((uint8_t)0x00U) /*!< No Trigger Mode */ 00219 #define LL_EXTI_TRIGGER_RISING ((uint8_t)0x01U) /*!< Trigger Rising Mode */ 00220 #define LL_EXTI_TRIGGER_FALLING ((uint8_t)0x02U) /*!< Trigger Falling Mode */ 00221 #define LL_EXTI_TRIGGER_RISING_FALLING ((uint8_t)0x03U) /*!< Trigger Rising & Falling Mode */ 00222 00223 /** 00224 * @} 00225 */ 00226 00227 00228 #endif /*USE_FULL_LL_DRIVER*/ 00229 00230 00231 /** 00232 * @} 00233 */ 00234 00235 /* Exported macro ------------------------------------------------------------*/ 00236 /** @defgroup EXTI_LL_Exported_Macros EXTI Exported Macros 00237 * @{ 00238 */ 00239 00240 /** @defgroup EXTI_LL_EM_WRITE_READ Common Write and read registers Macros 00241 * @{ 00242 */ 00243 00244 /** 00245 * @brief Write a value in EXTI register 00246 * @param __REG__ Register to be written 00247 * @param __VALUE__ Value to be written in the register 00248 * @retval None 00249 */ 00250 #define LL_EXTI_WriteReg(__REG__, __VALUE__) WRITE_REG(EXTI->__REG__, (__VALUE__)) 00251 00252 /** 00253 * @brief Read a value in EXTI register 00254 * @param __REG__ Register to be read 00255 * @retval Register value 00256 */ 00257 #define LL_EXTI_ReadReg(__REG__) READ_REG(EXTI->__REG__) 00258 /** 00259 * @} 00260 */ 00261 00262 00263 /** 00264 * @} 00265 */ 00266 00267 00268 00269 /* Exported functions --------------------------------------------------------*/ 00270 /** @defgroup EXTI_LL_Exported_Functions EXTI Exported Functions 00271 * @{ 00272 */ 00273 /** @defgroup EXTI_LL_EF_IT_Management IT_Management 00274 * @{ 00275 */ 00276 00277 /** 00278 * @brief Enable ExtiLine Interrupt request for Lines in range 0 to 31 00279 * @note The reset value for the direct or internal lines (see RM) 00280 * is set to 1 in order to enable the interrupt by default. 00281 * Bits are set automatically at Power on. 00282 * @rmtoll IMR1 IMx LL_EXTI_EnableIT_0_31 00283 * @param ExtiLine This parameter can be one of the following values: 00284 * @arg @ref LL_EXTI_LINE_0 00285 * @arg @ref LL_EXTI_LINE_1 00286 * @arg @ref LL_EXTI_LINE_2 00287 * @arg @ref LL_EXTI_LINE_3 00288 * @arg @ref LL_EXTI_LINE_4 00289 * @arg @ref LL_EXTI_LINE_5 00290 * @arg @ref LL_EXTI_LINE_6 00291 * @arg @ref LL_EXTI_LINE_7 00292 * @arg @ref LL_EXTI_LINE_8 00293 * @arg @ref LL_EXTI_LINE_9 00294 * @arg @ref LL_EXTI_LINE_10 00295 * @arg @ref LL_EXTI_LINE_11 00296 * @arg @ref LL_EXTI_LINE_12 00297 * @arg @ref LL_EXTI_LINE_13 00298 * @arg @ref LL_EXTI_LINE_14 00299 * @arg @ref LL_EXTI_LINE_15 00300 * @arg @ref LL_EXTI_LINE_16 00301 * @arg @ref LL_EXTI_LINE_17 00302 * @arg @ref LL_EXTI_LINE_18 00303 * @arg @ref LL_EXTI_LINE_19 00304 * @arg @ref LL_EXTI_LINE_20 00305 * @arg @ref LL_EXTI_LINE_21 00306 * @arg @ref LL_EXTI_LINE_22 00307 * @arg @ref LL_EXTI_LINE_23 00308 * @arg @ref LL_EXTI_LINE_24 00309 * @arg @ref LL_EXTI_LINE_25 00310 * @arg @ref LL_EXTI_LINE_26 00311 * @arg @ref LL_EXTI_LINE_27 00312 * @arg @ref LL_EXTI_LINE_28 00313 * @arg @ref LL_EXTI_LINE_29 00314 * @arg @ref LL_EXTI_LINE_30 00315 * @arg @ref LL_EXTI_LINE_31 00316 * @arg @ref LL_EXTI_LINE_ALL_0_31 00317 * @note Please check each device line mapping for EXTI Line availability 00318 * @retval None 00319 */ 00320 __STATIC_INLINE void LL_EXTI_EnableIT_0_31(uint32_t ExtiLine) 00321 { 00322 SET_BIT(EXTI->IMR1, ExtiLine); 00323 } 00324 /** 00325 * @brief Enable ExtiLine Interrupt request for Lines in range 32 to 63 00326 * @note The reset value for the direct lines (lines from 32 to 34, line 00327 * 39) is set to 1 in order to enable the interrupt by default. 00328 * Bits are set automatically at Power on. 00329 * @rmtoll IMR2 IMx LL_EXTI_EnableIT_32_63 00330 * @param ExtiLine This parameter can be one of the following values: 00331 * @arg @ref LL_EXTI_LINE_32 00332 * @arg @ref LL_EXTI_LINE_33 00333 * @arg @ref LL_EXTI_LINE_34(*) 00334 * @arg @ref LL_EXTI_LINE_35 00335 * @arg @ref LL_EXTI_LINE_36 00336 * @arg @ref LL_EXTI_LINE_37 00337 * @arg @ref LL_EXTI_LINE_38 00338 * @arg @ref LL_EXTI_LINE_39(*) 00339 * @arg @ref LL_EXTI_LINE_40(*) 00340 * @arg @ref LL_EXTI_LINE_ALL_32_63 00341 * @note (*): Available in some devices 00342 * @retval None 00343 */ 00344 __STATIC_INLINE void LL_EXTI_EnableIT_32_63(uint32_t ExtiLine) 00345 { 00346 SET_BIT(EXTI->IMR2, ExtiLine); 00347 } 00348 00349 /** 00350 * @brief Disable ExtiLine Interrupt request for Lines in range 0 to 31 00351 * @note The reset value for the direct or internal lines (see RM) 00352 * is set to 1 in order to enable the interrupt by default. 00353 * Bits are set automatically at Power on. 00354 * @rmtoll IMR1 IMx LL_EXTI_DisableIT_0_31 00355 * @param ExtiLine This parameter can be one of the following values: 00356 * @arg @ref LL_EXTI_LINE_0 00357 * @arg @ref LL_EXTI_LINE_1 00358 * @arg @ref LL_EXTI_LINE_2 00359 * @arg @ref LL_EXTI_LINE_3 00360 * @arg @ref LL_EXTI_LINE_4 00361 * @arg @ref LL_EXTI_LINE_5 00362 * @arg @ref LL_EXTI_LINE_6 00363 * @arg @ref LL_EXTI_LINE_7 00364 * @arg @ref LL_EXTI_LINE_8 00365 * @arg @ref LL_EXTI_LINE_9 00366 * @arg @ref LL_EXTI_LINE_10 00367 * @arg @ref LL_EXTI_LINE_11 00368 * @arg @ref LL_EXTI_LINE_12 00369 * @arg @ref LL_EXTI_LINE_13 00370 * @arg @ref LL_EXTI_LINE_14 00371 * @arg @ref LL_EXTI_LINE_15 00372 * @arg @ref LL_EXTI_LINE_16 00373 * @arg @ref LL_EXTI_LINE_17 00374 * @arg @ref LL_EXTI_LINE_18 00375 * @arg @ref LL_EXTI_LINE_19 00376 * @arg @ref LL_EXTI_LINE_20 00377 * @arg @ref LL_EXTI_LINE_21 00378 * @arg @ref LL_EXTI_LINE_22 00379 * @arg @ref LL_EXTI_LINE_23 00380 * @arg @ref LL_EXTI_LINE_24 00381 * @arg @ref LL_EXTI_LINE_25 00382 * @arg @ref LL_EXTI_LINE_26 00383 * @arg @ref LL_EXTI_LINE_27 00384 * @arg @ref LL_EXTI_LINE_28 00385 * @arg @ref LL_EXTI_LINE_29 00386 * @arg @ref LL_EXTI_LINE_30 00387 * @arg @ref LL_EXTI_LINE_31 00388 * @arg @ref LL_EXTI_LINE_ALL_0_31 00389 * @note Please check each device line mapping for EXTI Line availability 00390 * @retval None 00391 */ 00392 __STATIC_INLINE void LL_EXTI_DisableIT_0_31(uint32_t ExtiLine) 00393 { 00394 CLEAR_BIT(EXTI->IMR1, ExtiLine); 00395 } 00396 00397 /** 00398 * @brief Disable ExtiLine Interrupt request for Lines in range 32 to 63 00399 * @note The reset value for the direct lines (lines from 32 to 34, line 00400 * 39) is set to 1 in order to enable the interrupt by default. 00401 * Bits are set automatically at Power on. 00402 * @rmtoll IMR2 IMx LL_EXTI_DisableIT_32_63 00403 * @param ExtiLine This parameter can be one of the following values: 00404 * @arg @ref LL_EXTI_LINE_32 00405 * @arg @ref LL_EXTI_LINE_33 00406 * @arg @ref LL_EXTI_LINE_34(*) 00407 * @arg @ref LL_EXTI_LINE_35 00408 * @arg @ref LL_EXTI_LINE_36 00409 * @arg @ref LL_EXTI_LINE_37 00410 * @arg @ref LL_EXTI_LINE_38 00411 * @arg @ref LL_EXTI_LINE_39(*) 00412 * @arg @ref LL_EXTI_LINE_40(*) 00413 * @arg @ref LL_EXTI_LINE_ALL_32_63 00414 * @note (*): Available in some devices 00415 * @retval None 00416 */ 00417 __STATIC_INLINE void LL_EXTI_DisableIT_32_63(uint32_t ExtiLine) 00418 { 00419 CLEAR_BIT(EXTI->IMR2, ExtiLine); 00420 } 00421 00422 /** 00423 * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 0 to 31 00424 * @note The reset value for the direct or internal lines (see RM) 00425 * is set to 1 in order to enable the interrupt by default. 00426 * Bits are set automatically at Power on. 00427 * @rmtoll IMR1 IMx LL_EXTI_IsEnabledIT_0_31 00428 * @param ExtiLine This parameter can be one of the following values: 00429 * @arg @ref LL_EXTI_LINE_0 00430 * @arg @ref LL_EXTI_LINE_1 00431 * @arg @ref LL_EXTI_LINE_2 00432 * @arg @ref LL_EXTI_LINE_3 00433 * @arg @ref LL_EXTI_LINE_4 00434 * @arg @ref LL_EXTI_LINE_5 00435 * @arg @ref LL_EXTI_LINE_6 00436 * @arg @ref LL_EXTI_LINE_7 00437 * @arg @ref LL_EXTI_LINE_8 00438 * @arg @ref LL_EXTI_LINE_9 00439 * @arg @ref LL_EXTI_LINE_10 00440 * @arg @ref LL_EXTI_LINE_11 00441 * @arg @ref LL_EXTI_LINE_12 00442 * @arg @ref LL_EXTI_LINE_13 00443 * @arg @ref LL_EXTI_LINE_14 00444 * @arg @ref LL_EXTI_LINE_15 00445 * @arg @ref LL_EXTI_LINE_16 00446 * @arg @ref LL_EXTI_LINE_17 00447 * @arg @ref LL_EXTI_LINE_18 00448 * @arg @ref LL_EXTI_LINE_19 00449 * @arg @ref LL_EXTI_LINE_20 00450 * @arg @ref LL_EXTI_LINE_21 00451 * @arg @ref LL_EXTI_LINE_22 00452 * @arg @ref LL_EXTI_LINE_23 00453 * @arg @ref LL_EXTI_LINE_24 00454 * @arg @ref LL_EXTI_LINE_25 00455 * @arg @ref LL_EXTI_LINE_26 00456 * @arg @ref LL_EXTI_LINE_27 00457 * @arg @ref LL_EXTI_LINE_28 00458 * @arg @ref LL_EXTI_LINE_29 00459 * @arg @ref LL_EXTI_LINE_30 00460 * @arg @ref LL_EXTI_LINE_31 00461 * @arg @ref LL_EXTI_LINE_ALL_0_31 00462 * @note Please check each device line mapping for EXTI Line availability 00463 * @retval State of bit (1 or 0). 00464 */ 00465 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_0_31(uint32_t ExtiLine) 00466 { 00467 return (READ_BIT(EXTI->IMR1, ExtiLine) == (ExtiLine)); 00468 } 00469 00470 /** 00471 * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 32 to 63 00472 * @note The reset value for the direct lines (lines from 32 to 34, line 00473 * 39) is set to 1 in order to enable the interrupt by default. 00474 * Bits are set automatically at Power on. 00475 * @rmtoll IMR2 IMx LL_EXTI_IsEnabledIT_32_63 00476 * @param ExtiLine This parameter can be one of the following values: 00477 * @arg @ref LL_EXTI_LINE_32 00478 * @arg @ref LL_EXTI_LINE_33 00479 * @arg @ref LL_EXTI_LINE_34(*) 00480 * @arg @ref LL_EXTI_LINE_35 00481 * @arg @ref LL_EXTI_LINE_36 00482 * @arg @ref LL_EXTI_LINE_37 00483 * @arg @ref LL_EXTI_LINE_38 00484 * @arg @ref LL_EXTI_LINE_39(*) 00485 * @arg @ref LL_EXTI_LINE_40(*) 00486 * @arg @ref LL_EXTI_LINE_ALL_32_63 00487 * @note (*): Available in some devices 00488 * @retval State of bit (1 or 0). 00489 */ 00490 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_32_63(uint32_t ExtiLine) 00491 { 00492 return (READ_BIT(EXTI->IMR2, ExtiLine) == (ExtiLine)); 00493 } 00494 00495 /** 00496 * @} 00497 */ 00498 00499 /** @defgroup EXTI_LL_EF_Event_Management Event_Management 00500 * @{ 00501 */ 00502 00503 /** 00504 * @brief Enable ExtiLine Event request for Lines in range 0 to 31 00505 * @rmtoll EMR1 EMx LL_EXTI_EnableEvent_0_31 00506 * @param ExtiLine This parameter can be one of the following values: 00507 * @arg @ref LL_EXTI_LINE_0 00508 * @arg @ref LL_EXTI_LINE_1 00509 * @arg @ref LL_EXTI_LINE_2 00510 * @arg @ref LL_EXTI_LINE_3 00511 * @arg @ref LL_EXTI_LINE_4 00512 * @arg @ref LL_EXTI_LINE_5 00513 * @arg @ref LL_EXTI_LINE_6 00514 * @arg @ref LL_EXTI_LINE_7 00515 * @arg @ref LL_EXTI_LINE_8 00516 * @arg @ref LL_EXTI_LINE_9 00517 * @arg @ref LL_EXTI_LINE_10 00518 * @arg @ref LL_EXTI_LINE_11 00519 * @arg @ref LL_EXTI_LINE_12 00520 * @arg @ref LL_EXTI_LINE_13 00521 * @arg @ref LL_EXTI_LINE_14 00522 * @arg @ref LL_EXTI_LINE_15 00523 * @arg @ref LL_EXTI_LINE_16 00524 * @arg @ref LL_EXTI_LINE_17 00525 * @arg @ref LL_EXTI_LINE_18 00526 * @arg @ref LL_EXTI_LINE_19 00527 * @arg @ref LL_EXTI_LINE_20 00528 * @arg @ref LL_EXTI_LINE_21 00529 * @arg @ref LL_EXTI_LINE_22 00530 * @arg @ref LL_EXTI_LINE_23 00531 * @arg @ref LL_EXTI_LINE_24 00532 * @arg @ref LL_EXTI_LINE_25 00533 * @arg @ref LL_EXTI_LINE_26 00534 * @arg @ref LL_EXTI_LINE_27 00535 * @arg @ref LL_EXTI_LINE_28 00536 * @arg @ref LL_EXTI_LINE_29 00537 * @arg @ref LL_EXTI_LINE_30 00538 * @arg @ref LL_EXTI_LINE_31 00539 * @arg @ref LL_EXTI_LINE_ALL_0_31 00540 * @note Please check each device line mapping for EXTI Line availability 00541 * @retval None 00542 */ 00543 __STATIC_INLINE void LL_EXTI_EnableEvent_0_31(uint32_t ExtiLine) 00544 { 00545 SET_BIT(EXTI->EMR1, ExtiLine); 00546 00547 } 00548 00549 /** 00550 * @brief Enable ExtiLine Event request for Lines in range 32 to 63 00551 * @rmtoll EMR2 EMx LL_EXTI_EnableEvent_32_63 00552 * @param ExtiLine This parameter can be a combination of the following values: 00553 * @arg @ref LL_EXTI_LINE_32 00554 * @arg @ref LL_EXTI_LINE_33 00555 * @arg @ref LL_EXTI_LINE_34(*) 00556 * @arg @ref LL_EXTI_LINE_35 00557 * @arg @ref LL_EXTI_LINE_36 00558 * @arg @ref LL_EXTI_LINE_37 00559 * @arg @ref LL_EXTI_LINE_38 00560 * @arg @ref LL_EXTI_LINE_39(*) 00561 * @arg @ref LL_EXTI_LINE_40(*) 00562 * @arg @ref LL_EXTI_LINE_ALL_32_63 00563 * @note (*): Available in some devices 00564 * @retval None 00565 */ 00566 __STATIC_INLINE void LL_EXTI_EnableEvent_32_63(uint32_t ExtiLine) 00567 { 00568 SET_BIT(EXTI->EMR2, ExtiLine); 00569 } 00570 00571 /** 00572 * @brief Disable ExtiLine Event request for Lines in range 0 to 31 00573 * @rmtoll EMR1 EMx LL_EXTI_DisableEvent_0_31 00574 * @param ExtiLine This parameter can be one of the following values: 00575 * @arg @ref LL_EXTI_LINE_0 00576 * @arg @ref LL_EXTI_LINE_1 00577 * @arg @ref LL_EXTI_LINE_2 00578 * @arg @ref LL_EXTI_LINE_3 00579 * @arg @ref LL_EXTI_LINE_4 00580 * @arg @ref LL_EXTI_LINE_5 00581 * @arg @ref LL_EXTI_LINE_6 00582 * @arg @ref LL_EXTI_LINE_7 00583 * @arg @ref LL_EXTI_LINE_8 00584 * @arg @ref LL_EXTI_LINE_9 00585 * @arg @ref LL_EXTI_LINE_10 00586 * @arg @ref LL_EXTI_LINE_11 00587 * @arg @ref LL_EXTI_LINE_12 00588 * @arg @ref LL_EXTI_LINE_13 00589 * @arg @ref LL_EXTI_LINE_14 00590 * @arg @ref LL_EXTI_LINE_15 00591 * @arg @ref LL_EXTI_LINE_16 00592 * @arg @ref LL_EXTI_LINE_17 00593 * @arg @ref LL_EXTI_LINE_18 00594 * @arg @ref LL_EXTI_LINE_19 00595 * @arg @ref LL_EXTI_LINE_20 00596 * @arg @ref LL_EXTI_LINE_21 00597 * @arg @ref LL_EXTI_LINE_22 00598 * @arg @ref LL_EXTI_LINE_23 00599 * @arg @ref LL_EXTI_LINE_24 00600 * @arg @ref LL_EXTI_LINE_25 00601 * @arg @ref LL_EXTI_LINE_26 00602 * @arg @ref LL_EXTI_LINE_27 00603 * @arg @ref LL_EXTI_LINE_28 00604 * @arg @ref LL_EXTI_LINE_29 00605 * @arg @ref LL_EXTI_LINE_30 00606 * @arg @ref LL_EXTI_LINE_31 00607 * @arg @ref LL_EXTI_LINE_ALL_0_31 00608 * @note Please check each device line mapping for EXTI Line availability 00609 * @retval None 00610 */ 00611 __STATIC_INLINE void LL_EXTI_DisableEvent_0_31(uint32_t ExtiLine) 00612 { 00613 CLEAR_BIT(EXTI->EMR1, ExtiLine); 00614 } 00615 00616 /** 00617 * @brief Disable ExtiLine Event request for Lines in range 32 to 63 00618 * @rmtoll EMR2 EMx LL_EXTI_DisableEvent_32_63 00619 * @param ExtiLine This parameter can be a combination of the following values: 00620 * @arg @ref LL_EXTI_LINE_32 00621 * @arg @ref LL_EXTI_LINE_33 00622 * @arg @ref LL_EXTI_LINE_34(*) 00623 * @arg @ref LL_EXTI_LINE_35 00624 * @arg @ref LL_EXTI_LINE_36 00625 * @arg @ref LL_EXTI_LINE_37 00626 * @arg @ref LL_EXTI_LINE_38 00627 * @arg @ref LL_EXTI_LINE_39(*) 00628 * @arg @ref LL_EXTI_LINE_40(*) 00629 * @arg @ref LL_EXTI_LINE_ALL_32_63 00630 * @note (*): Available in some devices 00631 * @retval None 00632 */ 00633 __STATIC_INLINE void LL_EXTI_DisableEvent_32_63(uint32_t ExtiLine) 00634 { 00635 CLEAR_BIT(EXTI->EMR2, ExtiLine); 00636 } 00637 00638 /** 00639 * @brief Indicate if ExtiLine Event request is enabled for Lines in range 0 to 31 00640 * @rmtoll EMR1 EMx LL_EXTI_IsEnabledEvent_0_31 00641 * @param ExtiLine This parameter can be one of the following values: 00642 * @arg @ref LL_EXTI_LINE_0 00643 * @arg @ref LL_EXTI_LINE_1 00644 * @arg @ref LL_EXTI_LINE_2 00645 * @arg @ref LL_EXTI_LINE_3 00646 * @arg @ref LL_EXTI_LINE_4 00647 * @arg @ref LL_EXTI_LINE_5 00648 * @arg @ref LL_EXTI_LINE_6 00649 * @arg @ref LL_EXTI_LINE_7 00650 * @arg @ref LL_EXTI_LINE_8 00651 * @arg @ref LL_EXTI_LINE_9 00652 * @arg @ref LL_EXTI_LINE_10 00653 * @arg @ref LL_EXTI_LINE_11 00654 * @arg @ref LL_EXTI_LINE_12 00655 * @arg @ref LL_EXTI_LINE_13 00656 * @arg @ref LL_EXTI_LINE_14 00657 * @arg @ref LL_EXTI_LINE_15 00658 * @arg @ref LL_EXTI_LINE_16 00659 * @arg @ref LL_EXTI_LINE_17 00660 * @arg @ref LL_EXTI_LINE_18 00661 * @arg @ref LL_EXTI_LINE_19 00662 * @arg @ref LL_EXTI_LINE_20 00663 * @arg @ref LL_EXTI_LINE_21 00664 * @arg @ref LL_EXTI_LINE_22 00665 * @arg @ref LL_EXTI_LINE_23 00666 * @arg @ref LL_EXTI_LINE_24 00667 * @arg @ref LL_EXTI_LINE_25 00668 * @arg @ref LL_EXTI_LINE_26 00669 * @arg @ref LL_EXTI_LINE_27 00670 * @arg @ref LL_EXTI_LINE_28 00671 * @arg @ref LL_EXTI_LINE_29 00672 * @arg @ref LL_EXTI_LINE_30 00673 * @arg @ref LL_EXTI_LINE_31 00674 * @arg @ref LL_EXTI_LINE_ALL_0_31 00675 * @note Please check each device line mapping for EXTI Line availability 00676 * @retval State of bit (1 or 0). 00677 */ 00678 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledEvent_0_31(uint32_t ExtiLine) 00679 { 00680 return (READ_BIT(EXTI->EMR1, ExtiLine) == (ExtiLine)); 00681 00682 } 00683 00684 /** 00685 * @brief Indicate if ExtiLine Event request is enabled for Lines in range 32 to 63 00686 * @rmtoll EMR2 EMx LL_EXTI_IsEnabledEvent_32_63 00687 * @param ExtiLine This parameter can be a combination of the following values: 00688 * @arg @ref LL_EXTI_LINE_32 00689 * @arg @ref LL_EXTI_LINE_33 00690 * @arg @ref LL_EXTI_LINE_34(*) 00691 * @arg @ref LL_EXTI_LINE_35 00692 * @arg @ref LL_EXTI_LINE_36 00693 * @arg @ref LL_EXTI_LINE_37 00694 * @arg @ref LL_EXTI_LINE_38 00695 * @arg @ref LL_EXTI_LINE_39(*) 00696 * @arg @ref LL_EXTI_LINE_40(*) 00697 * @arg @ref LL_EXTI_LINE_ALL_32_63 00698 * @note (*): Available in some devices 00699 * @retval State of bit (1 or 0). 00700 */ 00701 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledEvent_32_63(uint32_t ExtiLine) 00702 { 00703 return (READ_BIT(EXTI->EMR2, ExtiLine) == (ExtiLine)); 00704 } 00705 00706 /** 00707 * @} 00708 */ 00709 00710 /** @defgroup EXTI_LL_EF_Rising_Trigger_Management Rising_Trigger_Management 00711 * @{ 00712 */ 00713 00714 /** 00715 * @brief Enable ExtiLine Rising Edge Trigger for Lines in range 0 to 31 00716 * @note The configurable wakeup lines are edge-triggered. No glitch must be 00717 * generated on these lines. If a rising edge on a configurable interrupt 00718 * line occurs during a write operation in the EXTI_RTSR register, the 00719 * pending bit is not set. 00720 * Rising and falling edge triggers can be set for 00721 * the same interrupt line. In this case, both generate a trigger 00722 * condition. 00723 * @rmtoll RTSR1 RTx LL_EXTI_EnableRisingTrig_0_31 00724 * @param ExtiLine This parameter can be a combination of the following values: 00725 * @arg @ref LL_EXTI_LINE_0 00726 * @arg @ref LL_EXTI_LINE_1 00727 * @arg @ref LL_EXTI_LINE_2 00728 * @arg @ref LL_EXTI_LINE_3 00729 * @arg @ref LL_EXTI_LINE_4 00730 * @arg @ref LL_EXTI_LINE_5 00731 * @arg @ref LL_EXTI_LINE_6 00732 * @arg @ref LL_EXTI_LINE_7 00733 * @arg @ref LL_EXTI_LINE_8 00734 * @arg @ref LL_EXTI_LINE_9 00735 * @arg @ref LL_EXTI_LINE_10 00736 * @arg @ref LL_EXTI_LINE_11 00737 * @arg @ref LL_EXTI_LINE_12 00738 * @arg @ref LL_EXTI_LINE_13 00739 * @arg @ref LL_EXTI_LINE_14 00740 * @arg @ref LL_EXTI_LINE_15 00741 * @arg @ref LL_EXTI_LINE_16 00742 * @arg @ref LL_EXTI_LINE_18 00743 * @arg @ref LL_EXTI_LINE_19 00744 * @arg @ref LL_EXTI_LINE_20 00745 * @arg @ref LL_EXTI_LINE_21 00746 * @arg @ref LL_EXTI_LINE_22 00747 * @arg @ref LL_EXTI_LINE_29 00748 * @arg @ref LL_EXTI_LINE_30 00749 * @arg @ref LL_EXTI_LINE_31 00750 * @note Please check each device line mapping for EXTI Line availability 00751 * @retval None 00752 */ 00753 __STATIC_INLINE void LL_EXTI_EnableRisingTrig_0_31(uint32_t ExtiLine) 00754 { 00755 SET_BIT(EXTI->RTSR1, ExtiLine); 00756 00757 } 00758 00759 /** 00760 * @brief Enable ExtiLine Rising Edge Trigger for Lines in range 32 to 63 00761 * @note The configurable wakeup lines are edge-triggered. No glitch must be 00762 * generated on these lines. If a rising edge on a configurable interrupt 00763 * line occurs during a write operation in the EXTI_RTSR register, the 00764 * pending bit is not set.Rising and falling edge triggers can be set for 00765 * the same interrupt line. In this case, both generate a trigger 00766 * condition. 00767 * @rmtoll RTSR2 RTx LL_EXTI_EnableRisingTrig_32_63 00768 * @param ExtiLine This parameter can be a combination of the following values: 00769 * @arg @ref LL_EXTI_LINE_35 00770 * @arg @ref LL_EXTI_LINE_36 00771 * @arg @ref LL_EXTI_LINE_37 00772 * @arg @ref LL_EXTI_LINE_38 00773 * @retval None 00774 */ 00775 __STATIC_INLINE void LL_EXTI_EnableRisingTrig_32_63(uint32_t ExtiLine) 00776 { 00777 SET_BIT(EXTI->RTSR2, ExtiLine); 00778 } 00779 00780 /** 00781 * @brief Disable ExtiLine Rising Edge Trigger for Lines in range 0 to 31 00782 * @note The configurable wakeup lines are edge-triggered. No glitch must be 00783 * generated on these lines. If a rising edge on a configurable interrupt 00784 * line occurs during a write operation in the EXTI_RTSR register, the 00785 * pending bit is not set. 00786 * Rising and falling edge triggers can be set for 00787 * the same interrupt line. In this case, both generate a trigger 00788 * condition. 00789 * @rmtoll RTSR1 RTx LL_EXTI_DisableRisingTrig_0_31 00790 * @param ExtiLine This parameter can be a combination of the following values: 00791 * @arg @ref LL_EXTI_LINE_0 00792 * @arg @ref LL_EXTI_LINE_1 00793 * @arg @ref LL_EXTI_LINE_2 00794 * @arg @ref LL_EXTI_LINE_3 00795 * @arg @ref LL_EXTI_LINE_4 00796 * @arg @ref LL_EXTI_LINE_5 00797 * @arg @ref LL_EXTI_LINE_6 00798 * @arg @ref LL_EXTI_LINE_7 00799 * @arg @ref LL_EXTI_LINE_8 00800 * @arg @ref LL_EXTI_LINE_9 00801 * @arg @ref LL_EXTI_LINE_10 00802 * @arg @ref LL_EXTI_LINE_11 00803 * @arg @ref LL_EXTI_LINE_12 00804 * @arg @ref LL_EXTI_LINE_13 00805 * @arg @ref LL_EXTI_LINE_14 00806 * @arg @ref LL_EXTI_LINE_15 00807 * @arg @ref LL_EXTI_LINE_16 00808 * @arg @ref LL_EXTI_LINE_18 00809 * @arg @ref LL_EXTI_LINE_19 00810 * @arg @ref LL_EXTI_LINE_20 00811 * @arg @ref LL_EXTI_LINE_21 00812 * @arg @ref LL_EXTI_LINE_22 00813 * @arg @ref LL_EXTI_LINE_29 00814 * @arg @ref LL_EXTI_LINE_30 00815 * @arg @ref LL_EXTI_LINE_31 00816 * @note Please check each device line mapping for EXTI Line availability 00817 * @retval None 00818 */ 00819 __STATIC_INLINE void LL_EXTI_DisableRisingTrig_0_31(uint32_t ExtiLine) 00820 { 00821 CLEAR_BIT(EXTI->RTSR1, ExtiLine); 00822 00823 } 00824 00825 /** 00826 * @brief Disable ExtiLine Rising Edge Trigger for Lines in range 32 to 63 00827 * @note The configurable wakeup lines are edge-triggered. No glitch must be 00828 * generated on these lines. If a rising edge on a configurable interrupt 00829 * line occurs during a write operation in the EXTI_RTSR register, the 00830 * pending bit is not set. 00831 * Rising and falling edge triggers can be set for 00832 * the same interrupt line. In this case, both generate a trigger 00833 * condition. 00834 * @rmtoll RTSR2 RTx LL_EXTI_DisableRisingTrig_32_63 00835 * @param ExtiLine This parameter can be a combination of the following values: 00836 * @arg @ref LL_EXTI_LINE_35 00837 * @arg @ref LL_EXTI_LINE_36 00838 * @arg @ref LL_EXTI_LINE_37 00839 * @arg @ref LL_EXTI_LINE_38 00840 * @retval None 00841 */ 00842 __STATIC_INLINE void LL_EXTI_DisableRisingTrig_32_63(uint32_t ExtiLine) 00843 { 00844 CLEAR_BIT(EXTI->RTSR2, ExtiLine); 00845 } 00846 00847 /** 00848 * @brief Check if rising edge trigger is enabled for Lines in range 0 to 31 00849 * @rmtoll RTSR1 RTx LL_EXTI_IsEnabledRisingTrig_0_31 00850 * @param ExtiLine This parameter can be a combination of the following values: 00851 * @arg @ref LL_EXTI_LINE_0 00852 * @arg @ref LL_EXTI_LINE_1 00853 * @arg @ref LL_EXTI_LINE_2 00854 * @arg @ref LL_EXTI_LINE_3 00855 * @arg @ref LL_EXTI_LINE_4 00856 * @arg @ref LL_EXTI_LINE_5 00857 * @arg @ref LL_EXTI_LINE_6 00858 * @arg @ref LL_EXTI_LINE_7 00859 * @arg @ref LL_EXTI_LINE_8 00860 * @arg @ref LL_EXTI_LINE_9 00861 * @arg @ref LL_EXTI_LINE_10 00862 * @arg @ref LL_EXTI_LINE_11 00863 * @arg @ref LL_EXTI_LINE_12 00864 * @arg @ref LL_EXTI_LINE_13 00865 * @arg @ref LL_EXTI_LINE_14 00866 * @arg @ref LL_EXTI_LINE_15 00867 * @arg @ref LL_EXTI_LINE_16 00868 * @arg @ref LL_EXTI_LINE_18 00869 * @arg @ref LL_EXTI_LINE_19 00870 * @arg @ref LL_EXTI_LINE_20 00871 * @arg @ref LL_EXTI_LINE_21 00872 * @arg @ref LL_EXTI_LINE_22 00873 * @arg @ref LL_EXTI_LINE_29 00874 * @arg @ref LL_EXTI_LINE_30 00875 * @arg @ref LL_EXTI_LINE_31 00876 * @note Please check each device line mapping for EXTI Line availability 00877 * @retval State of bit (1 or 0). 00878 */ 00879 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledRisingTrig_0_31(uint32_t ExtiLine) 00880 { 00881 return (READ_BIT(EXTI->RTSR1, ExtiLine) == (ExtiLine)); 00882 } 00883 00884 /** 00885 * @brief Check if rising edge trigger is enabled for Lines in range 32 to 63 00886 * @rmtoll RTSR2 RTx LL_EXTI_IsEnabledRisingTrig_32_63 00887 * @param ExtiLine This parameter can be a combination of the following values: 00888 * @arg @ref LL_EXTI_LINE_35 00889 * @arg @ref LL_EXTI_LINE_36 00890 * @arg @ref LL_EXTI_LINE_37 00891 * @arg @ref LL_EXTI_LINE_38 00892 * @retval State of bit (1 or 0). 00893 */ 00894 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledRisingTrig_32_63(uint32_t ExtiLine) 00895 { 00896 return (READ_BIT(EXTI->RTSR2, ExtiLine) == (ExtiLine)); 00897 } 00898 00899 /** 00900 * @} 00901 */ 00902 00903 /** @defgroup EXTI_LL_EF_Falling_Trigger_Management Falling_Trigger_Management 00904 * @{ 00905 */ 00906 00907 /** 00908 * @brief Enable ExtiLine Falling Edge Trigger for Lines in range 0 to 31 00909 * @note The configurable wakeup lines are edge-triggered. No glitch must be 00910 * generated on these lines. If a falling edge on a configurable interrupt 00911 * line occurs during a write operation in the EXTI_FTSR register, the 00912 * pending bit is not set. 00913 * Rising and falling edge triggers can be set for 00914 * the same interrupt line. In this case, both generate a trigger 00915 * condition. 00916 * @rmtoll FTSR1 FTx LL_EXTI_EnableFallingTrig_0_31 00917 * @param ExtiLine This parameter can be a combination of the following values: 00918 * @arg @ref LL_EXTI_LINE_0 00919 * @arg @ref LL_EXTI_LINE_1 00920 * @arg @ref LL_EXTI_LINE_2 00921 * @arg @ref LL_EXTI_LINE_3 00922 * @arg @ref LL_EXTI_LINE_4 00923 * @arg @ref LL_EXTI_LINE_5 00924 * @arg @ref LL_EXTI_LINE_6 00925 * @arg @ref LL_EXTI_LINE_7 00926 * @arg @ref LL_EXTI_LINE_8 00927 * @arg @ref LL_EXTI_LINE_9 00928 * @arg @ref LL_EXTI_LINE_10 00929 * @arg @ref LL_EXTI_LINE_11 00930 * @arg @ref LL_EXTI_LINE_12 00931 * @arg @ref LL_EXTI_LINE_13 00932 * @arg @ref LL_EXTI_LINE_14 00933 * @arg @ref LL_EXTI_LINE_15 00934 * @arg @ref LL_EXTI_LINE_16 00935 * @arg @ref LL_EXTI_LINE_18 00936 * @arg @ref LL_EXTI_LINE_19 00937 * @arg @ref LL_EXTI_LINE_20 00938 * @arg @ref LL_EXTI_LINE_21 00939 * @arg @ref LL_EXTI_LINE_22 00940 * @arg @ref LL_EXTI_LINE_29 00941 * @arg @ref LL_EXTI_LINE_30 00942 * @arg @ref LL_EXTI_LINE_31 00943 * @note Please check each device line mapping for EXTI Line availability 00944 * @retval None 00945 */ 00946 __STATIC_INLINE void LL_EXTI_EnableFallingTrig_0_31(uint32_t ExtiLine) 00947 { 00948 SET_BIT(EXTI->FTSR1, ExtiLine); 00949 } 00950 00951 /** 00952 * @brief Enable ExtiLine Falling Edge Trigger for Lines in range 32 to 63 00953 * @note The configurable wakeup lines are edge-triggered. No glitch must be 00954 * generated on these lines. If a Falling edge on a configurable interrupt 00955 * line occurs during a write operation in the EXTI_FTSR register, the 00956 * pending bit is not set. 00957 * Rising and falling edge triggers can be set for 00958 * the same interrupt line. In this case, both generate a trigger 00959 * condition. 00960 * @rmtoll FTSR2 FTx LL_EXTI_EnableFallingTrig_32_63 00961 * @param ExtiLine This parameter can be a combination of the following values: 00962 * @arg @ref LL_EXTI_LINE_35 00963 * @arg @ref LL_EXTI_LINE_36 00964 * @arg @ref LL_EXTI_LINE_37 00965 * @arg @ref LL_EXTI_LINE_38 00966 * @retval None 00967 */ 00968 __STATIC_INLINE void LL_EXTI_EnableFallingTrig_32_63(uint32_t ExtiLine) 00969 { 00970 SET_BIT(EXTI->FTSR2, ExtiLine); 00971 } 00972 00973 /** 00974 * @brief Disable ExtiLine Falling Edge Trigger for Lines in range 0 to 31 00975 * @note The configurable wakeup lines are edge-triggered. No glitch must be 00976 * generated on these lines. If a Falling edge on a configurable interrupt 00977 * line occurs during a write operation in the EXTI_FTSR register, the 00978 * pending bit is not set. 00979 * Rising and falling edge triggers can be set for the same interrupt line. 00980 * In this case, both generate a trigger condition. 00981 * @rmtoll FTSR1 FTx LL_EXTI_DisableFallingTrig_0_31 00982 * @param ExtiLine This parameter can be a combination of the following values: 00983 * @arg @ref LL_EXTI_LINE_0 00984 * @arg @ref LL_EXTI_LINE_1 00985 * @arg @ref LL_EXTI_LINE_2 00986 * @arg @ref LL_EXTI_LINE_3 00987 * @arg @ref LL_EXTI_LINE_4 00988 * @arg @ref LL_EXTI_LINE_5 00989 * @arg @ref LL_EXTI_LINE_6 00990 * @arg @ref LL_EXTI_LINE_7 00991 * @arg @ref LL_EXTI_LINE_8 00992 * @arg @ref LL_EXTI_LINE_9 00993 * @arg @ref LL_EXTI_LINE_10 00994 * @arg @ref LL_EXTI_LINE_11 00995 * @arg @ref LL_EXTI_LINE_12 00996 * @arg @ref LL_EXTI_LINE_13 00997 * @arg @ref LL_EXTI_LINE_14 00998 * @arg @ref LL_EXTI_LINE_15 00999 * @arg @ref LL_EXTI_LINE_16 01000 * @arg @ref LL_EXTI_LINE_18 01001 * @arg @ref LL_EXTI_LINE_19 01002 * @arg @ref LL_EXTI_LINE_20 01003 * @arg @ref LL_EXTI_LINE_21 01004 * @arg @ref LL_EXTI_LINE_22 01005 * @arg @ref LL_EXTI_LINE_29 01006 * @arg @ref LL_EXTI_LINE_30 01007 * @arg @ref LL_EXTI_LINE_31 01008 * @note Please check each device line mapping for EXTI Line availability 01009 * @retval None 01010 */ 01011 __STATIC_INLINE void LL_EXTI_DisableFallingTrig_0_31(uint32_t ExtiLine) 01012 { 01013 CLEAR_BIT(EXTI->FTSR1, ExtiLine); 01014 } 01015 01016 /** 01017 * @brief Disable ExtiLine Falling Edge Trigger for Lines in range 32 to 63 01018 * @note The configurable wakeup lines are edge-triggered. No glitch must be 01019 * generated on these lines. If a Falling edge on a configurable interrupt 01020 * line occurs during a write operation in the EXTI_FTSR register, the 01021 * pending bit is not set. 01022 * Rising and falling edge triggers can be set for the same interrupt line. 01023 * In this case, both generate a trigger condition. 01024 * @rmtoll FTSR2 FTx LL_EXTI_DisableFallingTrig_32_63 01025 * @param ExtiLine This parameter can be a combination of the following values: 01026 * @arg @ref LL_EXTI_LINE_35 01027 * @arg @ref LL_EXTI_LINE_36 01028 * @arg @ref LL_EXTI_LINE_37 01029 * @arg @ref LL_EXTI_LINE_38 01030 * @retval None 01031 */ 01032 __STATIC_INLINE void LL_EXTI_DisableFallingTrig_32_63(uint32_t ExtiLine) 01033 { 01034 CLEAR_BIT(EXTI->FTSR2, ExtiLine); 01035 } 01036 01037 /** 01038 * @brief Check if falling edge trigger is enabled for Lines in range 0 to 31 01039 * @rmtoll FTSR1 FTx LL_EXTI_IsEnabledFallingTrig_0_31 01040 * @param ExtiLine This parameter can be a combination of the following values: 01041 * @arg @ref LL_EXTI_LINE_0 01042 * @arg @ref LL_EXTI_LINE_1 01043 * @arg @ref LL_EXTI_LINE_2 01044 * @arg @ref LL_EXTI_LINE_3 01045 * @arg @ref LL_EXTI_LINE_4 01046 * @arg @ref LL_EXTI_LINE_5 01047 * @arg @ref LL_EXTI_LINE_6 01048 * @arg @ref LL_EXTI_LINE_7 01049 * @arg @ref LL_EXTI_LINE_8 01050 * @arg @ref LL_EXTI_LINE_9 01051 * @arg @ref LL_EXTI_LINE_10 01052 * @arg @ref LL_EXTI_LINE_11 01053 * @arg @ref LL_EXTI_LINE_12 01054 * @arg @ref LL_EXTI_LINE_13 01055 * @arg @ref LL_EXTI_LINE_14 01056 * @arg @ref LL_EXTI_LINE_15 01057 * @arg @ref LL_EXTI_LINE_16 01058 * @arg @ref LL_EXTI_LINE_18 01059 * @arg @ref LL_EXTI_LINE_19 01060 * @arg @ref LL_EXTI_LINE_20 01061 * @arg @ref LL_EXTI_LINE_21 01062 * @arg @ref LL_EXTI_LINE_22 01063 * @arg @ref LL_EXTI_LINE_29 01064 * @arg @ref LL_EXTI_LINE_30 01065 * @arg @ref LL_EXTI_LINE_31 01066 * @note Please check each device line mapping for EXTI Line availability 01067 * @retval State of bit (1 or 0). 01068 */ 01069 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledFallingTrig_0_31(uint32_t ExtiLine) 01070 { 01071 return (READ_BIT(EXTI->FTSR1, ExtiLine) == (ExtiLine)); 01072 } 01073 01074 /** 01075 * @brief Check if falling edge trigger is enabled for Lines in range 32 to 63 01076 * @rmtoll FTSR2 FTx LL_EXTI_IsEnabledFallingTrig_32_63 01077 * @param ExtiLine This parameter can be a combination of the following values: 01078 * @arg @ref LL_EXTI_LINE_35 01079 * @arg @ref LL_EXTI_LINE_36 01080 * @arg @ref LL_EXTI_LINE_37 01081 * @arg @ref LL_EXTI_LINE_38 01082 * @retval State of bit (1 or 0). 01083 */ 01084 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledFallingTrig_32_63(uint32_t ExtiLine) 01085 { 01086 return (READ_BIT(EXTI->FTSR2, ExtiLine) == (ExtiLine)); 01087 } 01088 01089 /** 01090 * @} 01091 */ 01092 01093 /** @defgroup EXTI_LL_EF_Software_Interrupt_Management Software_Interrupt_Management 01094 * @{ 01095 */ 01096 01097 /** 01098 * @brief Generate a software Interrupt Event for Lines in range 0 to 31 01099 * @note If the interrupt is enabled on this line in the EXTI_IMR1, writing a 1 to 01100 * this bit when it is at '0' sets the corresponding pending bit in EXTI_PR1 01101 * resulting in an interrupt request generation. 01102 * This bit is cleared by clearing the corresponding bit in the EXTI_PR1 01103 * register (by writing a 1 into the bit) 01104 * @rmtoll SWIER1 SWIx LL_EXTI_GenerateSWI_0_31 01105 * @param ExtiLine This parameter can be a combination of the following values: 01106 * @arg @ref LL_EXTI_LINE_0 01107 * @arg @ref LL_EXTI_LINE_1 01108 * @arg @ref LL_EXTI_LINE_2 01109 * @arg @ref LL_EXTI_LINE_3 01110 * @arg @ref LL_EXTI_LINE_4 01111 * @arg @ref LL_EXTI_LINE_5 01112 * @arg @ref LL_EXTI_LINE_6 01113 * @arg @ref LL_EXTI_LINE_7 01114 * @arg @ref LL_EXTI_LINE_8 01115 * @arg @ref LL_EXTI_LINE_9 01116 * @arg @ref LL_EXTI_LINE_10 01117 * @arg @ref LL_EXTI_LINE_11 01118 * @arg @ref LL_EXTI_LINE_12 01119 * @arg @ref LL_EXTI_LINE_13 01120 * @arg @ref LL_EXTI_LINE_14 01121 * @arg @ref LL_EXTI_LINE_15 01122 * @arg @ref LL_EXTI_LINE_16 01123 * @arg @ref LL_EXTI_LINE_18 01124 * @arg @ref LL_EXTI_LINE_19 01125 * @arg @ref LL_EXTI_LINE_20 01126 * @arg @ref LL_EXTI_LINE_21 01127 * @arg @ref LL_EXTI_LINE_22 01128 * @arg @ref LL_EXTI_LINE_29 01129 * @arg @ref LL_EXTI_LINE_30 01130 * @arg @ref LL_EXTI_LINE_31 01131 * @note Please check each device line mapping for EXTI Line availability 01132 * @retval None 01133 */ 01134 __STATIC_INLINE void LL_EXTI_GenerateSWI_0_31(uint32_t ExtiLine) 01135 { 01136 SET_BIT(EXTI->SWIER1, ExtiLine); 01137 } 01138 01139 /** 01140 * @brief Generate a software Interrupt Event for Lines in range 32 to 63 01141 * @note If the interrupt is enabled on this line inthe EXTI_IMR2, writing a 1 to 01142 * this bit when it is at '0' sets the corresponding pending bit in EXTI_PR2 01143 * resulting in an interrupt request generation. 01144 * This bit is cleared by clearing the corresponding bit in the EXTI_PR2 01145 * register (by writing a 1 into the bit) 01146 * @rmtoll SWIER2 SWIx LL_EXTI_GenerateSWI_32_63 01147 * @param ExtiLine This parameter can be a combination of the following values: 01148 * @arg @ref LL_EXTI_LINE_35 01149 * @arg @ref LL_EXTI_LINE_36 01150 * @arg @ref LL_EXTI_LINE_37 01151 * @arg @ref LL_EXTI_LINE_38 01152 * @retval None 01153 */ 01154 __STATIC_INLINE void LL_EXTI_GenerateSWI_32_63(uint32_t ExtiLine) 01155 { 01156 SET_BIT(EXTI->SWIER2, ExtiLine); 01157 } 01158 01159 /** 01160 * @} 01161 */ 01162 01163 /** @defgroup EXTI_LL_EF_Flag_Management Flag_Management 01164 * @{ 01165 */ 01166 01167 /** 01168 * @brief Check if the ExtLine Flag is set or not for Lines in range 0 to 31 01169 * @note This bit is set when the selected edge event arrives on the interrupt 01170 * line. This bit is cleared by writing a 1 to the bit. 01171 * @rmtoll PR1 PIFx LL_EXTI_IsActiveFlag_0_31 01172 * @param ExtiLine This parameter can be a combination of the following values: 01173 * @arg @ref LL_EXTI_LINE_0 01174 * @arg @ref LL_EXTI_LINE_1 01175 * @arg @ref LL_EXTI_LINE_2 01176 * @arg @ref LL_EXTI_LINE_3 01177 * @arg @ref LL_EXTI_LINE_4 01178 * @arg @ref LL_EXTI_LINE_5 01179 * @arg @ref LL_EXTI_LINE_6 01180 * @arg @ref LL_EXTI_LINE_7 01181 * @arg @ref LL_EXTI_LINE_8 01182 * @arg @ref LL_EXTI_LINE_9 01183 * @arg @ref LL_EXTI_LINE_10 01184 * @arg @ref LL_EXTI_LINE_11 01185 * @arg @ref LL_EXTI_LINE_12 01186 * @arg @ref LL_EXTI_LINE_13 01187 * @arg @ref LL_EXTI_LINE_14 01188 * @arg @ref LL_EXTI_LINE_15 01189 * @arg @ref LL_EXTI_LINE_16 01190 * @arg @ref LL_EXTI_LINE_18 01191 * @arg @ref LL_EXTI_LINE_19 01192 * @arg @ref LL_EXTI_LINE_20 01193 * @arg @ref LL_EXTI_LINE_21 01194 * @arg @ref LL_EXTI_LINE_22 01195 * @arg @ref LL_EXTI_LINE_29 01196 * @arg @ref LL_EXTI_LINE_30 01197 * @arg @ref LL_EXTI_LINE_31 01198 * @note Please check each device line mapping for EXTI Line availability 01199 * @retval State of bit (1 or 0). 01200 */ 01201 __STATIC_INLINE uint32_t LL_EXTI_IsActiveFlag_0_31(uint32_t ExtiLine) 01202 { 01203 return (READ_BIT(EXTI->PR1, ExtiLine) == (ExtiLine)); 01204 } 01205 01206 /** 01207 * @brief Check if the ExtLine Flag is set or not for Lines in range 32 to 63 01208 * @note This bit is set when the selected edge event arrives on the interrupt 01209 * line. This bit is cleared by writing a 1 to the bit. 01210 * @rmtoll PR2 PIFx LL_EXTI_IsActiveFlag_32_63 01211 * @param ExtiLine This parameter can be a combination of the following values: 01212 * @arg @ref LL_EXTI_LINE_35 01213 * @arg @ref LL_EXTI_LINE_36 01214 * @arg @ref LL_EXTI_LINE_37 01215 * @arg @ref LL_EXTI_LINE_38 01216 * @retval State of bit (1 or 0). 01217 */ 01218 __STATIC_INLINE uint32_t LL_EXTI_IsActiveFlag_32_63(uint32_t ExtiLine) 01219 { 01220 return (READ_BIT(EXTI->PR2, ExtiLine) == (ExtiLine)); 01221 } 01222 01223 /** 01224 * @brief Read ExtLine Combination Flag for Lines in range 0 to 31 01225 * @note This bit is set when the selected edge event arrives on the interrupt 01226 * line. This bit is cleared by writing a 1 to the bit. 01227 * @rmtoll PR1 PIFx LL_EXTI_ReadFlag_0_31 01228 * @param ExtiLine This parameter can be a combination of the following values: 01229 * @arg @ref LL_EXTI_LINE_0 01230 * @arg @ref LL_EXTI_LINE_1 01231 * @arg @ref LL_EXTI_LINE_2 01232 * @arg @ref LL_EXTI_LINE_3 01233 * @arg @ref LL_EXTI_LINE_4 01234 * @arg @ref LL_EXTI_LINE_5 01235 * @arg @ref LL_EXTI_LINE_6 01236 * @arg @ref LL_EXTI_LINE_7 01237 * @arg @ref LL_EXTI_LINE_8 01238 * @arg @ref LL_EXTI_LINE_9 01239 * @arg @ref LL_EXTI_LINE_10 01240 * @arg @ref LL_EXTI_LINE_11 01241 * @arg @ref LL_EXTI_LINE_12 01242 * @arg @ref LL_EXTI_LINE_13 01243 * @arg @ref LL_EXTI_LINE_14 01244 * @arg @ref LL_EXTI_LINE_15 01245 * @arg @ref LL_EXTI_LINE_16 01246 * @arg @ref LL_EXTI_LINE_18 01247 * @arg @ref LL_EXTI_LINE_19 01248 * @arg @ref LL_EXTI_LINE_20 01249 * @arg @ref LL_EXTI_LINE_21 01250 * @arg @ref LL_EXTI_LINE_22 01251 * @arg @ref LL_EXTI_LINE_29 01252 * @arg @ref LL_EXTI_LINE_30 01253 * @arg @ref LL_EXTI_LINE_31 01254 * @note Please check each device line mapping for EXTI Line availability 01255 * @retval @note This bit is set when the selected edge event arrives on the interrupt 01256 */ 01257 __STATIC_INLINE uint32_t LL_EXTI_ReadFlag_0_31(uint32_t ExtiLine) 01258 { 01259 return (uint32_t)(READ_BIT(EXTI->PR1, ExtiLine)); 01260 } 01261 01262 01263 /** 01264 * @brief Read ExtLine Combination Flag for Lines in range 32 to 63 01265 * @note This bit is set when the selected edge event arrives on the interrupt 01266 * line. This bit is cleared by writing a 1 to the bit. 01267 * @rmtoll PR2 PIFx LL_EXTI_ReadFlag_32_63 01268 * @param ExtiLine This parameter can be a combination of the following values: 01269 * @arg @ref LL_EXTI_LINE_35 01270 * @arg @ref LL_EXTI_LINE_36 01271 * @arg @ref LL_EXTI_LINE_37 01272 * @arg @ref LL_EXTI_LINE_38 01273 * @retval @note This bit is set when the selected edge event arrives on the interrupt 01274 */ 01275 __STATIC_INLINE uint32_t LL_EXTI_ReadFlag_32_63(uint32_t ExtiLine) 01276 { 01277 return (uint32_t)(READ_BIT(EXTI->PR2, ExtiLine)); 01278 } 01279 01280 /** 01281 * @brief Clear ExtLine Flags for Lines in range 0 to 31 01282 * @note This bit is set when the selected edge event arrives on the interrupt 01283 * line. This bit is cleared by writing a 1 to the bit. 01284 * @rmtoll PR1 PIFx LL_EXTI_ClearFlag_0_31 01285 * @param ExtiLine This parameter can be a combination of the following values: 01286 * @arg @ref LL_EXTI_LINE_0 01287 * @arg @ref LL_EXTI_LINE_1 01288 * @arg @ref LL_EXTI_LINE_2 01289 * @arg @ref LL_EXTI_LINE_3 01290 * @arg @ref LL_EXTI_LINE_4 01291 * @arg @ref LL_EXTI_LINE_5 01292 * @arg @ref LL_EXTI_LINE_6 01293 * @arg @ref LL_EXTI_LINE_7 01294 * @arg @ref LL_EXTI_LINE_8 01295 * @arg @ref LL_EXTI_LINE_9 01296 * @arg @ref LL_EXTI_LINE_10 01297 * @arg @ref LL_EXTI_LINE_11 01298 * @arg @ref LL_EXTI_LINE_12 01299 * @arg @ref LL_EXTI_LINE_13 01300 * @arg @ref LL_EXTI_LINE_14 01301 * @arg @ref LL_EXTI_LINE_15 01302 * @arg @ref LL_EXTI_LINE_16 01303 * @arg @ref LL_EXTI_LINE_18 01304 * @arg @ref LL_EXTI_LINE_19 01305 * @arg @ref LL_EXTI_LINE_20 01306 * @arg @ref LL_EXTI_LINE_21 01307 * @arg @ref LL_EXTI_LINE_22 01308 * @arg @ref LL_EXTI_LINE_29 01309 * @arg @ref LL_EXTI_LINE_30 01310 * @arg @ref LL_EXTI_LINE_31 01311 * @note Please check each device line mapping for EXTI Line availability 01312 * @retval None 01313 */ 01314 __STATIC_INLINE void LL_EXTI_ClearFlag_0_31(uint32_t ExtiLine) 01315 { 01316 WRITE_REG(EXTI->PR1, ExtiLine); 01317 } 01318 01319 /** 01320 * @brief Clear ExtLine Flags for Lines in range 32 to 63 01321 * @note This bit is set when the selected edge event arrives on the interrupt 01322 * line. This bit is cleared by writing a 1 to the bit. 01323 * @rmtoll PR2 PIFx LL_EXTI_ClearFlag_32_63 01324 * @param ExtiLine This parameter can be a combination of the following values: 01325 * @arg @ref LL_EXTI_LINE_35 01326 * @arg @ref LL_EXTI_LINE_36 01327 * @arg @ref LL_EXTI_LINE_37 01328 * @arg @ref LL_EXTI_LINE_38 01329 * @retval None 01330 */ 01331 __STATIC_INLINE void LL_EXTI_ClearFlag_32_63(uint32_t ExtiLine) 01332 { 01333 WRITE_REG(EXTI->PR2, ExtiLine); 01334 } 01335 01336 /** 01337 * @} 01338 */ 01339 01340 #if defined(USE_FULL_LL_DRIVER) 01341 /** @defgroup EXTI_LL_EF_Init Initialization and de-initialization functions 01342 * @{ 01343 */ 01344 01345 uint32_t LL_EXTI_Init(LL_EXTI_InitTypeDef *EXTI_InitStruct); 01346 uint32_t LL_EXTI_DeInit(void); 01347 void LL_EXTI_StructInit(LL_EXTI_InitTypeDef *EXTI_InitStruct); 01348 01349 01350 /** 01351 * @} 01352 */ 01353 #endif /* USE_FULL_LL_DRIVER */ 01354 01355 /** 01356 * @} 01357 */ 01358 01359 /** 01360 * @} 01361 */ 01362 01363 #endif /* EXTI */ 01364 01365 /** 01366 * @} 01367 */ 01368 01369 #ifdef __cplusplus 01370 } 01371 #endif 01372 01373 #endif /* __STM32L4xx_LL_EXTI_H */ 01374 01375 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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