STM32L486xx HAL User Manual
|
Header file of SMBUS HAL module. More...
#include "stm32l4xx_hal_def.h"
Go to the source code of this file.
Data Structures | |
struct | SMBUS_InitTypeDef |
struct | __SMBUS_HandleTypeDef |
Defines | |
#define | HAL_SMBUS_STATE_RESET (0x00000000U) |
#define | HAL_SMBUS_STATE_READY (0x00000001U) |
#define | HAL_SMBUS_STATE_BUSY (0x00000002U) |
#define | HAL_SMBUS_STATE_MASTER_BUSY_TX (0x00000012U) |
#define | HAL_SMBUS_STATE_MASTER_BUSY_RX (0x00000022U) |
#define | HAL_SMBUS_STATE_SLAVE_BUSY_TX (0x00000032U) |
#define | HAL_SMBUS_STATE_SLAVE_BUSY_RX (0x00000042U) |
#define | HAL_SMBUS_STATE_TIMEOUT (0x00000003U) |
#define | HAL_SMBUS_STATE_ERROR (0x00000004U) |
#define | HAL_SMBUS_STATE_LISTEN (0x00000008U) |
#define | HAL_SMBUS_ERROR_NONE (0x00000000U) |
#define | HAL_SMBUS_ERROR_BERR (0x00000001U) |
#define | HAL_SMBUS_ERROR_ARLO (0x00000002U) |
#define | HAL_SMBUS_ERROR_ACKF (0x00000004U) |
#define | HAL_SMBUS_ERROR_OVR (0x00000008U) |
#define | HAL_SMBUS_ERROR_HALTIMEOUT (0x00000010U) |
#define | HAL_SMBUS_ERROR_BUSTIMEOUT (0x00000020U) |
#define | HAL_SMBUS_ERROR_ALERT (0x00000040U) |
#define | HAL_SMBUS_ERROR_PECERR (0x00000080U) |
#define | HAL_SMBUS_ERROR_INVALID_CALLBACK (0x00000100U) |
#define | SMBUS_ANALOGFILTER_ENABLE (0x00000000U) |
#define | SMBUS_ANALOGFILTER_DISABLE I2C_CR1_ANFOFF |
#define | SMBUS_ADDRESSINGMODE_7BIT (0x00000001U) |
#define | SMBUS_ADDRESSINGMODE_10BIT (0x00000002U) |
#define | SMBUS_DUALADDRESS_DISABLE (0x00000000U) |
#define | SMBUS_DUALADDRESS_ENABLE I2C_OAR2_OA2EN |
#define | SMBUS_OA2_NOMASK ((uint8_t)0x00U) |
#define | SMBUS_OA2_MASK01 ((uint8_t)0x01U) |
#define | SMBUS_OA2_MASK02 ((uint8_t)0x02U) |
#define | SMBUS_OA2_MASK03 ((uint8_t)0x03U) |
#define | SMBUS_OA2_MASK04 ((uint8_t)0x04U) |
#define | SMBUS_OA2_MASK05 ((uint8_t)0x05U) |
#define | SMBUS_OA2_MASK06 ((uint8_t)0x06U) |
#define | SMBUS_OA2_MASK07 ((uint8_t)0x07U) |
#define | SMBUS_GENERALCALL_DISABLE (0x00000000U) |
#define | SMBUS_GENERALCALL_ENABLE I2C_CR1_GCEN |
#define | SMBUS_NOSTRETCH_DISABLE (0x00000000U) |
#define | SMBUS_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH |
#define | SMBUS_PEC_DISABLE (0x00000000U) |
#define | SMBUS_PEC_ENABLE I2C_CR1_PECEN |
#define | SMBUS_PERIPHERAL_MODE_SMBUS_HOST I2C_CR1_SMBHEN |
#define | SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE (0x00000000U) |
#define | SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP I2C_CR1_SMBDEN |
#define | SMBUS_SOFTEND_MODE (0x00000000U) |
#define | SMBUS_RELOAD_MODE I2C_CR2_RELOAD |
#define | SMBUS_AUTOEND_MODE I2C_CR2_AUTOEND |
#define | SMBUS_SENDPEC_MODE I2C_CR2_PECBYTE |
#define | SMBUS_NO_STARTSTOP (0x00000000U) |
#define | SMBUS_GENERATE_STOP (uint32_t)(0x80000000U | I2C_CR2_STOP) |
#define | SMBUS_GENERATE_START_READ (uint32_t)(0x80000000U | I2C_CR2_START | I2C_CR2_RD_WRN) |
#define | SMBUS_GENERATE_START_WRITE (uint32_t)(0x80000000U | I2C_CR2_START) |
#define | SMBUS_FIRST_FRAME SMBUS_SOFTEND_MODE |
#define | SMBUS_NEXT_FRAME ((uint32_t)(SMBUS_RELOAD_MODE | SMBUS_SOFTEND_MODE)) |
#define | SMBUS_FIRST_AND_LAST_FRAME_NO_PEC SMBUS_AUTOEND_MODE |
#define | SMBUS_LAST_FRAME_NO_PEC SMBUS_AUTOEND_MODE |
#define | SMBUS_FIRST_AND_LAST_FRAME_WITH_PEC ((uint32_t)(SMBUS_AUTOEND_MODE | SMBUS_SENDPEC_MODE)) |
#define | SMBUS_LAST_FRAME_WITH_PEC ((uint32_t)(SMBUS_AUTOEND_MODE | SMBUS_SENDPEC_MODE)) |
#define | SMBUS_OTHER_FRAME_NO_PEC (0x000000AAU) |
#define | SMBUS_OTHER_FRAME_WITH_PEC (0x0000AA00U) |
#define | SMBUS_OTHER_AND_LAST_FRAME_NO_PEC (0x00AA0000U) |
#define | SMBUS_OTHER_AND_LAST_FRAME_WITH_PEC (0xAA000000U) |
#define | SMBUS_IT_ERRI I2C_CR1_ERRIE |
#define | SMBUS_IT_TCI I2C_CR1_TCIE |
#define | SMBUS_IT_STOPI I2C_CR1_STOPIE |
#define | SMBUS_IT_NACKI I2C_CR1_NACKIE |
#define | SMBUS_IT_ADDRI I2C_CR1_ADDRIE |
#define | SMBUS_IT_RXI I2C_CR1_RXIE |
#define | SMBUS_IT_TXI I2C_CR1_TXIE |
#define | SMBUS_IT_TX (SMBUS_IT_ERRI | SMBUS_IT_TCI | SMBUS_IT_STOPI | SMBUS_IT_NACKI | SMBUS_IT_TXI) |
#define | SMBUS_IT_RX (SMBUS_IT_ERRI | SMBUS_IT_TCI | SMBUS_IT_NACKI | SMBUS_IT_RXI) |
#define | SMBUS_IT_ALERT (SMBUS_IT_ERRI) |
#define | SMBUS_IT_ADDR (SMBUS_IT_ADDRI | SMBUS_IT_STOPI | SMBUS_IT_NACKI) |
#define | SMBUS_FLAG_TXE I2C_ISR_TXE |
#define | SMBUS_FLAG_TXIS I2C_ISR_TXIS |
#define | SMBUS_FLAG_RXNE I2C_ISR_RXNE |
#define | SMBUS_FLAG_ADDR I2C_ISR_ADDR |
#define | SMBUS_FLAG_AF I2C_ISR_NACKF |
#define | SMBUS_FLAG_STOPF I2C_ISR_STOPF |
#define | SMBUS_FLAG_TC I2C_ISR_TC |
#define | SMBUS_FLAG_TCR I2C_ISR_TCR |
#define | SMBUS_FLAG_BERR I2C_ISR_BERR |
#define | SMBUS_FLAG_ARLO I2C_ISR_ARLO |
#define | SMBUS_FLAG_OVR I2C_ISR_OVR |
#define | SMBUS_FLAG_PECERR I2C_ISR_PECERR |
#define | SMBUS_FLAG_TIMEOUT I2C_ISR_TIMEOUT |
#define | SMBUS_FLAG_ALERT I2C_ISR_ALERT |
#define | SMBUS_FLAG_BUSY I2C_ISR_BUSY |
#define | SMBUS_FLAG_DIR I2C_ISR_DIR |
#define | __HAL_SMBUS_RESET_HANDLE_STATE(__HANDLE__) |
Reset SMBUS handle state. | |
#define | __HAL_SMBUS_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__)) |
Enable the specified SMBUS interrupts. | |
#define | __HAL_SMBUS_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__))) |
Disable the specified SMBUS interrupts. | |
#define | __HAL_SMBUS_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) |
Check whether the specified SMBUS interrupt source is enabled or not. | |
#define | SMBUS_FLAG_MASK (0x0001FFFFU) |
Check whether the specified SMBUS flag is set or not. | |
#define | __HAL_SMBUS_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & ((__FLAG__) & SMBUS_FLAG_MASK)) == ((__FLAG__) & SMBUS_FLAG_MASK))) |
#define | __HAL_SMBUS_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) |
Clear the SMBUS pending flags which are cleared by writing 1 in a specific bit. | |
#define | __HAL_SMBUS_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)) |
Enable the specified SMBUS peripheral. | |
#define | __HAL_SMBUS_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)) |
Disable the specified SMBUS peripheral. | |
#define | __HAL_SMBUS_GENERATE_NACK(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR2, I2C_CR2_NACK)) |
Generate a Non-Acknowledge SMBUS peripheral in Slave mode. | |
#define | IS_SMBUS_ANALOG_FILTER(FILTER) |
#define | IS_SMBUS_DIGITAL_FILTER(FILTER) ((FILTER) <= 0x0000000FU) |
#define | IS_SMBUS_ADDRESSING_MODE(MODE) |
#define | IS_SMBUS_DUAL_ADDRESS(ADDRESS) |
#define | IS_SMBUS_OWN_ADDRESS2_MASK(MASK) |
#define | IS_SMBUS_GENERAL_CALL(CALL) |
#define | IS_SMBUS_NO_STRETCH(STRETCH) |
#define | IS_SMBUS_PEC(PEC) |
#define | IS_SMBUS_PERIPHERAL_MODE(MODE) |
#define | IS_SMBUS_TRANSFER_MODE(MODE) |
#define | IS_SMBUS_TRANSFER_REQUEST(REQUEST) |
#define | IS_SMBUS_TRANSFER_OPTIONS_REQUEST(REQUEST) |
#define | IS_SMBUS_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST) |
#define | SMBUS_RESET_CR1(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= (uint32_t)~((uint32_t)(I2C_CR1_SMBHEN | I2C_CR1_SMBDEN | I2C_CR1_PECEN))) |
#define | SMBUS_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_HEAD10R | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_RD_WRN))) |
#define | SMBUS_GENERATE_START(__ADDMODE__, __ADDRESS__) |
#define | SMBUS_GET_ADDR_MATCH(__HANDLE__) (((__HANDLE__)->Instance->ISR & I2C_ISR_ADDCODE) >> 17U) |
#define | SMBUS_GET_DIR(__HANDLE__) (((__HANDLE__)->Instance->ISR & I2C_ISR_DIR) >> 16U) |
#define | SMBUS_GET_STOP_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & I2C_CR2_AUTOEND) |
#define | SMBUS_GET_PEC_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & I2C_CR2_PECBYTE) |
#define | SMBUS_GET_ALERT_ENABLED(__HANDLE__) ((__HANDLE__)->Instance->CR1 & I2C_CR1_ALERTEN) |
#define | SMBUS_GET_ISR_REG(__HANDLE__) ((__HANDLE__)->Instance->ISR) |
#define | SMBUS_CHECK_FLAG(__ISR__, __FLAG__) ((((__ISR__) & ((__FLAG__) & SMBUS_FLAG_MASK)) == ((__FLAG__) & SMBUS_FLAG_MASK))) |
#define | IS_SMBUS_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x000003FFU) |
#define | IS_SMBUS_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FFU) |
Typedefs | |
typedef struct __SMBUS_HandleTypeDef | SMBUS_HandleTypeDef |
typedef void(* | pSMBUS_CallbackTypeDef )(SMBUS_HandleTypeDef *hsmbus) |
HAL SMBUS Callback pointer definition. | |
typedef void(* | pSMBUS_AddrCallbackTypeDef )(SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode) |
Enumerations | |
enum | HAL_SMBUS_CallbackIDTypeDef { HAL_SMBUS_MASTER_TX_COMPLETE_CB_ID = 0x00U, HAL_SMBUS_MASTER_RX_COMPLETE_CB_ID = 0x01U, HAL_SMBUS_SLAVE_TX_COMPLETE_CB_ID = 0x02U, HAL_SMBUS_SLAVE_RX_COMPLETE_CB_ID = 0x03U, HAL_SMBUS_LISTEN_COMPLETE_CB_ID = 0x04U, HAL_SMBUS_ERROR_CB_ID = 0x05U, HAL_SMBUS_MSPINIT_CB_ID = 0x06U, HAL_SMBUS_MSPDEINIT_CB_ID = 0x07U } |
HAL SMBUS Callback ID enumeration definition. More... | |
Functions | |
HAL_StatusTypeDef | HAL_SMBUS_Init (SMBUS_HandleTypeDef *hsmbus) |
Initialize the SMBUS according to the specified parameters in the SMBUS_InitTypeDef and initialize the associated handle. | |
HAL_StatusTypeDef | HAL_SMBUS_DeInit (SMBUS_HandleTypeDef *hsmbus) |
DeInitialize the SMBUS peripheral. | |
__weak void | HAL_SMBUS_MspInit (SMBUS_HandleTypeDef *hsmbus) |
Initialize the SMBUS MSP. | |
__weak void | HAL_SMBUS_MspDeInit (SMBUS_HandleTypeDef *hsmbus) |
DeInitialize the SMBUS MSP. | |
HAL_StatusTypeDef | HAL_SMBUS_ConfigAnalogFilter (SMBUS_HandleTypeDef *hsmbus, uint32_t AnalogFilter) |
Configure Analog noise filter. | |
HAL_StatusTypeDef | HAL_SMBUS_ConfigDigitalFilter (SMBUS_HandleTypeDef *hsmbus, uint32_t DigitalFilter) |
Configure Digital noise filter. | |
HAL_StatusTypeDef | HAL_SMBUS_RegisterCallback (SMBUS_HandleTypeDef *hsmbus, HAL_SMBUS_CallbackIDTypeDef CallbackID, pSMBUS_CallbackTypeDef pCallback) |
Register a User SMBUS Callback To be used instead of the weak predefined callback. | |
HAL_StatusTypeDef | HAL_SMBUS_UnRegisterCallback (SMBUS_HandleTypeDef *hsmbus, HAL_SMBUS_CallbackIDTypeDef CallbackID) |
Unregister an SMBUS Callback SMBUS callback is redirected to the weak predefined callback. | |
HAL_StatusTypeDef | HAL_SMBUS_RegisterAddrCallback (SMBUS_HandleTypeDef *hsmbus, pSMBUS_AddrCallbackTypeDef pCallback) |
Register the Slave Address Match SMBUS Callback To be used instead of the weak HAL_SMBUS_AddrCallback() predefined callback. | |
HAL_StatusTypeDef | HAL_SMBUS_UnRegisterAddrCallback (SMBUS_HandleTypeDef *hsmbus) |
UnRegister the Slave Address Match SMBUS Callback Info Ready SMBUS Callback is redirected to the weak HAL_SMBUS_AddrCallback() predefined callback. | |
HAL_StatusTypeDef | HAL_SMBUS_IsDeviceReady (SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout) |
Check if target device is ready for communication. | |
HAL_StatusTypeDef | HAL_SMBUS_Master_Transmit_IT (SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions) |
Transmit in master/host SMBUS mode an amount of data in non-blocking mode with Interrupt. | |
HAL_StatusTypeDef | HAL_SMBUS_Master_Receive_IT (SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions) |
Receive in master/host SMBUS mode an amount of data in non-blocking mode with Interrupt. | |
HAL_StatusTypeDef | HAL_SMBUS_Master_Abort_IT (SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress) |
Abort a master/host SMBUS process communication with Interrupt. | |
HAL_StatusTypeDef | HAL_SMBUS_Slave_Transmit_IT (SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size, uint32_t XferOptions) |
Transmit in slave/device SMBUS mode an amount of data in non-blocking mode with Interrupt. | |
HAL_StatusTypeDef | HAL_SMBUS_Slave_Receive_IT (SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size, uint32_t XferOptions) |
Receive in slave/device SMBUS mode an amount of data in non-blocking mode with Interrupt. | |
HAL_StatusTypeDef | HAL_SMBUS_EnableAlert_IT (SMBUS_HandleTypeDef *hsmbus) |
Enable the SMBUS alert mode with Interrupt. | |
HAL_StatusTypeDef | HAL_SMBUS_DisableAlert_IT (SMBUS_HandleTypeDef *hsmbus) |
Disable the SMBUS alert mode with Interrupt. | |
HAL_StatusTypeDef | HAL_SMBUS_EnableListen_IT (SMBUS_HandleTypeDef *hsmbus) |
Enable the Address listen mode with Interrupt. | |
HAL_StatusTypeDef | HAL_SMBUS_DisableListen_IT (SMBUS_HandleTypeDef *hsmbus) |
Disable the Address listen mode with Interrupt. | |
void | HAL_SMBUS_EV_IRQHandler (SMBUS_HandleTypeDef *hsmbus) |
Handle SMBUS event interrupt request. | |
void | HAL_SMBUS_ER_IRQHandler (SMBUS_HandleTypeDef *hsmbus) |
Handle SMBUS error interrupt request. | |
__weak void | HAL_SMBUS_MasterTxCpltCallback (SMBUS_HandleTypeDef *hsmbus) |
Master Tx Transfer completed callback. | |
__weak void | HAL_SMBUS_MasterRxCpltCallback (SMBUS_HandleTypeDef *hsmbus) |
Master Rx Transfer completed callback. | |
__weak void | HAL_SMBUS_SlaveTxCpltCallback (SMBUS_HandleTypeDef *hsmbus) |
Slave Tx Transfer completed callback. | |
__weak void | HAL_SMBUS_SlaveRxCpltCallback (SMBUS_HandleTypeDef *hsmbus) |
Slave Rx Transfer completed callback. | |
__weak void | HAL_SMBUS_AddrCallback (SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode) |
Slave Address Match callback. | |
__weak void | HAL_SMBUS_ListenCpltCallback (SMBUS_HandleTypeDef *hsmbus) |
Listen Complete callback. | |
__weak void | HAL_SMBUS_ErrorCallback (SMBUS_HandleTypeDef *hsmbus) |
SMBUS error callback. | |
uint32_t | HAL_SMBUS_GetState (SMBUS_HandleTypeDef *hsmbus) |
Return the SMBUS handle state. | |
uint32_t | HAL_SMBUS_GetError (SMBUS_HandleTypeDef *hsmbus) |
Return the SMBUS error code. |
Header file of SMBUS HAL module.
Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. 3. Neither the name of STMicroelectronics nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Definition in file stm32l4xx_hal_smbus.h.