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STM32L486xx HAL User Manual
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Defines | |
| #define | TIM_DMABURSTLENGTH_1TRANSFER 0x00000000U |
| #define | TIM_DMABURSTLENGTH_2TRANSFERS 0x00000100U |
| #define | TIM_DMABURSTLENGTH_3TRANSFERS 0x00000200U |
| #define | TIM_DMABURSTLENGTH_4TRANSFERS 0x00000300U |
| #define | TIM_DMABURSTLENGTH_5TRANSFERS 0x00000400U |
| #define | TIM_DMABURSTLENGTH_6TRANSFERS 0x00000500U |
| #define | TIM_DMABURSTLENGTH_7TRANSFERS 0x00000600U |
| #define | TIM_DMABURSTLENGTH_8TRANSFERS 0x00000700U |
| #define | TIM_DMABURSTLENGTH_9TRANSFERS 0x00000800U |
| #define | TIM_DMABURSTLENGTH_10TRANSFERS 0x00000900U |
| #define | TIM_DMABURSTLENGTH_11TRANSFERS 0x00000A00U |
| #define | TIM_DMABURSTLENGTH_12TRANSFERS 0x00000B00U |
| #define | TIM_DMABURSTLENGTH_13TRANSFERS 0x00000C00U |
| #define | TIM_DMABURSTLENGTH_14TRANSFERS 0x00000D00U |
| #define | TIM_DMABURSTLENGTH_15TRANSFERS 0x00000E00U |
| #define | TIM_DMABURSTLENGTH_16TRANSFERS 0x00000F00U |
| #define | TIM_DMABURSTLENGTH_17TRANSFERS 0x00001000U |
| #define | TIM_DMABURSTLENGTH_18TRANSFERS 0x00001100U |
| #define TIM_DMABURSTLENGTH_10TRANSFERS 0x00000900U |
The transfer is done to 10 registers starting trom TIMx_CR1 + TIMx_DCR.DBA
Definition at line 1020 of file stm32l4xx_hal_tim.h.
| #define TIM_DMABURSTLENGTH_11TRANSFERS 0x00000A00U |
The transfer is done to 11 registers starting trom TIMx_CR1 + TIMx_DCR.DBA
Definition at line 1021 of file stm32l4xx_hal_tim.h.
| #define TIM_DMABURSTLENGTH_12TRANSFERS 0x00000B00U |
The transfer is done to 12 registers starting trom TIMx_CR1 + TIMx_DCR.DBA
Definition at line 1022 of file stm32l4xx_hal_tim.h.
| #define TIM_DMABURSTLENGTH_13TRANSFERS 0x00000C00U |
The transfer is done to 13 registers starting trom TIMx_CR1 + TIMx_DCR.DBA
Definition at line 1023 of file stm32l4xx_hal_tim.h.
| #define TIM_DMABURSTLENGTH_14TRANSFERS 0x00000D00U |
The transfer is done to 14 registers starting trom TIMx_CR1 + TIMx_DCR.DBA
Definition at line 1024 of file stm32l4xx_hal_tim.h.
| #define TIM_DMABURSTLENGTH_15TRANSFERS 0x00000E00U |
The transfer is done to 15 registers starting trom TIMx_CR1 + TIMx_DCR.DBA
Definition at line 1025 of file stm32l4xx_hal_tim.h.
| #define TIM_DMABURSTLENGTH_16TRANSFERS 0x00000F00U |
The transfer is done to 16 registers starting trom TIMx_CR1 + TIMx_DCR.DBA
Definition at line 1026 of file stm32l4xx_hal_tim.h.
| #define TIM_DMABURSTLENGTH_17TRANSFERS 0x00001000U |
The transfer is done to 17 registers starting trom TIMx_CR1 + TIMx_DCR.DBA
Definition at line 1027 of file stm32l4xx_hal_tim.h.
| #define TIM_DMABURSTLENGTH_18TRANSFERS 0x00001100U |
The transfer is done to 18 registers starting trom TIMx_CR1 + TIMx_DCR.DBA
Definition at line 1028 of file stm32l4xx_hal_tim.h.
| #define TIM_DMABURSTLENGTH_1TRANSFER 0x00000000U |
The transfer is done to 1 register starting trom TIMx_CR1 + TIMx_DCR.DBA
Definition at line 1011 of file stm32l4xx_hal_tim.h.
| #define TIM_DMABURSTLENGTH_2TRANSFERS 0x00000100U |
The transfer is done to 2 registers starting trom TIMx_CR1 + TIMx_DCR.DBA
Definition at line 1012 of file stm32l4xx_hal_tim.h.
| #define TIM_DMABURSTLENGTH_3TRANSFERS 0x00000200U |
The transfer is done to 3 registers starting trom TIMx_CR1 + TIMx_DCR.DBA
Definition at line 1013 of file stm32l4xx_hal_tim.h.
| #define TIM_DMABURSTLENGTH_4TRANSFERS 0x00000300U |
The transfer is done to 4 registers starting trom TIMx_CR1 + TIMx_DCR.DBA
Definition at line 1014 of file stm32l4xx_hal_tim.h.
| #define TIM_DMABURSTLENGTH_5TRANSFERS 0x00000400U |
The transfer is done to 5 registers starting trom TIMx_CR1 + TIMx_DCR.DBA
Definition at line 1015 of file stm32l4xx_hal_tim.h.
| #define TIM_DMABURSTLENGTH_6TRANSFERS 0x00000500U |
The transfer is done to 6 registers starting trom TIMx_CR1 + TIMx_DCR.DBA
Definition at line 1016 of file stm32l4xx_hal_tim.h.
| #define TIM_DMABURSTLENGTH_7TRANSFERS 0x00000600U |
The transfer is done to 7 registers starting trom TIMx_CR1 + TIMx_DCR.DBA
Definition at line 1017 of file stm32l4xx_hal_tim.h.
| #define TIM_DMABURSTLENGTH_8TRANSFERS 0x00000700U |
The transfer is done to 8 registers starting trom TIMx_CR1 + TIMx_DCR.DBA
Definition at line 1018 of file stm32l4xx_hal_tim.h.
| #define TIM_DMABURSTLENGTH_9TRANSFERS 0x00000800U |
The transfer is done to 9 registers starting trom TIMx_CR1 + TIMx_DCR.DBA
Definition at line 1019 of file stm32l4xx_hal_tim.h.
1.7.6.1