Defines
#define	__HAL_SYSCFG_REMAPMEMORY_FLASH() CLEAR_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_MODE)
	Main Flash memory mapped at 0x00000000.
#define	__HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH() MODIFY_REG(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_MODE, SYSCFG_MEMRMP_MEM_MODE_0)
	System Flash memory mapped at 0x00000000.
#define	__HAL_SYSCFG_REMAPMEMORY_SRAM() MODIFY_REG(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_MODE, (SYSCFG_MEMRMP_MEM_MODE_1\|SYSCFG_MEMRMP_MEM_MODE_0))
	Embedded SRAM mapped at 0x00000000.
#define	__HAL_SYSCFG_REMAPMEMORY_FMC() MODIFY_REG(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_MODE, SYSCFG_MEMRMP_MEM_MODE_1)
	FMC Bank1 (NOR/PSRAM 1 and 2) mapped at 0x00000000.
#define	__HAL_SYSCFG_REMAPMEMORY_QUADSPI() MODIFY_REG(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_MODE, (SYSCFG_MEMRMP_MEM_MODE_2\|SYSCFG_MEMRMP_MEM_MODE_1))
	QUADSPI mapped at 0x00000000.
#define	__HAL_SYSCFG_GET_BOOT_MODE() READ_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_MODE)
	Return the boot mode as configured by user.
#define	__HAL_SYSCFG_SRAM2_WRP_1_31_ENABLE(__SRAM2WRP__)
	SRAM2 page 0 to 31 write protection enable macro.
#define	__HAL_SYSCFG_SRAM2_WRP_UNLOCK()
	SRAM2 page write protection unlock prior to erase.
#define	__HAL_SYSCFG_SRAM2_ERASE() SET_BIT(SYSCFG->SCSR, SYSCFG_SCSR_SRAM2ER)
	SRAM2 erase.
#define	__HAL_SYSCFG_FPU_INTERRUPT_ENABLE(__INTERRUPT__)
	Floating Point Unit interrupt enable/disable macros.
#define	__HAL_SYSCFG_FPU_INTERRUPT_DISABLE(__INTERRUPT__)
#define	__HAL_SYSCFG_BREAK_ECC_LOCK() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_ECCL)
	SYSCFG Break ECC lock.
#define	__HAL_SYSCFG_BREAK_LOCKUP_LOCK() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_CLL)
	SYSCFG Break Cortex-M4 Lockup lock.
#define	__HAL_SYSCFG_BREAK_PVD_LOCK() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_PVDL)
	SYSCFG Break PVD lock.
#define	__HAL_SYSCFG_BREAK_SRAM2PARITY_LOCK() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_SPL)
	SYSCFG Break SRAM2 parity lock.
#define	__HAL_SYSCFG_GET_FLAG(__FLAG__) ((((((__FLAG__) == SYSCFG_SCSR_SRAM2BSY)? SYSCFG->SCSR : SYSCFG->CFGR2) & (__FLAG__))!= 0) ? 1 : 0)
	Check SYSCFG flag is set or not.
#define	__HAL_SYSCFG_CLEAR_FLAG() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_SPF)
	Set the SPF bit to clear the SRAM Parity Error Flag.
#define	__HAL_SYSCFG_FASTMODEPLUS_ENABLE(__FASTMODEPLUS__)
	Fast-mode Plus driving capability enable/disable macros.
#define	__HAL_SYSCFG_FASTMODEPLUS_DISABLE(__FASTMODEPLUS__)

Define Documentation

#define __HAL_SYSCFG_BREAK_ECC_LOCK ( ) SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_ECCL)

SYSCFG Break ECC lock.

Enable and lock the connection of Flash ECC error connection to TIM1/8/15/16/17 Break input.

Note:: The selected configuration is locked and can be unlocked only by system reset.

Definition at line 467 of file stm32l4xx_hal.h.

#define __HAL_SYSCFG_BREAK_LOCKUP_LOCK ( ) SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_CLL)

SYSCFG Break Cortex-M4 Lockup lock.

Enable and lock the connection of Cortex-M4 LOCKUP (Hardfault) output to TIM1/8/15/16/17 Break input.

Note:: The selected configuration is locked and can be unlocked only by system reset.

Definition at line 473 of file stm32l4xx_hal.h.

#define __HAL_SYSCFG_BREAK_PVD_LOCK ( ) SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_PVDL)

SYSCFG Break PVD lock.

Enable and lock the PVD connection to Timer1/8/15/16/17 Break input, as well as the PVDE and PLS[2:0] in the PWR_CR2 register.

Note:: The selected configuration is locked and can be unlocked only by system reset.

Definition at line 479 of file stm32l4xx_hal.h.

#define __HAL_SYSCFG_BREAK_SRAM2PARITY_LOCK ( ) SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_SPL)

SYSCFG Break SRAM2 parity lock.

Enable and lock the SRAM2 parity error signal connection to TIM1/8/15/16/17 Break input.

Note:: The selected configuration is locked and can be unlocked by system reset.

Definition at line 485 of file stm32l4xx_hal.h.

#define __HAL_SYSCFG_CLEAR_FLAG ( ) SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_SPF)

Set the SPF bit to clear the SRAM Parity Error Flag.

Definition at line 498 of file stm32l4xx_hal.h.

#define __HAL_SYSCFG_FASTMODEPLUS_DISABLE ( __FASTMODEPLUS__ )

Value:

do {assert_param(IS_SYSCFG_FASTMODEPLUS((__FASTMODEPLUS__)));\
                                                                CLEAR_BIT(SYSCFG->CFGR1, (__FASTMODEPLUS__));\
                                                               }while(0)

Definition at line 511 of file stm32l4xx_hal.h.

#define __HAL_SYSCFG_FASTMODEPLUS_ENABLE ( __FASTMODEPLUS__ )

Value:

do {assert_param(IS_SYSCFG_FASTMODEPLUS((__FASTMODEPLUS__)));\
                                                                SET_BIT(SYSCFG->CFGR1, (__FASTMODEPLUS__));\
                                                               }while(0)

Fast-mode Plus driving capability enable/disable macros.

Parameters:

__FASTMODEPLUS__

This parameter can be a value of :

SYSCFG_FASTMODEPLUS_PB6 Fast-mode Plus driving capability activation on PB6
SYSCFG_FASTMODEPLUS_PB7 Fast-mode Plus driving capability activation on PB7
SYSCFG_FASTMODEPLUS_PB8 Fast-mode Plus driving capability activation on PB8
SYSCFG_FASTMODEPLUS_PB9 Fast-mode Plus driving capability activation on PB9

Definition at line 507 of file stm32l4xx_hal.h.

#define __HAL_SYSCFG_FPU_INTERRUPT_DISABLE ( __INTERRUPT__ )

Value:

do {assert_param(IS_SYSCFG_FPU_INTERRUPT((__INTERRUPT__)));\
                                                                CLEAR_BIT(SYSCFG->CFGR1, (__INTERRUPT__));\
                                                            }while(0)

Definition at line 459 of file stm32l4xx_hal.h.

#define __HAL_SYSCFG_FPU_INTERRUPT_ENABLE ( __INTERRUPT__ )

Value:

do {assert_param(IS_SYSCFG_FPU_INTERRUPT((__INTERRUPT__)));\
                                                                SET_BIT(SYSCFG->CFGR1, (__INTERRUPT__));\
                                                            }while(0)

Floating Point Unit interrupt enable/disable macros.

Parameters:

__INTERRUPT__ This parameter can be a value of FPU Interrupts

Definition at line 455 of file stm32l4xx_hal.h.

#define __HAL_SYSCFG_GET_BOOT_MODE ( ) READ_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_MODE)

Return the boot mode as configured by user.

Return values:

The	boot mode as configured by user. The returned value can be one of the following values: SYSCFG_BOOT_MAINFLASH SYSCFG_BOOT_SYSTEMFLASH SYSCFG_BOOT_FMC SYSCFG_BOOT_SRAM SYSCFG_BOOT_QUADSPI

Definition at line 420 of file stm32l4xx_hal.h.

#define __HAL_SYSCFG_GET_FLAG ( __FLAG__ ) ((((((__FLAG__) == SYSCFG_SCSR_SRAM2BSY)? SYSCFG->SCSR : SYSCFG->CFGR2) & (__FLAG__))!= 0) ? 1 : 0)

Check SYSCFG flag is set or not.

Parameters:

__FLAG__

specifies the flag to check. This parameter can be one of the following values:

SYSCFG_FLAG_SRAM2_PE SRAM2 Parity Error Flag
SYSCFG_FLAG_SRAM2_BUSY SRAM2 Erase Ongoing

Return values:

The	new state of __FLAG__ (TRUE or FALSE).

Definition at line 494 of file stm32l4xx_hal.h.

#define __HAL_SYSCFG_REMAPMEMORY_FLASH ( ) CLEAR_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_MODE)

Main Flash memory mapped at 0x00000000.

Definition at line 371 of file stm32l4xx_hal.h.

#define __HAL_SYSCFG_REMAPMEMORY_FMC ( ) MODIFY_REG(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_MODE, SYSCFG_MEMRMP_MEM_MODE_1)

FMC Bank1 (NOR/PSRAM 1 and 2) mapped at 0x00000000.

Definition at line 387 of file stm32l4xx_hal.h.

#define __HAL_SYSCFG_REMAPMEMORY_QUADSPI ( ) MODIFY_REG(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_MODE, (SYSCFG_MEMRMP_MEM_MODE_2|SYSCFG_MEMRMP_MEM_MODE_1))

QUADSPI mapped at 0x00000000.

Definition at line 404 of file stm32l4xx_hal.h.

#define __HAL_SYSCFG_REMAPMEMORY_SRAM ( ) MODIFY_REG(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_MODE, (SYSCFG_MEMRMP_MEM_MODE_1|SYSCFG_MEMRMP_MEM_MODE_0))

Embedded SRAM mapped at 0x00000000.

Definition at line 379 of file stm32l4xx_hal.h.

#define __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH ( ) MODIFY_REG(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_MODE, SYSCFG_MEMRMP_MEM_MODE_0)

System Flash memory mapped at 0x00000000.

Definition at line 375 of file stm32l4xx_hal.h.

#define __HAL_SYSCFG_SRAM2_ERASE ( ) SET_BIT(SYSCFG->SCSR, SYSCFG_SCSR_SRAM2ER)

SRAM2 erase.

Note:: __SYSCFG_GET_FLAG(SYSCFG_FLAG_SRAM2_BUSY) may be used to check end of erase

Definition at line 450 of file stm32l4xx_hal.h.

#define __HAL_SYSCFG_SRAM2_WRP_1_31_ENABLE ( __SRAM2WRP__ )

Value:

do {assert_param(IS_SYSCFG_SRAM2WRP_PAGE((__SRAM2WRP__)));\
                                                                SET_BIT(SYSCFG->SWPR, (__SRAM2WRP__));\
                                                            }while(0)

SRAM2 page 0 to 31 write protection enable macro.

Parameters:

__SRAM2WRP__ This parameter can be a combination of values of SRAM2 Page Write protection (0 to 31)

Note:: Write protection can only be disabled by a system reset

Definition at line 426 of file stm32l4xx_hal.h.

#define __HAL_SYSCFG_SRAM2_WRP_UNLOCK ( )

Value:

do {SYSCFG->SKR = 0xCA;\
                                                 SYSCFG->SKR = 0x53;\
                                                }while(0)

SRAM2 page write protection unlock prior to erase.

Note:: Writing a wrong key reactivates the write protection

Definition at line 443 of file stm32l4xx_hal.h.

Defines

Define Documentation