STM32L486xx HAL User Manual
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Check whether the APB2 peripheral clock during Low Power (Sleep) mode is enabled or not. More...
Defines | |
#define | __HAL_RCC_SYSCFG_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SYSCFGSMEN) != RESET) |
#define | __HAL_RCC_SDMMC1_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SDMMC1SMEN) != RESET) |
#define | __HAL_RCC_TIM1_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM1SMEN) != RESET) |
#define | __HAL_RCC_SPI1_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SPI1SMEN) != RESET) |
#define | __HAL_RCC_TIM8_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM8SMEN) != RESET) |
#define | __HAL_RCC_USART1_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_USART1SMEN) != RESET) |
#define | __HAL_RCC_TIM15_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM15SMEN) != RESET) |
#define | __HAL_RCC_TIM16_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM16SMEN) != RESET) |
#define | __HAL_RCC_TIM17_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM17SMEN) != RESET) |
#define | __HAL_RCC_SAI1_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SAI1SMEN) != RESET) |
#define | __HAL_RCC_SAI2_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SAI2SMEN) != RESET) |
#define | __HAL_RCC_DFSDM1_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_DFSDM1SMEN) != RESET) |
#define | __HAL_RCC_SYSCFG_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SYSCFGSMEN) == RESET) |
#define | __HAL_RCC_SDMMC1_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SDMMC1SMEN) == RESET) |
#define | __HAL_RCC_TIM1_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM1SMEN) == RESET) |
#define | __HAL_RCC_SPI1_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SPI1SMEN) == RESET) |
#define | __HAL_RCC_TIM8_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM8SMEN) == RESET) |
#define | __HAL_RCC_USART1_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_USART1SMEN) == RESET) |
#define | __HAL_RCC_TIM15_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM15SMEN) == RESET) |
#define | __HAL_RCC_TIM16_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM16SMEN) == RESET) |
#define | __HAL_RCC_TIM17_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM17SMEN) == RESET) |
#define | __HAL_RCC_SAI1_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SAI1SMEN) == RESET) |
#define | __HAL_RCC_SAI2_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SAI2SMEN) == RESET) |
#define | __HAL_RCC_DFSDM1_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_DFSDM1SMEN) == RESET) |
Check whether the APB2 peripheral clock during Low Power (Sleep) mode is enabled or not.
#define __HAL_RCC_DFSDM1_IS_CLK_SLEEP_DISABLED | ( | ) | (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_DFSDM1SMEN) == RESET) |
Definition at line 3628 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_DFSDM1_IS_CLK_SLEEP_ENABLED | ( | ) | (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_DFSDM1SMEN) != RESET) |
Definition at line 3585 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_SAI1_IS_CLK_SLEEP_DISABLED | ( | ) | (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SAI1SMEN) == RESET) |
Definition at line 3621 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_SAI1_IS_CLK_SLEEP_ENABLED | ( | ) | (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SAI1SMEN) != RESET) |
Definition at line 3578 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_SAI2_IS_CLK_SLEEP_DISABLED | ( | ) | (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SAI2SMEN) == RESET) |
Definition at line 3624 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_SAI2_IS_CLK_SLEEP_ENABLED | ( | ) | (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SAI2SMEN) != RESET) |
Definition at line 3581 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_SDMMC1_IS_CLK_SLEEP_DISABLED | ( | ) | (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SDMMC1SMEN) == RESET) |
Definition at line 3600 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_SDMMC1_IS_CLK_SLEEP_ENABLED | ( | ) | (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SDMMC1SMEN) != RESET) |
Definition at line 3557 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_SPI1_IS_CLK_SLEEP_DISABLED | ( | ) | (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SPI1SMEN) == RESET) |
Definition at line 3605 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_SPI1_IS_CLK_SLEEP_ENABLED | ( | ) | (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SPI1SMEN) != RESET) |
Definition at line 3562 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_SYSCFG_IS_CLK_SLEEP_DISABLED | ( | ) | (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SYSCFGSMEN) == RESET) |
Definition at line 3597 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_SYSCFG_IS_CLK_SLEEP_ENABLED | ( | ) | (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SYSCFGSMEN) != RESET) |
Definition at line 3554 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_TIM15_IS_CLK_SLEEP_DISABLED | ( | ) | (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM15SMEN) == RESET) |
Definition at line 3613 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_TIM15_IS_CLK_SLEEP_ENABLED | ( | ) | (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM15SMEN) != RESET) |
Definition at line 3570 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_TIM16_IS_CLK_SLEEP_DISABLED | ( | ) | (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM16SMEN) == RESET) |
Definition at line 3615 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_TIM16_IS_CLK_SLEEP_ENABLED | ( | ) | (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM16SMEN) != RESET) |
Definition at line 3572 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_TIM17_IS_CLK_SLEEP_DISABLED | ( | ) | (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM17SMEN) == RESET) |
Definition at line 3618 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_TIM17_IS_CLK_SLEEP_ENABLED | ( | ) | (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM17SMEN) != RESET) |
Definition at line 3575 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_TIM1_IS_CLK_SLEEP_DISABLED | ( | ) | (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM1SMEN) == RESET) |
Definition at line 3603 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_TIM1_IS_CLK_SLEEP_ENABLED | ( | ) | (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM1SMEN) != RESET) |
Definition at line 3560 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_TIM8_IS_CLK_SLEEP_DISABLED | ( | ) | (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM8SMEN) == RESET) |
Definition at line 3608 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_TIM8_IS_CLK_SLEEP_ENABLED | ( | ) | (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_TIM8SMEN) != RESET) |
Definition at line 3565 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_USART1_IS_CLK_SLEEP_DISABLED | ( | ) | (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_USART1SMEN) == RESET) |
Definition at line 3611 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_USART1_IS_CLK_SLEEP_ENABLED | ( | ) | (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_USART1SMEN) != RESET) |
Definition at line 3568 of file stm32l4xx_hal_rcc.h.