STM32L486xx HAL User Manual
Defines
APB2 Peripheral Clock Enable Disable
RCC Exported Macros

Enable or disable the APB2 peripheral clock. More...

Defines

#define __HAL_RCC_SYSCFG_CLK_ENABLE()
#define __HAL_RCC_FIREWALL_CLK_ENABLE()
#define __HAL_RCC_SDMMC1_CLK_ENABLE()
#define __HAL_RCC_TIM1_CLK_ENABLE()
#define __HAL_RCC_SPI1_CLK_ENABLE()
#define __HAL_RCC_TIM8_CLK_ENABLE()
#define __HAL_RCC_USART1_CLK_ENABLE()
#define __HAL_RCC_TIM15_CLK_ENABLE()
#define __HAL_RCC_TIM16_CLK_ENABLE()
#define __HAL_RCC_TIM17_CLK_ENABLE()
#define __HAL_RCC_SAI1_CLK_ENABLE()
#define __HAL_RCC_SAI2_CLK_ENABLE()
#define __HAL_RCC_DFSDM1_CLK_ENABLE()
#define __HAL_RCC_SYSCFG_CLK_DISABLE()   CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_SYSCFGEN)
#define __HAL_RCC_SDMMC1_CLK_DISABLE()   CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_SDMMC1EN)
#define __HAL_RCC_TIM1_CLK_DISABLE()   CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM1EN)
#define __HAL_RCC_SPI1_CLK_DISABLE()   CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI1EN)
#define __HAL_RCC_TIM8_CLK_DISABLE()   CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN)
#define __HAL_RCC_USART1_CLK_DISABLE()   CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN)
#define __HAL_RCC_TIM15_CLK_DISABLE()   CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM15EN)
#define __HAL_RCC_TIM16_CLK_DISABLE()   CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM16EN)
#define __HAL_RCC_TIM17_CLK_DISABLE()   CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM17EN)
#define __HAL_RCC_SAI1_CLK_DISABLE()   CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN)
#define __HAL_RCC_SAI2_CLK_DISABLE()   CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI2EN)
#define __HAL_RCC_DFSDM1_CLK_DISABLE()   CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_DFSDM1EN)

Detailed Description

Enable or disable the APB2 peripheral clock.

Note:
After reset, the peripheral clock (used for registers read/write access) is disabled and the application software has to enable this clock before using it.

Define Documentation

#define __HAL_RCC_DFSDM1_CLK_DISABLE ( )    CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_DFSDM1EN)

Definition at line 1563 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_DFSDM1_CLK_ENABLE ( )
Value:
do { \
                                                 __IO uint32_t tmpreg; \
                                                 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_DFSDM1EN); \
                                                 /* Delay after an RCC peripheral clock enabling */ \
                                                 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_DFSDM1EN); \
                                                 UNUSED(tmpreg); \
                                               } while(0)

Definition at line 1502 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_FIREWALL_CLK_ENABLE ( )
Value:
do { \
                                                 __IO uint32_t tmpreg; \
                                                 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_FWEN); \
                                                 /* Delay after an RCC peripheral clock enabling */ \
                                                 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_FWEN); \
                                                 UNUSED(tmpreg); \
                                               } while(0)

Definition at line 1404 of file stm32l4xx_hal_rcc.h.

Referenced by HAL_FIREWALL_Config(), and HAL_FIREWALL_GetConfig().

#define __HAL_RCC_SAI1_CLK_DISABLE ( )    CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN)

Definition at line 1556 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_SAI1_CLK_ENABLE ( )
Value:
do { \
                                                 __IO uint32_t tmpreg; \
                                                 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN); \
                                                 /* Delay after an RCC peripheral clock enabling */ \
                                                 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN); \
                                                 UNUSED(tmpreg); \
                                               } while(0)

Definition at line 1483 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_SAI2_CLK_DISABLE ( )    CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI2EN)

Definition at line 1559 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_SAI2_CLK_ENABLE ( )
Value:
do { \
                                                 __IO uint32_t tmpreg; \
                                                 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI2EN); \
                                                 /* Delay after an RCC peripheral clock enabling */ \
                                                 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI2EN); \
                                                 UNUSED(tmpreg); \
                                               } while(0)

Definition at line 1492 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_SDMMC1_CLK_DISABLE ( )    CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_SDMMC1EN)

Definition at line 1535 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_SDMMC1_CLK_ENABLE ( )
Value:
do { \
                                                 __IO uint32_t tmpreg; \
                                                 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SDMMC1EN); \
                                                 /* Delay after an RCC peripheral clock enabling */ \
                                                 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SDMMC1EN); \
                                                 UNUSED(tmpreg); \
                                               } while(0)

Definition at line 1413 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_SPI1_CLK_DISABLE ( )    CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI1EN)

Definition at line 1540 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_SPI1_CLK_ENABLE ( )
Value:
do { \
                                                 __IO uint32_t tmpreg; \
                                                 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI1EN); \
                                                 /* Delay after an RCC peripheral clock enabling */ \
                                                 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI1EN); \
                                                 UNUSED(tmpreg); \
                                               } while(0)

Definition at line 1430 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_SYSCFG_CLK_DISABLE ( )    CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_SYSCFGEN)

Definition at line 1532 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_SYSCFG_CLK_ENABLE ( )
Value:
do { \
                                                 __IO uint32_t tmpreg; \
                                                 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SYSCFGEN); \
                                                 /* Delay after an RCC peripheral clock enabling */ \
                                                 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SYSCFGEN); \
                                                 UNUSED(tmpreg); \
                                               } while(0)

Definition at line 1396 of file stm32l4xx_hal_rcc.h.

Referenced by HAL_COMP_Init(), HAL_GPIO_Init(), HAL_I2CEx_DisableFastModePlus(), and HAL_I2CEx_EnableFastModePlus().

#define __HAL_RCC_TIM15_CLK_DISABLE ( )    CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM15EN)

Definition at line 1548 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_TIM15_CLK_ENABLE ( )
Value:
do { \
                                                 __IO uint32_t tmpreg; \
                                                 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM15EN); \
                                                 /* Delay after an RCC peripheral clock enabling */ \
                                                 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM15EN); \
                                                 UNUSED(tmpreg); \
                                               } while(0)

Definition at line 1457 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_TIM16_CLK_DISABLE ( )    CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM16EN)

Definition at line 1550 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_TIM16_CLK_ENABLE ( )
Value:
do { \
                                                 __IO uint32_t tmpreg; \
                                                 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM16EN); \
                                                 /* Delay after an RCC peripheral clock enabling */ \
                                                 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM16EN); \
                                                 UNUSED(tmpreg); \
                                               } while(0)

Definition at line 1465 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_TIM17_CLK_DISABLE ( )    CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM17EN)

Definition at line 1553 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_TIM17_CLK_ENABLE ( )
Value:
do { \
                                                 __IO uint32_t tmpreg; \
                                                 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM17EN); \
                                                 /* Delay after an RCC peripheral clock enabling */ \
                                                 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM17EN); \
                                                 UNUSED(tmpreg); \
                                               } while(0)

Definition at line 1474 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_TIM1_CLK_DISABLE ( )    CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM1EN)

Definition at line 1538 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_TIM1_CLK_ENABLE ( )
Value:
do { \
                                                 __IO uint32_t tmpreg; \
                                                 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM1EN); \
                                                 /* Delay after an RCC peripheral clock enabling */ \
                                                 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM1EN); \
                                                 UNUSED(tmpreg); \
                                               } while(0)

Definition at line 1422 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_TIM8_CLK_DISABLE ( )    CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN)

Definition at line 1543 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_TIM8_CLK_ENABLE ( )
Value:
do { \
                                                 __IO uint32_t tmpreg; \
                                                 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN); \
                                                 /* Delay after an RCC peripheral clock enabling */ \
                                                 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN); \
                                                 UNUSED(tmpreg); \
                                               } while(0)

Definition at line 1439 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_USART1_CLK_DISABLE ( )    CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN)

Definition at line 1546 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_USART1_CLK_ENABLE ( )
Value:
do { \
                                                 __IO uint32_t tmpreg; \
                                                 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN); \
                                                 /* Delay after an RCC peripheral clock enabling */ \
                                                 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN); \
                                                 UNUSED(tmpreg); \
                                               } while(0)

Definition at line 1448 of file stm32l4xx_hal_rcc.h.

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