Check whether the APB1 peripheral clock during Low Power (Sleep) mode is enabled or not. More...

Defines
#define	__HAL_RCC_TIM2_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM2SMEN) != RESET)
#define	__HAL_RCC_TIM3_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM3SMEN) != RESET)
#define	__HAL_RCC_TIM4_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM4SMEN) != RESET)
#define	__HAL_RCC_TIM5_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM5SMEN) != RESET)
#define	__HAL_RCC_TIM6_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM6SMEN) != RESET)
#define	__HAL_RCC_TIM7_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM7SMEN) != RESET)
#define	__HAL_RCC_LCD_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_LCDSMEN) != RESET)
#define	__HAL_RCC_WWDG_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_WWDGSMEN) != RESET)
#define	__HAL_RCC_SPI2_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_SPI2SMEN) != RESET)
#define	__HAL_RCC_SPI3_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_SPI3SMEN) != RESET)
#define	__HAL_RCC_USART2_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_USART2SMEN) != RESET)
#define	__HAL_RCC_USART3_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_USART3SMEN) != RESET)
#define	__HAL_RCC_UART4_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_UART4SMEN) != RESET)
#define	__HAL_RCC_UART5_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_UART5SMEN) != RESET)
#define	__HAL_RCC_I2C1_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_I2C1SMEN) != RESET)
#define	__HAL_RCC_I2C2_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_I2C2SMEN) != RESET)
#define	__HAL_RCC_I2C3_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_I2C3SMEN) != RESET)
#define	__HAL_RCC_CAN1_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_CAN1SMEN) != RESET)
#define	__HAL_RCC_PWR_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_PWRSMEN) != RESET)
#define	__HAL_RCC_DAC1_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_DAC1SMEN) != RESET)
#define	__HAL_RCC_OPAMP_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_OPAMPSMEN) != RESET)
#define	__HAL_RCC_LPTIM1_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_LPTIM1SMEN) != RESET)
#define	__HAL_RCC_LPUART1_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR2, RCC_APB1SMENR2_LPUART1SMEN) != RESET)
#define	__HAL_RCC_SWPMI1_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR2, RCC_APB1SMENR2_SWPMI1SMEN) != RESET)
#define	__HAL_RCC_LPTIM2_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB1SMENR2, RCC_APB1SMENR2_LPTIM2SMEN) != RESET)
#define	__HAL_RCC_TIM2_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM2SMEN) == RESET)
#define	__HAL_RCC_TIM3_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM3SMEN) == RESET)
#define	__HAL_RCC_TIM4_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM4SMEN) == RESET)
#define	__HAL_RCC_TIM5_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM5SMEN) == RESET)
#define	__HAL_RCC_TIM6_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM6SMEN) == RESET)
#define	__HAL_RCC_TIM7_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM7SMEN) == RESET)
#define	__HAL_RCC_LCD_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_LCDSMEN) == RESET)
#define	__HAL_RCC_WWDG_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_WWDGSMEN) == RESET)
#define	__HAL_RCC_SPI2_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_SPI2SMEN) == RESET)
#define	__HAL_RCC_SPI3_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_SPI3SMEN) == RESET)
#define	__HAL_RCC_USART2_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_USART2SMEN) == RESET)
#define	__HAL_RCC_USART3_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_USART3SMEN) == RESET)
#define	__HAL_RCC_UART4_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_UART4SMEN) == RESET)
#define	__HAL_RCC_UART5_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_UART5SMEN) == RESET)
#define	__HAL_RCC_I2C1_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_I2C1SMEN) == RESET)
#define	__HAL_RCC_I2C2_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_I2C2SMEN) == RESET)
#define	__HAL_RCC_I2C3_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_I2C3SMEN) == RESET)
#define	__HAL_RCC_CAN1_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_CAN1SMEN) == RESET)
#define	__HAL_RCC_PWR_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_PWRSMEN) == RESET)
#define	__HAL_RCC_DAC1_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_DAC1SMEN) == RESET)
#define	__HAL_RCC_OPAMP_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_OPAMPSMEN) == RESET)
#define	__HAL_RCC_LPTIM1_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_LPTIM1SMEN) == RESET)
#define	__HAL_RCC_LPUART1_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR2, RCC_APB1SMENR2_LPUART1SMEN) == RESET)
#define	__HAL_RCC_SWPMI1_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR2, RCC_APB1SMENR2_SWPMI1SMEN) == RESET)
#define	__HAL_RCC_LPTIM2_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB1SMENR2, RCC_APB1SMENR2_LPTIM2SMEN) == RESET)

Detailed Description

Check whether the APB1 peripheral clock during Low Power (Sleep) mode is enabled or not.

Note:: Peripheral clock gating in SLEEP mode can be used to further reduce power consumption.; After wakeup from SLEEP mode, the peripheral clock is enabled again.; By default, all peripheral clocks are enabled during SLEEP mode.

Define Documentation

#define __HAL_RCC_CAN1_IS_CLK_SLEEP_DISABLED ( ) (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_CAN1SMEN) == RESET)

Definition at line 3515 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_CAN1_IS_CLK_SLEEP_ENABLED ( ) (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_CAN1SMEN) != RESET)

Definition at line 3424 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_DAC1_IS_CLK_SLEEP_DISABLED ( ) (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_DAC1SMEN) == RESET)

Definition at line 3527 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_DAC1_IS_CLK_SLEEP_ENABLED ( ) (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_DAC1SMEN) != RESET)

Definition at line 3436 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_I2C1_IS_CLK_SLEEP_DISABLED ( ) (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_I2C1SMEN) == RESET)

Definition at line 3499 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_I2C1_IS_CLK_SLEEP_ENABLED ( ) (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_I2C1SMEN) != RESET)

Definition at line 3408 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_I2C2_IS_CLK_SLEEP_DISABLED ( ) (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_I2C2SMEN) == RESET)

Definition at line 3502 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_I2C2_IS_CLK_SLEEP_ENABLED ( ) (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_I2C2SMEN) != RESET)

Definition at line 3411 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_I2C3_IS_CLK_SLEEP_DISABLED ( ) (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_I2C3SMEN) == RESET)

Definition at line 3505 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_I2C3_IS_CLK_SLEEP_ENABLED ( ) (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_I2C3SMEN) != RESET)

Definition at line 3414 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_LCD_IS_CLK_SLEEP_DISABLED ( ) (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_LCDSMEN) == RESET)

Definition at line 3470 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_LCD_IS_CLK_SLEEP_ENABLED ( ) (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_LCDSMEN) != RESET)

Definition at line 3379 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_LPTIM1_IS_CLK_SLEEP_DISABLED ( ) (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_LPTIM1SMEN) == RESET)

Definition at line 3531 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_LPTIM1_IS_CLK_SLEEP_ENABLED ( ) (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_LPTIM1SMEN) != RESET)

Definition at line 3440 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_LPTIM2_IS_CLK_SLEEP_DISABLED ( ) (READ_BIT(RCC->APB1SMENR2, RCC_APB1SMENR2_LPTIM2SMEN) == RESET)

Definition at line 3539 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_LPTIM2_IS_CLK_SLEEP_ENABLED ( ) (READ_BIT(RCC->APB1SMENR2, RCC_APB1SMENR2_LPTIM2SMEN) != RESET)

Definition at line 3448 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_LPUART1_IS_CLK_SLEEP_DISABLED ( ) (READ_BIT(RCC->APB1SMENR2, RCC_APB1SMENR2_LPUART1SMEN) == RESET)

Definition at line 3533 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_LPUART1_IS_CLK_SLEEP_ENABLED ( ) (READ_BIT(RCC->APB1SMENR2, RCC_APB1SMENR2_LPUART1SMEN) != RESET)

Definition at line 3442 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_OPAMP_IS_CLK_SLEEP_DISABLED ( ) (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_OPAMPSMEN) == RESET)

Definition at line 3529 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_OPAMP_IS_CLK_SLEEP_ENABLED ( ) (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_OPAMPSMEN) != RESET)

Definition at line 3438 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_PWR_IS_CLK_SLEEP_DISABLED ( ) (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_PWRSMEN) == RESET)

Definition at line 3525 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_PWR_IS_CLK_SLEEP_ENABLED ( ) (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_PWRSMEN) != RESET)

Definition at line 3434 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_SPI2_IS_CLK_SLEEP_DISABLED ( ) (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_SPI2SMEN) == RESET)

Definition at line 3480 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_SPI2_IS_CLK_SLEEP_ENABLED ( ) (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_SPI2SMEN) != RESET)

Definition at line 3389 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_SPI3_IS_CLK_SLEEP_DISABLED ( ) (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_SPI3SMEN) == RESET)

Definition at line 3483 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_SPI3_IS_CLK_SLEEP_ENABLED ( ) (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_SPI3SMEN) != RESET)

Definition at line 3392 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_SWPMI1_IS_CLK_SLEEP_DISABLED ( ) (READ_BIT(RCC->APB1SMENR2, RCC_APB1SMENR2_SWPMI1SMEN) == RESET)

Definition at line 3536 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_SWPMI1_IS_CLK_SLEEP_ENABLED ( ) (READ_BIT(RCC->APB1SMENR2, RCC_APB1SMENR2_SWPMI1SMEN) != RESET)

Definition at line 3445 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_TIM2_IS_CLK_SLEEP_DISABLED ( ) (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM2SMEN) == RESET)

Definition at line 3451 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_TIM2_IS_CLK_SLEEP_ENABLED ( ) (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM2SMEN) != RESET)

Definition at line 3360 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_TIM3_IS_CLK_SLEEP_DISABLED ( ) (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM3SMEN) == RESET)

Definition at line 3454 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_TIM3_IS_CLK_SLEEP_ENABLED ( ) (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM3SMEN) != RESET)

Definition at line 3363 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_TIM4_IS_CLK_SLEEP_DISABLED ( ) (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM4SMEN) == RESET)

Definition at line 3458 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_TIM4_IS_CLK_SLEEP_ENABLED ( ) (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM4SMEN) != RESET)

Definition at line 3367 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_TIM5_IS_CLK_SLEEP_DISABLED ( ) (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM5SMEN) == RESET)

Definition at line 3462 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_TIM5_IS_CLK_SLEEP_ENABLED ( ) (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM5SMEN) != RESET)

Definition at line 3371 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_TIM6_IS_CLK_SLEEP_DISABLED ( ) (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM6SMEN) == RESET)

Definition at line 3465 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_TIM6_IS_CLK_SLEEP_ENABLED ( ) (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM6SMEN) != RESET)

Definition at line 3374 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_TIM7_IS_CLK_SLEEP_DISABLED ( ) (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM7SMEN) == RESET)

Definition at line 3467 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_TIM7_IS_CLK_SLEEP_ENABLED ( ) (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_TIM7SMEN) != RESET)

Definition at line 3376 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_UART4_IS_CLK_SLEEP_DISABLED ( ) (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_UART4SMEN) == RESET)

Definition at line 3492 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_UART4_IS_CLK_SLEEP_ENABLED ( ) (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_UART4SMEN) != RESET)

Definition at line 3401 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_UART5_IS_CLK_SLEEP_DISABLED ( ) (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_UART5SMEN) == RESET)

Definition at line 3496 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_UART5_IS_CLK_SLEEP_ENABLED ( ) (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_UART5SMEN) != RESET)

Definition at line 3405 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_USART2_IS_CLK_SLEEP_DISABLED ( ) (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_USART2SMEN) == RESET)

Definition at line 3485 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_USART2_IS_CLK_SLEEP_ENABLED ( ) (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_USART2SMEN) != RESET)

Definition at line 3394 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_USART3_IS_CLK_SLEEP_DISABLED ( ) (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_USART3SMEN) == RESET)

Definition at line 3488 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_USART3_IS_CLK_SLEEP_ENABLED ( ) (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_USART3SMEN) != RESET)

Definition at line 3397 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_WWDG_IS_CLK_SLEEP_DISABLED ( ) (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_WWDGSMEN) == RESET)

Definition at line 3477 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_WWDG_IS_CLK_SLEEP_ENABLED ( ) (READ_BIT(RCC->APB1SMENR1, RCC_APB1SMENR1_WWDGSMEN) != RESET)

Definition at line 3386 of file stm32l4xx_hal_rcc.h.

Defines

Detailed Description

Define Documentation