APB1 APB2 Clock Source

Defines
#define	RCC_HCLK_DIV1   RCC_CFGR_PPRE1_DIV1
#define	RCC_HCLK_DIV2   RCC_CFGR_PPRE1_DIV2
#define	RCC_HCLK_DIV4   RCC_CFGR_PPRE1_DIV4
#define	RCC_HCLK_DIV8   RCC_CFGR_PPRE1_DIV8
#define	RCC_HCLK_DIV16   RCC_CFGR_PPRE1_DIV16

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Define Documentation

#define RCC_HCLK_DIV1   RCC_CFGR_PPRE1_DIV1

HCLK not divided

Definition at line 463 of file stm32l4xx_hal_rcc.h.

#define RCC_HCLK_DIV16   RCC_CFGR_PPRE1_DIV16

HCLK divided by 16

Definition at line 467 of file stm32l4xx_hal_rcc.h.

#define RCC_HCLK_DIV2   RCC_CFGR_PPRE1_DIV2

HCLK divided by 2

Definition at line 464 of file stm32l4xx_hal_rcc.h.

#define RCC_HCLK_DIV4   RCC_CFGR_PPRE1_DIV4

HCLK divided by 4

Definition at line 465 of file stm32l4xx_hal_rcc.h.

#define RCC_HCLK_DIV8   RCC_CFGR_PPRE1_DIV8

HCLK divided by 8

Definition at line 466 of file stm32l4xx_hal_rcc.h.