STM32L486xx HAL User Manual
Defines
AHB3 Peripheral Clock Enabled or Disabled Status
RCC Exported Macros

Check whether the AHB3 peripheral clock is enabled or not. More...

Defines

#define __HAL_RCC_FMC_IS_CLK_ENABLED()   (READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN) != RESET)
#define __HAL_RCC_QSPI_IS_CLK_ENABLED()   (READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_QSPIEN) != RESET)
#define __HAL_RCC_FMC_IS_CLK_DISABLED()   (READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN) == RESET)
#define __HAL_RCC_QSPI_IS_CLK_DISABLED()   (READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_QSPIEN) == RESET)

Detailed Description

Check whether the AHB3 peripheral clock is enabled or not.

Note:
After reset, the peripheral clock (used for registers read/write access) is disabled and the application software has to enable this clock before using it.

Define Documentation

#define __HAL_RCC_FMC_IS_CLK_DISABLED ( )    (READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN) == RESET)

Definition at line 1761 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_FMC_IS_CLK_ENABLED ( )    (READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN) != RESET)

Definition at line 1753 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_QSPI_IS_CLK_DISABLED ( )    (READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_QSPIEN) == RESET)

Definition at line 1765 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_QSPI_IS_CLK_ENABLED ( )    (READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_QSPIEN) != RESET)

Definition at line 1757 of file stm32l4xx_hal_rcc.h.