STM32L486xx HAL User Manual
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Enable or disable the AHB2 peripheral clock. More...
Defines | |
#define | __HAL_RCC_GPIOA_CLK_ENABLE() |
#define | __HAL_RCC_GPIOB_CLK_ENABLE() |
#define | __HAL_RCC_GPIOC_CLK_ENABLE() |
#define | __HAL_RCC_GPIOD_CLK_ENABLE() |
#define | __HAL_RCC_GPIOE_CLK_ENABLE() |
#define | __HAL_RCC_GPIOF_CLK_ENABLE() |
#define | __HAL_RCC_GPIOG_CLK_ENABLE() |
#define | __HAL_RCC_GPIOH_CLK_ENABLE() |
#define | __HAL_RCC_USB_OTG_FS_CLK_ENABLE() |
#define | __HAL_RCC_ADC_CLK_ENABLE() |
#define | __HAL_RCC_AES_CLK_ENABLE() |
#define | __HAL_RCC_RNG_CLK_ENABLE() |
#define | __HAL_RCC_GPIOA_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOAEN) |
#define | __HAL_RCC_GPIOB_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOBEN) |
#define | __HAL_RCC_GPIOC_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOCEN) |
#define | __HAL_RCC_GPIOD_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIODEN) |
#define | __HAL_RCC_GPIOE_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOEEN) |
#define | __HAL_RCC_GPIOF_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOFEN) |
#define | __HAL_RCC_GPIOG_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOGEN) |
#define | __HAL_RCC_GPIOH_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOHEN) |
#define | __HAL_RCC_USB_OTG_FS_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_OTGFSEN); |
#define | __HAL_RCC_ADC_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_ADCEN) |
#define | __HAL_RCC_AES_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_AESEN); |
#define | __HAL_RCC_RNG_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_RNGEN) |
Enable or disable the AHB2 peripheral clock.
#define __HAL_RCC_ADC_CLK_DISABLE | ( | ) | CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_ADCEN) |
Definition at line 921 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_ADC_CLK_ENABLE | ( | ) |
do { \ __IO uint32_t tmpreg; \ SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_ADCEN); \ /* Delay after an RCC peripheral clock enabling */ \ tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_ADCEN); \ UNUSED(tmpreg); \ } while(0)
Definition at line 822 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_AES_CLK_DISABLE | ( | ) | CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_AESEN); |
Definition at line 928 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_AES_CLK_ENABLE | ( | ) |
do { \ __IO uint32_t tmpreg; \ SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_AESEN); \ /* Delay after an RCC peripheral clock enabling */ \ tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_AESEN); \ UNUSED(tmpreg); \ } while(0)
Definition at line 841 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_GPIOA_CLK_DISABLE | ( | ) | CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOAEN) |
Definition at line 889 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_GPIOA_CLK_ENABLE | ( | ) |
do { \ __IO uint32_t tmpreg; \ SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOAEN); \ /* Delay after an RCC peripheral clock enabling */ \ tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOAEN); \ UNUSED(tmpreg); \ } while(0)
Definition at line 730 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_GPIOB_CLK_DISABLE | ( | ) | CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOBEN) |
Definition at line 891 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_GPIOB_CLK_ENABLE | ( | ) |
do { \ __IO uint32_t tmpreg; \ SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOBEN); \ /* Delay after an RCC peripheral clock enabling */ \ tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOBEN); \ UNUSED(tmpreg); \ } while(0)
Definition at line 738 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_GPIOC_CLK_DISABLE | ( | ) | CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOCEN) |
Definition at line 893 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_GPIOC_CLK_ENABLE | ( | ) |
do { \ __IO uint32_t tmpreg; \ SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOCEN); \ /* Delay after an RCC peripheral clock enabling */ \ tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOCEN); \ UNUSED(tmpreg); \ } while(0)
Definition at line 746 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_GPIOD_CLK_DISABLE | ( | ) | CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIODEN) |
Definition at line 896 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_GPIOD_CLK_ENABLE | ( | ) |
do { \ __IO uint32_t tmpreg; \ SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIODEN); \ /* Delay after an RCC peripheral clock enabling */ \ tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIODEN); \ UNUSED(tmpreg); \ } while(0)
Definition at line 755 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_GPIOE_CLK_DISABLE | ( | ) | CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOEEN) |
Definition at line 900 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_GPIOE_CLK_ENABLE | ( | ) |
do { \ __IO uint32_t tmpreg; \ SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOEEN); \ /* Delay after an RCC peripheral clock enabling */ \ tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOEEN); \ UNUSED(tmpreg); \ } while(0)
Definition at line 765 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_GPIOF_CLK_DISABLE | ( | ) | CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOFEN) |
Definition at line 904 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_GPIOF_CLK_ENABLE | ( | ) |
do { \ __IO uint32_t tmpreg; \ SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOFEN); \ /* Delay after an RCC peripheral clock enabling */ \ tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOFEN); \ UNUSED(tmpreg); \ } while(0)
Definition at line 775 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_GPIOG_CLK_DISABLE | ( | ) | CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOGEN) |
Definition at line 908 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_GPIOG_CLK_ENABLE | ( | ) |
do { \ __IO uint32_t tmpreg; \ SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOGEN); \ /* Delay after an RCC peripheral clock enabling */ \ tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOGEN); \ UNUSED(tmpreg); \ } while(0)
Definition at line 785 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_GPIOH_CLK_DISABLE | ( | ) | CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOHEN) |
Definition at line 911 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_GPIOH_CLK_ENABLE | ( | ) |
do { \ __IO uint32_t tmpreg; \ SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOHEN); \ /* Delay after an RCC peripheral clock enabling */ \ tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOHEN); \ UNUSED(tmpreg); \ } while(0)
Definition at line 794 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_RNG_CLK_DISABLE | ( | ) | CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_RNGEN) |
Definition at line 935 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_RNG_CLK_ENABLE | ( | ) |
do { \ __IO uint32_t tmpreg; \ SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_RNGEN); \ /* Delay after an RCC peripheral clock enabling */ \ tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_RNGEN); \ UNUSED(tmpreg); \ } while(0)
Definition at line 860 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_USB_OTG_FS_CLK_DISABLE | ( | ) | CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_OTGFSEN); |
Definition at line 918 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_USB_OTG_FS_CLK_ENABLE | ( | ) |
do { \ __IO uint32_t tmpreg; \ SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_OTGFSEN); \ /* Delay after an RCC peripheral clock enabling */ \ tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_OTGFSEN); \ UNUSED(tmpreg); \ } while(0)
Definition at line 813 of file stm32l4xx_hal_rcc.h.