STM32L486xx HAL User Manual
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Check whether the AHB2 peripheral clock during Low Power (Sleep) mode is enabled or not. More...
Defines | |
#define | __HAL_RCC_GPIOA_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOASMEN) != RESET) |
#define | __HAL_RCC_GPIOB_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOBSMEN) != RESET) |
#define | __HAL_RCC_GPIOC_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOCSMEN) != RESET) |
#define | __HAL_RCC_GPIOD_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIODSMEN) != RESET) |
#define | __HAL_RCC_GPIOE_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOESMEN) != RESET) |
#define | __HAL_RCC_GPIOF_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOFSMEN) != RESET) |
#define | __HAL_RCC_GPIOG_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOGSMEN) != RESET) |
#define | __HAL_RCC_GPIOH_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOHSMEN) != RESET) |
#define | __HAL_RCC_SRAM2_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_SRAM2SMEN) != RESET) |
#define | __HAL_RCC_USB_OTG_FS_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_OTGFSSMEN) != RESET) |
#define | __HAL_RCC_ADC_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_ADCSMEN) != RESET) |
#define | __HAL_RCC_AES_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_AESSMEN) != RESET) |
#define | __HAL_RCC_RNG_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_RNGSMEN) != RESET) |
#define | __HAL_RCC_GPIOA_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOASMEN) == RESET) |
#define | __HAL_RCC_GPIOB_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOBSMEN) == RESET) |
#define | __HAL_RCC_GPIOC_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOCSMEN) == RESET) |
#define | __HAL_RCC_GPIOD_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIODSMEN) == RESET) |
#define | __HAL_RCC_GPIOE_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOESMEN) == RESET) |
#define | __HAL_RCC_GPIOF_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOFSMEN) == RESET) |
#define | __HAL_RCC_GPIOG_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOGSMEN) == RESET) |
#define | __HAL_RCC_GPIOH_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOHSMEN) == RESET) |
#define | __HAL_RCC_SRAM2_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_SRAM2SMEN) == RESET) |
#define | __HAL_RCC_USB_OTG_FS_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_OTGFSSMEN) == RESET) |
#define | __HAL_RCC_ADC_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_ADCSMEN) == RESET) |
#define | __HAL_RCC_AES_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_AESSMEN) == RESET) |
#define | __HAL_RCC_RNG_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_RNGSMEN) == RESET) |
Check whether the AHB2 peripheral clock during Low Power (Sleep) mode is enabled or not.
#define __HAL_RCC_ADC_IS_CLK_SLEEP_DISABLED | ( | ) | (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_ADCSMEN) == RESET) |
Definition at line 3277 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_ADC_IS_CLK_SLEEP_ENABLED | ( | ) | (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_ADCSMEN) != RESET) |
Definition at line 3214 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_AES_IS_CLK_SLEEP_DISABLED | ( | ) | (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_AESSMEN) == RESET) |
Definition at line 3284 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_AES_IS_CLK_SLEEP_ENABLED | ( | ) | (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_AESSMEN) != RESET) |
Definition at line 3221 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_GPIOA_IS_CLK_SLEEP_DISABLED | ( | ) | (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOASMEN) == RESET) |
Definition at line 3239 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_GPIOA_IS_CLK_SLEEP_ENABLED | ( | ) | (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOASMEN) != RESET) |
Definition at line 3176 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_GPIOB_IS_CLK_SLEEP_DISABLED | ( | ) | (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOBSMEN) == RESET) |
Definition at line 3241 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_GPIOB_IS_CLK_SLEEP_ENABLED | ( | ) | (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOBSMEN) != RESET) |
Definition at line 3178 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_GPIOC_IS_CLK_SLEEP_DISABLED | ( | ) | (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOCSMEN) == RESET) |
Definition at line 3243 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_GPIOC_IS_CLK_SLEEP_ENABLED | ( | ) | (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOCSMEN) != RESET) |
Definition at line 3180 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_GPIOD_IS_CLK_SLEEP_DISABLED | ( | ) | (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIODSMEN) == RESET) |
Definition at line 3246 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_GPIOD_IS_CLK_SLEEP_ENABLED | ( | ) | (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIODSMEN) != RESET) |
Definition at line 3183 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_GPIOE_IS_CLK_SLEEP_DISABLED | ( | ) | (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOESMEN) == RESET) |
Definition at line 3250 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_GPIOE_IS_CLK_SLEEP_ENABLED | ( | ) | (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOESMEN) != RESET) |
Definition at line 3187 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_GPIOF_IS_CLK_SLEEP_DISABLED | ( | ) | (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOFSMEN) == RESET) |
Definition at line 3254 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_GPIOF_IS_CLK_SLEEP_ENABLED | ( | ) | (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOFSMEN) != RESET) |
Definition at line 3191 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_GPIOG_IS_CLK_SLEEP_DISABLED | ( | ) | (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOGSMEN) == RESET) |
Definition at line 3258 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_GPIOG_IS_CLK_SLEEP_ENABLED | ( | ) | (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOGSMEN) != RESET) |
Definition at line 3195 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_GPIOH_IS_CLK_SLEEP_DISABLED | ( | ) | (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOHSMEN) == RESET) |
Definition at line 3261 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_GPIOH_IS_CLK_SLEEP_ENABLED | ( | ) | (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_GPIOHSMEN) != RESET) |
Definition at line 3198 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_RNG_IS_CLK_SLEEP_DISABLED | ( | ) | (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_RNGSMEN) == RESET) |
Definition at line 3291 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_RNG_IS_CLK_SLEEP_ENABLED | ( | ) | (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_RNGSMEN) != RESET) |
Definition at line 3228 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_SRAM2_IS_CLK_SLEEP_DISABLED | ( | ) | (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_SRAM2SMEN) == RESET) |
Definition at line 3267 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_SRAM2_IS_CLK_SLEEP_ENABLED | ( | ) | (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_SRAM2SMEN) != RESET) |
Definition at line 3204 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_USB_OTG_FS_IS_CLK_SLEEP_DISABLED | ( | ) | (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_OTGFSSMEN) == RESET) |
Definition at line 3274 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_USB_OTG_FS_IS_CLK_SLEEP_ENABLED | ( | ) | (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_OTGFSSMEN) != RESET) |
Definition at line 3211 of file stm32l4xx_hal_rcc.h.