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STM32L486xx HAL User Manual
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| #define I2C_NO_OPTION_FRAME (0xFFFF0000U) |
Definition at line 372 of file stm32l4xx_hal_i2c.c.
Referenced by HAL_I2C_Master_Receive_DMA(), HAL_I2C_Master_Receive_IT(), HAL_I2C_Master_Transmit_DMA(), HAL_I2C_Master_Transmit_IT(), HAL_I2C_Mem_Read_DMA(), HAL_I2C_Mem_Read_IT(), HAL_I2C_Mem_Write_DMA(), HAL_I2C_Mem_Write_IT(), HAL_I2C_Slave_Receive_DMA(), HAL_I2C_Slave_Receive_IT(), HAL_I2C_Slave_Transmit_DMA(), HAL_I2C_Slave_Transmit_IT(), I2C_DMASlaveReceiveCplt(), I2C_ITError(), I2C_ITListenCplt(), I2C_ITMasterCplt(), I2C_ITSlaveCplt(), I2C_Master_ISR_DMA(), I2C_Master_ISR_IT(), I2C_Slave_ISR_DMA(), and I2C_Slave_ISR_IT().
| #define I2C_STATE_MASTER_BUSY_RX ((uint32_t)((HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | HAL_I2C_MODE_MASTER)) |
Master Busy RX, combinaison of State LSB and Mode enum
Definition at line 355 of file stm32l4xx_hal_i2c.c.
Referenced by HAL_I2C_Master_Sequential_Receive_DMA(), HAL_I2C_Master_Sequential_Receive_IT(), and I2C_ITMasterSequentialCplt().
| #define I2C_STATE_MASTER_BUSY_TX ((uint32_t)((HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | HAL_I2C_MODE_MASTER)) |
Master Busy TX, combinaison of State LSB and Mode enum
Definition at line 354 of file stm32l4xx_hal_i2c.c.
Referenced by HAL_I2C_Master_Sequential_Transmit_DMA(), HAL_I2C_Master_Sequential_Transmit_IT(), and I2C_ITMasterSequentialCplt().
| #define I2C_STATE_MEM_BUSY_RX ((uint32_t)((HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | HAL_I2C_MODE_MEM)) |
Memory Busy RX, combinaison of State LSB and Mode enum
Definition at line 359 of file stm32l4xx_hal_i2c.c.
| #define I2C_STATE_MEM_BUSY_TX ((uint32_t)((HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | HAL_I2C_MODE_MEM)) |
Memory Busy TX, combinaison of State LSB and Mode enum
Definition at line 358 of file stm32l4xx_hal_i2c.c.
| #define I2C_STATE_MSK ((uint32_t)((HAL_I2C_STATE_BUSY_TX | HAL_I2C_STATE_BUSY_RX) & (~((uint32_t)HAL_I2C_STATE_READY)))) |
Mask State define, keep only RX and TX bits
Definition at line 352 of file stm32l4xx_hal_i2c.c.
Referenced by HAL_I2C_DisableListen_IT().
| #define I2C_STATE_NONE ((uint32_t)(HAL_I2C_MODE_NONE)) |
Default Value
Definition at line 353 of file stm32l4xx_hal_i2c.c.
Referenced by HAL_I2C_DeInit(), HAL_I2C_Init(), I2C_ITError(), I2C_ITListenCplt(), I2C_ITMasterCplt(), and I2C_ITSlaveCplt().
| #define I2C_STATE_SLAVE_BUSY_RX ((uint32_t)((HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | HAL_I2C_MODE_SLAVE)) |
Slave Busy RX, combinaison of State LSB and Mode enum
Definition at line 357 of file stm32l4xx_hal_i2c.c.
Referenced by I2C_ITSlaveSequentialCplt().
| #define I2C_STATE_SLAVE_BUSY_TX ((uint32_t)((HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | HAL_I2C_MODE_SLAVE)) |
Slave Busy TX, combinaison of State LSB and Mode enum
Definition at line 356 of file stm32l4xx_hal_i2c.c.
Referenced by I2C_ITSlaveSequentialCplt().
| #define I2C_TIMEOUT_ADDR (10000U) |
10 s
Definition at line 337 of file stm32l4xx_hal_i2c.c.
| #define I2C_TIMEOUT_BUSY (25U) |
25 ms
Definition at line 338 of file stm32l4xx_hal_i2c.c.
Referenced by HAL_I2C_Master_Receive(), HAL_I2C_Master_Transmit(), HAL_I2C_Mem_Read(), and HAL_I2C_Mem_Write().
| #define I2C_TIMEOUT_DIR (25U) |
25 ms
Definition at line 339 of file stm32l4xx_hal_i2c.c.
| #define I2C_TIMEOUT_FLAG (25U) |
25 ms
Definition at line 345 of file stm32l4xx_hal_i2c.c.
Referenced by HAL_I2C_Mem_Read_DMA(), HAL_I2C_Mem_Read_IT(), HAL_I2C_Mem_Write_DMA(), and HAL_I2C_Mem_Write_IT().
| #define I2C_TIMEOUT_RXNE (25U) |
25 ms
Definition at line 340 of file stm32l4xx_hal_i2c.c.
| #define I2C_TIMEOUT_STOPF (25U) |
25 ms
Definition at line 341 of file stm32l4xx_hal_i2c.c.
| #define I2C_TIMEOUT_TC (25U) |
25 ms
Definition at line 342 of file stm32l4xx_hal_i2c.c.
| #define I2C_TIMEOUT_TCR (25U) |
25 ms
Definition at line 343 of file stm32l4xx_hal_i2c.c.
| #define I2C_TIMEOUT_TXIS (25U) |
25 ms
Definition at line 344 of file stm32l4xx_hal_i2c.c.
| #define I2C_XFER_CPLT_IT (0x00000012U) |
Definition at line 368 of file stm32l4xx_hal_i2c.c.
Referenced by HAL_I2C_Master_Abort_IT(), I2C_Disable_IRQ(), I2C_DMAMasterReceiveCplt(), I2C_DMAMasterTransmitCplt(), I2C_Enable_IRQ(), and I2C_Master_ISR_DMA().
| #define I2C_XFER_ERROR_IT (0x00000011U) |
Definition at line 367 of file stm32l4xx_hal_i2c.c.
Referenced by HAL_I2C_Master_Receive_DMA(), HAL_I2C_Master_Sequential_Receive_DMA(), HAL_I2C_Master_Sequential_Transmit_DMA(), HAL_I2C_Master_Transmit_DMA(), HAL_I2C_Mem_Read_DMA(), HAL_I2C_Mem_Write_DMA(), I2C_Disable_IRQ(), and I2C_Enable_IRQ().
| #define I2C_XFER_LISTEN_IT (0x00000004U) |
Definition at line 365 of file stm32l4xx_hal_i2c.c.
Referenced by HAL_I2C_DisableListen_IT(), HAL_I2C_EnableListen_IT(), HAL_I2C_Slave_Receive_DMA(), HAL_I2C_Slave_Receive_IT(), HAL_I2C_Slave_Sequential_Receive_DMA(), HAL_I2C_Slave_Sequential_Receive_IT(), HAL_I2C_Slave_Sequential_Transmit_DMA(), HAL_I2C_Slave_Sequential_Transmit_IT(), HAL_I2C_Slave_Transmit_DMA(), HAL_I2C_Slave_Transmit_IT(), I2C_Disable_IRQ(), I2C_Enable_IRQ(), I2C_ITAddrCplt(), I2C_ITError(), I2C_ITListenCplt(), and I2C_ITSlaveCplt().
| #define I2C_XFER_RELOAD_IT (0x00000012U) |
Definition at line 369 of file stm32l4xx_hal_i2c.c.
Referenced by I2C_Disable_IRQ(), I2C_DMAMasterReceiveCplt(), I2C_DMAMasterTransmitCplt(), and I2C_Enable_IRQ().
| #define I2C_XFER_RX_IT (0x00000002U) |
Definition at line 364 of file stm32l4xx_hal_i2c.c.
Referenced by HAL_I2C_Master_Abort_IT(), HAL_I2C_Master_Receive_IT(), HAL_I2C_Master_Sequential_Receive_IT(), HAL_I2C_Mem_Read_IT(), HAL_I2C_Slave_Receive_IT(), HAL_I2C_Slave_Sequential_Receive_DMA(), HAL_I2C_Slave_Sequential_Receive_IT(), HAL_I2C_Slave_Sequential_Transmit_DMA(), HAL_I2C_Slave_Sequential_Transmit_IT(), I2C_Disable_IRQ(), I2C_Enable_IRQ(), I2C_ITError(), I2C_ITListenCplt(), I2C_ITMasterCplt(), I2C_ITMasterSequentialCplt(), I2C_ITSlaveCplt(), and I2C_ITSlaveSequentialCplt().
| #define I2C_XFER_TX_IT (0x00000001U) |
Definition at line 363 of file stm32l4xx_hal_i2c.c.
Referenced by HAL_I2C_Master_Abort_IT(), HAL_I2C_Master_Receive_DMA(), HAL_I2C_Master_Sequential_Receive_DMA(), HAL_I2C_Master_Sequential_Transmit_DMA(), HAL_I2C_Master_Sequential_Transmit_IT(), HAL_I2C_Master_Transmit_DMA(), HAL_I2C_Master_Transmit_IT(), HAL_I2C_Mem_Write_IT(), HAL_I2C_Slave_Sequential_Receive_DMA(), HAL_I2C_Slave_Sequential_Receive_IT(), HAL_I2C_Slave_Sequential_Transmit_DMA(), HAL_I2C_Slave_Sequential_Transmit_IT(), HAL_I2C_Slave_Transmit_IT(), I2C_Disable_IRQ(), I2C_Enable_IRQ(), I2C_ITError(), I2C_ITListenCplt(), I2C_ITMasterCplt(), I2C_ITMasterSequentialCplt(), I2C_ITSlaveCplt(), and I2C_ITSlaveSequentialCplt().
| #define MAX_NBYTE_SIZE 255U |
Definition at line 347 of file stm32l4xx_hal_i2c.c.
Referenced by HAL_I2C_Master_Receive(), HAL_I2C_Master_Receive_DMA(), HAL_I2C_Master_Receive_IT(), HAL_I2C_Master_Sequential_Receive_DMA(), HAL_I2C_Master_Sequential_Receive_IT(), HAL_I2C_Master_Sequential_Transmit_DMA(), HAL_I2C_Master_Sequential_Transmit_IT(), HAL_I2C_Master_Transmit(), HAL_I2C_Master_Transmit_DMA(), HAL_I2C_Master_Transmit_IT(), HAL_I2C_Mem_Read(), HAL_I2C_Mem_Read_DMA(), HAL_I2C_Mem_Read_IT(), HAL_I2C_Mem_Write(), HAL_I2C_Mem_Write_DMA(), HAL_I2C_Mem_Write_IT(), I2C_DMAMasterReceiveCplt(), I2C_DMAMasterTransmitCplt(), I2C_Master_ISR_DMA(), and I2C_Master_ISR_IT().
| #define SlaveAddr_MSK 0x06U |
Definition at line 349 of file stm32l4xx_hal_i2c.c.
Referenced by I2C_ITAddrCplt().
| #define SlaveAddr_SHIFT 7U |
Definition at line 348 of file stm32l4xx_hal_i2c.c.
Referenced by I2C_ITAddrCplt().
| #define TIMING_CLEAR_MASK (0xF0FFFFFFU) |
I2C TIMING clear register Mask
Definition at line 336 of file stm32l4xx_hal_i2c.c.
Referenced by HAL_I2C_Init().
1.7.6.1