DFSDM channel SPI clock selection

Defines
#define	DFSDM_CHANNEL_SPI_CLOCK_EXTERNAL   0x00000000U
#define	DFSDM_CHANNEL_SPI_CLOCK_INTERNAL   DFSDM_CHCFGR1_SPICKSEL_0
#define	DFSDM_CHANNEL_SPI_CLOCK_INTERNAL_DIV2_FALLING   DFSDM_CHCFGR1_SPICKSEL_1
#define	DFSDM_CHANNEL_SPI_CLOCK_INTERNAL_DIV2_RISING   DFSDM_CHCFGR1_SPICKSEL

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Define Documentation

#define DFSDM_CHANNEL_SPI_CLOCK_EXTERNAL   0x00000000U

External SPI clock

Definition at line 374 of file stm32l4xx_hal_dfsdm.h.

#define DFSDM_CHANNEL_SPI_CLOCK_INTERNAL   DFSDM_CHCFGR1_SPICKSEL_0

Internal SPI clock

Definition at line 375 of file stm32l4xx_hal_dfsdm.h.

#define DFSDM_CHANNEL_SPI_CLOCK_INTERNAL_DIV2_FALLING   DFSDM_CHCFGR1_SPICKSEL_1

Internal SPI clock divided by 2, falling edge

Definition at line 376 of file stm32l4xx_hal_dfsdm.h.

#define DFSDM_CHANNEL_SPI_CLOCK_INTERNAL_DIV2_RISING   DFSDM_CHCFGR1_SPICKSEL

Internal SPI clock divided by 2, rising edge

Definition at line 377 of file stm32l4xx_hal_dfsdm.h.