Defines
#define	__HAL_RCC_RTC_ENABLE() ((__IO uint32_t ) RCC_BDCR_RTCEN_BB = ENABLE)
	Macros to enable or disable the RTC clock.
#define	__HAL_RCC_RTC_DISABLE() ((__IO uint32_t ) RCC_BDCR_RTCEN_BB = DISABLE)
#define	__HAL_RCC_RTC_CLKPRESCALER(__RTCCLKSource__)
	Macros to configure the RTC clock (RTCCLK).
#define	__HAL_RCC_RTC_CONFIG(__RTCCLKSource__)
#define	__HAL_RCC_GET_RTC_SOURCE() (READ_BIT(RCC->BDCR, RCC_BDCR_RTCSEL))
	Macro to get the RTC clock source.
#define	__HAL_RCC_GET_RTC_HSE_PRESCALER() (READ_BIT(RCC->CFGR, RCC_CFGR_RTCPRE) \| RCC_BDCR_RTCSEL)
	Get the RTC and HSE clock divider (RTCPRE).
#define	__HAL_RCC_BACKUPRESET_FORCE() ((__IO uint32_t ) RCC_BDCR_BDRST_BB = ENABLE)
	Macros to force or release the Backup domain reset.
#define	__HAL_RCC_BACKUPRESET_RELEASE() ((__IO uint32_t ) RCC_BDCR_BDRST_BB = DISABLE)

Define Documentation

#define __HAL_RCC_BACKUPRESET_FORCE ( ) (*(__IO uint32_t *) RCC_BDCR_BDRST_BB = ENABLE)

Macros to force or release the Backup domain reset.

Note:: This function resets the RTC peripheral (including the backup registers) and the RTC clock source selection in RCC_CSR register.; The BKPSRAM is not affected by this reset.

Definition at line 1036 of file stm32f4xx_hal_rcc.h.

Referenced by HAL_RCCEx_PeriphCLKConfig().

#define __HAL_RCC_BACKUPRESET_RELEASE ( ) (*(__IO uint32_t *) RCC_BDCR_BDRST_BB = DISABLE)

Definition at line 1037 of file stm32f4xx_hal_rcc.h.

Referenced by HAL_RCCEx_PeriphCLKConfig().

#define __HAL_RCC_GET_RTC_HSE_PRESCALER ( ) (READ_BIT(RCC->CFGR, RCC_CFGR_RTCPRE) | RCC_BDCR_RTCSEL)

Get the RTC and HSE clock divider (RTCPRE).

Return values:

Returned

value can be one of the following values:

RCC_RTCCLKSOURCE_HSE_DIVX: HSE clock divided by x selected as RTC clock, where x:[2,31]

Definition at line 1029 of file stm32f4xx_hal_rcc.h.

#define __HAL_RCC_GET_RTC_SOURCE ( ) (READ_BIT(RCC->BDCR, RCC_BDCR_RTCSEL))

Macro to get the RTC clock source.

Return values:

The

clock source can be one of the following values:

RCC_RTCCLKSOURCE_NO_CLK No clock selected as RTC clock
RCC_RTCCLKSOURCE_LSE LSE selected as RTC clock
RCC_RTCCLKSOURCE_LSI LSI selected as RTC clock
RCC_RTCCLKSOURCE_HSE_DIVX HSE divided by X selected as RTC clock (X can be retrieved thanks to __HAL_RCC_GET_RTC_HSE_PRESCALER()

Definition at line 1021 of file stm32f4xx_hal_rcc.h.

#define __HAL_RCC_RTC_CLKPRESCALER ( __RTCCLKSource__ )

Value:

(((__RTCCLKSource__) & RCC_BDCR_RTCSEL) == RCC_BDCR_RTCSEL) ?    \
                                                 MODIFY_REG(RCC->CFGR, RCC_CFGR_RTCPRE, ((__RTCCLKSource__) & 0xFFFFCFFU)) : CLEAR_BIT(RCC->CFGR, RCC_CFGR_RTCPRE)

Macros to configure the RTC clock (RTCCLK).

Note:: As the RTC clock configuration bits are in the Backup domain and write access is denied to this domain after reset, you have to enable write access using the Power Backup Access macro before to configure the RTC clock source (to be done once after reset).; Once the RTC clock is configured it can't be changed unless the Backup domain is reset using __HAL_RCC_BackupReset_RELEASE() macro, or by a Power On Reset (POR).

Parameters:

__RTCCLKSource__

specifies the RTC clock source. This parameter can be one of the following values:

RCC_RTCCLKSOURCE_NO_CLK: No clock selected as RTC clock.
RCC_RTCCLKSOURCE_LSE: LSE selected as RTC clock.
RCC_RTCCLKSOURCE_LSI: LSI selected as RTC clock.
RCC_RTCCLKSOURCE_HSE_DIVX: HSE clock divided by x selected as RTC clock, where x:[2,31]

Note:: If the LSE or LSI is used as RTC clock source, the RTC continues to work in STOP and STANDBY modes, and can be used as wake-up source. However, when the HSE clock is used as RTC clock source, the RTC cannot be used in STOP and STANDBY modes.; The maximum input clock frequency for RTC is 1MHz (when using HSE as RTC clock source).

Definition at line 1007 of file stm32f4xx_hal_rcc.h.

#define __HAL_RCC_RTC_CONFIG ( __RTCCLKSource__ )

Value:

do { __HAL_RCC_RTC_CLKPRESCALER(__RTCCLKSource__);    \
                                                    RCC->BDCR |= ((__RTCCLKSource__) & 0x00000FFFU);  \
                                                   } while(0U)

Definition at line 1010 of file stm32f4xx_hal_rcc.h.

Referenced by HAL_RCCEx_PeriphCLKConfig().

#define __HAL_RCC_RTC_DISABLE ( ) (*(__IO uint32_t *) RCC_BDCR_RTCEN_BB = DISABLE)

Definition at line 983 of file stm32f4xx_hal_rcc.h.

#define __HAL_RCC_RTC_ENABLE ( ) (*(__IO uint32_t *) RCC_BDCR_RTCEN_BB = ENABLE)

Macros to enable or disable the RTC clock.

Note:: These macros must be used only after the RTC clock source was selected.

Definition at line 982 of file stm32f4xx_hal_rcc.h.

Defines

Define Documentation