STM32L486xx HAL User Manual
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Header file of QSPI HAL module. More...
#include "stm32l4xx_hal_def.h"
Go to the source code of this file.
Data Structures | |
struct | QSPI_InitTypeDef |
QSPI Init structure definition. More... | |
struct | __QSPI_HandleTypeDef |
QSPI Handle Structure definition. More... | |
struct | QSPI_CommandTypeDef |
QSPI Command structure definition. More... | |
struct | QSPI_AutoPollingTypeDef |
QSPI Auto Polling mode configuration structure definition. More... | |
struct | QSPI_MemoryMappedTypeDef |
QSPI Memory Mapped mode configuration structure definition. More... | |
Defines | |
#define | HAL_QSPI_ERROR_NONE 0x00000000U |
#define | HAL_QSPI_ERROR_TIMEOUT 0x00000001U |
#define | HAL_QSPI_ERROR_TRANSFER 0x00000002U |
#define | HAL_QSPI_ERROR_DMA 0x00000004U |
#define | HAL_QSPI_ERROR_INVALID_PARAM 0x00000008U |
#define | HAL_QSPI_ERROR_INVALID_CALLBACK 0x00000010U |
#define | QSPI_SAMPLE_SHIFTING_NONE 0x00000000U |
#define | QSPI_SAMPLE_SHIFTING_HALFCYCLE ((uint32_t)QUADSPI_CR_SSHIFT) |
#define | QSPI_CS_HIGH_TIME_1_CYCLE 0x00000000U |
#define | QSPI_CS_HIGH_TIME_2_CYCLE ((uint32_t)QUADSPI_DCR_CSHT_0) |
#define | QSPI_CS_HIGH_TIME_3_CYCLE ((uint32_t)QUADSPI_DCR_CSHT_1) |
#define | QSPI_CS_HIGH_TIME_4_CYCLE ((uint32_t)QUADSPI_DCR_CSHT_0 | QUADSPI_DCR_CSHT_1) |
#define | QSPI_CS_HIGH_TIME_5_CYCLE ((uint32_t)QUADSPI_DCR_CSHT_2) |
#define | QSPI_CS_HIGH_TIME_6_CYCLE ((uint32_t)QUADSPI_DCR_CSHT_2 | QUADSPI_DCR_CSHT_0) |
#define | QSPI_CS_HIGH_TIME_7_CYCLE ((uint32_t)QUADSPI_DCR_CSHT_2 | QUADSPI_DCR_CSHT_1) |
#define | QSPI_CS_HIGH_TIME_8_CYCLE ((uint32_t)QUADSPI_DCR_CSHT) |
#define | QSPI_CLOCK_MODE_0 0x00000000U |
#define | QSPI_CLOCK_MODE_3 ((uint32_t)QUADSPI_DCR_CKMODE) |
#define | QSPI_ADDRESS_8_BITS 0x00000000U |
#define | QSPI_ADDRESS_16_BITS ((uint32_t)QUADSPI_CCR_ADSIZE_0) |
#define | QSPI_ADDRESS_24_BITS ((uint32_t)QUADSPI_CCR_ADSIZE_1) |
#define | QSPI_ADDRESS_32_BITS ((uint32_t)QUADSPI_CCR_ADSIZE) |
#define | QSPI_ALTERNATE_BYTES_8_BITS 0x00000000U |
#define | QSPI_ALTERNATE_BYTES_16_BITS ((uint32_t)QUADSPI_CCR_ABSIZE_0) |
#define | QSPI_ALTERNATE_BYTES_24_BITS ((uint32_t)QUADSPI_CCR_ABSIZE_1) |
#define | QSPI_ALTERNATE_BYTES_32_BITS ((uint32_t)QUADSPI_CCR_ABSIZE) |
#define | QSPI_INSTRUCTION_NONE 0x00000000U |
#define | QSPI_INSTRUCTION_1_LINE ((uint32_t)QUADSPI_CCR_IMODE_0) |
#define | QSPI_INSTRUCTION_2_LINES ((uint32_t)QUADSPI_CCR_IMODE_1) |
#define | QSPI_INSTRUCTION_4_LINES ((uint32_t)QUADSPI_CCR_IMODE) |
#define | QSPI_ADDRESS_NONE 0x00000000U |
#define | QSPI_ADDRESS_1_LINE ((uint32_t)QUADSPI_CCR_ADMODE_0) |
#define | QSPI_ADDRESS_2_LINES ((uint32_t)QUADSPI_CCR_ADMODE_1) |
#define | QSPI_ADDRESS_4_LINES ((uint32_t)QUADSPI_CCR_ADMODE) |
#define | QSPI_ALTERNATE_BYTES_NONE 0x00000000U |
#define | QSPI_ALTERNATE_BYTES_1_LINE ((uint32_t)QUADSPI_CCR_ABMODE_0) |
#define | QSPI_ALTERNATE_BYTES_2_LINES ((uint32_t)QUADSPI_CCR_ABMODE_1) |
#define | QSPI_ALTERNATE_BYTES_4_LINES ((uint32_t)QUADSPI_CCR_ABMODE) |
#define | QSPI_DATA_NONE 0x00000000U |
#define | QSPI_DATA_1_LINE ((uint32_t)QUADSPI_CCR_DMODE_0) |
#define | QSPI_DATA_2_LINES ((uint32_t)QUADSPI_CCR_DMODE_1) |
#define | QSPI_DATA_4_LINES ((uint32_t)QUADSPI_CCR_DMODE) |
#define | QSPI_DDR_MODE_DISABLE 0x00000000U |
#define | QSPI_DDR_MODE_ENABLE ((uint32_t)QUADSPI_CCR_DDRM) |
#define | QSPI_DDR_HHC_ANALOG_DELAY 0x00000000U |
#define | QSPI_SIOO_INST_EVERY_CMD 0x00000000U |
#define | QSPI_SIOO_INST_ONLY_FIRST_CMD ((uint32_t)QUADSPI_CCR_SIOO) |
#define | QSPI_MATCH_MODE_AND 0x00000000U |
#define | QSPI_MATCH_MODE_OR ((uint32_t)QUADSPI_CR_PMM) |
#define | QSPI_AUTOMATIC_STOP_DISABLE 0x00000000U |
#define | QSPI_AUTOMATIC_STOP_ENABLE ((uint32_t)QUADSPI_CR_APMS) |
#define | QSPI_TIMEOUT_COUNTER_DISABLE 0x00000000U |
#define | QSPI_TIMEOUT_COUNTER_ENABLE ((uint32_t)QUADSPI_CR_TCEN) |
#define | QSPI_FLAG_BUSY QUADSPI_SR_BUSY |
#define | QSPI_FLAG_TO QUADSPI_SR_TOF |
#define | QSPI_FLAG_SM QUADSPI_SR_SMF |
#define | QSPI_FLAG_FT QUADSPI_SR_FTF |
#define | QSPI_FLAG_TC QUADSPI_SR_TCF |
#define | QSPI_FLAG_TE QUADSPI_SR_TEF |
#define | QSPI_IT_TO QUADSPI_CR_TOIE |
#define | QSPI_IT_SM QUADSPI_CR_SMIE |
#define | QSPI_IT_FT QUADSPI_CR_FTIE |
#define | QSPI_IT_TC QUADSPI_CR_TCIE |
#define | QSPI_IT_TE QUADSPI_CR_TEIE |
#define | HAL_QPSI_TIMEOUT_DEFAULT_VALUE 5000U /* 5 s */ |
#define | __HAL_QSPI_RESET_HANDLE_STATE(__HANDLE__) |
Reset QSPI handle state. | |
#define | __HAL_QSPI_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR, QUADSPI_CR_EN) |
Enable the QSPI peripheral. | |
#define | __HAL_QSPI_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR, QUADSPI_CR_EN) |
Disable the QSPI peripheral. | |
#define | __HAL_QSPI_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CR, (__INTERRUPT__)) |
Enable the specified QSPI interrupt. | |
#define | __HAL_QSPI_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BIT((__HANDLE__)->Instance->CR, (__INTERRUPT__)) |
Disable the specified QSPI interrupt. | |
#define | __HAL_QSPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (READ_BIT((__HANDLE__)->Instance->CR, (__INTERRUPT__)) == (__INTERRUPT__)) |
Check whether the specified QSPI interrupt source is enabled or not. | |
#define | __HAL_QSPI_GET_FLAG(__HANDLE__, __FLAG__) ((READ_BIT((__HANDLE__)->Instance->SR, (__FLAG__)) != 0U) ? SET : RESET) |
Check whether the selected QSPI flag is set or not. | |
#define | __HAL_QSPI_CLEAR_FLAG(__HANDLE__, __FLAG__) WRITE_REG((__HANDLE__)->Instance->FCR, (__FLAG__)) |
Clears the specified QSPI's flag status. | |
#define | IS_QSPI_CLOCK_PRESCALER(PRESCALER) ((PRESCALER) <= 0xFFU) |
#define | IS_QSPI_FIFO_THRESHOLD(THR) (((THR) > 0U) && ((THR) <= 16U)) |
#define | IS_QSPI_SSHIFT(SSHIFT) |
#define | IS_QSPI_FLASH_SIZE(FSIZE) (((FSIZE) <= 31U)) |
#define | IS_QSPI_CS_HIGH_TIME(CSHTIME) |
#define | IS_QSPI_CLOCK_MODE(CLKMODE) |
#define | IS_QSPI_INSTRUCTION(INSTRUCTION) ((INSTRUCTION) <= 0xFFU) |
#define | IS_QSPI_ADDRESS_SIZE(ADDR_SIZE) |
#define | IS_QSPI_ALTERNATE_BYTES_SIZE(SIZE) |
#define | IS_QSPI_DUMMY_CYCLES(DCY) ((DCY) <= 31U) |
#define | IS_QSPI_INSTRUCTION_MODE(MODE) |
#define | IS_QSPI_ADDRESS_MODE(MODE) |
#define | IS_QSPI_ALTERNATE_BYTES_MODE(MODE) |
#define | IS_QSPI_DATA_MODE(MODE) |
#define | IS_QSPI_DDR_MODE(DDR_MODE) |
#define | IS_QSPI_DDR_HHC(DDR_HHC) (((DDR_HHC) == QSPI_DDR_HHC_ANALOG_DELAY)) |
#define | IS_QSPI_SIOO_MODE(SIOO_MODE) |
#define | IS_QSPI_INTERVAL(INTERVAL) ((INTERVAL) <= QUADSPI_PIR_INTERVAL) |
#define | IS_QSPI_STATUS_BYTES_SIZE(SIZE) (((SIZE) >= 1U) && ((SIZE) <= 4U)) |
#define | IS_QSPI_MATCH_MODE(MODE) |
#define | IS_QSPI_AUTOMATIC_STOP(APMS) |
#define | IS_QSPI_TIMEOUT_ACTIVATION(TCEN) |
#define | IS_QSPI_TIMEOUT_PERIOD(PERIOD) ((PERIOD) <= 0xFFFFU) |
Typedefs | |
typedef struct __QSPI_HandleTypeDef | QSPI_HandleTypeDef |
QSPI Handle Structure definition. | |
typedef void(* | pQSPI_CallbackTypeDef )(QSPI_HandleTypeDef *hqspi) |
HAL QSPI Callback pointer definition. | |
Enumerations | |
enum | HAL_QSPI_StateTypeDef { HAL_QSPI_STATE_RESET = 0x00U, HAL_QSPI_STATE_READY = 0x01U, HAL_QSPI_STATE_BUSY = 0x02U, HAL_QSPI_STATE_BUSY_INDIRECT_TX = 0x12U, HAL_QSPI_STATE_BUSY_INDIRECT_RX = 0x22U, HAL_QSPI_STATE_BUSY_AUTO_POLLING = 0x42U, HAL_QSPI_STATE_BUSY_MEM_MAPPED = 0x82U, HAL_QSPI_STATE_ABORT = 0x08U, HAL_QSPI_STATE_ERROR = 0x04U } |
HAL QSPI State structures definition. More... | |
enum | HAL_QSPI_CallbackIDTypeDef { HAL_QSPI_ERROR_CB_ID = 0x00U, HAL_QSPI_ABORT_CB_ID = 0x01U, HAL_QSPI_FIFO_THRESHOLD_CB_ID = 0x02U, HAL_QSPI_CMD_CPLT_CB_ID = 0x03U, HAL_QSPI_RX_CPLT_CB_ID = 0x04U, HAL_QSPI_TX_CPLT_CB_ID = 0x05U, HAL_QSPI_RX_HALF_CPLT_CB_ID = 0x06U, HAL_QSPI_TX_HALF_CPLT_CB_ID = 0x07U, HAL_QSPI_STATUS_MATCH_CB_ID = 0x08U, HAL_QSPI_TIMEOUT_CB_ID = 0x09U, HAL_QSPI_MSP_INIT_CB_ID = 0x0AU, HAL_QSPI_MSP_DEINIT_CB_ID = 0x0B0 } |
HAL QSPI Callback ID enumeration definition. More... | |
Functions | |
HAL_StatusTypeDef | HAL_QSPI_Init (QSPI_HandleTypeDef *hqspi) |
Initialize the QSPI mode according to the specified parameters in the QSPI_InitTypeDef and initialize the associated handle. | |
HAL_StatusTypeDef | HAL_QSPI_DeInit (QSPI_HandleTypeDef *hqspi) |
De-Initialize the QSPI peripheral. | |
__weak void | HAL_QSPI_MspInit (QSPI_HandleTypeDef *hqspi) |
Initialize the QSPI MSP. | |
__weak void | HAL_QSPI_MspDeInit (QSPI_HandleTypeDef *hqspi) |
DeInitialize the QSPI MSP. | |
void | HAL_QSPI_IRQHandler (QSPI_HandleTypeDef *hqspi) |
Handle QSPI interrupt request. | |
HAL_StatusTypeDef | HAL_QSPI_Command (QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, uint32_t Timeout) |
Set the command configuration. | |
HAL_StatusTypeDef | HAL_QSPI_Transmit (QSPI_HandleTypeDef *hqspi, uint8_t *pData, uint32_t Timeout) |
Transmit an amount of data in blocking mode. | |
HAL_StatusTypeDef | HAL_QSPI_Receive (QSPI_HandleTypeDef *hqspi, uint8_t *pData, uint32_t Timeout) |
Receive an amount of data in blocking mode. | |
HAL_StatusTypeDef | HAL_QSPI_Command_IT (QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd) |
Set the command configuration in interrupt mode. | |
HAL_StatusTypeDef | HAL_QSPI_Transmit_IT (QSPI_HandleTypeDef *hqspi, uint8_t *pData) |
Send an amount of data in non-blocking mode with interrupt. | |
HAL_StatusTypeDef | HAL_QSPI_Receive_IT (QSPI_HandleTypeDef *hqspi, uint8_t *pData) |
Receive an amount of data in non-blocking mode with interrupt. | |
HAL_StatusTypeDef | HAL_QSPI_Transmit_DMA (QSPI_HandleTypeDef *hqspi, uint8_t *pData) |
Send an amount of data in non-blocking mode with DMA. | |
HAL_StatusTypeDef | HAL_QSPI_Receive_DMA (QSPI_HandleTypeDef *hqspi, uint8_t *pData) |
Receive an amount of data in non-blocking mode with DMA. | |
HAL_StatusTypeDef | HAL_QSPI_AutoPolling (QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, QSPI_AutoPollingTypeDef *cfg, uint32_t Timeout) |
Configure the QSPI Automatic Polling Mode in blocking mode. | |
HAL_StatusTypeDef | HAL_QSPI_AutoPolling_IT (QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, QSPI_AutoPollingTypeDef *cfg) |
Configure the QSPI Automatic Polling Mode in non-blocking mode. | |
HAL_StatusTypeDef | HAL_QSPI_MemoryMapped (QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, QSPI_MemoryMappedTypeDef *cfg) |
Configure the Memory Mapped mode. | |
__weak void | HAL_QSPI_ErrorCallback (QSPI_HandleTypeDef *hqspi) |
Transfer Error callback. | |
__weak void | HAL_QSPI_AbortCpltCallback (QSPI_HandleTypeDef *hqspi) |
Abort completed callback. | |
__weak void | HAL_QSPI_FifoThresholdCallback (QSPI_HandleTypeDef *hqspi) |
FIFO Threshold callback. | |
__weak void | HAL_QSPI_CmdCpltCallback (QSPI_HandleTypeDef *hqspi) |
Command completed callback. | |
__weak void | HAL_QSPI_RxCpltCallback (QSPI_HandleTypeDef *hqspi) |
Rx Transfer completed callback. | |
__weak void | HAL_QSPI_TxCpltCallback (QSPI_HandleTypeDef *hqspi) |
Tx Transfer completed callback. | |
__weak void | HAL_QSPI_RxHalfCpltCallback (QSPI_HandleTypeDef *hqspi) |
Rx Half Transfer completed callback. | |
__weak void | HAL_QSPI_TxHalfCpltCallback (QSPI_HandleTypeDef *hqspi) |
Tx Half Transfer completed callback. | |
__weak void | HAL_QSPI_StatusMatchCallback (QSPI_HandleTypeDef *hqspi) |
Status Match callback. | |
__weak void | HAL_QSPI_TimeOutCallback (QSPI_HandleTypeDef *hqspi) |
Timeout callback. | |
HAL_StatusTypeDef | HAL_QSPI_RegisterCallback (QSPI_HandleTypeDef *hqspi, HAL_QSPI_CallbackIDTypeDef CallbackID, pQSPI_CallbackTypeDef pCallback) |
Register a User QSPI Callback To be used instead of the weak (surcharged) predefined callback. | |
HAL_StatusTypeDef | HAL_QSPI_UnRegisterCallback (QSPI_HandleTypeDef *hqspi, HAL_QSPI_CallbackIDTypeDef CallbackID) |
Unregister a User QSPI Callback QSPI Callback is redirected to the weak (surcharged) predefined callback. | |
HAL_QSPI_StateTypeDef | HAL_QSPI_GetState (QSPI_HandleTypeDef *hqspi) |
Return the QSPI handle state. | |
uint32_t | HAL_QSPI_GetError (QSPI_HandleTypeDef *hqspi) |
Return the QSPI error code. | |
HAL_StatusTypeDef | HAL_QSPI_Abort (QSPI_HandleTypeDef *hqspi) |
Abort the current transmission. | |
HAL_StatusTypeDef | HAL_QSPI_Abort_IT (QSPI_HandleTypeDef *hqspi) |
Abort the current transmission (non-blocking function) | |
void | HAL_QSPI_SetTimeout (QSPI_HandleTypeDef *hqspi, uint32_t Timeout) |
Set QSPI timeout. | |
HAL_StatusTypeDef | HAL_QSPI_SetFifoThreshold (QSPI_HandleTypeDef *hqspi, uint32_t Threshold) |
Set QSPI Fifo threshold. | |
uint32_t | HAL_QSPI_GetFifoThreshold (QSPI_HandleTypeDef *hqspi) |
Get QSPI Fifo threshold. |
Header file of QSPI HAL module.
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Definition in file stm32l4xx_hal_qspi.h.