STM32L486xx HAL User Manual
stm32l4xx_hal_pwr.c
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00001 /**
00002   ******************************************************************************
00003   * @file    stm32l4xx_hal_pwr.c
00004   * @author  MCD Application Team
00005   * @brief   PWR HAL module driver.
00006   *          This file provides firmware functions to manage the following
00007   *          functionalities of the Power Controller (PWR) peripheral:
00008   *           + Initialization/de-initialization functions
00009   *           + Peripheral Control functions
00010   *
00011   ******************************************************************************
00012   * @attention
00013   *
00014   * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
00015   *
00016   * Redistribution and use in source and binary forms, with or without modification,
00017   * are permitted provided that the following conditions are met:
00018   *   1. Redistributions of source code must retain the above copyright notice,
00019   *      this list of conditions and the following disclaimer.
00020   *   2. Redistributions in binary form must reproduce the above copyright notice,
00021   *      this list of conditions and the following disclaimer in the documentation
00022   *      and/or other materials provided with the distribution.
00023   *   3. Neither the name of STMicroelectronics nor the names of its contributors
00024   *      may be used to endorse or promote products derived from this software
00025   *      without specific prior written permission.
00026   *
00027   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
00028   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00029   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
00030   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
00031   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00032   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
00033   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
00034   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00035   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
00036   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00037   *
00038   ******************************************************************************
00039   */
00040 
00041 /* Includes ------------------------------------------------------------------*/
00042 #include "stm32l4xx_hal.h"
00043 
00044 /** @addtogroup STM32L4xx_HAL_Driver
00045   * @{
00046   */
00047 
00048 /** @defgroup PWR PWR
00049   * @brief PWR HAL module driver
00050   * @{
00051   */
00052 
00053 #ifdef HAL_PWR_MODULE_ENABLED
00054 
00055 /* Private typedef -----------------------------------------------------------*/
00056 /* Private define ------------------------------------------------------------*/ 
00057 
00058 /** @defgroup PWR_Private_Defines PWR Private Defines
00059   * @{
00060   */
00061   
00062 /** @defgroup PWR_PVD_Mode_Mask PWR PVD Mode Mask
00063   * @{
00064   */ 
00065 #define PVD_MODE_IT               ((uint32_t)0x00010000)  /*!< Mask for interruption yielded by PVD threshold crossing */ 
00066 #define PVD_MODE_EVT              ((uint32_t)0x00020000)  /*!< Mask for event yielded by PVD threshold crossing        */ 
00067 #define PVD_RISING_EDGE           ((uint32_t)0x00000001)  /*!< Mask for rising edge set as PVD trigger                 */ 
00068 #define PVD_FALLING_EDGE          ((uint32_t)0x00000002)  /*!< Mask for falling edge set as PVD trigger                */ 
00069 /**
00070   * @}
00071   */
00072 
00073 /**
00074   * @}
00075   */
00076   
00077 /* Private macro -------------------------------------------------------------*/
00078 /* Private variables ---------------------------------------------------------*/
00079 /* Private function prototypes -----------------------------------------------*/
00080 /* Exported functions --------------------------------------------------------*/
00081 
00082 /** @defgroup PWR_Exported_Functions PWR Exported Functions
00083   * @{
00084   */
00085 
00086 /** @defgroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions 
00087   *  @brief    Initialization and de-initialization functions
00088   *
00089 @verbatim
00090  ===============================================================================
00091               ##### Initialization and de-initialization functions #####
00092  ===============================================================================
00093     [..]
00094 
00095 @endverbatim
00096   * @{
00097   */
00098 
00099 /**
00100   * @brief Deinitialize the HAL PWR peripheral registers to their default reset values.
00101   * @retval None
00102   */
00103 void HAL_PWR_DeInit(void)
00104 {
00105   __HAL_RCC_PWR_FORCE_RESET();
00106   __HAL_RCC_PWR_RELEASE_RESET();
00107 }
00108 
00109 /**
00110   * @brief Enable access to the backup domain 
00111   *        (RTC registers, RTC backup data registers).
00112   * @note  After reset, the backup domain is protected against 
00113   *        possible unwanted write accesses.
00114   * @note  RTCSEL that sets the RTC clock source selection is in the RTC back-up domain.
00115   *        In order to set or modify the RTC clock, the backup domain access must be
00116   *        disabled. 
00117   * @note  LSEON bit that switches on and off the LSE crystal belongs as well to the
00118   *        back-up domain.                
00119   * @retval None
00120   */
00121 void HAL_PWR_EnableBkUpAccess(void)
00122 {
00123   SET_BIT(PWR->CR1, PWR_CR1_DBP);    
00124 }
00125 
00126 /**
00127   * @brief Disable access to the backup domain
00128   *        (RTC registers, RTC backup data registers).    
00129   * @retval None
00130   */
00131 void HAL_PWR_DisableBkUpAccess(void)
00132 {
00133   CLEAR_BIT(PWR->CR1, PWR_CR1_DBP);   
00134 }
00135 
00136 
00137 
00138 
00139 /**
00140   * @}
00141   */
00142 
00143 
00144 
00145 /** @defgroup PWR_Exported_Functions_Group2 Peripheral Control functions
00146   *  @brief Low Power modes configuration functions
00147   *
00148 @verbatim
00149 
00150  ===============================================================================
00151                  ##### Peripheral Control functions #####
00152  ===============================================================================
00153  
00154      [..]
00155      *** PVD configuration ***
00156     =========================
00157     [..]
00158       (+) The PVD is used to monitor the VDD power supply by comparing it to a
00159           threshold selected by the PVD Level (PLS[2:0] bits in PWR_CR2 register).
00160 
00161       (+) PVDO flag is available to indicate if VDD/VDDA is higher or lower
00162           than the PVD threshold. This event is internally connected to the EXTI
00163           line16 and can generate an interrupt if enabled. This is done through
00164           __HAL_PVD_EXTI_ENABLE_IT() macro.
00165       (+) The PVD is stopped in Standby mode.
00166  
00167     
00168     *** WakeUp pin configuration ***
00169     ================================
00170     [..]
00171       (+) WakeUp pins are used to wakeup the system from Standby mode or Shutdown mode. 
00172           The polarity of these pins can be set to configure event detection on high 
00173           level (rising edge) or low level (falling edge).
00174 
00175 
00176    
00177     *** Low Power modes configuration ***
00178     =====================================
00179     [..]
00180       The devices feature 8 low-power modes:
00181       (+) Low-power Run mode: core and peripherals are running, main regulator off, low power regulator on.
00182       (+) Sleep mode: Cortex-M4 core stopped, peripherals kept running, main and low power regulators on.
00183       (+) Low-power Sleep mode: Cortex-M4 core stopped, peripherals kept running, main regulator off, low power regulator on.
00184       (+) Stop 0 mode: all clocks are stopped except LSI and LSE, main and low power regulators on.
00185       (+) Stop 1 mode: all clocks are stopped except LSI and LSE, main regulator off, low power regulator on.
00186       (+) Stop 2 mode: all clocks are stopped except LSI and LSE, main regulator off, low power regulator on, reduced set of waking up IPs compared to Stop 1 mode.      
00187       (+) Standby mode with SRAM2: all clocks are stopped except LSI and LSE, SRAM2 content preserved, main regulator off, low power regulator on. 
00188       (+) Standby mode without SRAM2: all clocks are stopped except LSI and LSE, main and low power regulators off.
00189       (+) Shutdown mode: all clocks are stopped except LSE, main and low power regulators off.
00190 
00191 
00192    *** Low-power run mode ***
00193    ==========================
00194     [..]
00195       (+) Entry: (from main run mode)
00196         (++) set LPR bit with HAL_PWREx_EnableLowPowerRunMode() API after having decreased the system clock below 2 MHz. 
00197      
00198       (+) Exit:
00199         (++) clear LPR bit then wait for REGLP bit to be reset with HAL_PWREx_DisableLowPowerRunMode() API. Only
00200              then can the system clock frequency be increased above 2 MHz.
00201 
00202 
00203    *** Sleep mode / Low-power sleep mode ***
00204    =========================================
00205     [..]
00206       (+) Entry:                                                         
00207           The Sleep mode / Low-power Sleep mode is entered thru HAL_PWR_EnterSLEEPMode() API
00208           in specifying whether or not the regulator is forced to low-power mode and if exit is interrupt or event-triggered. 
00209           (++) PWR_MAINREGULATOR_ON: Sleep mode (regulator in main mode).              
00210           (++) PWR_LOWPOWERREGULATOR_ON: Low-power sleep (regulator in low power mode).
00211           In the latter case, the system clock frequency must have been decreased below 2 MHz beforehand.           
00212           (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
00213           (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
00214      
00215       (+) WFI Exit:
00216         (++) Any peripheral interrupt acknowledged by the nested vectored interrupt
00217              controller (NVIC) or any wake-up event.
00218              
00219       (+) WFE Exit:
00220         (++) Any wake-up event such as an EXTI line configured in event mode.             
00221              
00222          [..] When exiting the Low-power sleep mode by issuing an interrupt or a wakeup event, 
00223              the MCU is in Low-power Run mode. 
00224 
00225    *** Stop 0, Stop 1 and Stop 2 modes ***
00226    ===============================
00227     [..]
00228       (+) Entry:                                                 
00229           The Stop 0, Stop 1 or Stop 2 modes are entered thru the following API's:
00230           (++) HAL_PWREx_EnterSTOP0Mode() for mode 0 or HAL_PWREx_EnterSTOP1Mode() for mode 1 or for porting reasons HAL_PWR_EnterSTOPMode().
00231           (++) HAL_PWREx_EnterSTOP2Mode() for mode 2.  
00232       (+) Regulator setting (applicable to HAL_PWR_EnterSTOPMode() only):
00233           (++) PWR_MAINREGULATOR_ON
00234           (++) PWR_LOWPOWERREGULATOR_ON
00235       (+) Exit (interrupt or event-triggered, specified when entering STOP mode):
00236           (++) PWR_STOPENTRY_WFI: enter Stop mode with WFI instruction
00237           (++) PWR_STOPENTRY_WFE: enter Stop mode with WFE instruction
00238           
00239       (+) WFI Exit:
00240           (++) Any EXTI Line (Internal or External) configured in Interrupt mode.
00241           (++) Some specific communication peripherals (USART, LPUART, I2C) interrupts 
00242                when programmed in wakeup mode. 
00243       (+) WFE Exit:  
00244           (++) Any EXTI Line (Internal or External) configured in Event mode.
00245        
00246        [..]                      
00247           When exiting Stop 0 and Stop 1 modes, the MCU is either in Run mode or in Low-power Run mode
00248           depending on the LPR bit setting. 
00249           When exiting Stop 2 mode, the MCU is in Run mode. 
00250 
00251    *** Standby mode ***
00252    ====================
00253      [..]
00254       The Standby mode offers two options: 
00255       (+) option a) all clocks off except LSI and LSE, RRS bit set (keeps voltage regulator in low power mode).
00256         SRAM and registers contents are lost except for the SRAM2 content, the RTC registers, RTC backup registers 
00257         and Standby circuitry.      
00258       (+) option b) all clocks off except LSI and LSE, RRS bit cleared (voltage regulator then disabled).
00259         SRAM and register contents are lost except for the RTC registers, RTC backup registers 
00260         and Standby circuitry.
00261 
00262       (++) Entry:                                    
00263           (+++) The Standby mode is entered thru HAL_PWR_EnterSTANDBYMode() API. 
00264                 SRAM1 and register contents are lost except for registers in the Backup domain and 
00265                 Standby circuitry. SRAM2 content can be preserved if the bit RRS is set in PWR_CR3 register. 
00266                 To enable this feature, the user can resort to HAL_PWREx_EnableSRAM2ContentRetention() API 
00267                 to set RRS bit.   
00268           
00269       (++) Exit:
00270           (+++) WKUP pin rising edge, RTC alarm or wakeup, tamper event, time-stamp event, 
00271                 external reset in NRST pin, IWDG reset.
00272                 
00273       [..]    After waking up from Standby mode, program execution restarts in the same way as after a Reset.
00274           
00275 
00276     *** Shutdown mode ***
00277    ======================
00278      [..]
00279       In Shutdown mode, 
00280         voltage regulator is disabled, all clocks are off except LSE, RRS bit is cleared.
00281         SRAM and registers contents are lost except for backup domain registers.
00282 
00283       (+) Entry:                                    
00284           The Shutdown mode is entered thru HAL_PWREx_EnterSHUTDOWNMode() API.
00285           
00286       (+) Exit:
00287           (++) WKUP pin rising edge, RTC alarm or wakeup, tamper event, time-stamp event, 
00288                external reset in NRST pin.
00289                
00290          [..] After waking up from Shutdown mode, program execution restarts in the same way as after a Reset.
00291 
00292 
00293    *** Auto-wakeup (AWU) from low-power mode ***
00294    =============================================
00295     [..]
00296       The MCU can be woken up from low-power mode by an RTC Alarm event, an RTC
00297       Wakeup event, a tamper event or a time-stamp event, without depending on
00298       an external interrupt (Auto-wakeup mode).
00299 
00300       (+) RTC auto-wakeup (AWU) from the Stop, Standby and Shutdown modes
00301   
00302 
00303         (++) To wake up from the Stop mode with an RTC alarm event, it is necessary to
00304              configure the RTC to generate the RTC alarm using the HAL_RTC_SetAlarm_IT() function.
00305 
00306         (++) To wake up from the Stop mode with an RTC Tamper or time stamp event, it
00307              is necessary to configure the RTC to detect the tamper or time stamp event using the
00308              HAL_RTCEx_SetTimeStamp_IT() or HAL_RTCEx_SetTamper_IT() functions.
00309 
00310         (++) To wake up from the Stop mode with an RTC WakeUp event, it is necessary to
00311               configure the RTC to generate the RTC WakeUp event using the HAL_RTCEx_SetWakeUpTimer_IT() function.
00312 
00313 @endverbatim
00314   * @{
00315   */
00316 
00317 
00318 
00319 /**
00320   * @brief Configure the voltage threshold detected by the Power Voltage Detector (PVD).
00321   * @param sConfigPVD: pointer to a PWR_PVDTypeDef structure that contains the PVD 
00322   *        configuration information.
00323   * @note Refer to the electrical characteristics of your device datasheet for
00324   *         more details about the voltage thresholds corresponding to each
00325   *         detection level.
00326   * @retval None
00327   */
00328 HAL_StatusTypeDef HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD)
00329 {
00330   /* Check the parameters */
00331   assert_param(IS_PWR_PVD_LEVEL(sConfigPVD->PVDLevel));
00332   assert_param(IS_PWR_PVD_MODE(sConfigPVD->Mode));
00333 
00334   /* Set PLS bits according to PVDLevel value */
00335   MODIFY_REG(PWR->CR2, PWR_CR2_PLS, sConfigPVD->PVDLevel);
00336   
00337   /* Clear any previous config. Keep it clear if no event or IT mode is selected */
00338   __HAL_PWR_PVD_EXTI_DISABLE_EVENT();
00339   __HAL_PWR_PVD_EXTI_DISABLE_IT();
00340   __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); 
00341   __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();
00342 
00343   /* Configure interrupt mode */
00344   if((sConfigPVD->Mode & PVD_MODE_IT) == PVD_MODE_IT)
00345   {
00346     __HAL_PWR_PVD_EXTI_ENABLE_IT();
00347   }
00348   
00349   /* Configure event mode */
00350   if((sConfigPVD->Mode & PVD_MODE_EVT) == PVD_MODE_EVT)
00351   {
00352     __HAL_PWR_PVD_EXTI_ENABLE_EVENT();
00353   }
00354   
00355   /* Configure the edge */
00356   if((sConfigPVD->Mode & PVD_RISING_EDGE) == PVD_RISING_EDGE)
00357   {
00358     __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();
00359   }
00360   
00361   if((sConfigPVD->Mode & PVD_FALLING_EDGE) == PVD_FALLING_EDGE)
00362   {
00363     __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE();
00364   }
00365   
00366   return HAL_OK;
00367 }
00368 
00369 
00370 /**
00371   * @brief Enable the Power Voltage Detector (PVD).
00372   * @retval None
00373   */
00374 void HAL_PWR_EnablePVD(void)
00375 {
00376   SET_BIT(PWR->CR2, PWR_CR2_PVDE);  
00377 }
00378 
00379 /**
00380   * @brief Disable the Power Voltage Detector (PVD).
00381   * @retval None
00382   */
00383 void HAL_PWR_DisablePVD(void)
00384 {
00385   CLEAR_BIT(PWR->CR2, PWR_CR2_PVDE);   
00386 }
00387 
00388 
00389 
00390 
00391 /**
00392   * @brief Enable the WakeUp PINx functionality.
00393   * @param WakeUpPinPolarity: Specifies which Wake-Up pin to enable.
00394   *         This parameter can be one of the following legacy values which set the default polarity 
00395   *         i.e. detection on high level (rising edge):
00396   *           @arg @ref PWR_WAKEUP_PIN1, PWR_WAKEUP_PIN2, PWR_WAKEUP_PIN3, PWR_WAKEUP_PIN4, PWR_WAKEUP_PIN5
00397   *             
00398   *         or one of the following value where the user can explicitly specify the enabled pin and
00399   *         the chosen polarity:  
00400   *           @arg @ref PWR_WAKEUP_PIN1_HIGH or PWR_WAKEUP_PIN1_LOW 
00401   *           @arg @ref PWR_WAKEUP_PIN2_HIGH or PWR_WAKEUP_PIN2_LOW 
00402   *           @arg @ref PWR_WAKEUP_PIN3_HIGH or PWR_WAKEUP_PIN3_LOW 
00403   *           @arg @ref PWR_WAKEUP_PIN4_HIGH or PWR_WAKEUP_PIN4_LOW
00404   *           @arg @ref PWR_WAKEUP_PIN5_HIGH or PWR_WAKEUP_PIN5_LOW 
00405   * @note  PWR_WAKEUP_PINx and PWR_WAKEUP_PINx_HIGH are equivalent.               
00406   * @retval None
00407   */
00408 void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinPolarity)
00409 {
00410   assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinPolarity)); 
00411   
00412   /* Specifies the Wake-Up pin polarity for the event detection 
00413     (rising or falling edge) */
00414   MODIFY_REG(PWR->CR4, (PWR_CR3_EWUP & WakeUpPinPolarity), (WakeUpPinPolarity >> PWR_WUP_POLARITY_SHIFT)); 
00415     
00416   /* Enable wake-up pin */
00417   SET_BIT(PWR->CR3, (PWR_CR3_EWUP & WakeUpPinPolarity));
00418 
00419     
00420 }
00421 
00422 /**
00423   * @brief Disable the WakeUp PINx functionality.
00424   * @param WakeUpPinx: Specifies the Power Wake-Up pin to disable.
00425   *         This parameter can be one of the following values:
00426   *           @arg @ref PWR_WAKEUP_PIN1, PWR_WAKEUP_PIN2, PWR_WAKEUP_PIN3, PWR_WAKEUP_PIN4, PWR_WAKEUP_PIN5 
00427   * @retval None
00428   */
00429 void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx)
00430 {
00431   assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx));
00432 
00433   CLEAR_BIT(PWR->CR3, (PWR_CR3_EWUP & WakeUpPinx)); 
00434 }
00435 
00436 
00437 /**
00438   * @brief Enter Sleep or Low-power Sleep mode.
00439   * @note  In Sleep/Low-power Sleep mode, all I/O pins keep the same state as in Run mode.
00440   * @param Regulator: Specifies the regulator state in Sleep/Low-power Sleep mode.
00441   *          This parameter can be one of the following values:
00442   *            @arg @ref PWR_MAINREGULATOR_ON Sleep mode (regulator in main mode)
00443   *            @arg @ref PWR_LOWPOWERREGULATOR_ON Low-power Sleep mode (regulator in low-power mode) 
00444   * @note  Low-power Sleep mode is entered from Low-power Run mode. Therefore, if not yet 
00445   *        in Low-power Run mode before calling HAL_PWR_EnterSLEEPMode() with Regulator set 
00446   *        to PWR_LOWPOWERREGULATOR_ON, the user can optionally configure the    
00447   *        Flash in power-down monde in setting the SLEEP_PD bit in FLASH_ACR register.
00448   *        Additionally, the clock frequency must be reduced below 2 MHz.
00449   *        Setting SLEEP_PD in FLASH_ACR then appropriately reducing the clock frequency must 
00450   *        be done before calling HAL_PWR_EnterSLEEPMode() API. 
00451   * @note  When exiting Low-power Sleep mode, the MCU is in Low-power Run mode. To move in 
00452   *        Run mode, the user must resort to HAL_PWREx_DisableLowPowerRunMode() API.       
00453   * @param SLEEPEntry: Specifies if Sleep mode is entered with WFI or WFE instruction.
00454   *           This parameter can be one of the following values:
00455   *            @arg @ref PWR_SLEEPENTRY_WFI enter Sleep or Low-power Sleep mode with WFI instruction
00456   *            @arg @ref PWR_SLEEPENTRY_WFE enter Sleep or Low-power Sleep mode with WFE instruction
00457   * @note  When WFI entry is used, tick interrupt have to be disabled if not desired as 
00458   *        the interrupt wake up source.   
00459   * @retval None
00460   */
00461 void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry)
00462 {
00463   /* Check the parameters */
00464   assert_param(IS_PWR_REGULATOR(Regulator));
00465   assert_param(IS_PWR_SLEEP_ENTRY(SLEEPEntry));
00466 
00467   /* Set Regulator parameter */
00468   if (Regulator == PWR_MAINREGULATOR_ON)
00469   {
00470     /* If in low-power run mode at this point, exit it */
00471     if (HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_REGLPF))
00472     {
00473       HAL_PWREx_DisableLowPowerRunMode();  
00474     } 
00475     /* Regulator now in main mode. */
00476   }
00477   else
00478   {
00479     /* If in run mode, first move to low-power run mode.
00480        The system clock frequency must be below 2 MHz at this point. */
00481     if (HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_REGLPF) == RESET)
00482     {
00483       HAL_PWREx_EnableLowPowerRunMode();  
00484     } 
00485   } 
00486     
00487   /* Clear SLEEPDEEP bit of Cortex System Control Register */
00488   CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
00489   
00490   /* Select SLEEP mode entry -------------------------------------------------*/
00491   if(SLEEPEntry == PWR_SLEEPENTRY_WFI)
00492   {
00493     /* Request Wait For Interrupt */
00494     __WFI();
00495   }
00496   else
00497   {
00498     /* Request Wait For Event */
00499     __SEV();
00500     __WFE();
00501     __WFE();
00502   }
00503 
00504 }
00505 
00506 
00507 /**
00508   * @brief Enter Stop mode
00509   * @note  This API is named HAL_PWR_EnterSTOPMode to ensure compatibility with legacy code running
00510   *        on devices where only "Stop mode" is mentioned with main or low power regulator ON.
00511   * @note  In Stop mode, all I/O pins keep the same state as in Run mode.          
00512   * @note  All clocks in the VCORE domain are stopped; the PLL, the MSI, 
00513   *        the HSI and the HSE oscillators are disabled. Some peripherals with the wakeup capability 
00514   *        (I2Cx, USARTx and LPUART) can switch on the HSI to receive a frame, and switch off the HSI 
00515   *        after receiving the frame if it is not a wakeup frame. In this case, the HSI clock is propagated 
00516   *        only to the peripheral requesting it.
00517   *        SRAM1, SRAM2 and register contents are preserved.
00518   *        The BOR is available.
00519   *        The voltage regulator can be configured either in normal (Stop 0) or low-power mode (Stop 1).  
00520   * @note  When exiting Stop 0 or Stop 1 mode by issuing an interrupt or a wakeup event,
00521   *         the HSI RC oscillator is selected as system clock if STOPWUCK bit in RCC_CFGR register
00522   *         is set; the MSI oscillator is selected if STOPWUCK is cleared.  
00523   * @note  When the voltage regulator operates in low power mode (Stop 1), an additional
00524   *         startup delay is incurred when waking up.
00525   *         By keeping the internal regulator ON during Stop mode (Stop 0), the consumption
00526   *         is higher although the startup time is reduced.
00527   * @param Regulator: Specifies the regulator state in Stop mode.
00528   *          This parameter can be one of the following values:
00529   *            @arg @ref PWR_MAINREGULATOR_ON  Stop 0 mode (main regulator ON)
00530   *            @arg @ref PWR_LOWPOWERREGULATOR_ON  Stop 1 mode (low power regulator ON) 
00531   * @param STOPEntry: Specifies Stop 0 or Stop 1 mode is entered with WFI or WFE instruction.
00532   *          This parameter can be one of the following values:
00533   *            @arg @ref PWR_STOPENTRY_WFI  Enter Stop 0 or Stop 1 mode with WFI instruction.
00534   *            @arg @ref PWR_STOPENTRY_WFE  Enter Stop 0 or Stop 1 mode with WFE instruction.
00535   * @retval None
00536   */
00537 void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry)
00538 {
00539   /* Check the parameters */
00540   assert_param(IS_PWR_REGULATOR(Regulator));
00541   
00542   if(Regulator == PWR_LOWPOWERREGULATOR_ON)
00543   {
00544     HAL_PWREx_EnterSTOP1Mode(STOPEntry);
00545   }
00546   else
00547   {
00548     HAL_PWREx_EnterSTOP0Mode(STOPEntry);
00549   }
00550 }
00551 
00552 /**
00553   * @brief Enter Standby mode.
00554   * @note  In Standby mode, the PLL, the HSI, the MSI and the HSE oscillators are switched 
00555   *        off. The voltage regulator is disabled, except when SRAM2 content is preserved
00556   *        in which case the regulator is in low-power mode. 
00557   *        SRAM1 and register contents are lost except for registers in the Backup domain and 
00558   *        Standby circuitry. SRAM2 content can be preserved if the bit RRS is set in PWR_CR3 register. 
00559   *        To enable this feature, the user can resort to HAL_PWREx_EnableSRAM2ContentRetention() API 
00560   *        to set RRS bit.   
00561   *        The BOR is available.  
00562   * @note  The I/Os can be configured either with a pull-up or pull-down or can be kept in analog state.
00563   *        HAL_PWREx_EnableGPIOPullUp() and HAL_PWREx_EnableGPIOPullDown() respectively enable Pull Up and
00564   *        Pull Down state, HAL_PWREx_DisableGPIOPullUp() and HAL_PWREx_DisableGPIOPullDown() disable the
00565   *        same.
00566   *        These states are effective in Standby mode only if APC bit is set through
00567   *        HAL_PWREx_EnablePullUpPullDownConfig() API.        
00568   * @retval None
00569   */
00570 void HAL_PWR_EnterSTANDBYMode(void)
00571 {
00572   /* Set Stand-by mode */
00573   MODIFY_REG(PWR->CR1, PWR_CR1_LPMS, PWR_CR1_LPMS_STANDBY);
00574 
00575   /* Set SLEEPDEEP bit of Cortex System Control Register */
00576   SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
00577 
00578 /* This option is used to ensure that store operations are completed */
00579 #if defined ( __CC_ARM)
00580   __force_stores();
00581 #endif
00582   /* Request Wait For Interrupt */
00583   __WFI();
00584 }
00585 
00586 
00587 
00588 /**
00589   * @brief Indicate Sleep-On-Exit when returning from Handler mode to Thread mode. 
00590   * @note Set SLEEPONEXIT bit of SCR register. When this bit is set, the processor 
00591   *       re-enters SLEEP mode when an interruption handling is over.
00592   *       Setting this bit is useful when the processor is expected to run only on
00593   *       interruptions handling.         
00594   * @retval None
00595   */
00596 void HAL_PWR_EnableSleepOnExit(void)
00597 {
00598   /* Set SLEEPONEXIT bit of Cortex System Control Register */
00599   SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
00600 }
00601 
00602 
00603 /**
00604   * @brief Disable Sleep-On-Exit feature when returning from Handler mode to Thread mode. 
00605   * @note Clear SLEEPONEXIT bit of SCR register. When this bit is set, the processor 
00606   *       re-enters SLEEP mode when an interruption handling is over.          
00607   * @retval None
00608   */
00609 void HAL_PWR_DisableSleepOnExit(void)
00610 {
00611   /* Clear SLEEPONEXIT bit of Cortex System Control Register */
00612   CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
00613 }
00614 
00615 
00616 
00617 /**
00618   * @brief Enable CORTEX M4 SEVONPEND bit. 
00619   * @note Set SEVONPEND bit of SCR register. When this bit is set, this causes 
00620   *       WFE to wake up when an interrupt moves from inactive to pended.
00621   * @retval None
00622   */
00623 void HAL_PWR_EnableSEVOnPend(void)
00624 {
00625   /* Set SEVONPEND bit of Cortex System Control Register */
00626   SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
00627 }
00628 
00629 
00630 /**
00631   * @brief Disable CORTEX M4 SEVONPEND bit. 
00632   * @note Clear SEVONPEND bit of SCR register. When this bit is set, this causes 
00633   *       WFE to wake up when an interrupt moves from inactive to pended.         
00634   * @retval None
00635   */
00636 void HAL_PWR_DisableSEVOnPend(void)
00637 {
00638   /* Clear SEVONPEND bit of Cortex System Control Register */
00639   CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
00640 }
00641 
00642 
00643 
00644 
00645 
00646 /**
00647   * @brief PWR PVD interrupt callback
00648   * @retval None
00649   */
00650 __weak void HAL_PWR_PVDCallback(void)
00651 {
00652   /* NOTE : This function should not be modified; when the callback is needed,
00653             the HAL_PWR_PVDCallback can be implemented in the user file
00654    */
00655 }
00656 
00657 /**
00658   * @}
00659   */
00660 
00661 /**
00662   * @}
00663   */
00664 
00665 #endif /* HAL_PWR_MODULE_ENABLED */
00666 /**
00667   * @}
00668   */
00669 
00670 /**
00671   * @}
00672   */
00673 
00674 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/