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STM32L486xx HAL User Manual
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32l4xx_hal_i2c.h 00004 * @author MCD Application Team 00005 * @brief Header file of I2C HAL module. 00006 ****************************************************************************** 00007 * @attention 00008 * 00009 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> 00010 * 00011 * Redistribution and use in source and binary forms, with or without modification, 00012 * are permitted provided that the following conditions are met: 00013 * 1. Redistributions of source code must retain the above copyright notice, 00014 * this list of conditions and the following disclaimer. 00015 * 2. Redistributions in binary form must reproduce the above copyright notice, 00016 * this list of conditions and the following disclaimer in the documentation 00017 * and/or other materials provided with the distribution. 00018 * 3. Neither the name of STMicroelectronics nor the names of its contributors 00019 * may be used to endorse or promote products derived from this software 00020 * without specific prior written permission. 00021 * 00022 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 00023 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 00024 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 00025 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 00026 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 00027 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 00028 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00029 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 00030 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 00031 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00032 * 00033 ****************************************************************************** 00034 */ 00035 00036 /* Define to prevent recursive inclusion -------------------------------------*/ 00037 #ifndef STM32L4xx_HAL_I2C_H 00038 #define STM32L4xx_HAL_I2C_H 00039 00040 #ifdef __cplusplus 00041 extern "C" { 00042 #endif 00043 00044 /* Includes ------------------------------------------------------------------*/ 00045 #include "stm32l4xx_hal_def.h" 00046 00047 /** @addtogroup STM32L4xx_HAL_Driver 00048 * @{ 00049 */ 00050 00051 /** @addtogroup I2C 00052 * @{ 00053 */ 00054 00055 /* Exported types ------------------------------------------------------------*/ 00056 /** @defgroup I2C_Exported_Types I2C Exported Types 00057 * @{ 00058 */ 00059 00060 /** @defgroup I2C_Configuration_Structure_definition I2C Configuration Structure definition 00061 * @brief I2C Configuration Structure definition 00062 * @{ 00063 */ 00064 typedef struct 00065 { 00066 uint32_t Timing; /*!< Specifies the I2C_TIMINGR_register value. 00067 This parameter calculated by referring to I2C initialization 00068 section in Reference manual */ 00069 00070 uint32_t OwnAddress1; /*!< Specifies the first device own address. 00071 This parameter can be a 7-bit or 10-bit address. */ 00072 00073 uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode is selected. 00074 This parameter can be a value of @ref I2C_ADDRESSING_MODE */ 00075 00076 uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected. 00077 This parameter can be a value of @ref I2C_DUAL_ADDRESSING_MODE */ 00078 00079 uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected 00080 This parameter can be a 7-bit address. */ 00081 00082 uint32_t OwnAddress2Masks; /*!< Specifies the acknowledge mask address second device own address if dual addressing mode is selected 00083 This parameter can be a value of @ref I2C_OWN_ADDRESS2_MASKS */ 00084 00085 uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected. 00086 This parameter can be a value of @ref I2C_GENERAL_CALL_ADDRESSING_MODE */ 00087 00088 uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected. 00089 This parameter can be a value of @ref I2C_NOSTRETCH_MODE */ 00090 00091 } I2C_InitTypeDef; 00092 00093 /** 00094 * @} 00095 */ 00096 00097 /** @defgroup HAL_state_structure_definition HAL state structure definition 00098 * @brief HAL State structure definition 00099 * @note HAL I2C State value coding follow below described bitmap :\n 00100 * b7-b6 Error information\n 00101 * 00 : No Error\n 00102 * 01 : Abort (Abort user request on going)\n 00103 * 10 : Timeout\n 00104 * 11 : Error\n 00105 * b5 IP initilisation status\n 00106 * 0 : Reset (IP not initialized)\n 00107 * 1 : Init done (IP initialized and ready to use. HAL I2C Init function called)\n 00108 * b4 (not used)\n 00109 * x : Should be set to 0\n 00110 * b3\n 00111 * 0 : Ready or Busy (No Listen mode ongoing)\n 00112 * 1 : Listen (IP in Address Listen Mode)\n 00113 * b2 Intrinsic process state\n 00114 * 0 : Ready\n 00115 * 1 : Busy (IP busy with some configuration or internal operations)\n 00116 * b1 Rx state\n 00117 * 0 : Ready (no Rx operation ongoing)\n 00118 * 1 : Busy (Rx operation ongoing)\n 00119 * b0 Tx state\n 00120 * 0 : Ready (no Tx operation ongoing)\n 00121 * 1 : Busy (Tx operation ongoing) 00122 * @{ 00123 */ 00124 typedef enum 00125 { 00126 HAL_I2C_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized */ 00127 HAL_I2C_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use */ 00128 HAL_I2C_STATE_BUSY = 0x24U, /*!< An internal process is ongoing */ 00129 HAL_I2C_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing */ 00130 HAL_I2C_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */ 00131 HAL_I2C_STATE_LISTEN = 0x28U, /*!< Address Listen Mode is ongoing */ 00132 HAL_I2C_STATE_BUSY_TX_LISTEN = 0x29U, /*!< Address Listen Mode and Data Transmission 00133 process is ongoing */ 00134 HAL_I2C_STATE_BUSY_RX_LISTEN = 0x2AU, /*!< Address Listen Mode and Data Reception 00135 process is ongoing */ 00136 HAL_I2C_STATE_ABORT = 0x60U, /*!< Abort user request ongoing */ 00137 HAL_I2C_STATE_TIMEOUT = 0xA0U, /*!< Timeout state */ 00138 HAL_I2C_STATE_ERROR = 0xE0U /*!< Error */ 00139 00140 } HAL_I2C_StateTypeDef; 00141 00142 /** 00143 * @} 00144 */ 00145 00146 /** @defgroup HAL_mode_structure_definition HAL mode structure definition 00147 * @brief HAL Mode structure definition 00148 * @note HAL I2C Mode value coding follow below described bitmap :\n 00149 * b7 (not used)\n 00150 * x : Should be set to 0\n 00151 * b6\n 00152 * 0 : None\n 00153 * 1 : Memory (HAL I2C communication is in Memory Mode)\n 00154 * b5\n 00155 * 0 : None\n 00156 * 1 : Slave (HAL I2C communication is in Slave Mode)\n 00157 * b4\n 00158 * 0 : None\n 00159 * 1 : Master (HAL I2C communication is in Master Mode)\n 00160 * b3-b2-b1-b0 (not used)\n 00161 * xxxx : Should be set to 0000 00162 * @{ 00163 */ 00164 typedef enum 00165 { 00166 HAL_I2C_MODE_NONE = 0x00U, /*!< No I2C communication on going */ 00167 HAL_I2C_MODE_MASTER = 0x10U, /*!< I2C communication is in Master Mode */ 00168 HAL_I2C_MODE_SLAVE = 0x20U, /*!< I2C communication is in Slave Mode */ 00169 HAL_I2C_MODE_MEM = 0x40U /*!< I2C communication is in Memory Mode */ 00170 00171 } HAL_I2C_ModeTypeDef; 00172 00173 /** 00174 * @} 00175 */ 00176 00177 /** @defgroup I2C_Error_Code_definition I2C Error Code definition 00178 * @brief I2C Error Code definition 00179 * @{ 00180 */ 00181 #define HAL_I2C_ERROR_NONE (0x00000000U) /*!< No error */ 00182 #define HAL_I2C_ERROR_BERR (0x00000001U) /*!< BERR error */ 00183 #define HAL_I2C_ERROR_ARLO (0x00000002U) /*!< ARLO error */ 00184 #define HAL_I2C_ERROR_AF (0x00000004U) /*!< ACKF error */ 00185 #define HAL_I2C_ERROR_OVR (0x00000008U) /*!< OVR error */ 00186 #define HAL_I2C_ERROR_DMA (0x00000010U) /*!< DMA transfer error */ 00187 #define HAL_I2C_ERROR_TIMEOUT (0x00000020U) /*!< Timeout error */ 00188 #define HAL_I2C_ERROR_SIZE (0x00000040U) /*!< Size Management error */ 00189 #define HAL_I2C_ERROR_DMA_PARAM (0x00000080U) /*!< DMA Parameter Error */ 00190 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) 00191 #define HAL_I2C_ERROR_INVALID_CALLBACK (0x00000100U) /*!< Invalid Callback error */ 00192 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ 00193 /** 00194 * @} 00195 */ 00196 00197 /** @defgroup I2C_handle_Structure_definition I2C handle Structure definition 00198 * @brief I2C handle Structure definition 00199 * @{ 00200 */ 00201 typedef struct __I2C_HandleTypeDef 00202 { 00203 I2C_TypeDef *Instance; /*!< I2C registers base address */ 00204 00205 I2C_InitTypeDef Init; /*!< I2C communication parameters */ 00206 00207 uint8_t *pBuffPtr; /*!< Pointer to I2C transfer buffer */ 00208 00209 uint16_t XferSize; /*!< I2C transfer size */ 00210 00211 __IO uint16_t XferCount; /*!< I2C transfer counter */ 00212 00213 __IO uint32_t XferOptions; /*!< I2C sequantial transfer options, this parameter can 00214 be a value of @ref I2C_XFEROPTIONS */ 00215 00216 __IO uint32_t PreviousState; /*!< I2C communication Previous state */ 00217 00218 HAL_StatusTypeDef(*XferISR)(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources); /*!< I2C transfer IRQ handler function pointer */ 00219 00220 DMA_HandleTypeDef *hdmatx; /*!< I2C Tx DMA handle parameters */ 00221 00222 DMA_HandleTypeDef *hdmarx; /*!< I2C Rx DMA handle parameters */ 00223 00224 HAL_LockTypeDef Lock; /*!< I2C locking object */ 00225 00226 __IO HAL_I2C_StateTypeDef State; /*!< I2C communication state */ 00227 00228 __IO HAL_I2C_ModeTypeDef Mode; /*!< I2C communication mode */ 00229 00230 __IO uint32_t ErrorCode; /*!< I2C Error code */ 00231 00232 __IO uint32_t AddrEventCount; /*!< I2C Address Event counter */ 00233 00234 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) 00235 void (* MasterTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Master Tx Transfer completed callback */ 00236 void (* MasterRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Master Rx Transfer completed callback */ 00237 void (* SlaveTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Slave Tx Transfer completed callback */ 00238 void (* SlaveRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Slave Rx Transfer completed callback */ 00239 void (* ListenCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Listen Complete callback */ 00240 void (* MemTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Memory Tx Transfer completed callback */ 00241 void (* MemRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Memory Rx Transfer completed callback */ 00242 void (* ErrorCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Error callback */ 00243 void (* AbortCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Abort callback */ 00244 00245 void (* AddrCallback)(struct __I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); /*!< I2C Slave Address Match callback */ 00246 00247 void (* MspInitCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Msp Init callback */ 00248 void (* MspDeInitCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Msp DeInit callback */ 00249 00250 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ 00251 } I2C_HandleTypeDef; 00252 00253 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) 00254 /** 00255 * @brief HAL I2C Callback ID enumeration definition 00256 */ 00257 typedef enum 00258 { 00259 HAL_I2C_MASTER_TX_COMPLETE_CB_ID = 0x00U, /*!< I2C Master Tx Transfer completed callback ID */ 00260 HAL_I2C_MASTER_RX_COMPLETE_CB_ID = 0x01U, /*!< I2C Master Rx Transfer completed callback ID */ 00261 HAL_I2C_SLAVE_TX_COMPLETE_CB_ID = 0x02U, /*!< I2C Slave Tx Transfer completed callback ID */ 00262 HAL_I2C_SLAVE_RX_COMPLETE_CB_ID = 0x03U, /*!< I2C Slave Rx Transfer completed callback ID */ 00263 HAL_I2C_LISTEN_COMPLETE_CB_ID = 0x04U, /*!< I2C Listen Complete callback ID */ 00264 HAL_I2C_MEM_TX_COMPLETE_CB_ID = 0x05U, /*!< I2C Memory Tx Transfer callback ID */ 00265 HAL_I2C_MEM_RX_COMPLETE_CB_ID = 0x06U, /*!< I2C Memory Rx Transfer completed callback ID */ 00266 HAL_I2C_ERROR_CB_ID = 0x07U, /*!< I2C Error callback ID */ 00267 HAL_I2C_ABORT_CB_ID = 0x08U, /*!< I2C Abort callback ID */ 00268 00269 HAL_I2C_MSPINIT_CB_ID = 0x09U, /*!< I2C Msp Init callback ID */ 00270 HAL_I2C_MSPDEINIT_CB_ID = 0x0AU /*!< I2C Msp DeInit callback ID */ 00271 00272 } HAL_I2C_CallbackIDTypeDef; 00273 00274 /** 00275 * @brief HAL I2C Callback pointer definition 00276 */ 00277 typedef void (*pI2C_CallbackTypeDef)(I2C_HandleTypeDef *hi2c); /*!< pointer to an I2C callback function */ 00278 typedef void (*pI2C_AddrCallbackTypeDef)(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); /*!< pointer to an I2C Address Match callback function */ 00279 00280 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ 00281 /** 00282 * @} 00283 */ 00284 00285 /** 00286 * @} 00287 */ 00288 /* Exported constants --------------------------------------------------------*/ 00289 00290 /** @defgroup I2C_Exported_Constants I2C Exported Constants 00291 * @{ 00292 */ 00293 00294 /** @defgroup I2C_XFEROPTIONS I2C Sequential Transfer Options 00295 * @{ 00296 */ 00297 #define I2C_FIRST_FRAME ((uint32_t)I2C_SOFTEND_MODE) 00298 #define I2C_FIRST_AND_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE)) 00299 #define I2C_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE)) 00300 #define I2C_FIRST_AND_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE) 00301 #define I2C_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE) 00302 #define I2C_LAST_FRAME_NO_STOP ((uint32_t)I2C_SOFTEND_MODE) 00303 /** 00304 * @} 00305 */ 00306 00307 /** @defgroup I2C_ADDRESSING_MODE I2C Addressing Mode 00308 * @{ 00309 */ 00310 #define I2C_ADDRESSINGMODE_7BIT (0x00000001U) 00311 #define I2C_ADDRESSINGMODE_10BIT (0x00000002U) 00312 /** 00313 * @} 00314 */ 00315 00316 /** @defgroup I2C_DUAL_ADDRESSING_MODE I2C Dual Addressing Mode 00317 * @{ 00318 */ 00319 #define I2C_DUALADDRESS_DISABLE (0x00000000U) 00320 #define I2C_DUALADDRESS_ENABLE I2C_OAR2_OA2EN 00321 /** 00322 * @} 00323 */ 00324 00325 /** @defgroup I2C_OWN_ADDRESS2_MASKS I2C Own Address2 Masks 00326 * @{ 00327 */ 00328 #define I2C_OA2_NOMASK ((uint8_t)0x00U) 00329 #define I2C_OA2_MASK01 ((uint8_t)0x01U) 00330 #define I2C_OA2_MASK02 ((uint8_t)0x02U) 00331 #define I2C_OA2_MASK03 ((uint8_t)0x03U) 00332 #define I2C_OA2_MASK04 ((uint8_t)0x04U) 00333 #define I2C_OA2_MASK05 ((uint8_t)0x05U) 00334 #define I2C_OA2_MASK06 ((uint8_t)0x06U) 00335 #define I2C_OA2_MASK07 ((uint8_t)0x07U) 00336 /** 00337 * @} 00338 */ 00339 00340 /** @defgroup I2C_GENERAL_CALL_ADDRESSING_MODE I2C General Call Addressing Mode 00341 * @{ 00342 */ 00343 #define I2C_GENERALCALL_DISABLE (0x00000000U) 00344 #define I2C_GENERALCALL_ENABLE I2C_CR1_GCEN 00345 /** 00346 * @} 00347 */ 00348 00349 /** @defgroup I2C_NOSTRETCH_MODE I2C No-Stretch Mode 00350 * @{ 00351 */ 00352 #define I2C_NOSTRETCH_DISABLE (0x00000000U) 00353 #define I2C_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH 00354 /** 00355 * @} 00356 */ 00357 00358 /** @defgroup I2C_MEMORY_ADDRESS_SIZE I2C Memory Address Size 00359 * @{ 00360 */ 00361 #define I2C_MEMADD_SIZE_8BIT (0x00000001U) 00362 #define I2C_MEMADD_SIZE_16BIT (0x00000002U) 00363 /** 00364 * @} 00365 */ 00366 00367 /** @defgroup I2C_XFERDIRECTION I2C Transfer Direction Master Point of View 00368 * @{ 00369 */ 00370 #define I2C_DIRECTION_TRANSMIT (0x00000000U) 00371 #define I2C_DIRECTION_RECEIVE (0x00000001U) 00372 /** 00373 * @} 00374 */ 00375 00376 /** @defgroup I2C_RELOAD_END_MODE I2C Reload End Mode 00377 * @{ 00378 */ 00379 #define I2C_RELOAD_MODE I2C_CR2_RELOAD 00380 #define I2C_AUTOEND_MODE I2C_CR2_AUTOEND 00381 #define I2C_SOFTEND_MODE (0x00000000U) 00382 /** 00383 * @} 00384 */ 00385 00386 /** @defgroup I2C_START_STOP_MODE I2C Start or Stop Mode 00387 * @{ 00388 */ 00389 #define I2C_NO_STARTSTOP (0x00000000U) 00390 #define I2C_GENERATE_STOP (uint32_t)(0x80000000U | I2C_CR2_STOP) 00391 #define I2C_GENERATE_START_READ (uint32_t)(0x80000000U | I2C_CR2_START | I2C_CR2_RD_WRN) 00392 #define I2C_GENERATE_START_WRITE (uint32_t)(0x80000000U | I2C_CR2_START) 00393 /** 00394 * @} 00395 */ 00396 00397 /** @defgroup I2C_Interrupt_configuration_definition I2C Interrupt configuration definition 00398 * @brief I2C Interrupt definition 00399 * Elements values convention: 0xXXXXXXXX 00400 * - XXXXXXXX : Interrupt control mask 00401 * @{ 00402 */ 00403 #define I2C_IT_ERRI I2C_CR1_ERRIE 00404 #define I2C_IT_TCI I2C_CR1_TCIE 00405 #define I2C_IT_STOPI I2C_CR1_STOPIE 00406 #define I2C_IT_NACKI I2C_CR1_NACKIE 00407 #define I2C_IT_ADDRI I2C_CR1_ADDRIE 00408 #define I2C_IT_RXI I2C_CR1_RXIE 00409 #define I2C_IT_TXI I2C_CR1_TXIE 00410 /** 00411 * @} 00412 */ 00413 00414 /** @defgroup I2C_Flag_definition I2C Flag definition 00415 * @{ 00416 */ 00417 #define I2C_FLAG_TXE I2C_ISR_TXE 00418 #define I2C_FLAG_TXIS I2C_ISR_TXIS 00419 #define I2C_FLAG_RXNE I2C_ISR_RXNE 00420 #define I2C_FLAG_ADDR I2C_ISR_ADDR 00421 #define I2C_FLAG_AF I2C_ISR_NACKF 00422 #define I2C_FLAG_STOPF I2C_ISR_STOPF 00423 #define I2C_FLAG_TC I2C_ISR_TC 00424 #define I2C_FLAG_TCR I2C_ISR_TCR 00425 #define I2C_FLAG_BERR I2C_ISR_BERR 00426 #define I2C_FLAG_ARLO I2C_ISR_ARLO 00427 #define I2C_FLAG_OVR I2C_ISR_OVR 00428 #define I2C_FLAG_PECERR I2C_ISR_PECERR 00429 #define I2C_FLAG_TIMEOUT I2C_ISR_TIMEOUT 00430 #define I2C_FLAG_ALERT I2C_ISR_ALERT 00431 #define I2C_FLAG_BUSY I2C_ISR_BUSY 00432 #define I2C_FLAG_DIR I2C_ISR_DIR 00433 /** 00434 * @} 00435 */ 00436 00437 /** 00438 * @} 00439 */ 00440 00441 /* Exported macros -----------------------------------------------------------*/ 00442 00443 /** @defgroup I2C_Exported_Macros I2C Exported Macros 00444 * @{ 00445 */ 00446 00447 /** @brief Reset I2C handle state. 00448 * @param __HANDLE__ specifies the I2C Handle. 00449 * @retval None 00450 */ 00451 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) 00452 #define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) do{ \ 00453 (__HANDLE__)->State = HAL_I2C_STATE_RESET; \ 00454 (__HANDLE__)->MspInitCallback = NULL; \ 00455 (__HANDLE__)->MspDeInitCallback = NULL; \ 00456 } while(0) 00457 #else 00458 #define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2C_STATE_RESET) 00459 #endif 00460 00461 /** @brief Enable the specified I2C interrupt. 00462 * @param __HANDLE__ specifies the I2C Handle. 00463 * @param __INTERRUPT__ specifies the interrupt source to enable. 00464 * This parameter can be one of the following values: 00465 * @arg @ref I2C_IT_ERRI Errors interrupt enable 00466 * @arg @ref I2C_IT_TCI Transfer complete interrupt enable 00467 * @arg @ref I2C_IT_STOPI STOP detection interrupt enable 00468 * @arg @ref I2C_IT_NACKI NACK received interrupt enable 00469 * @arg @ref I2C_IT_ADDRI Address match interrupt enable 00470 * @arg @ref I2C_IT_RXI RX interrupt enable 00471 * @arg @ref I2C_IT_TXI TX interrupt enable 00472 * 00473 * @retval None 00474 */ 00475 #define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__)) 00476 00477 /** @brief Disable the specified I2C interrupt. 00478 * @param __HANDLE__ specifies the I2C Handle. 00479 * @param __INTERRUPT__ specifies the interrupt source to disable. 00480 * This parameter can be one of the following values: 00481 * @arg @ref I2C_IT_ERRI Errors interrupt enable 00482 * @arg @ref I2C_IT_TCI Transfer complete interrupt enable 00483 * @arg @ref I2C_IT_STOPI STOP detection interrupt enable 00484 * @arg @ref I2C_IT_NACKI NACK received interrupt enable 00485 * @arg @ref I2C_IT_ADDRI Address match interrupt enable 00486 * @arg @ref I2C_IT_RXI RX interrupt enable 00487 * @arg @ref I2C_IT_TXI TX interrupt enable 00488 * 00489 * @retval None 00490 */ 00491 #define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__))) 00492 00493 /** @brief Check whether the specified I2C interrupt source is enabled or not. 00494 * @param __HANDLE__ specifies the I2C Handle. 00495 * @param __INTERRUPT__ specifies the I2C interrupt source to check. 00496 * This parameter can be one of the following values: 00497 * @arg @ref I2C_IT_ERRI Errors interrupt enable 00498 * @arg @ref I2C_IT_TCI Transfer complete interrupt enable 00499 * @arg @ref I2C_IT_STOPI STOP detection interrupt enable 00500 * @arg @ref I2C_IT_NACKI NACK received interrupt enable 00501 * @arg @ref I2C_IT_ADDRI Address match interrupt enable 00502 * @arg @ref I2C_IT_RXI RX interrupt enable 00503 * @arg @ref I2C_IT_TXI TX interrupt enable 00504 * 00505 * @retval The new state of __INTERRUPT__ (SET or RESET). 00506 */ 00507 #define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 00508 00509 /** @brief Check whether the specified I2C flag is set or not. 00510 * @param __HANDLE__ specifies the I2C Handle. 00511 * @param __FLAG__ specifies the flag to check. 00512 * This parameter can be one of the following values: 00513 * @arg @ref I2C_FLAG_TXE Transmit data register empty 00514 * @arg @ref I2C_FLAG_TXIS Transmit interrupt status 00515 * @arg @ref I2C_FLAG_RXNE Receive data register not empty 00516 * @arg @ref I2C_FLAG_ADDR Address matched (slave mode) 00517 * @arg @ref I2C_FLAG_AF Acknowledge failure received flag 00518 * @arg @ref I2C_FLAG_STOPF STOP detection flag 00519 * @arg @ref I2C_FLAG_TC Transfer complete (master mode) 00520 * @arg @ref I2C_FLAG_TCR Transfer complete reload 00521 * @arg @ref I2C_FLAG_BERR Bus error 00522 * @arg @ref I2C_FLAG_ARLO Arbitration lost 00523 * @arg @ref I2C_FLAG_OVR Overrun/Underrun 00524 * @arg @ref I2C_FLAG_PECERR PEC error in reception 00525 * @arg @ref I2C_FLAG_TIMEOUT Timeout or Tlow detection flag 00526 * @arg @ref I2C_FLAG_ALERT SMBus alert 00527 * @arg @ref I2C_FLAG_BUSY Bus busy 00528 * @arg @ref I2C_FLAG_DIR Transfer direction (slave mode) 00529 * 00530 * @retval The new state of __FLAG__ (SET or RESET). 00531 */ 00532 #define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) == (__FLAG__)) ? SET : RESET) 00533 00534 /** @brief Clear the I2C pending flags which are cleared by writing 1 in a specific bit. 00535 * @param __HANDLE__ specifies the I2C Handle. 00536 * @param __FLAG__ specifies the flag to clear. 00537 * This parameter can be any combination of the following values: 00538 * @arg @ref I2C_FLAG_TXE Transmit data register empty 00539 * @arg @ref I2C_FLAG_ADDR Address matched (slave mode) 00540 * @arg @ref I2C_FLAG_AF Acknowledge failure received flag 00541 * @arg @ref I2C_FLAG_STOPF STOP detection flag 00542 * @arg @ref I2C_FLAG_BERR Bus error 00543 * @arg @ref I2C_FLAG_ARLO Arbitration lost 00544 * @arg @ref I2C_FLAG_OVR Overrun/Underrun 00545 * @arg @ref I2C_FLAG_PECERR PEC error in reception 00546 * @arg @ref I2C_FLAG_TIMEOUT Timeout or Tlow detection flag 00547 * @arg @ref I2C_FLAG_ALERT SMBus alert 00548 * 00549 * @retval None 00550 */ 00551 #define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__FLAG__) == I2C_FLAG_TXE) ? ((__HANDLE__)->Instance->ISR |= (__FLAG__)) \ 00552 : ((__HANDLE__)->Instance->ICR = (__FLAG__))) 00553 00554 /** @brief Enable the specified I2C peripheral. 00555 * @param __HANDLE__ specifies the I2C Handle. 00556 * @retval None 00557 */ 00558 #define __HAL_I2C_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)) 00559 00560 /** @brief Disable the specified I2C peripheral. 00561 * @param __HANDLE__ specifies the I2C Handle. 00562 * @retval None 00563 */ 00564 #define __HAL_I2C_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)) 00565 00566 /** @brief Generate a Non-Acknowledge I2C peripheral in Slave mode. 00567 * @param __HANDLE__ specifies the I2C Handle. 00568 * @retval None 00569 */ 00570 #define __HAL_I2C_GENERATE_NACK(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR2, I2C_CR2_NACK)) 00571 /** 00572 * @} 00573 */ 00574 00575 /* Include I2C HAL Extended module */ 00576 #include "stm32l4xx_hal_i2c_ex.h" 00577 00578 /* Exported functions --------------------------------------------------------*/ 00579 /** @addtogroup I2C_Exported_Functions 00580 * @{ 00581 */ 00582 00583 /** @addtogroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions 00584 * @{ 00585 */ 00586 /* Initialization and de-initialization functions******************************/ 00587 HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c); 00588 HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c); 00589 void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c); 00590 void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c); 00591 00592 /* Callbacks Register/UnRegister functions ***********************************/ 00593 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) 00594 HAL_StatusTypeDef HAL_I2C_RegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID, pI2C_CallbackTypeDef pCallback); 00595 HAL_StatusTypeDef HAL_I2C_UnRegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID); 00596 00597 HAL_StatusTypeDef HAL_I2C_RegisterAddrCallback(I2C_HandleTypeDef *hi2c, pI2C_AddrCallbackTypeDef pCallback); 00598 HAL_StatusTypeDef HAL_I2C_UnRegisterAddrCallback(I2C_HandleTypeDef *hi2c); 00599 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ 00600 /** 00601 * @} 00602 */ 00603 00604 /** @addtogroup I2C_Exported_Functions_Group2 Input and Output operation functions 00605 * @{ 00606 */ 00607 /* IO operation functions ****************************************************/ 00608 /******* Blocking mode: Polling */ 00609 HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout); 00610 HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout); 00611 HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout); 00612 HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout); 00613 HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout); 00614 HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout); 00615 HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout); 00616 00617 /******* Non-Blocking mode: Interrupt */ 00618 HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); 00619 HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); 00620 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); 00621 HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); 00622 HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); 00623 HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); 00624 00625 HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); 00626 HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); 00627 HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions); 00628 HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions); 00629 HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c); 00630 HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c); 00631 HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress); 00632 00633 /******* Non-Blocking mode: DMA */ 00634 HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); 00635 HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); 00636 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); 00637 HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); 00638 HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); 00639 HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); 00640 00641 HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); 00642 HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); 00643 HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions); 00644 HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions); 00645 /** 00646 * @} 00647 */ 00648 00649 /** @addtogroup I2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks 00650 * @{ 00651 */ 00652 /******* I2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */ 00653 void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c); 00654 void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c); 00655 void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c); 00656 void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c); 00657 void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c); 00658 void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c); 00659 void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); 00660 void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c); 00661 void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c); 00662 void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c); 00663 void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c); 00664 void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c); 00665 /** 00666 * @} 00667 */ 00668 00669 /** @addtogroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions 00670 * @{ 00671 */ 00672 /* Peripheral State, Mode and Error functions *********************************/ 00673 HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c); 00674 HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c); 00675 uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c); 00676 00677 /** 00678 * @} 00679 */ 00680 00681 /** 00682 * @} 00683 */ 00684 00685 /* Private constants ---------------------------------------------------------*/ 00686 /** @defgroup I2C_Private_Constants I2C Private Constants 00687 * @{ 00688 */ 00689 00690 /** 00691 * @} 00692 */ 00693 00694 /* Private macros ------------------------------------------------------------*/ 00695 /** @defgroup I2C_Private_Macro I2C Private Macros 00696 * @{ 00697 */ 00698 00699 #define IS_I2C_ADDRESSING_MODE(MODE) (((MODE) == I2C_ADDRESSINGMODE_7BIT) || \ 00700 ((MODE) == I2C_ADDRESSINGMODE_10BIT)) 00701 00702 #define IS_I2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == I2C_DUALADDRESS_DISABLE) || \ 00703 ((ADDRESS) == I2C_DUALADDRESS_ENABLE)) 00704 00705 #define IS_I2C_OWN_ADDRESS2_MASK(MASK) (((MASK) == I2C_OA2_NOMASK) || \ 00706 ((MASK) == I2C_OA2_MASK01) || \ 00707 ((MASK) == I2C_OA2_MASK02) || \ 00708 ((MASK) == I2C_OA2_MASK03) || \ 00709 ((MASK) == I2C_OA2_MASK04) || \ 00710 ((MASK) == I2C_OA2_MASK05) || \ 00711 ((MASK) == I2C_OA2_MASK06) || \ 00712 ((MASK) == I2C_OA2_MASK07)) 00713 00714 #define IS_I2C_GENERAL_CALL(CALL) (((CALL) == I2C_GENERALCALL_DISABLE) || \ 00715 ((CALL) == I2C_GENERALCALL_ENABLE)) 00716 00717 #define IS_I2C_NO_STRETCH(STRETCH) (((STRETCH) == I2C_NOSTRETCH_DISABLE) || \ 00718 ((STRETCH) == I2C_NOSTRETCH_ENABLE)) 00719 00720 #define IS_I2C_MEMADD_SIZE(SIZE) (((SIZE) == I2C_MEMADD_SIZE_8BIT) || \ 00721 ((SIZE) == I2C_MEMADD_SIZE_16BIT)) 00722 00723 #define IS_TRANSFER_MODE(MODE) (((MODE) == I2C_RELOAD_MODE) || \ 00724 ((MODE) == I2C_AUTOEND_MODE) || \ 00725 ((MODE) == I2C_SOFTEND_MODE)) 00726 00727 #define IS_TRANSFER_REQUEST(REQUEST) (((REQUEST) == I2C_GENERATE_STOP) || \ 00728 ((REQUEST) == I2C_GENERATE_START_READ) || \ 00729 ((REQUEST) == I2C_GENERATE_START_WRITE) || \ 00730 ((REQUEST) == I2C_NO_STARTSTOP)) 00731 00732 #define IS_I2C_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_FIRST_FRAME) || \ 00733 ((REQUEST) == I2C_FIRST_AND_NEXT_FRAME) || \ 00734 ((REQUEST) == I2C_NEXT_FRAME) || \ 00735 ((REQUEST) == I2C_FIRST_AND_LAST_FRAME) || \ 00736 ((REQUEST) == I2C_LAST_FRAME) || \ 00737 ((REQUEST) == I2C_LAST_FRAME_NO_STOP)) 00738 00739 #define I2C_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_HEAD10R | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_RD_WRN))) 00740 00741 #define I2C_GET_ADDR_MATCH(__HANDLE__) (((__HANDLE__)->Instance->ISR & I2C_ISR_ADDCODE) >> 16U) 00742 #define I2C_GET_DIR(__HANDLE__) (((__HANDLE__)->Instance->ISR & I2C_ISR_DIR) >> 16U) 00743 #define I2C_GET_STOP_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & I2C_CR2_AUTOEND) 00744 #define I2C_GET_OWN_ADDRESS1(__HANDLE__) ((__HANDLE__)->Instance->OAR1 & I2C_OAR1_OA1) 00745 #define I2C_GET_OWN_ADDRESS2(__HANDLE__) ((__HANDLE__)->Instance->OAR2 & I2C_OAR2_OA2) 00746 00747 #define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x000003FFU) 00748 #define IS_I2C_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FFU) 00749 00750 #define I2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0xFF00U))) >> 8U))) 00751 #define I2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FFU)))) 00752 00753 #define I2C_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == I2C_ADDRESSINGMODE_7BIT) ? (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_START) | (I2C_CR2_AUTOEND)) & (~I2C_CR2_RD_WRN)) : \ 00754 (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_ADD10) | (I2C_CR2_START)) & (~I2C_CR2_RD_WRN))) 00755 /** 00756 * @} 00757 */ 00758 00759 /* Private Functions ---------------------------------------------------------*/ 00760 /** @defgroup I2C_Private_Functions I2C Private Functions 00761 * @{ 00762 */ 00763 /* Private functions are defined in stm32l4xx_hal_i2c.c file */ 00764 /** 00765 * @} 00766 */ 00767 00768 /** 00769 * @} 00770 */ 00771 00772 /** 00773 * @} 00774 */ 00775 00776 #ifdef __cplusplus 00777 } 00778 #endif 00779 00780 00781 #endif /* STM32L4xx_HAL_I2C_H */ 00782 00783 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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