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STM32L486xx HAL User Manual
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Header file of FLASH HAL module. More...
#include "stm32l4xx_hal_def.h"#include "stm32l4xx_hal_flash_ex.h"#include "stm32l4xx_hal_flash_ramfunc.h"Go to the source code of this file.
Data Structures | |
| struct | FLASH_EraseInitTypeDef |
| FLASH Erase structure definition. More... | |
| struct | FLASH_OBProgramInitTypeDef |
| FLASH Option Bytes Program structure definition. More... | |
| struct | FLASH_ProcessTypeDef |
| FLASH handle Structure definition. More... | |
Defines | |
| #define | HAL_FLASH_ERROR_NONE 0x00000000U |
| #define | HAL_FLASH_ERROR_OP FLASH_FLAG_OPERR |
| #define | HAL_FLASH_ERROR_PROG FLASH_FLAG_PROGERR |
| #define | HAL_FLASH_ERROR_WRP FLASH_FLAG_WRPERR |
| #define | HAL_FLASH_ERROR_PGA FLASH_FLAG_PGAERR |
| #define | HAL_FLASH_ERROR_SIZ FLASH_FLAG_SIZERR |
| #define | HAL_FLASH_ERROR_PGS FLASH_FLAG_PGSERR |
| #define | HAL_FLASH_ERROR_MIS FLASH_FLAG_MISERR |
| #define | HAL_FLASH_ERROR_FAST FLASH_FLAG_FASTERR |
| #define | HAL_FLASH_ERROR_RD FLASH_FLAG_RDERR |
| #define | HAL_FLASH_ERROR_OPTV FLASH_FLAG_OPTVERR |
| #define | HAL_FLASH_ERROR_ECCD FLASH_FLAG_ECCD |
| #define | FLASH_TYPEERASE_PAGES ((uint32_t)0x00) |
| #define | FLASH_TYPEERASE_MASSERASE ((uint32_t)0x01) |
| #define | FLASH_BANK_1 ((uint32_t)0x01) |
| #define | FLASH_BANK_2 ((uint32_t)0x02) |
| #define | FLASH_BANK_BOTH ((uint32_t)(FLASH_BANK_1 | FLASH_BANK_2)) |
| #define | FLASH_TYPEPROGRAM_DOUBLEWORD ((uint32_t)0x00) |
| #define | FLASH_TYPEPROGRAM_FAST ((uint32_t)0x01) |
| #define | FLASH_TYPEPROGRAM_FAST_AND_LAST ((uint32_t)0x02) |
| #define | OPTIONBYTE_WRP ((uint32_t)0x01) |
| #define | OPTIONBYTE_RDP ((uint32_t)0x02) |
| #define | OPTIONBYTE_USER ((uint32_t)0x04) |
| #define | OPTIONBYTE_PCROP ((uint32_t)0x08) |
| #define | OB_WRPAREA_BANK1_AREAA ((uint32_t)0x00) |
| #define | OB_WRPAREA_BANK1_AREAB ((uint32_t)0x01) |
| #define | OB_WRPAREA_BANK2_AREAA ((uint32_t)0x02) |
| #define | OB_WRPAREA_BANK2_AREAB ((uint32_t)0x04) |
| #define | OB_RDP_LEVEL_0 ((uint32_t)0xAA) |
| #define | OB_RDP_LEVEL_1 ((uint32_t)0xBB) |
| #define | OB_RDP_LEVEL_2 ((uint32_t)0xCC) |
| #define | OB_USER_BOR_LEV ((uint32_t)0x0001) |
| #define | OB_USER_nRST_STOP ((uint32_t)0x0002) |
| #define | OB_USER_nRST_STDBY ((uint32_t)0x0004) |
| #define | OB_USER_IWDG_SW ((uint32_t)0x0008) |
| #define | OB_USER_IWDG_STOP ((uint32_t)0x0010) |
| #define | OB_USER_IWDG_STDBY ((uint32_t)0x0020) |
| #define | OB_USER_WWDG_SW ((uint32_t)0x0040) |
| #define | OB_USER_BFB2 ((uint32_t)0x0080) |
| #define | OB_USER_DUALBANK ((uint32_t)0x0100) |
| #define | OB_USER_nBOOT1 ((uint32_t)0x0200) |
| #define | OB_USER_SRAM2_PE ((uint32_t)0x0400) |
| #define | OB_USER_SRAM2_RST ((uint32_t)0x0800) |
| #define | OB_USER_nRST_SHDW ((uint32_t)0x1000) |
| #define | OB_BOR_LEVEL_0 ((uint32_t)FLASH_OPTR_BOR_LEV_0) |
| #define | OB_BOR_LEVEL_1 ((uint32_t)FLASH_OPTR_BOR_LEV_1) |
| #define | OB_BOR_LEVEL_2 ((uint32_t)FLASH_OPTR_BOR_LEV_2) |
| #define | OB_BOR_LEVEL_3 ((uint32_t)FLASH_OPTR_BOR_LEV_3) |
| #define | OB_BOR_LEVEL_4 ((uint32_t)FLASH_OPTR_BOR_LEV_4) |
| #define | OB_STOP_RST ((uint32_t)0x0000) |
| #define | OB_STOP_NORST ((uint32_t)FLASH_OPTR_nRST_STOP) |
| #define | OB_STANDBY_RST ((uint32_t)0x0000) |
| #define | OB_STANDBY_NORST ((uint32_t)FLASH_OPTR_nRST_STDBY) |
| #define | OB_SHUTDOWN_RST ((uint32_t)0x0000) |
| #define | OB_SHUTDOWN_NORST ((uint32_t)FLASH_OPTR_nRST_SHDW) |
| #define | OB_IWDG_HW ((uint32_t)0x00000) |
| #define | OB_IWDG_SW ((uint32_t)FLASH_OPTR_IWDG_SW) |
| #define | OB_IWDG_STOP_FREEZE ((uint32_t)0x00000) |
| #define | OB_IWDG_STOP_RUN ((uint32_t)FLASH_OPTR_IWDG_STOP) |
| #define | OB_IWDG_STDBY_FREEZE ((uint32_t)0x00000) |
| #define | OB_IWDG_STDBY_RUN ((uint32_t)FLASH_OPTR_IWDG_STDBY) |
| #define | OB_WWDG_HW ((uint32_t)0x00000) |
| #define | OB_WWDG_SW ((uint32_t)FLASH_OPTR_WWDG_SW) |
| #define | OB_BFB2_DISABLE ((uint32_t)0x000000) |
| #define | OB_BFB2_ENABLE ((uint32_t)FLASH_OPTR_BFB2) |
| #define | OB_DUALBANK_SINGLE ((uint32_t)0x000000) |
| #define | OB_DUALBANK_DUAL ((uint32_t)FLASH_OPTR_DUALBANK) |
| #define | OB_BOOT1_SRAM ((uint32_t)0x000000) |
| #define | OB_BOOT1_SYSTEM ((uint32_t)FLASH_OPTR_nBOOT1) |
| #define | OB_SRAM2_PARITY_ENABLE ((uint32_t)0x0000000) |
| #define | OB_SRAM2_PARITY_DISABLE ((uint32_t)FLASH_OPTR_SRAM2_PE) |
| #define | OB_SRAM2_RST_ERASE ((uint32_t)0x0000000) |
| #define | OB_SRAM2_RST_NOT_ERASE ((uint32_t)FLASH_OPTR_SRAM2_RST) |
| #define | OB_PCROP_RDP_NOT_ERASE ((uint32_t)0x00000000) |
| #define | OB_PCROP_RDP_ERASE ((uint32_t)FLASH_PCROP1ER_PCROP_RDP) |
| #define | FLASH_LATENCY_0 FLASH_ACR_LATENCY_0WS |
| #define | FLASH_LATENCY_1 FLASH_ACR_LATENCY_1WS |
| #define | FLASH_LATENCY_2 FLASH_ACR_LATENCY_2WS |
| #define | FLASH_LATENCY_3 FLASH_ACR_LATENCY_3WS |
| #define | FLASH_LATENCY_4 FLASH_ACR_LATENCY_4WS |
| #define | FLASH_KEY1 0x45670123U |
| #define | FLASH_KEY2 0xCDEF89ABU |
| #define | FLASH_PDKEY1 0x04152637U |
| #define | FLASH_PDKEY2 0xFAFBFCFDU |
| #define | FLASH_OPTKEY1 0x08192A3BU |
| #define | FLASH_OPTKEY2 0x4C5D6E7FU |
| #define | FLASH_FLAG_EOP FLASH_SR_EOP |
| #define | FLASH_FLAG_OPERR FLASH_SR_OPERR |
| #define | FLASH_FLAG_PROGERR FLASH_SR_PROGERR |
| #define | FLASH_FLAG_WRPERR FLASH_SR_WRPERR |
| #define | FLASH_FLAG_PGAERR FLASH_SR_PGAERR |
| #define | FLASH_FLAG_SIZERR FLASH_SR_SIZERR |
| #define | FLASH_FLAG_PGSERR FLASH_SR_PGSERR |
| #define | FLASH_FLAG_MISERR FLASH_SR_MISERR |
| #define | FLASH_FLAG_FASTERR FLASH_SR_FASTERR |
| #define | FLASH_FLAG_RDERR FLASH_SR_RDERR |
| #define | FLASH_FLAG_OPTVERR FLASH_SR_OPTVERR |
| #define | FLASH_FLAG_BSY FLASH_SR_BSY |
| #define | FLASH_FLAG_SR_ERRORS |
| #define | FLASH_FLAG_ECCC FLASH_ECCR_ECCC |
| #define | FLASH_FLAG_ECCD FLASH_ECCR_ECCD |
| #define | FLASH_FLAG_ALL_ERRORS |
| #define | FLASH_IT_EOP FLASH_CR_EOPIE |
| #define | FLASH_IT_OPERR FLASH_CR_ERRIE |
| #define | FLASH_IT_RDERR FLASH_CR_RDERRIE |
| #define | FLASH_IT_ECCC (FLASH_ECCR_ECCIE >> 24) |
| #define | __HAL_FLASH_SET_LATENCY(__LATENCY__) (MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, (__LATENCY__))) |
| Set the FLASH Latency. | |
| #define | __HAL_FLASH_GET_LATENCY() READ_BIT(FLASH->ACR, FLASH_ACR_LATENCY) |
| Get the FLASH Latency. | |
| #define | __HAL_FLASH_PREFETCH_BUFFER_ENABLE() SET_BIT(FLASH->ACR, FLASH_ACR_PRFTEN) |
| Enable the FLASH prefetch buffer. | |
| #define | __HAL_FLASH_PREFETCH_BUFFER_DISABLE() CLEAR_BIT(FLASH->ACR, FLASH_ACR_PRFTEN) |
| Disable the FLASH prefetch buffer. | |
| #define | __HAL_FLASH_INSTRUCTION_CACHE_ENABLE() SET_BIT(FLASH->ACR, FLASH_ACR_ICEN) |
| Enable the FLASH instruction cache. | |
| #define | __HAL_FLASH_INSTRUCTION_CACHE_DISABLE() CLEAR_BIT(FLASH->ACR, FLASH_ACR_ICEN) |
| Disable the FLASH instruction cache. | |
| #define | __HAL_FLASH_DATA_CACHE_ENABLE() SET_BIT(FLASH->ACR, FLASH_ACR_DCEN) |
| Enable the FLASH data cache. | |
| #define | __HAL_FLASH_DATA_CACHE_DISABLE() CLEAR_BIT(FLASH->ACR, FLASH_ACR_DCEN) |
| Disable the FLASH data cache. | |
| #define | __HAL_FLASH_INSTRUCTION_CACHE_RESET() |
| Reset the FLASH instruction Cache. | |
| #define | __HAL_FLASH_DATA_CACHE_RESET() |
| Reset the FLASH data Cache. | |
| #define | __HAL_FLASH_POWER_DOWN_ENABLE() |
| Enable the FLASH power down during Low-power run mode. | |
| #define | __HAL_FLASH_POWER_DOWN_DISABLE() |
| Disable the FLASH power down during Low-power run mode. | |
| #define | __HAL_FLASH_SLEEP_POWERDOWN_ENABLE() SET_BIT(FLASH->ACR, FLASH_ACR_SLEEP_PD) |
| Enable the FLASH power down during Low-Power sleep mode. | |
| #define | __HAL_FLASH_SLEEP_POWERDOWN_DISABLE() CLEAR_BIT(FLASH->ACR, FLASH_ACR_SLEEP_PD) |
| Disable the FLASH power down during Low-Power sleep mode. | |
| #define | __HAL_FLASH_ENABLE_IT(__INTERRUPT__) |
| Enable the specified FLASH interrupt. | |
| #define | __HAL_FLASH_DISABLE_IT(__INTERRUPT__) |
| Disable the specified FLASH interrupt. | |
| #define | __HAL_FLASH_GET_FLAG(__FLAG__) |
| Check whether the specified FLASH flag is set or not. | |
| #define | __HAL_FLASH_CLEAR_FLAG(__FLAG__) |
| Clear the FLASH's pending flags. | |
| #define | FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFF75E0) |
| #define | FLASH_SIZE |
| #define | FLASH_BANK_SIZE (FLASH_SIZE >> 1U) |
| #define | FLASH_PAGE_SIZE ((uint32_t)0x800) |
| #define | FLASH_TIMEOUT_VALUE ((uint32_t)50000)/* 50 s */ |
| #define | IS_FLASH_TYPEERASE(VALUE) |
| #define | IS_FLASH_BANK(BANK) |
| #define | IS_FLASH_BANK_EXCLUSIVE(BANK) |
| #define | IS_FLASH_TYPEPROGRAM(VALUE) |
| #define | IS_FLASH_MAIN_MEM_ADDRESS(ADDRESS) |
| #define | IS_FLASH_OTP_ADDRESS(ADDRESS) (((ADDRESS) >= 0x1FFF7000U) && ((ADDRESS) <= 0x1FFF73FFU)) |
| #define | IS_FLASH_PROGRAM_ADDRESS(ADDRESS) ((IS_FLASH_MAIN_MEM_ADDRESS(ADDRESS)) || (IS_FLASH_OTP_ADDRESS(ADDRESS))) |
| #define | IS_FLASH_PAGE(PAGE) |
| #define | IS_OPTIONBYTE(VALUE) (((VALUE) <= (OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER | OPTIONBYTE_PCROP))) |
| #define | IS_OB_WRPAREA(VALUE) |
| #define | IS_OB_RDP_LEVEL(LEVEL) |
| #define | IS_OB_USER_TYPE(TYPE) (((TYPE) <= (uint32_t)0x1FFFU) && ((TYPE) != 0U)) |
| #define | IS_OB_USER_BOR_LEVEL(LEVEL) |
| #define | IS_OB_USER_STOP(VALUE) (((VALUE) == OB_STOP_RST) || ((VALUE) == OB_STOP_NORST)) |
| #define | IS_OB_USER_STANDBY(VALUE) (((VALUE) == OB_STANDBY_RST) || ((VALUE) == OB_STANDBY_NORST)) |
| #define | IS_OB_USER_SHUTDOWN(VALUE) (((VALUE) == OB_SHUTDOWN_RST) || ((VALUE) == OB_SHUTDOWN_NORST)) |
| #define | IS_OB_USER_IWDG(VALUE) (((VALUE) == OB_IWDG_HW) || ((VALUE) == OB_IWDG_SW)) |
| #define | IS_OB_USER_IWDG_STOP(VALUE) (((VALUE) == OB_IWDG_STOP_FREEZE) || ((VALUE) == OB_IWDG_STOP_RUN)) |
| #define | IS_OB_USER_IWDG_STDBY(VALUE) (((VALUE) == OB_IWDG_STDBY_FREEZE) || ((VALUE) == OB_IWDG_STDBY_RUN)) |
| #define | IS_OB_USER_WWDG(VALUE) (((VALUE) == OB_WWDG_HW) || ((VALUE) == OB_WWDG_SW)) |
| #define | IS_OB_USER_BFB2(VALUE) (((VALUE) == OB_BFB2_DISABLE) || ((VALUE) == OB_BFB2_ENABLE)) |
| #define | IS_OB_USER_DUALBANK(VALUE) (((VALUE) == OB_DUALBANK_SINGLE) || ((VALUE) == OB_DUALBANK_DUAL)) |
| #define | IS_OB_USER_BOOT1(VALUE) (((VALUE) == OB_BOOT1_SRAM) || ((VALUE) == OB_BOOT1_SYSTEM)) |
| #define | IS_OB_USER_SRAM2_PARITY(VALUE) (((VALUE) == OB_SRAM2_PARITY_ENABLE) || ((VALUE) == OB_SRAM2_PARITY_DISABLE)) |
| #define | IS_OB_USER_SRAM2_RST(VALUE) (((VALUE) == OB_SRAM2_RST_ERASE) || ((VALUE) == OB_SRAM2_RST_NOT_ERASE)) |
| #define | IS_OB_PCROP_RDP(VALUE) (((VALUE) == OB_PCROP_RDP_NOT_ERASE) || ((VALUE) == OB_PCROP_RDP_ERASE)) |
| #define | IS_FLASH_LATENCY(LATENCY) |
Enumerations | |
| enum | FLASH_ProcedureTypeDef { FLASH_PROC_NONE = 0, FLASH_PROC_PAGE_ERASE, FLASH_PROC_MASS_ERASE, FLASH_PROC_PROGRAM, FLASH_PROC_PROGRAM_LAST } |
| FLASH Procedure structure definition. More... | |
| enum | FLASH_CacheTypeDef { FLASH_CACHE_DISABLED = 0, FLASH_CACHE_ICACHE_ENABLED, FLASH_CACHE_DCACHE_ENABLED, FLASH_CACHE_ICACHE_DCACHE_ENABLED } |
| FLASH Cache structure definition. More... | |
Functions | |
| HAL_StatusTypeDef | HAL_FLASH_Program (uint32_t TypeProgram, uint32_t Address, uint64_t Data) |
| Program double word or fast program of a row at a specified address. | |
| HAL_StatusTypeDef | HAL_FLASH_Program_IT (uint32_t TypeProgram, uint32_t Address, uint64_t Data) |
| Program double word or fast program of a row at a specified address with interrupt enabled. | |
| void | HAL_FLASH_IRQHandler (void) |
| Handle FLASH interrupt request. | |
| __weak void | HAL_FLASH_EndOfOperationCallback (uint32_t ReturnValue) |
| FLASH end of operation interrupt callback. | |
| __weak void | HAL_FLASH_OperationErrorCallback (uint32_t ReturnValue) |
| FLASH operation error interrupt callback. | |
| HAL_StatusTypeDef | HAL_FLASH_Unlock (void) |
| Unlock the FLASH control register access. | |
| HAL_StatusTypeDef | HAL_FLASH_Lock (void) |
| Lock the FLASH control register access. | |
| HAL_StatusTypeDef | HAL_FLASH_OB_Unlock (void) |
| Unlock the FLASH Option Bytes Registers access. | |
| HAL_StatusTypeDef | HAL_FLASH_OB_Lock (void) |
| Lock the FLASH Option Bytes Registers access. | |
| HAL_StatusTypeDef | HAL_FLASH_OB_Launch (void) |
| Launch the option byte loading. | |
| uint32_t | HAL_FLASH_GetError (void) |
| Get the specific FLASH error flag. | |
Header file of FLASH HAL module.
Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. 3. Neither the name of STMicroelectronics nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Definition in file stm32l4xx_hal_flash.h.
1.7.6.1