STM32L486xx HAL User Manual
Modules
ADC
STM32L4xx_LL_Driver

Modules

 ADC Private Constants
 ADC Private Macros
 ADC Exported Init structure
 ADC Exported Constants
 ADC Exported Macros
 ADC Exported Functions

Reference Manual to LL API cross reference

The following table provide a mapping between the registers and bits, as they appears inside product reference manual, and the functions provided by the Low Layer interface.

This table gives the correspondance for ADC registers.

Register Bit Function
AWD2CR AWD2CH LL_ADC_GetAnalogWDMonitChannels
LL_ADC_SetAnalogWDMonitChannels
AWD3CR AWD3CH LL_ADC_GetAnalogWDMonitChannels
LL_ADC_SetAnalogWDMonitChannels
CALFACT CALFACT_D LL_ADC_GetCalibrationFactor
LL_ADC_SetCalibrationFactor
CALFACT_S LL_ADC_GetCalibrationFactor
LL_ADC_SetCalibrationFactor
CCR CKMODE LL_ADC_GetCommonClock
LL_ADC_SetCommonClock
DELAY LL_ADC_GetMultiTwoSamplingDelay
LL_ADC_SetMultiTwoSamplingDelay
DMACFG LL_ADC_GetMultiDMATransfer
LL_ADC_SetMultiDMATransfer
DUAL LL_ADC_GetMultimode
LL_ADC_SetMultimode
MDMA LL_ADC_GetMultiDMATransfer
LL_ADC_SetMultiDMATransfer
PRESC LL_ADC_GetCommonClock
LL_ADC_SetCommonClock
TSEN LL_ADC_GetCommonPathInternalCh
LL_ADC_SetCommonPathInternalCh
VBATEN LL_ADC_GetCommonPathInternalCh
LL_ADC_SetCommonPathInternalCh
VREFEN LL_ADC_GetCommonPathInternalCh
LL_ADC_SetCommonPathInternalCh
CDR RDATA_MST LL_ADC_DMA_GetRegAddr
LL_ADC_REG_ReadMultiConversionData32
RDATA_SLV LL_ADC_DMA_GetRegAddr
LL_ADC_REG_ReadMultiConversionData32
CFGR ALIGN LL_ADC_GetDataAlignment
LL_ADC_SetDataAlignment
AUTDLY LL_ADC_GetLowPowerMode
LL_ADC_SetLowPowerMode
AWD1CH LL_ADC_GetAnalogWDMonitChannels
LL_ADC_SetAnalogWDMonitChannels
AWD1EN LL_ADC_GetAnalogWDMonitChannels
LL_ADC_SetAnalogWDMonitChannels
AWD1SGL LL_ADC_GetAnalogWDMonitChannels
LL_ADC_SetAnalogWDMonitChannels
CONT LL_ADC_REG_GetContinuousMode
LL_ADC_REG_SetContinuousMode
DISCEN LL_ADC_REG_GetSequencerDiscont
LL_ADC_REG_SetSequencerDiscont
DISCNUM LL_ADC_REG_GetSequencerDiscont
LL_ADC_REG_SetSequencerDiscont
DMACFG LL_ADC_REG_GetDMATransfer
LL_ADC_REG_SetDMATransfer
DMAEN LL_ADC_REG_GetDMATransfer
LL_ADC_REG_SetDMATransfer
EXTEN LL_ADC_REG_GetTriggerEdge
LL_ADC_REG_GetTriggerSource
LL_ADC_REG_IsTriggerSourceSWStart
LL_ADC_REG_SetTriggerEdge
LL_ADC_REG_SetTriggerSource
EXTSEL LL_ADC_REG_GetTriggerSource
LL_ADC_REG_SetTriggerSource
JAUTO LL_ADC_INJ_GetTrigAuto
LL_ADC_INJ_SetTrigAuto
JAWD1EN LL_ADC_GetAnalogWDMonitChannels
LL_ADC_SetAnalogWDMonitChannels
JDISCEN LL_ADC_INJ_GetSequencerDiscont
LL_ADC_INJ_SetSequencerDiscont
JQDIS LL_ADC_INJ_GetQueueMode
LL_ADC_INJ_SetQueueMode
JQM LL_ADC_INJ_GetQueueMode
LL_ADC_INJ_SetQueueMode
OVRMOD LL_ADC_REG_GetOverrun
LL_ADC_REG_SetOverrun
RES LL_ADC_GetResolution
LL_ADC_SetResolution
CFGR2 JOVSE LL_ADC_GetOverSamplingScope
LL_ADC_SetOverSamplingScope
OVSR LL_ADC_ConfigOverSamplingRatioShift
LL_ADC_GetOverSamplingRatio
OVSS LL_ADC_ConfigOverSamplingRatioShift
LL_ADC_GetOverSamplingShift
ROVSE LL_ADC_GetOverSamplingScope
LL_ADC_SetOverSamplingScope
ROVSM LL_ADC_GetOverSamplingScope
LL_ADC_SetOverSamplingScope
TROVS LL_ADC_GetOverSamplingDiscont
LL_ADC_SetOverSamplingDiscont
CR ADCAL LL_ADC_IsCalibrationOnGoing
LL_ADC_StartCalibration
ADCALDIF LL_ADC_StartCalibration
ADDIS LL_ADC_Disable
LL_ADC_IsDisableOngoing
ADEN LL_ADC_Enable
LL_ADC_IsEnabled
ADSTART LL_ADC_REG_IsConversionOngoing
LL_ADC_REG_StartConversion
ADSTP LL_ADC_REG_IsStopConversionOngoing
LL_ADC_REG_StopConversion
ADVREGEN LL_ADC_DisableInternalRegulator
LL_ADC_EnableInternalRegulator
LL_ADC_IsInternalRegulatorEnabled
DEEPPWD LL_ADC_DisableDeepPowerDown
LL_ADC_EnableDeepPowerDown
LL_ADC_IsDeepPowerDownEnabled
JADSTART LL_ADC_INJ_IsConversionOngoing
LL_ADC_INJ_StartConversion
JADSTP LL_ADC_INJ_IsStopConversionOngoing
LL_ADC_INJ_StopConversion
CSR ADRDY_MST LL_ADC_IsActiveFlag_MST_ADRDY
ADRDY_SLV LL_ADC_IsActiveFlag_SLV_ADRDY
AWD1_MST LL_ADC_IsActiveFlag_MST_AWD1
AWD1_SLV LL_ADC_IsActiveFlag_SLV_AWD1
AWD2_MST LL_ADC_IsActiveFlag_MST_AWD2
AWD2_SLV LL_ADC_IsActiveFlag_SLV_AWD2
AWD3_MST LL_ADC_IsActiveFlag_MST_AWD3
AWD3_SLV LL_ADC_IsActiveFlag_SLV_AWD3
EOC_MST LL_ADC_IsActiveFlag_MST_EOC
EOC_SLV LL_ADC_IsActiveFlag_SLV_EOC
EOSMP_MST LL_ADC_IsActiveFlag_MST_EOSMP
EOSMP_SLV LL_ADC_IsActiveFlag_SLV_EOSMP
EOS_MST LL_ADC_IsActiveFlag_MST_EOS
EOS_SLV LL_ADC_IsActiveFlag_SLV_EOS
JEOC_MST LL_ADC_IsActiveFlag_MST_JEOC
JEOC_SLV LL_ADC_IsActiveFlag_SLV_JEOC
JEOS_MST LL_ADC_IsActiveFlag_MST_JEOS
JEOS_SLV LL_ADC_IsActiveFlag_SLV_JEOS
JQOVF_MST LL_ADC_IsActiveFlag_MST_JQOVF
JQOVF_SLV LL_ADC_IsActiveFlag_SLV_JQOVF
OVR_MST LL_ADC_IsActiveFlag_MST_OVR
OVR_SLV LL_ADC_IsActiveFlag_SLV_OVR
DIFSEL DIFSEL LL_ADC_GetChannelSingleDiff
LL_ADC_SetChannelSingleDiff
DR RDATA LL_ADC_DMA_GetRegAddr
LL_ADC_REG_ReadConversionData10
LL_ADC_REG_ReadConversionData12
LL_ADC_REG_ReadConversionData32
LL_ADC_REG_ReadConversionData6
LL_ADC_REG_ReadConversionData8
IER ADRDYIE LL_ADC_DisableIT_ADRDY
LL_ADC_EnableIT_ADRDY
LL_ADC_IsEnabledIT_ADRDY
AWD1IE LL_ADC_DisableIT_AWD1
LL_ADC_EnableIT_AWD1
LL_ADC_IsEnabledIT_AWD1
AWD2IE LL_ADC_DisableIT_AWD2
LL_ADC_EnableIT_AWD2
LL_ADC_IsEnabledIT_AWD2
AWD3IE LL_ADC_DisableIT_AWD3
LL_ADC_EnableIT_AWD3
LL_ADC_IsEnabledIT_AWD3
EOCIE LL_ADC_DisableIT_EOC
LL_ADC_EnableIT_EOC
LL_ADC_IsEnabledIT_EOC
EOSIE LL_ADC_DisableIT_EOS
LL_ADC_EnableIT_EOS
LL_ADC_IsEnabledIT_EOS
EOSMPIE LL_ADC_DisableIT_EOSMP
LL_ADC_EnableIT_EOSMP
LL_ADC_IsEnabledIT_EOSMP
JEOCIE LL_ADC_DisableIT_JEOC
LL_ADC_EnableIT_JEOC
LL_ADC_IsEnabledIT_JEOC
JEOSIE LL_ADC_DisableIT_JEOS
LL_ADC_EnableIT_JEOS
LL_ADC_IsEnabledIT_JEOS
JQOVFIE LL_ADC_DisableIT_JQOVF
LL_ADC_EnableIT_JQOVF
LL_ADC_IsEnabledIT_JQOVF
OVRIE LL_ADC_DisableIT_OVR
LL_ADC_EnableIT_OVR
LL_ADC_IsEnabledIT_OVR
ISR ADRDY LL_ADC_ClearFlag_ADRDY
LL_ADC_IsActiveFlag_ADRDY
AWD1 LL_ADC_ClearFlag_AWD1
LL_ADC_IsActiveFlag_AWD1
AWD2 LL_ADC_ClearFlag_AWD2
LL_ADC_IsActiveFlag_AWD2
AWD3 LL_ADC_ClearFlag_AWD3
LL_ADC_IsActiveFlag_AWD3
EOC LL_ADC_ClearFlag_EOC
LL_ADC_IsActiveFlag_EOC
EOS LL_ADC_ClearFlag_EOS
LL_ADC_IsActiveFlag_EOS
EOSMP LL_ADC_ClearFlag_EOSMP
LL_ADC_IsActiveFlag_EOSMP
JEOC LL_ADC_ClearFlag_JEOC
LL_ADC_IsActiveFlag_JEOC
JEOS LL_ADC_ClearFlag_JEOS
LL_ADC_IsActiveFlag_JEOS
JQOVF LL_ADC_ClearFlag_JQOVF
LL_ADC_IsActiveFlag_JQOVF
OVR LL_ADC_ClearFlag_OVR
LL_ADC_IsActiveFlag_OVR
JDR1 JDATA LL_ADC_INJ_ReadConversionData10
LL_ADC_INJ_ReadConversionData12
LL_ADC_INJ_ReadConversionData32
LL_ADC_INJ_ReadConversionData6
LL_ADC_INJ_ReadConversionData8
JDR2 JDATA LL_ADC_INJ_ReadConversionData10
LL_ADC_INJ_ReadConversionData12
LL_ADC_INJ_ReadConversionData32
LL_ADC_INJ_ReadConversionData6
LL_ADC_INJ_ReadConversionData8
JDR3 JDATA LL_ADC_INJ_ReadConversionData10
LL_ADC_INJ_ReadConversionData12
LL_ADC_INJ_ReadConversionData32
LL_ADC_INJ_ReadConversionData6
LL_ADC_INJ_ReadConversionData8
JDR4 JDATA LL_ADC_INJ_ReadConversionData10
LL_ADC_INJ_ReadConversionData12
LL_ADC_INJ_ReadConversionData32
LL_ADC_INJ_ReadConversionData6
LL_ADC_INJ_ReadConversionData8
JSQR JEXTEN LL_ADC_INJ_ConfigQueueContext
LL_ADC_INJ_GetTriggerEdge
LL_ADC_INJ_GetTriggerSource
LL_ADC_INJ_IsTriggerSourceSWStart
LL_ADC_INJ_SetTriggerEdge
LL_ADC_INJ_SetTriggerSource
JEXTSEL LL_ADC_INJ_ConfigQueueContext
LL_ADC_INJ_GetTriggerSource
LL_ADC_INJ_SetTriggerSource
JL LL_ADC_INJ_ConfigQueueContext
LL_ADC_INJ_GetSequencerLength
LL_ADC_INJ_SetSequencerLength
JSQ1 LL_ADC_INJ_ConfigQueueContext
LL_ADC_INJ_GetSequencerRanks
LL_ADC_INJ_SetSequencerRanks
JSQ2 LL_ADC_INJ_ConfigQueueContext
LL_ADC_INJ_GetSequencerRanks
LL_ADC_INJ_SetSequencerRanks
JSQ3 LL_ADC_INJ_ConfigQueueContext
LL_ADC_INJ_GetSequencerRanks
LL_ADC_INJ_SetSequencerRanks
JSQ4 LL_ADC_INJ_ConfigQueueContext
LL_ADC_INJ_GetSequencerRanks
LL_ADC_INJ_SetSequencerRanks
OFR1 OFFSET1 LL_ADC_GetOffsetLevel
LL_ADC_SetOffset
OFFSET1_CH LL_ADC_GetOffsetChannel
LL_ADC_SetOffset
OFFSET1_EN LL_ADC_GetOffsetState
LL_ADC_SetOffset
LL_ADC_SetOffsetState
OFR2 OFFSET2 LL_ADC_GetOffsetLevel
LL_ADC_SetOffset
OFFSET2_CH LL_ADC_GetOffsetChannel
LL_ADC_SetOffset
OFFSET2_EN LL_ADC_GetOffsetState
LL_ADC_SetOffset
LL_ADC_SetOffsetState
OFR3 OFFSET3 LL_ADC_GetOffsetLevel
LL_ADC_SetOffset
OFFSET3_CH LL_ADC_GetOffsetChannel
LL_ADC_SetOffset
OFFSET3_EN LL_ADC_GetOffsetState
LL_ADC_SetOffset
LL_ADC_SetOffsetState
OFR4 OFFSET4 LL_ADC_GetOffsetLevel
LL_ADC_SetOffset
OFFSET4_CH LL_ADC_GetOffsetChannel
LL_ADC_SetOffset
OFFSET4_EN LL_ADC_GetOffsetState
LL_ADC_SetOffset
LL_ADC_SetOffsetState
SMPR1 SMP0 LL_ADC_GetChannelSamplingTime
LL_ADC_SetChannelSamplingTime
SMP1 LL_ADC_GetChannelSamplingTime
LL_ADC_SetChannelSamplingTime
SMP2 LL_ADC_GetChannelSamplingTime
LL_ADC_SetChannelSamplingTime
SMP3 LL_ADC_GetChannelSamplingTime
LL_ADC_SetChannelSamplingTime
SMP4 LL_ADC_GetChannelSamplingTime
LL_ADC_SetChannelSamplingTime
SMP5 LL_ADC_GetChannelSamplingTime
LL_ADC_SetChannelSamplingTime
SMP6 LL_ADC_GetChannelSamplingTime
LL_ADC_SetChannelSamplingTime
SMP7 LL_ADC_GetChannelSamplingTime
LL_ADC_SetChannelSamplingTime
SMP8 LL_ADC_GetChannelSamplingTime
LL_ADC_SetChannelSamplingTime
SMP9 LL_ADC_GetChannelSamplingTime
LL_ADC_SetChannelSamplingTime
SMPR2 SMP10 LL_ADC_GetChannelSamplingTime
LL_ADC_SetChannelSamplingTime
SMP11 LL_ADC_GetChannelSamplingTime
LL_ADC_SetChannelSamplingTime
SMP12 LL_ADC_GetChannelSamplingTime
LL_ADC_SetChannelSamplingTime
SMP13 LL_ADC_GetChannelSamplingTime
LL_ADC_SetChannelSamplingTime
SMP14 LL_ADC_GetChannelSamplingTime
LL_ADC_SetChannelSamplingTime
SMP15 LL_ADC_GetChannelSamplingTime
LL_ADC_SetChannelSamplingTime
SMP16 LL_ADC_GetChannelSamplingTime
LL_ADC_SetChannelSamplingTime
SMP17 LL_ADC_GetChannelSamplingTime
LL_ADC_SetChannelSamplingTime
SMP18 LL_ADC_GetChannelSamplingTime
LL_ADC_SetChannelSamplingTime
SQR1 L LL_ADC_REG_GetSequencerLength
LL_ADC_REG_SetSequencerLength
SQ1 LL_ADC_REG_GetSequencerRanks
LL_ADC_REG_SetSequencerRanks
SQ2 LL_ADC_REG_GetSequencerRanks
LL_ADC_REG_SetSequencerRanks
SQ3 LL_ADC_REG_GetSequencerRanks
LL_ADC_REG_SetSequencerRanks
SQ4 LL_ADC_REG_GetSequencerRanks
LL_ADC_REG_SetSequencerRanks
SQR2 SQ5 LL_ADC_REG_GetSequencerRanks
LL_ADC_REG_SetSequencerRanks
SQ6 LL_ADC_REG_GetSequencerRanks
LL_ADC_REG_SetSequencerRanks
SQ7 LL_ADC_REG_GetSequencerRanks
LL_ADC_REG_SetSequencerRanks
SQ8 LL_ADC_REG_GetSequencerRanks
LL_ADC_REG_SetSequencerRanks
SQ9 LL_ADC_REG_GetSequencerRanks
LL_ADC_REG_SetSequencerRanks
SQR3 SQ10 LL_ADC_REG_GetSequencerRanks
LL_ADC_REG_SetSequencerRanks
SQ11 LL_ADC_REG_GetSequencerRanks
LL_ADC_REG_SetSequencerRanks
SQ12 LL_ADC_REG_GetSequencerRanks
LL_ADC_REG_SetSequencerRanks
SQ13 LL_ADC_REG_GetSequencerRanks
LL_ADC_REG_SetSequencerRanks
SQ14 LL_ADC_REG_GetSequencerRanks
LL_ADC_REG_SetSequencerRanks
SQR4 SQ15 LL_ADC_REG_GetSequencerRanks
LL_ADC_REG_SetSequencerRanks
SQ16 LL_ADC_REG_GetSequencerRanks
LL_ADC_REG_SetSequencerRanks
TR1 HT1 LL_ADC_ConfigAnalogWDThresholds
LL_ADC_GetAnalogWDThresholds
LL_ADC_SetAnalogWDThresholds
LT1 LL_ADC_ConfigAnalogWDThresholds
LL_ADC_GetAnalogWDThresholds
LL_ADC_SetAnalogWDThresholds
TR2 HT2 LL_ADC_ConfigAnalogWDThresholds
LL_ADC_GetAnalogWDThresholds
LL_ADC_SetAnalogWDThresholds
LT2 LL_ADC_ConfigAnalogWDThresholds
LL_ADC_GetAnalogWDThresholds
LL_ADC_SetAnalogWDThresholds
TR3 HT3 LL_ADC_ConfigAnalogWDThresholds
LL_ADC_GetAnalogWDThresholds
LL_ADC_SetAnalogWDThresholds
LT3 LL_ADC_ConfigAnalogWDThresholds
LL_ADC_GetAnalogWDThresholds
LL_ADC_SetAnalogWDThresholds