STM32F439xx HAL User Manual
stm32f4xx_hal_flash_ex.c
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00001 /**
00002   ******************************************************************************
00003   * @file    stm32f4xx_hal_flash_ex.c
00004   * @author  MCD Application Team
00005   * @brief   Extended FLASH HAL module driver.
00006   *          This file provides firmware functions to manage the following 
00007   *          functionalities of the FLASH extension peripheral:
00008   *           + Extended programming operations functions
00009   *  
00010   @verbatim
00011   ==============================================================================
00012                    ##### Flash Extension features #####
00013   ==============================================================================
00014            
00015   [..] Comparing to other previous devices, the FLASH interface for STM32F427xx/437xx and 
00016        STM32F429xx/439xx devices contains the following additional features 
00017        
00018        (+) Capacity up to 2 Mbyte with dual bank architecture supporting read-while-write
00019            capability (RWW)
00020        (+) Dual bank memory organization       
00021        (+) PCROP protection for all banks
00022    
00023                       ##### How to use this driver #####
00024   ==============================================================================
00025   [..] This driver provides functions to configure and program the FLASH memory 
00026        of all STM32F427xx/437xx, STM32F429xx/439xx, STM32F469xx/479xx and STM32F446xx 
00027        devices. It includes
00028       (#) FLASH Memory Erase functions: 
00029            (++) Lock and Unlock the FLASH interface using HAL_FLASH_Unlock() and 
00030                 HAL_FLASH_Lock() functions
00031            (++) Erase function: Erase sector, erase all sectors
00032            (++) There are two modes of erase :
00033              (+++) Polling Mode using HAL_FLASHEx_Erase()
00034              (+++) Interrupt Mode using HAL_FLASHEx_Erase_IT()
00035              
00036       (#) Option Bytes Programming functions: Use HAL_FLASHEx_OBProgram() to :
00037            (++) Set/Reset the write protection
00038            (++) Set the Read protection Level
00039            (++) Set the BOR level
00040            (++) Program the user Option Bytes
00041       (#) Advanced Option Bytes Programming functions: Use HAL_FLASHEx_AdvOBProgram() to :  
00042        (++) Extended space (bank 2) erase function
00043        (++) Full FLASH space (2 Mo) erase (bank 1 and bank 2)
00044        (++) Dual Boot activation
00045        (++) Write protection configuration for bank 2
00046        (++) PCROP protection configuration and control for both banks
00047   
00048   @endverbatim
00049   ******************************************************************************
00050   * @attention
00051   *
00052   * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
00053   *
00054   * Redistribution and use in source and binary forms, with or without modification,
00055   * are permitted provided that the following conditions are met:
00056   *   1. Redistributions of source code must retain the above copyright notice,
00057   *      this list of conditions and the following disclaimer.
00058   *   2. Redistributions in binary form must reproduce the above copyright notice,
00059   *      this list of conditions and the following disclaimer in the documentation
00060   *      and/or other materials provided with the distribution.
00061   *   3. Neither the name of STMicroelectronics nor the names of its contributors
00062   *      may be used to endorse or promote products derived from this software
00063   *      without specific prior written permission.
00064   *
00065   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
00066   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00067   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
00068   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
00069   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00070   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
00071   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
00072   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00073   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
00074   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00075   *
00076   ******************************************************************************
00077   */ 
00078 
00079 /* Includes ------------------------------------------------------------------*/
00080 #include "stm32f4xx_hal.h"
00081 
00082 /** @addtogroup STM32F4xx_HAL_Driver
00083   * @{
00084   */
00085 
00086 /** @defgroup FLASHEx FLASHEx
00087   * @brief FLASH HAL Extension module driver
00088   * @{
00089   */
00090 
00091 #ifdef HAL_FLASH_MODULE_ENABLED
00092 
00093 /* Private typedef -----------------------------------------------------------*/
00094 /* Private define ------------------------------------------------------------*/
00095 /** @addtogroup FLASHEx_Private_Constants
00096   * @{
00097   */    
00098 #define FLASH_TIMEOUT_VALUE       50000U /* 50 s */
00099 /**
00100   * @}
00101   */
00102     
00103 /* Private macro -------------------------------------------------------------*/
00104 /* Private variables ---------------------------------------------------------*/
00105 /** @addtogroup FLASHEx_Private_Variables
00106   * @{
00107   */    
00108 extern FLASH_ProcessTypeDef pFlash;
00109 /**
00110   * @}
00111   */
00112 
00113 /* Private function prototypes -----------------------------------------------*/
00114 /** @addtogroup FLASHEx_Private_Functions
00115   * @{
00116   */
00117 /* Option bytes control */
00118 static void               FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks);
00119 static HAL_StatusTypeDef  FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks);
00120 static HAL_StatusTypeDef  FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Banks);
00121 static HAL_StatusTypeDef  FLASH_OB_RDP_LevelConfig(uint8_t Level);
00122 static HAL_StatusTypeDef  FLASH_OB_UserConfig(uint8_t Iwdg, uint8_t Stop, uint8_t Stdby);
00123 static HAL_StatusTypeDef  FLASH_OB_BOR_LevelConfig(uint8_t Level);
00124 static uint8_t            FLASH_OB_GetUser(void);
00125 static uint16_t           FLASH_OB_GetWRP(void);
00126 static uint8_t            FLASH_OB_GetRDP(void);
00127 static uint8_t            FLASH_OB_GetBOR(void);
00128 
00129 #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F411xE) ||\
00130     defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) ||\
00131     defined(STM32F423xx)
00132 static HAL_StatusTypeDef  FLASH_OB_EnablePCROP(uint32_t Sector);
00133 static HAL_StatusTypeDef  FLASH_OB_DisablePCROP(uint32_t Sector);
00134 #endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx
00135           STM32F413xx || STM32F423xx */
00136 
00137 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx) 
00138 static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks);
00139 static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks);
00140 static HAL_StatusTypeDef FLASH_OB_BootConfig(uint8_t BootConfig);
00141 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
00142 
00143 extern HAL_StatusTypeDef         FLASH_WaitForLastOperation(uint32_t Timeout);
00144 /**
00145   * @}
00146   */
00147 
00148 /* Exported functions --------------------------------------------------------*/
00149 /** @defgroup FLASHEx_Exported_Functions FLASHEx Exported Functions
00150   * @{
00151   */
00152 
00153 /** @defgroup FLASHEx_Exported_Functions_Group1 Extended IO operation functions
00154  *  @brief   Extended IO operation functions 
00155  *
00156 @verbatim   
00157  ===============================================================================
00158                 ##### Extended programming operation functions #####
00159  ===============================================================================  
00160     [..]
00161     This subsection provides a set of functions allowing to manage the Extension FLASH 
00162     programming operations.
00163 
00164 @endverbatim
00165   * @{
00166   */
00167 /**
00168   * @brief  Perform a mass erase or erase the specified FLASH memory sectors 
00169   * @param[in]  pEraseInit pointer to an FLASH_EraseInitTypeDef structure that
00170   *         contains the configuration information for the erasing.
00171   * 
00172   * @param[out]  SectorError pointer to variable  that
00173   *         contains the configuration information on faulty sector in case of error 
00174   *         (0xFFFFFFFFU means that all the sectors have been correctly erased)
00175   * 
00176   * @retval HAL Status
00177   */
00178 HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *SectorError)
00179 {
00180   HAL_StatusTypeDef status = HAL_ERROR;
00181   uint32_t index = 0U;
00182   
00183   /* Process Locked */
00184   __HAL_LOCK(&pFlash);
00185 
00186   /* Check the parameters */
00187   assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
00188 
00189   /* Wait for last operation to be completed */
00190   status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
00191 
00192   if(status == HAL_OK)
00193   {
00194     /*Initialization of SectorError variable*/
00195     *SectorError = 0xFFFFFFFFU;
00196     
00197     if(pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
00198     {
00199       /*Mass erase to be done*/
00200       FLASH_MassErase((uint8_t) pEraseInit->VoltageRange, pEraseInit->Banks);
00201 
00202       /* Wait for last operation to be completed */
00203       status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
00204       
00205       /* if the erase operation is completed, disable the MER Bit */
00206       FLASH->CR &= (~FLASH_MER_BIT);
00207     }
00208     else
00209     {
00210       /* Check the parameters */
00211       assert_param(IS_FLASH_NBSECTORS(pEraseInit->NbSectors + pEraseInit->Sector));
00212 
00213       /* Erase by sector by sector to be done*/
00214       for(index = pEraseInit->Sector; index < (pEraseInit->NbSectors + pEraseInit->Sector); index++)
00215       {
00216         FLASH_Erase_Sector(index, (uint8_t) pEraseInit->VoltageRange);
00217 
00218         /* Wait for last operation to be completed */
00219         status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
00220         
00221         /* If the erase operation is completed, disable the SER and SNB Bits */
00222         CLEAR_BIT(FLASH->CR, (FLASH_CR_SER | FLASH_CR_SNB));
00223 
00224         if(status != HAL_OK) 
00225         {
00226           /* In case of error, stop erase procedure and return the faulty sector*/
00227           *SectorError = index;
00228           break;
00229         }
00230       }
00231     }
00232     /* Flush the caches to be sure of the data consistency */
00233     FLASH_FlushCaches();    
00234   }
00235 
00236   /* Process Unlocked */
00237   __HAL_UNLOCK(&pFlash);
00238 
00239   return status;
00240 }
00241 
00242 /**
00243   * @brief  Perform a mass erase or erase the specified FLASH memory sectors  with interrupt enabled
00244   * @param  pEraseInit pointer to an FLASH_EraseInitTypeDef structure that
00245   *         contains the configuration information for the erasing.
00246   * 
00247   * @retval HAL Status
00248   */
00249 HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit)
00250 {
00251   HAL_StatusTypeDef status = HAL_OK;
00252 
00253   /* Process Locked */
00254   __HAL_LOCK(&pFlash);
00255 
00256   /* Check the parameters */
00257   assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
00258 
00259   /* Enable End of FLASH Operation interrupt */
00260   __HAL_FLASH_ENABLE_IT(FLASH_IT_EOP);
00261   
00262   /* Enable Error source interrupt */
00263   __HAL_FLASH_ENABLE_IT(FLASH_IT_ERR);
00264   
00265   /* Clear pending flags (if any) */  
00266   __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP    | FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR |\
00267                          FLASH_FLAG_PGAERR | FLASH_FLAG_PGPERR| FLASH_FLAG_PGSERR);  
00268   
00269   if(pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
00270   {
00271     /*Mass erase to be done*/
00272     pFlash.ProcedureOnGoing = FLASH_PROC_MASSERASE;
00273     pFlash.Bank = pEraseInit->Banks;
00274     FLASH_MassErase((uint8_t) pEraseInit->VoltageRange, pEraseInit->Banks);
00275   }
00276   else
00277   {
00278     /* Erase by sector to be done*/
00279 
00280     /* Check the parameters */
00281     assert_param(IS_FLASH_NBSECTORS(pEraseInit->NbSectors + pEraseInit->Sector));
00282 
00283     pFlash.ProcedureOnGoing = FLASH_PROC_SECTERASE;
00284     pFlash.NbSectorsToErase = pEraseInit->NbSectors;
00285     pFlash.Sector = pEraseInit->Sector;
00286     pFlash.VoltageForErase = (uint8_t)pEraseInit->VoltageRange;
00287 
00288     /*Erase 1st sector and wait for IT*/
00289     FLASH_Erase_Sector(pEraseInit->Sector, pEraseInit->VoltageRange);
00290   }
00291 
00292   return status;
00293 }
00294 
00295 /**
00296   * @brief   Program option bytes
00297   * @param  pOBInit pointer to an FLASH_OBInitStruct structure that
00298   *         contains the configuration information for the programming.
00299   * 
00300   * @retval HAL Status
00301   */
00302 HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit)
00303 {
00304   HAL_StatusTypeDef status = HAL_ERROR;
00305   
00306   /* Process Locked */
00307   __HAL_LOCK(&pFlash);
00308 
00309   /* Check the parameters */
00310   assert_param(IS_OPTIONBYTE(pOBInit->OptionType));
00311 
00312   /*Write protection configuration*/
00313   if((pOBInit->OptionType & OPTIONBYTE_WRP) == OPTIONBYTE_WRP)
00314   {
00315     assert_param(IS_WRPSTATE(pOBInit->WRPState));
00316     if(pOBInit->WRPState == OB_WRPSTATE_ENABLE)
00317     {
00318       /*Enable of Write protection on the selected Sector*/
00319       status = FLASH_OB_EnableWRP(pOBInit->WRPSector, pOBInit->Banks);
00320     }
00321     else
00322     {
00323       /*Disable of Write protection on the selected Sector*/
00324       status = FLASH_OB_DisableWRP(pOBInit->WRPSector, pOBInit->Banks);
00325     }
00326   }
00327 
00328   /*Read protection configuration*/
00329   if((pOBInit->OptionType & OPTIONBYTE_RDP) == OPTIONBYTE_RDP)
00330   {
00331     status = FLASH_OB_RDP_LevelConfig(pOBInit->RDPLevel);
00332   }
00333 
00334   /*USER  configuration*/
00335   if((pOBInit->OptionType & OPTIONBYTE_USER) == OPTIONBYTE_USER)
00336   {
00337     status = FLASH_OB_UserConfig(pOBInit->USERConfig&OB_IWDG_SW, 
00338                                      pOBInit->USERConfig&OB_STOP_NO_RST,
00339                                      pOBInit->USERConfig&OB_STDBY_NO_RST);
00340   }
00341 
00342   /*BOR Level  configuration*/
00343   if((pOBInit->OptionType & OPTIONBYTE_BOR) == OPTIONBYTE_BOR)
00344   {
00345     status = FLASH_OB_BOR_LevelConfig(pOBInit->BORLevel);
00346   }
00347 
00348   /* Process Unlocked */
00349   __HAL_UNLOCK(&pFlash);
00350 
00351   return status;
00352 }
00353 
00354 /**
00355   * @brief   Get the Option byte configuration
00356   * @param  pOBInit pointer to an FLASH_OBInitStruct structure that
00357   *         contains the configuration information for the programming.
00358   * 
00359   * @retval None
00360   */
00361 void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit)
00362 {
00363   pOBInit->OptionType = OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER | OPTIONBYTE_BOR;
00364 
00365   /*Get WRP*/
00366   pOBInit->WRPSector = (uint32_t)FLASH_OB_GetWRP();
00367 
00368   /*Get RDP Level*/
00369   pOBInit->RDPLevel = (uint32_t)FLASH_OB_GetRDP();
00370 
00371   /*Get USER*/
00372   pOBInit->USERConfig = (uint8_t)FLASH_OB_GetUser();
00373 
00374   /*Get BOR Level*/
00375   pOBInit->BORLevel = (uint32_t)FLASH_OB_GetBOR();
00376 }
00377 
00378 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
00379     defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
00380     defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F469xx) ||\
00381     defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
00382     defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
00383 /**
00384   * @brief   Program option bytes
00385   * @param  pAdvOBInit pointer to an FLASH_AdvOBProgramInitTypeDef structure that
00386   *         contains the configuration information for the programming.
00387   * 
00388   * @retval HAL Status
00389   */
00390 HAL_StatusTypeDef HAL_FLASHEx_AdvOBProgram (FLASH_AdvOBProgramInitTypeDef *pAdvOBInit)
00391 {
00392   HAL_StatusTypeDef status = HAL_ERROR;
00393   
00394   /* Check the parameters */
00395   assert_param(IS_OBEX(pAdvOBInit->OptionType));
00396 
00397   /*Program PCROP option byte*/
00398   if(((pAdvOBInit->OptionType) & OPTIONBYTE_PCROP) == OPTIONBYTE_PCROP)
00399   {
00400     /* Check the parameters */
00401     assert_param(IS_PCROPSTATE(pAdvOBInit->PCROPState));
00402     if((pAdvOBInit->PCROPState) == OB_PCROP_STATE_ENABLE)
00403     {
00404       /*Enable of Write protection on the selected Sector*/
00405 #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) ||\
00406     defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
00407     defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
00408       status = FLASH_OB_EnablePCROP(pAdvOBInit->Sectors);
00409 #else  /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
00410       status = FLASH_OB_EnablePCROP(pAdvOBInit->SectorsBank1, pAdvOBInit->SectorsBank2, pAdvOBInit->Banks);
00411 #endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx ||
00412           STM32F413xx || STM32F423xx */
00413     }
00414     else
00415     {
00416       /*Disable of Write protection on the selected Sector*/
00417 #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) ||\
00418     defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
00419     defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
00420       status = FLASH_OB_DisablePCROP(pAdvOBInit->Sectors);
00421 #else /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
00422       status = FLASH_OB_DisablePCROP(pAdvOBInit->SectorsBank1, pAdvOBInit->SectorsBank2, pAdvOBInit->Banks);
00423 #endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx ||
00424           STM32F413xx || STM32F423xx */
00425     }
00426   }
00427    
00428 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
00429   /*Program BOOT config option byte*/
00430   if(((pAdvOBInit->OptionType) & OPTIONBYTE_BOOTCONFIG) == OPTIONBYTE_BOOTCONFIG)
00431   {
00432     status = FLASH_OB_BootConfig(pAdvOBInit->BootConfig);
00433   }
00434 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
00435 
00436   return status;
00437 }
00438 
00439 /**
00440   * @brief   Get the OBEX byte configuration
00441   * @param  pAdvOBInit pointer to an FLASH_AdvOBProgramInitTypeDef structure that
00442   *         contains the configuration information for the programming.
00443   * 
00444   * @retval None
00445   */
00446 void HAL_FLASHEx_AdvOBGetConfig(FLASH_AdvOBProgramInitTypeDef *pAdvOBInit)
00447 {
00448 #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) ||\
00449     defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
00450     defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
00451   /*Get Sector*/
00452   pAdvOBInit->Sectors = (*(__IO uint16_t *)(OPTCR_BYTE2_ADDRESS));
00453 #else  /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
00454   /*Get Sector for Bank1*/
00455   pAdvOBInit->SectorsBank1 = (*(__IO uint16_t *)(OPTCR_BYTE2_ADDRESS));
00456 
00457   /*Get Sector for Bank2*/
00458   pAdvOBInit->SectorsBank2 = (*(__IO uint16_t *)(OPTCR1_BYTE2_ADDRESS));
00459 
00460   /*Get Boot config OB*/
00461   pAdvOBInit->BootConfig = *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS;
00462 #endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx ||
00463           STM32F413xx || STM32F423xx */
00464 }
00465 
00466 /**
00467   * @brief  Select the Protection Mode 
00468   * 
00469   * @note   After PCROP activated Option Byte modification NOT POSSIBLE! excepted 
00470   *         Global Read Out Protection modification (from level1 to level0) 
00471   * @note   Once SPRMOD bit is active unprotection of a protected sector is not possible 
00472   * @note   Read a protected sector will set RDERR Flag and write a protected sector will set WRPERR Flag
00473   * @note   This function can be used only for STM32F42xxx/STM32F43xxx/STM32F401xx/STM32F411xx/STM32F446xx/
00474   *         STM32F469xx/STM32F479xx/STM32F412xx/STM32F413xx devices.
00475   * 
00476   * @retval HAL Status
00477   */
00478 HAL_StatusTypeDef HAL_FLASHEx_OB_SelectPCROP(void)
00479 {
00480   uint8_t optiontmp = 0xFF;
00481 
00482   /* Mask SPRMOD bit */
00483   optiontmp =  (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE3_ADDRESS) & (uint8_t)0x7F); 
00484   
00485   /* Update Option Byte */
00486   *(__IO uint8_t *)OPTCR_BYTE3_ADDRESS = (uint8_t)(OB_PCROP_SELECTED | optiontmp); 
00487   
00488   return HAL_OK;
00489 }
00490 
00491 /**
00492   * @brief  Deselect the Protection Mode 
00493   * 
00494   * @note   After PCROP activated Option Byte modification NOT POSSIBLE! excepted 
00495   *         Global Read Out Protection modification (from level1 to level0) 
00496   * @note   Once SPRMOD bit is active unprotection of a protected sector is not possible 
00497   * @note   Read a protected sector will set RDERR Flag and write a protected sector will set WRPERR Flag
00498   * @note   This function can be used only for STM32F42xxx/STM32F43xxx/STM32F401xx/STM32F411xx/STM32F446xx/
00499   *         STM32F469xx/STM32F479xx/STM32F412xx/STM32F413xx devices.
00500   * 
00501   * @retval HAL Status
00502   */
00503 HAL_StatusTypeDef HAL_FLASHEx_OB_DeSelectPCROP(void)
00504 {
00505   uint8_t optiontmp = 0xFF;
00506   
00507   /* Mask SPRMOD bit */
00508   optiontmp =  (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE3_ADDRESS) & (uint8_t)0x7F); 
00509   
00510   /* Update Option Byte */
00511   *(__IO uint8_t *)OPTCR_BYTE3_ADDRESS = (uint8_t)(OB_PCROP_DESELECTED | optiontmp);  
00512   
00513   return HAL_OK;
00514 }
00515 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE || STM32F410xx ||\
00516           STM32F411xE || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx ||
00517           STM32F413xx || STM32F423xx */
00518 
00519 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
00520 /**
00521   * @brief  Returns the FLASH Write Protection Option Bytes value for Bank 2
00522   * @note   This function can be used only for STM32F42xxx/STM32F43xxx/STM32F469xx/STM32F479xx devices.  
00523   * @retval The FLASH Write Protection  Option Bytes value
00524   */
00525 uint16_t HAL_FLASHEx_OB_GetBank2WRP(void)
00526 {                            
00527   /* Return the FLASH write protection Register value */
00528   return (*(__IO uint16_t *)(OPTCR1_BYTE2_ADDRESS));
00529 }
00530 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
00531 
00532 /**
00533   * @}
00534   */
00535   
00536 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
00537 /**
00538   * @brief  Full erase of FLASH memory sectors 
00539   * @param  VoltageRange The device voltage range which defines the erase parallelism.  
00540   *          This parameter can be one of the following values:
00541   *            @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V, 
00542   *                                  the operation will be done by byte (8-bit) 
00543   *            @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
00544   *                                  the operation will be done by half word (16-bit)
00545   *            @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
00546   *                                  the operation will be done by word (32-bit)
00547   *            @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp, 
00548   *                                  the operation will be done by double word (64-bit)
00549   * 
00550   * @param  Banks Banks to be erased
00551   *          This parameter can be one of the following values:
00552   *            @arg FLASH_BANK_1: Bank1 to be erased
00553   *            @arg FLASH_BANK_2: Bank2 to be erased
00554   *            @arg FLASH_BANK_BOTH: Bank1 and Bank2 to be erased
00555   *
00556   * @retval HAL Status
00557   */
00558 static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks)
00559 {
00560   /* Check the parameters */
00561   assert_param(IS_VOLTAGERANGE(VoltageRange));
00562   assert_param(IS_FLASH_BANK(Banks));
00563 
00564   /* if the previous operation is completed, proceed to erase all sectors */
00565   CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE);
00566 
00567   if(Banks == FLASH_BANK_BOTH)
00568   {
00569     /* bank1 & bank2 will be erased*/
00570     FLASH->CR |= FLASH_MER_BIT;
00571   }
00572   else if(Banks == FLASH_BANK_1)
00573   {
00574     /*Only bank1 will be erased*/
00575     FLASH->CR |= FLASH_CR_MER1;
00576   }
00577   else
00578   {
00579     /*Only bank2 will be erased*/
00580     FLASH->CR |= FLASH_CR_MER2;
00581   }
00582   FLASH->CR |= FLASH_CR_STRT | ((uint32_t)VoltageRange <<8U);
00583 }
00584 
00585 /**
00586   * @brief  Erase the specified FLASH memory sector
00587   * @param  Sector FLASH sector to erase
00588   *         The value of this parameter depend on device used within the same series      
00589   * @param  VoltageRange The device voltage range which defines the erase parallelism.  
00590   *          This parameter can be one of the following values:
00591   *            @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V, 
00592   *                                  the operation will be done by byte (8-bit) 
00593   *            @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
00594   *                                  the operation will be done by half word (16-bit)
00595   *            @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
00596   *                                  the operation will be done by word (32-bit)
00597   *            @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp, 
00598   *                                  the operation will be done by double word (64-bit)
00599   * 
00600   * @retval None
00601   */
00602 void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange)
00603 {
00604   uint32_t tmp_psize = 0U;
00605 
00606   /* Check the parameters */
00607   assert_param(IS_FLASH_SECTOR(Sector));
00608   assert_param(IS_VOLTAGERANGE(VoltageRange));
00609   
00610   if(VoltageRange == FLASH_VOLTAGE_RANGE_1)
00611   {
00612      tmp_psize = FLASH_PSIZE_BYTE;
00613   }
00614   else if(VoltageRange == FLASH_VOLTAGE_RANGE_2)
00615   {
00616     tmp_psize = FLASH_PSIZE_HALF_WORD;
00617   }
00618   else if(VoltageRange == FLASH_VOLTAGE_RANGE_3)
00619   {
00620     tmp_psize = FLASH_PSIZE_WORD;
00621   }
00622   else
00623   {
00624     tmp_psize = FLASH_PSIZE_DOUBLE_WORD;
00625   }
00626 
00627   /* Need to add offset of 4 when sector higher than FLASH_SECTOR_11 */
00628   if(Sector > FLASH_SECTOR_11) 
00629   {
00630     Sector += 4U;
00631   }
00632   /* If the previous operation is completed, proceed to erase the sector */
00633   CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE);
00634   FLASH->CR |= tmp_psize;
00635   CLEAR_BIT(FLASH->CR, FLASH_CR_SNB);
00636   FLASH->CR |= FLASH_CR_SER | (Sector << FLASH_CR_SNB_Pos);
00637   FLASH->CR |= FLASH_CR_STRT;
00638 }
00639 
00640 /**
00641   * @brief  Enable the write protection of the desired bank1 or bank 2 sectors
00642   *
00643   * @note   When the memory read protection level is selected (RDP level = 1), 
00644   *         it is not possible to program or erase the flash sector i if CortexM4  
00645   *         debug features are connected or boot code is executed in RAM, even if nWRPi = 1 
00646   * @note   Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).   
00647   * 
00648   * @param  WRPSector specifies the sector(s) to be write protected.
00649   *          This parameter can be one of the following values:
00650   *            @arg WRPSector: A value between OB_WRP_SECTOR_0 and OB_WRP_SECTOR_23
00651   *            @arg OB_WRP_SECTOR_All
00652   * @note   BANK2 starts from OB_WRP_SECTOR_12
00653   *
00654   * @param  Banks Enable write protection on all the sectors for the specific bank
00655   *          This parameter can be one of the following values:
00656   *            @arg FLASH_BANK_1: WRP on all sectors of bank1
00657   *            @arg FLASH_BANK_2: WRP on all sectors of bank2
00658   *            @arg FLASH_BANK_BOTH: WRP on all sectors of bank1 & bank2
00659   *
00660   * @retval HAL FLASH State   
00661   */
00662 static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks)
00663 {
00664   HAL_StatusTypeDef status = HAL_OK;
00665   
00666   /* Check the parameters */
00667   assert_param(IS_OB_WRP_SECTOR(WRPSector));
00668   assert_param(IS_FLASH_BANK(Banks));
00669     
00670   /* Wait for last operation to be completed */
00671   status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
00672 
00673   if(status == HAL_OK)
00674   {
00675     if(((WRPSector == OB_WRP_SECTOR_All) && ((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))) ||
00676          (WRPSector < OB_WRP_SECTOR_12))
00677     {
00678        if(WRPSector == OB_WRP_SECTOR_All)
00679        {
00680           /*Write protection on all sector of BANK1*/
00681           *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~(WRPSector>>12));  
00682        }
00683        else
00684        {
00685           /*Write protection done on sectors of BANK1*/
00686           *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~WRPSector);  
00687        }
00688     }
00689     else 
00690     {
00691       /*Write protection done on sectors of BANK2*/
00692       *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~(WRPSector>>12));  
00693     }
00694 
00695     /*Write protection on all sector of BANK2*/
00696     if((WRPSector == OB_WRP_SECTOR_All) && (Banks == FLASH_BANK_BOTH))
00697     {
00698       /* Wait for last operation to be completed */
00699       status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
00700       
00701       if(status == HAL_OK)
00702       { 
00703         *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~(WRPSector>>12));  
00704       }
00705     }
00706     
00707   }
00708   return status;
00709 }
00710 
00711 /**
00712   * @brief  Disable the write protection of the desired bank1 or bank 2 sectors
00713   *
00714   * @note   When the memory read protection level is selected (RDP level = 1), 
00715   *         it is not possible to program or erase the flash sector i if CortexM4  
00716   *         debug features are connected or boot code is executed in RAM, even if nWRPi = 1 
00717   * @note   Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).   
00718   * 
00719   * @param  WRPSector specifies the sector(s) to be write protected.
00720   *          This parameter can be one of the following values:
00721   *            @arg WRPSector: A value between OB_WRP_SECTOR_0 and OB_WRP_SECTOR_23
00722   *            @arg OB_WRP_Sector_All
00723   * @note   BANK2 starts from OB_WRP_SECTOR_12
00724   *
00725   * @param  Banks Disable write protection on all the sectors for the specific bank
00726   *          This parameter can be one of the following values:
00727   *            @arg FLASH_BANK_1: Bank1 to be erased
00728   *            @arg FLASH_BANK_2: Bank2 to be erased
00729   *            @arg FLASH_BANK_BOTH: Bank1 and Bank2 to be erased
00730   *
00731   * @retval HAL Status   
00732   */
00733 static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Banks)
00734 {
00735   HAL_StatusTypeDef status = HAL_OK;
00736   
00737   /* Check the parameters */
00738   assert_param(IS_OB_WRP_SECTOR(WRPSector));
00739   assert_param(IS_FLASH_BANK(Banks));
00740     
00741   /* Wait for last operation to be completed */
00742   status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
00743 
00744   if(status == HAL_OK)
00745   {
00746     if(((WRPSector == OB_WRP_SECTOR_All) && ((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))) ||
00747          (WRPSector < OB_WRP_SECTOR_12))
00748     {
00749        if(WRPSector == OB_WRP_SECTOR_All)
00750        {
00751           /*Write protection on all sector of BANK1*/
00752           *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)(WRPSector>>12); 
00753        }
00754        else
00755        {
00756           /*Write protection done on sectors of BANK1*/
00757           *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)WRPSector; 
00758        }
00759     }
00760     else 
00761     {
00762       /*Write protection done on sectors of BANK2*/
00763       *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)(WRPSector>>12); 
00764     }
00765 
00766     /*Write protection on all sector  of BANK2*/
00767     if((WRPSector == OB_WRP_SECTOR_All) && (Banks == FLASH_BANK_BOTH))
00768     {
00769       /* Wait for last operation to be completed */
00770       status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
00771       
00772       if(status == HAL_OK)
00773       { 
00774         *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)(WRPSector>>12); 
00775       }
00776     }
00777     
00778   }
00779 
00780   return status;
00781 }
00782 
00783 /**
00784   * @brief  Configure the Dual Bank Boot.
00785   *   
00786   * @note   This function can be used only for STM32F42xxx/43xxx devices.
00787   *      
00788   * @param  BootConfig specifies the Dual Bank Boot Option byte.
00789   *          This parameter can be one of the following values:
00790   *            @arg OB_Dual_BootEnabled: Dual Bank Boot Enable
00791   *            @arg OB_Dual_BootDisabled: Dual Bank Boot Disabled
00792   * @retval None
00793   */
00794 static HAL_StatusTypeDef FLASH_OB_BootConfig(uint8_t BootConfig)
00795 {
00796   HAL_StatusTypeDef status = HAL_OK;
00797 
00798   /* Check the parameters */
00799   assert_param(IS_OB_BOOT(BootConfig));
00800 
00801   /* Wait for last operation to be completed */  
00802   status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
00803 
00804   if(status == HAL_OK)
00805   { 
00806     /* Set Dual Bank Boot */
00807     *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS &= (~FLASH_OPTCR_BFB2);
00808     *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS |= BootConfig;
00809   }
00810   
00811   return status;
00812 }
00813 
00814 /**
00815   * @brief  Enable the read/write protection (PCROP) of the desired 
00816   *         sectors of Bank 1 and/or Bank 2.
00817   * @note   This function can be used only for STM32F42xxx/43xxx devices.
00818   * @param  SectorBank1 Specifies the sector(s) to be read/write protected or unprotected for bank1.
00819   *          This parameter can be one of the following values:
00820   *            @arg OB_PCROP: A value between OB_PCROP_SECTOR_0 and OB_PCROP_SECTOR_11
00821   *            @arg OB_PCROP_SECTOR__All                         
00822   * @param  SectorBank2 Specifies the sector(s) to be read/write protected or unprotected for bank2.
00823   *          This parameter can be one of the following values:
00824   *            @arg OB_PCROP: A value between OB_PCROP_SECTOR_12 and OB_PCROP_SECTOR_23
00825   *            @arg OB_PCROP_SECTOR__All                         
00826   * @param  Banks Enable PCROP protection on all the sectors for the specific bank
00827   *          This parameter can be one of the following values:
00828   *            @arg FLASH_BANK_1: WRP on all sectors of bank1
00829   *            @arg FLASH_BANK_2: WRP on all sectors of bank2
00830   *            @arg FLASH_BANK_BOTH: WRP on all sectors of bank1 & bank2
00831   *
00832   * @retval HAL Status  
00833   */
00834 static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks)
00835 {
00836   HAL_StatusTypeDef status = HAL_OK;
00837   
00838   assert_param(IS_FLASH_BANK(Banks));
00839     
00840   /* Wait for last operation to be completed */
00841   status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
00842 
00843   if(status == HAL_OK)
00844   {
00845     if((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))
00846     {
00847       assert_param(IS_OB_PCROP(SectorBank1));
00848       /*Write protection done on sectors of BANK1*/
00849       *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)SectorBank1; 
00850     }
00851     else 
00852     {
00853       assert_param(IS_OB_PCROP(SectorBank2));
00854       /*Write protection done on sectors of BANK2*/
00855       *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)SectorBank2; 
00856     }
00857 
00858     /*Write protection on all sector  of BANK2*/
00859     if(Banks == FLASH_BANK_BOTH)
00860     {
00861       assert_param(IS_OB_PCROP(SectorBank2));
00862       /* Wait for last operation to be completed */
00863       status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
00864       
00865       if(status == HAL_OK)
00866       { 
00867         /*Write protection done on sectors of BANK2*/
00868         *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)SectorBank2; 
00869       }
00870     }
00871     
00872   }
00873 
00874   return status;
00875 }
00876 
00877 
00878 /**
00879   * @brief  Disable the read/write protection (PCROP) of the desired 
00880   *         sectors  of Bank 1 and/or Bank 2.
00881   * @note   This function can be used only for STM32F42xxx/43xxx devices.
00882   * @param  SectorBank1 specifies the sector(s) to be read/write protected or unprotected for bank1.
00883   *          This parameter can be one of the following values:
00884   *            @arg OB_PCROP: A value between OB_PCROP_SECTOR_0 and OB_PCROP_SECTOR_11
00885   *            @arg OB_PCROP_SECTOR__All                         
00886   * @param  SectorBank2 Specifies the sector(s) to be read/write protected or unprotected for bank2.
00887   *          This parameter can be one of the following values:
00888   *            @arg OB_PCROP: A value between OB_PCROP_SECTOR_12 and OB_PCROP_SECTOR_23
00889   *            @arg OB_PCROP_SECTOR__All                         
00890   * @param  Banks Disable PCROP protection on all the sectors for the specific bank
00891   *          This parameter can be one of the following values:
00892   *            @arg FLASH_BANK_1: WRP on all sectors of bank1
00893   *            @arg FLASH_BANK_2: WRP on all sectors of bank2
00894   *            @arg FLASH_BANK_BOTH: WRP on all sectors of bank1 & bank2
00895   *
00896   * @retval HAL Status  
00897   */
00898 static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks)
00899 {  
00900   HAL_StatusTypeDef status = HAL_OK;
00901   
00902   /* Check the parameters */
00903   assert_param(IS_FLASH_BANK(Banks));
00904     
00905   /* Wait for last operation to be completed */
00906   status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
00907 
00908   if(status == HAL_OK)
00909   {
00910     if((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))
00911     {
00912       assert_param(IS_OB_PCROP(SectorBank1));
00913       /*Write protection done on sectors of BANK1*/
00914       *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~SectorBank1); 
00915     }
00916     else 
00917     {
00918       /*Write protection done on sectors of BANK2*/
00919       assert_param(IS_OB_PCROP(SectorBank2));
00920       *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~SectorBank2); 
00921     }
00922 
00923     /*Write protection on all sector  of BANK2*/
00924     if(Banks == FLASH_BANK_BOTH)
00925     {
00926       assert_param(IS_OB_PCROP(SectorBank2));
00927      /* Wait for last operation to be completed */
00928       status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
00929       
00930       if(status == HAL_OK)
00931       { 
00932         /*Write protection done on sectors of BANK2*/
00933         *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~SectorBank2); 
00934       }
00935     }
00936     
00937   }
00938   
00939   return status;
00940 
00941 }
00942 
00943 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
00944 
00945 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
00946     defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
00947     defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) ||\
00948     defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) ||\
00949     defined(STM32F423xx)
00950 /**
00951   * @brief  Mass erase of FLASH memory
00952   * @param  VoltageRange The device voltage range which defines the erase parallelism.  
00953   *          This parameter can be one of the following values:
00954   *            @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V, 
00955   *                                  the operation will be done by byte (8-bit) 
00956   *            @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
00957   *                                  the operation will be done by half word (16-bit)
00958   *            @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
00959   *                                  the operation will be done by word (32-bit)
00960   *            @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp, 
00961   *                                  the operation will be done by double word (64-bit)
00962   * 
00963   * @param  Banks Banks to be erased
00964   *          This parameter can be one of the following values:
00965   *            @arg FLASH_BANK_1: Bank1 to be erased
00966   *
00967   * @retval None
00968   */
00969 static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks)
00970 {
00971   /* Check the parameters */
00972   assert_param(IS_VOLTAGERANGE(VoltageRange));
00973   assert_param(IS_FLASH_BANK(Banks));
00974   
00975   /* If the previous operation is completed, proceed to erase all sectors */
00976   CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE);
00977   FLASH->CR |= FLASH_CR_MER;
00978   FLASH->CR |= FLASH_CR_STRT | ((uint32_t)VoltageRange <<8U);
00979 }
00980 
00981 /**
00982   * @brief  Erase the specified FLASH memory sector
00983   * @param  Sector FLASH sector to erase
00984   *         The value of this parameter depend on device used within the same series      
00985   * @param  VoltageRange The device voltage range which defines the erase parallelism.  
00986   *          This parameter can be one of the following values:
00987   *            @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V, 
00988   *                                  the operation will be done by byte (8-bit) 
00989   *            @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
00990   *                                  the operation will be done by half word (16-bit)
00991   *            @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
00992   *                                  the operation will be done by word (32-bit)
00993   *            @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp, 
00994   *                                  the operation will be done by double word (64-bit)
00995   * 
00996   * @retval None
00997   */
00998 void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange)
00999 {
01000   uint32_t tmp_psize = 0U;
01001 
01002   /* Check the parameters */
01003   assert_param(IS_FLASH_SECTOR(Sector));
01004   assert_param(IS_VOLTAGERANGE(VoltageRange));
01005   
01006   if(VoltageRange == FLASH_VOLTAGE_RANGE_1)
01007   {
01008      tmp_psize = FLASH_PSIZE_BYTE;
01009   }
01010   else if(VoltageRange == FLASH_VOLTAGE_RANGE_2)
01011   {
01012     tmp_psize = FLASH_PSIZE_HALF_WORD;
01013   }
01014   else if(VoltageRange == FLASH_VOLTAGE_RANGE_3)
01015   {
01016     tmp_psize = FLASH_PSIZE_WORD;
01017   }
01018   else
01019   {
01020     tmp_psize = FLASH_PSIZE_DOUBLE_WORD;
01021   }
01022 
01023   /* If the previous operation is completed, proceed to erase the sector */
01024   CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE);
01025   FLASH->CR |= tmp_psize;
01026   CLEAR_BIT(FLASH->CR, FLASH_CR_SNB);
01027   FLASH->CR |= FLASH_CR_SER | (Sector << FLASH_CR_SNB_Pos);
01028   FLASH->CR |= FLASH_CR_STRT;
01029 }
01030 
01031 /**
01032   * @brief  Enable the write protection of the desired bank 1 sectors
01033   *
01034   * @note   When the memory read protection level is selected (RDP level = 1), 
01035   *         it is not possible to program or erase the flash sector i if CortexM4  
01036   *         debug features are connected or boot code is executed in RAM, even if nWRPi = 1 
01037   * @note   Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).   
01038   * 
01039   * @param  WRPSector specifies the sector(s) to be write protected.
01040   *         The value of this parameter depend on device used within the same series 
01041   * 
01042   * @param  Banks Enable write protection on all the sectors for the specific bank
01043   *          This parameter can be one of the following values:
01044   *            @arg FLASH_BANK_1: WRP on all sectors of bank1
01045   *
01046   * @retval HAL Status 
01047   */
01048 static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks)
01049 {
01050   HAL_StatusTypeDef status = HAL_OK;
01051   
01052   /* Check the parameters */
01053   assert_param(IS_OB_WRP_SECTOR(WRPSector));
01054   assert_param(IS_FLASH_BANK(Banks));
01055     
01056   /* Wait for last operation to be completed */
01057   status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
01058 
01059   if(status == HAL_OK)
01060   { 
01061     *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~WRPSector);  
01062   }
01063   
01064   return status;
01065 }
01066 
01067 /**
01068   * @brief  Disable the write protection of the desired bank 1 sectors
01069   *
01070   * @note   When the memory read protection level is selected (RDP level = 1), 
01071   *         it is not possible to program or erase the flash sector i if CortexM4  
01072   *         debug features are connected or boot code is executed in RAM, even if nWRPi = 1 
01073   * @note   Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).   
01074   * 
01075   * @param  WRPSector specifies the sector(s) to be write protected.
01076   *         The value of this parameter depend on device used within the same series 
01077   * 
01078   * @param  Banks Enable write protection on all the sectors for the specific bank
01079   *          This parameter can be one of the following values:
01080   *            @arg FLASH_BANK_1: WRP on all sectors of bank1
01081   *
01082   * @retval HAL Status 
01083   */
01084 static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Banks)
01085 {
01086   HAL_StatusTypeDef status = HAL_OK;
01087   
01088   /* Check the parameters */
01089   assert_param(IS_OB_WRP_SECTOR(WRPSector));
01090   assert_param(IS_FLASH_BANK(Banks));
01091     
01092   /* Wait for last operation to be completed */
01093   status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
01094 
01095   if(status == HAL_OK)
01096   { 
01097     *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)WRPSector; 
01098   }
01099   
01100   return status;
01101 }
01102 #endif /* STM32F40xxx || STM32F41xxx || STM32F401xx || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx
01103           STM32F413xx || STM32F423xx */
01104 
01105 #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) ||\
01106     defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
01107     defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
01108 /**
01109   * @brief  Enable the read/write protection (PCROP) of the desired sectors.
01110   * @note   This function can be used only for STM32F401xx devices.
01111   * @param  Sector specifies the sector(s) to be read/write protected or unprotected.
01112   *          This parameter can be one of the following values:
01113   *            @arg OB_PCROP: A value between OB_PCROP_Sector0 and OB_PCROP_Sector5
01114   *            @arg OB_PCROP_Sector_All                         
01115   * @retval HAL Status  
01116   */
01117 static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t Sector)
01118 {
01119   HAL_StatusTypeDef status = HAL_OK;
01120   
01121   /* Check the parameters */
01122   assert_param(IS_OB_PCROP(Sector));
01123     
01124   /* Wait for last operation to be completed */  
01125   status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
01126 
01127   if(status == HAL_OK)
01128   { 
01129     *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)Sector;
01130   }
01131   
01132   return status;
01133 }
01134 
01135 
01136 /**
01137   * @brief  Disable the read/write protection (PCROP) of the desired sectors.
01138   * @note   This function can be used only for STM32F401xx devices.
01139   * @param  Sector specifies the sector(s) to be read/write protected or unprotected.
01140   *          This parameter can be one of the following values:
01141   *            @arg OB_PCROP: A value between OB_PCROP_Sector0 and OB_PCROP_Sector5
01142   *            @arg OB_PCROP_Sector_All                         
01143   * @retval HAL Status  
01144   */
01145 static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t Sector)
01146 {  
01147   HAL_StatusTypeDef status = HAL_OK;
01148   
01149   /* Check the parameters */
01150   assert_param(IS_OB_PCROP(Sector));
01151     
01152   /* Wait for last operation to be completed */  
01153   status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
01154 
01155   if(status == HAL_OK)
01156   { 
01157     *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~Sector);
01158   }
01159   
01160   return status;
01161 
01162 }
01163 #endif /* STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx
01164           STM32F413xx || STM32F423xx */
01165 
01166 /**
01167   * @brief  Set the read protection level.
01168   * @param  Level specifies the read protection level.
01169   *          This parameter can be one of the following values:
01170   *            @arg OB_RDP_LEVEL_0: No protection
01171   *            @arg OB_RDP_LEVEL_1: Read protection of the memory
01172   *            @arg OB_RDP_LEVEL_2: Full chip protection
01173   *   
01174   * @note WARNING: When enabling OB_RDP level 2 it's no more possible to go back to level 1 or 0
01175   *    
01176   * @retval HAL Status
01177   */
01178 static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t Level)
01179 {
01180   HAL_StatusTypeDef status = HAL_OK;
01181   
01182   /* Check the parameters */
01183   assert_param(IS_OB_RDP_LEVEL(Level));
01184     
01185   /* Wait for last operation to be completed */
01186   status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
01187 
01188   if(status == HAL_OK)
01189   { 
01190     *(__IO uint8_t*)OPTCR_BYTE1_ADDRESS = Level;
01191   }
01192   
01193   return status;
01194 }
01195 
01196 /**
01197   * @brief  Program the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY.    
01198   * @param  Iwdg Selects the IWDG mode
01199   *          This parameter can be one of the following values:
01200   *            @arg OB_IWDG_SW: Software IWDG selected
01201   *            @arg OB_IWDG_HW: Hardware IWDG selected
01202   * @param  Stop Reset event when entering STOP mode.
01203   *          This parameter  can be one of the following values:
01204   *            @arg OB_STOP_NO_RST: No reset generated when entering in STOP
01205   *            @arg OB_STOP_RST: Reset generated when entering in STOP
01206   * @param  Stdby Reset event when entering Standby mode.
01207   *          This parameter  can be one of the following values:
01208   *            @arg OB_STDBY_NO_RST: No reset generated when entering in STANDBY
01209   *            @arg OB_STDBY_RST: Reset generated when entering in STANDBY
01210   * @retval HAL Status
01211   */
01212 static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t Iwdg, uint8_t Stop, uint8_t Stdby)
01213 {
01214   uint8_t optiontmp = 0xFF;
01215   HAL_StatusTypeDef status = HAL_OK;
01216 
01217   /* Check the parameters */
01218   assert_param(IS_OB_IWDG_SOURCE(Iwdg));
01219   assert_param(IS_OB_STOP_SOURCE(Stop));
01220   assert_param(IS_OB_STDBY_SOURCE(Stdby));
01221 
01222   /* Wait for last operation to be completed */
01223   status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
01224   
01225   if(status == HAL_OK)
01226   {     
01227     /* Mask OPTLOCK, OPTSTRT, BOR_LEV and BFB2 bits */
01228     optiontmp =  (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE0_ADDRESS) & (uint8_t)0x1F);
01229 
01230     /* Update User Option Byte */
01231     *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS = Iwdg | (uint8_t)(Stdby | (uint8_t)(Stop | ((uint8_t)optiontmp))); 
01232   }
01233   
01234   return status; 
01235 }
01236 
01237 /**
01238   * @brief  Set the BOR Level. 
01239   * @param  Level specifies the Option Bytes BOR Reset Level.
01240   *          This parameter can be one of the following values:
01241   *            @arg OB_BOR_LEVEL3: Supply voltage ranges from 2.7 to 3.6 V
01242   *            @arg OB_BOR_LEVEL2: Supply voltage ranges from 2.4 to 2.7 V
01243   *            @arg OB_BOR_LEVEL1: Supply voltage ranges from 2.1 to 2.4 V
01244   *            @arg OB_BOR_OFF: Supply voltage ranges from 1.62 to 2.1 V
01245   * @retval HAL Status
01246   */
01247 static HAL_StatusTypeDef FLASH_OB_BOR_LevelConfig(uint8_t Level)
01248 {
01249   /* Check the parameters */
01250   assert_param(IS_OB_BOR_LEVEL(Level));
01251 
01252   /* Set the BOR Level */
01253   *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS &= (~FLASH_OPTCR_BOR_LEV);
01254   *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS |= Level;
01255   
01256   return HAL_OK;
01257   
01258 }
01259 
01260 /**
01261   * @brief  Return the FLASH User Option Byte value.
01262   * @retval uint8_t FLASH User Option Bytes values: IWDG_SW(Bit0), RST_STOP(Bit1)
01263   *         and RST_STDBY(Bit2).
01264   */
01265 static uint8_t FLASH_OB_GetUser(void)
01266 {
01267   /* Return the User Option Byte */
01268   return ((uint8_t)(FLASH->OPTCR & 0xE0));
01269 }
01270 
01271 /**
01272   * @brief  Return the FLASH Write Protection Option Bytes value.
01273   * @retval uint16_t FLASH Write Protection Option Bytes value
01274   */
01275 static uint16_t FLASH_OB_GetWRP(void)
01276 {
01277   /* Return the FLASH write protection Register value */
01278   return (*(__IO uint16_t *)(OPTCR_BYTE2_ADDRESS));
01279 }
01280 
01281 /**
01282   * @brief  Returns the FLASH Read Protection level.
01283   * @retval FLASH ReadOut Protection Status:
01284   *         This parameter can be one of the following values:
01285   *            @arg OB_RDP_LEVEL_0: No protection
01286   *            @arg OB_RDP_LEVEL_1: Read protection of the memory
01287   *            @arg OB_RDP_LEVEL_2: Full chip protection
01288   */
01289 static uint8_t FLASH_OB_GetRDP(void)
01290 {
01291   uint8_t readstatus = OB_RDP_LEVEL_0;
01292 
01293   if((*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS) == (uint8_t)OB_RDP_LEVEL_2))
01294   {
01295     readstatus = OB_RDP_LEVEL_2;
01296   }
01297   else if((*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS) == (uint8_t)OB_RDP_LEVEL_1))
01298   {
01299     readstatus = OB_RDP_LEVEL_1;
01300   }
01301   else 
01302   {
01303     readstatus = OB_RDP_LEVEL_0;
01304   }
01305 
01306   return readstatus;
01307 }
01308 
01309 /**
01310   * @brief  Returns the FLASH BOR level.
01311   * @retval uint8_t The FLASH BOR level:
01312   *           - OB_BOR_LEVEL3: Supply voltage ranges from 2.7 to 3.6 V
01313   *           - OB_BOR_LEVEL2: Supply voltage ranges from 2.4 to 2.7 V
01314   *           - OB_BOR_LEVEL1: Supply voltage ranges from 2.1 to 2.4 V
01315   *           - OB_BOR_OFF   : Supply voltage ranges from 1.62 to 2.1 V  
01316   */
01317 static uint8_t FLASH_OB_GetBOR(void)
01318 {
01319   /* Return the FLASH BOR level */
01320   return (uint8_t)(*(__IO uint8_t *)(OPTCR_BYTE0_ADDRESS) & (uint8_t)0x0C);
01321 }
01322 
01323 /**
01324   * @brief  Flush the instruction and data caches
01325   * @retval None
01326   */
01327 void FLASH_FlushCaches(void)
01328 {
01329   /* Flush instruction cache  */
01330   if(READ_BIT(FLASH->ACR, FLASH_ACR_ICEN)!= RESET)
01331   {
01332     /* Disable instruction cache  */
01333     __HAL_FLASH_INSTRUCTION_CACHE_DISABLE();
01334     /* Reset instruction cache */
01335     __HAL_FLASH_INSTRUCTION_CACHE_RESET();
01336     /* Enable instruction cache */
01337     __HAL_FLASH_INSTRUCTION_CACHE_ENABLE();
01338   }
01339   
01340   /* Flush data cache */
01341   if(READ_BIT(FLASH->ACR, FLASH_ACR_DCEN) != RESET)
01342   {
01343     /* Disable data cache  */
01344     __HAL_FLASH_DATA_CACHE_DISABLE();
01345     /* Reset data cache */
01346     __HAL_FLASH_DATA_CACHE_RESET();
01347     /* Enable data cache */
01348     __HAL_FLASH_DATA_CACHE_ENABLE();
01349   }
01350 }
01351 
01352 /**
01353   * @}
01354   */
01355   
01356 #endif /* HAL_FLASH_MODULE_ENABLED */
01357 
01358 /**
01359   * @}
01360   */
01361 
01362 /**
01363   * @}
01364   */
01365 
01366 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/