STM32F439xx HAL User Manual
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32f4xx_hal_cec.c 00004 * @author MCD Application Team 00005 * @brief CEC HAL module driver. 00006 * This file provides firmware functions to manage the following 00007 * functionalities of the High Definition Multimedia Interface 00008 * Consumer Electronics Control Peripheral (CEC). 00009 * + Initialization and de-initialization functions 00010 * + IO operation functions 00011 * + Peripheral Control functions 00012 * 00013 * 00014 @verbatim 00015 =============================================================================== 00016 ##### How to use this driver ##### 00017 =============================================================================== 00018 [..] 00019 The CEC HAL driver can be used as follow: 00020 00021 (#) Declare a CEC_HandleTypeDef handle structure. 00022 (#) Initialize the CEC low level resources by implementing the HAL_CEC_MspInit ()API: 00023 (##) Enable the CEC interface clock. 00024 (##) CEC pins configuration: 00025 (+++) Enable the clock for the CEC GPIOs. 00026 (+++) Configure these CEC pins as alternate function pull-up. 00027 (##) NVIC configuration if you need to use interrupt process (HAL_CEC_Transmit_IT() 00028 and HAL_CEC_Receive_IT() APIs): 00029 (+++) Configure the CEC interrupt priority. 00030 (+++) Enable the NVIC CEC IRQ handle. 00031 (+++) The specific CEC interrupts (Transmission complete interrupt, 00032 RXNE interrupt and Error Interrupts) will be managed using the macros 00033 __HAL_CEC_ENABLE_IT() and __HAL_CEC_DISABLE_IT() inside the transmit 00034 and receive process. 00035 00036 (#) Program the Signal Free Time (SFT) and SFT option, Tolerance, reception stop in 00037 in case of Bit Rising Error, Error-Bit generation conditions, device logical 00038 address and Listen mode in the hcec Init structure. 00039 00040 (#) Initialize the CEC registers by calling the HAL_CEC_Init() API. 00041 00042 [..] 00043 (@) This API (HAL_CEC_Init()) configures also the low level Hardware (GPIO, CLOCK, CORTEX...) 00044 by calling the customed HAL_CEC_MspInit() API. 00045 00046 @endverbatim 00047 ****************************************************************************** 00048 * @attention 00049 * 00050 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> 00051 * 00052 * Redistribution and use in source and binary forms, with or without modification, 00053 * are permitted provided that the following conditions are met: 00054 * 1. Redistributions of source code must retain the above copyright notice, 00055 * this list of conditions and the following disclaimer. 00056 * 2. Redistributions in binary form must reproduce the above copyright notice, 00057 * this list of conditions and the following disclaimer in the documentation 00058 * and/or other materials provided with the distribution. 00059 * 3. Neither the name of STMicroelectronics nor the names of its contributors 00060 * may be used to endorse or promote products derived from this software 00061 * without specific prior written permission. 00062 * 00063 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 00064 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 00065 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 00066 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 00067 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 00068 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 00069 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00070 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 00071 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 00072 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00073 * 00074 ****************************************************************************** 00075 */ 00076 00077 /* Includes ------------------------------------------------------------------*/ 00078 #include "stm32f4xx_hal.h" 00079 00080 /** @addtogroup STM32F4xx_HAL_Driver 00081 * @{ 00082 */ 00083 00084 /** @defgroup CEC CEC 00085 * @brief HAL CEC module driver 00086 * @{ 00087 */ 00088 #ifdef HAL_CEC_MODULE_ENABLED 00089 00090 #if defined(STM32F446xx) 00091 00092 /* Private typedef -----------------------------------------------------------*/ 00093 /* Private define ------------------------------------------------------------*/ 00094 /** @defgroup CEC_Private_Constants CEC Private Constants 00095 * @{ 00096 */ 00097 /** 00098 * @} 00099 */ 00100 00101 /* Private macro -------------------------------------------------------------*/ 00102 /* Private variables ---------------------------------------------------------*/ 00103 /* Private function prototypes -----------------------------------------------*/ 00104 /** @defgroup CEC_Private_Functions CEC Private Functions 00105 * @{ 00106 */ 00107 /** 00108 * @} 00109 */ 00110 00111 /* Exported functions ---------------------------------------------------------*/ 00112 00113 /** @defgroup CEC_Exported_Functions CEC Exported Functions 00114 * @{ 00115 */ 00116 00117 /** @defgroup CEC_Exported_Functions_Group1 Initialization and de-initialization functions 00118 * @brief Initialization and Configuration functions 00119 * 00120 @verbatim 00121 =============================================================================== 00122 ##### Initialization and Configuration functions ##### 00123 =============================================================================== 00124 [..] 00125 This subsection provides a set of functions allowing to initialize the CEC 00126 (+) The following parameters need to be configured: 00127 (++) SignalFreeTime 00128 (++) Tolerance 00129 (++) BRERxStop (RX stopped or not upon Bit Rising Error) 00130 (++) BREErrorBitGen (Error-Bit generation in case of Bit Rising Error) 00131 (++) LBPEErrorBitGen (Error-Bit generation in case of Long Bit Period Error) 00132 (++) BroadcastMsgNoErrorBitGen (Error-bit generation in case of broadcast message error) 00133 (++) SignalFreeTimeOption (SFT Timer start definition) 00134 (++) OwnAddress (CEC device address) 00135 (++) ListenMode 00136 00137 @endverbatim 00138 * @{ 00139 */ 00140 00141 /** 00142 * @brief Initializes the CEC mode according to the specified 00143 * parameters in the CEC_InitTypeDef and creates the associated handle . 00144 * @param hcec CEC handle 00145 * @retval HAL status 00146 */ 00147 HAL_StatusTypeDef HAL_CEC_Init(CEC_HandleTypeDef *hcec) 00148 { 00149 /* Check the CEC handle allocation */ 00150 if((hcec == NULL) ||(hcec->Init.RxBuffer == NULL)) 00151 { 00152 return HAL_ERROR; 00153 } 00154 00155 /* Check the parameters */ 00156 assert_param(IS_CEC_ALL_INSTANCE(hcec->Instance)); 00157 assert_param(IS_CEC_SIGNALFREETIME(hcec->Init.SignalFreeTime)); 00158 assert_param(IS_CEC_TOLERANCE(hcec->Init.Tolerance)); 00159 assert_param(IS_CEC_BRERXSTOP(hcec->Init.BRERxStop)); 00160 assert_param(IS_CEC_BREERRORBITGEN(hcec->Init.BREErrorBitGen)); 00161 assert_param(IS_CEC_LBPEERRORBITGEN(hcec->Init.LBPEErrorBitGen)); 00162 assert_param(IS_CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION(hcec->Init.BroadcastMsgNoErrorBitGen)); 00163 assert_param(IS_CEC_SFTOP(hcec->Init.SignalFreeTimeOption)); 00164 assert_param(IS_CEC_LISTENING_MODE(hcec->Init.ListenMode)); 00165 assert_param(IS_CEC_OWN_ADDRESS(hcec->Init.OwnAddress)); 00166 00167 if(hcec->gState == HAL_CEC_STATE_RESET) 00168 { 00169 /* Allocate lock resource and initialize it */ 00170 hcec->Lock = HAL_UNLOCKED; 00171 /* Init the low level hardware : GPIO, CLOCK */ 00172 HAL_CEC_MspInit(hcec); 00173 } 00174 hcec->gState = HAL_CEC_STATE_BUSY; 00175 00176 /* Disable the Peripheral */ 00177 __HAL_CEC_DISABLE(hcec); 00178 00179 /* Write to CEC Control Register */ 00180 hcec->Instance->CFGR = hcec->Init.SignalFreeTime | hcec->Init.Tolerance | hcec->Init.BRERxStop|\ 00181 hcec->Init.BREErrorBitGen | hcec->Init.LBPEErrorBitGen | hcec->Init.BroadcastMsgNoErrorBitGen |\ 00182 hcec->Init.SignalFreeTimeOption |((uint32_t)(hcec->Init.OwnAddress)<<16U) |\ 00183 hcec->Init.ListenMode; 00184 00185 /* Enable the following CEC Transmission/Reception interrupts as 00186 * well as the following CEC Transmission/Reception Errors interrupts 00187 * Rx Byte Received IT 00188 * End of Reception IT 00189 * Rx overrun 00190 * Rx bit rising error 00191 * Rx short bit period error 00192 * Rx long bit period error 00193 * Rx missing acknowledge 00194 * Tx Byte Request IT 00195 * End of Transmission IT 00196 * Tx Missing Acknowledge IT 00197 * Tx-Error IT 00198 * Tx-Buffer Underrun IT 00199 * Tx arbitration lost */ 00200 __HAL_CEC_ENABLE_IT(hcec, CEC_IT_RXBR|CEC_IT_RXEND|CEC_IER_RX_ALL_ERR|CEC_IT_TXBR|CEC_IT_TXEND|CEC_IER_TX_ALL_ERR); 00201 00202 /* Enable the CEC Peripheral */ 00203 __HAL_CEC_ENABLE(hcec); 00204 00205 hcec->ErrorCode = HAL_CEC_ERROR_NONE; 00206 hcec->gState = HAL_CEC_STATE_READY; 00207 hcec->RxState = HAL_CEC_STATE_READY; 00208 00209 return HAL_OK; 00210 } 00211 00212 /** 00213 * @brief DeInitializes the CEC peripheral 00214 * @param hcec CEC handle 00215 * @retval HAL status 00216 */ 00217 HAL_StatusTypeDef HAL_CEC_DeInit(CEC_HandleTypeDef *hcec) 00218 { 00219 /* Check the CEC handle allocation */ 00220 if(hcec == NULL) 00221 { 00222 return HAL_ERROR; 00223 } 00224 00225 /* Check the parameters */ 00226 assert_param(IS_CEC_ALL_INSTANCE(hcec->Instance)); 00227 00228 hcec->gState = HAL_CEC_STATE_BUSY; 00229 00230 /* DeInit the low level hardware */ 00231 HAL_CEC_MspDeInit(hcec); 00232 /* Disable the Peripheral */ 00233 __HAL_CEC_DISABLE(hcec); 00234 00235 /* Clear Flags */ 00236 __HAL_CEC_CLEAR_FLAG(hcec,CEC_FLAG_TXEND|CEC_FLAG_TXBR|CEC_FLAG_RXBR|CEC_FLAG_RXEND|CEC_ISR_ALL_ERROR); 00237 00238 /* Disable the following CEC Transmission/Reception interrupts as 00239 * well as the following CEC Transmission/Reception Errors interrupts 00240 * Rx Byte Received IT 00241 * End of Reception IT 00242 * Rx overrun 00243 * Rx bit rising error 00244 * Rx short bit period error 00245 * Rx long bit period error 00246 * Rx missing acknowledge 00247 * Tx Byte Request IT 00248 * End of Transmission IT 00249 * Tx Missing Acknowledge IT 00250 * Tx-Error IT 00251 * Tx-Buffer Underrun IT 00252 * Tx arbitration lost */ 00253 __HAL_CEC_DISABLE_IT(hcec, CEC_IT_RXBR|CEC_IT_RXEND|CEC_IER_RX_ALL_ERR|CEC_IT_TXBR|CEC_IT_TXEND|CEC_IER_TX_ALL_ERR); 00254 00255 hcec->ErrorCode = HAL_CEC_ERROR_NONE; 00256 hcec->gState = HAL_CEC_STATE_RESET; 00257 hcec->RxState = HAL_CEC_STATE_RESET; 00258 00259 /* Process Unlock */ 00260 __HAL_UNLOCK(hcec); 00261 00262 return HAL_OK; 00263 } 00264 00265 /** 00266 * @brief Initializes the Own Address of the CEC device 00267 * @param hcec CEC handle 00268 * @param CEC_OwnAddress The CEC own address. 00269 * @retval HAL status 00270 */ 00271 HAL_StatusTypeDef HAL_CEC_SetDeviceAddress(CEC_HandleTypeDef *hcec, uint16_t CEC_OwnAddress) 00272 { 00273 /* Check the parameters */ 00274 assert_param(IS_CEC_OWN_ADDRESS(CEC_OwnAddress)); 00275 00276 if ((hcec->gState == HAL_CEC_STATE_READY) && (hcec->RxState == HAL_CEC_STATE_READY)) 00277 { 00278 /* Process Locked */ 00279 __HAL_LOCK(hcec); 00280 00281 hcec->gState = HAL_CEC_STATE_BUSY; 00282 00283 /* Disable the Peripheral */ 00284 __HAL_CEC_DISABLE(hcec); 00285 00286 if(CEC_OwnAddress != CEC_OWN_ADDRESS_NONE) 00287 { 00288 hcec->Instance->CFGR |= ((uint32_t)CEC_OwnAddress<<16U); 00289 } 00290 else 00291 { 00292 hcec->Instance->CFGR &= ~(CEC_CFGR_OAR); 00293 } 00294 00295 hcec->gState = HAL_CEC_STATE_READY; 00296 hcec->ErrorCode = HAL_CEC_ERROR_NONE; 00297 00298 /* Process Unlocked */ 00299 __HAL_UNLOCK(hcec); 00300 00301 /* Enable the Peripheral */ 00302 __HAL_CEC_ENABLE(hcec); 00303 00304 return HAL_OK; 00305 } 00306 else 00307 { 00308 return HAL_BUSY; 00309 } 00310 } 00311 00312 /** 00313 * @brief CEC MSP Init 00314 * @param hcec CEC handle 00315 * @retval None 00316 */ 00317 __weak void HAL_CEC_MspInit(CEC_HandleTypeDef *hcec) 00318 { 00319 /* Prevent unused argument(s) compilation warning */ 00320 UNUSED(hcec); 00321 /* NOTE : This function should not be modified, when the callback is needed, 00322 the HAL_CEC_MspInit can be implemented in the user file 00323 */ 00324 } 00325 00326 /** 00327 * @brief CEC MSP DeInit 00328 * @param hcec CEC handle 00329 * @retval None 00330 */ 00331 __weak void HAL_CEC_MspDeInit(CEC_HandleTypeDef *hcec) 00332 { 00333 /* Prevent unused argument(s) compilation warning */ 00334 UNUSED(hcec); 00335 /* NOTE : This function should not be modified, when the callback is needed, 00336 the HAL_CEC_MspDeInit can be implemented in the user file 00337 */ 00338 } 00339 00340 /** 00341 * @} 00342 */ 00343 00344 /** @defgroup CEC_Exported_Functions_Group2 Input and Output operation functions 00345 * @brief CEC Transmit/Receive functions 00346 * 00347 @verbatim 00348 =============================================================================== 00349 ##### IO operation functions ##### 00350 =============================================================================== 00351 This subsection provides a set of functions allowing to manage the CEC data transfers. 00352 00353 (#) The CEC handle must contain the initiator (TX side) and the destination (RX side) 00354 logical addresses (4-bit long addresses, 0x0F for broadcast messages destination) 00355 00356 (#) The communication is performed using Interrupts. 00357 These API's return the HAL status. 00358 The end of the data processing will be indicated through the 00359 dedicated CEC IRQ when using Interrupt mode. 00360 The HAL_CEC_TxCpltCallback(), HAL_CEC_RxCpltCallback() user callbacks 00361 will be executed respectivelly at the end of the transmit or Receive process 00362 The HAL_CEC_ErrorCallback()user callback will be executed when a communication 00363 error is detected 00364 00365 (#) API's with Interrupt are : 00366 (+) HAL_CEC_Transmit_IT() 00367 (+) HAL_CEC_IRQHandler() 00368 00369 (#) A set of User Callbacks are provided: 00370 (+) HAL_CEC_TxCpltCallback() 00371 (+) HAL_CEC_RxCpltCallback() 00372 (+) HAL_CEC_ErrorCallback() 00373 00374 @endverbatim 00375 * @{ 00376 */ 00377 00378 /** 00379 * @brief Send data in interrupt mode 00380 * @param hcec CEC handle 00381 * @param InitiatorAddress Initiator logical address 00382 * @param DestinationAddress destination logical address 00383 * @param pData pointer to input byte data buffer 00384 * @param Size amount of data to be sent in bytes (without counting the header). 00385 * 0 means only the header is sent (ping operation). 00386 * Maximum TX size is 15 bytes (1 opcode and up to 14 operands). 00387 * @retval HAL status 00388 */ 00389 HAL_StatusTypeDef HAL_CEC_Transmit_IT(CEC_HandleTypeDef *hcec, uint8_t InitiatorAddress, uint8_t DestinationAddress, uint8_t *pData, uint32_t Size) 00390 { 00391 /* if the IP isn't already busy and if there is no previous transmission 00392 already pending due to arbitration lost */ 00393 if (hcec->gState == HAL_CEC_STATE_READY) 00394 { 00395 if((pData == NULL ) && (Size > 0U)) 00396 { 00397 return HAL_ERROR; 00398 } 00399 00400 assert_param(IS_CEC_ADDRESS(DestinationAddress)); 00401 assert_param(IS_CEC_ADDRESS(InitiatorAddress)); 00402 assert_param(IS_CEC_MSGSIZE(Size)); 00403 00404 /* Process Locked */ 00405 __HAL_LOCK(hcec); 00406 hcec->pTxBuffPtr = pData; 00407 hcec->gState = HAL_CEC_STATE_BUSY_TX; 00408 hcec->ErrorCode = HAL_CEC_ERROR_NONE; 00409 00410 /* initialize the number of bytes to send, 00411 * 0 means only one header is sent (ping operation) */ 00412 hcec->TxXferCount = Size; 00413 00414 /* in case of no payload (Size = 0), sender is only pinging the system; 00415 Set TX End of Message (TXEOM) bit, must be set before writing data to TXDR */ 00416 if (Size == 0U) 00417 { 00418 __HAL_CEC_LAST_BYTE_TX_SET(hcec); 00419 } 00420 00421 /* send header block */ 00422 hcec->Instance->TXDR = ((uint8_t)(InitiatorAddress << CEC_INITIATOR_LSB_POS) |(uint8_t) DestinationAddress); 00423 /* Set TX Start of Message (TXSOM) bit */ 00424 __HAL_CEC_FIRST_BYTE_TX_SET(hcec); 00425 00426 /* Process Unlocked */ 00427 __HAL_UNLOCK(hcec); 00428 00429 return HAL_OK; 00430 00431 } 00432 else 00433 { 00434 return HAL_BUSY; 00435 } 00436 } 00437 00438 /** 00439 * @brief Get size of the received frame. 00440 * @param hcec CEC handle 00441 * @retval Frame size 00442 */ 00443 uint32_t HAL_CEC_GetLastReceivedFrameSize(CEC_HandleTypeDef *hcec) 00444 { 00445 return hcec->RxXferSize; 00446 } 00447 00448 /** 00449 * @brief Change Rx Buffer. 00450 * @param hcec CEC handle 00451 * @param Rxbuffer Rx Buffer 00452 * @note This function can be called only inside the HAL_CEC_RxCpltCallback() 00453 * @retval Frame size 00454 */ 00455 void HAL_CEC_ChangeRxBuffer(CEC_HandleTypeDef *hcec, uint8_t* Rxbuffer) 00456 { 00457 hcec->Init.RxBuffer = Rxbuffer; 00458 } 00459 00460 /** 00461 * @brief This function handles CEC interrupt requests. 00462 * @param hcec CEC handle 00463 * @retval None 00464 */ 00465 void HAL_CEC_IRQHandler(CEC_HandleTypeDef *hcec) 00466 { 00467 00468 /* save interrupts register for further error or interrupts handling purposes */ 00469 uint32_t reg = 0U; 00470 reg = hcec->Instance->ISR; 00471 00472 00473 /* ----------------------------Arbitration Lost Management----------------------------------*/ 00474 /* CEC TX arbitration error interrupt occurred --------------------------------------*/ 00475 if((reg & CEC_FLAG_ARBLST) != RESET) 00476 { 00477 hcec->ErrorCode = HAL_CEC_ERROR_ARBLST; 00478 __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_ARBLST); 00479 } 00480 00481 /* ----------------------------Rx Management----------------------------------*/ 00482 /* CEC RX byte received interrupt ---------------------------------------------------*/ 00483 if((reg & CEC_FLAG_RXBR) != RESET) 00484 { 00485 /* reception is starting */ 00486 hcec->RxState = HAL_CEC_STATE_BUSY_RX; 00487 hcec->RxXferSize++; 00488 /* read received byte */ 00489 *hcec->Init.RxBuffer++ = hcec->Instance->RXDR; 00490 __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_RXBR); 00491 } 00492 00493 /* CEC RX end received interrupt ---------------------------------------------------*/ 00494 if((reg & CEC_FLAG_RXEND) != RESET) 00495 { 00496 /* clear IT */ 00497 __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_RXEND); 00498 00499 /* Rx process is completed, restore hcec->RxState to Ready */ 00500 hcec->RxState = HAL_CEC_STATE_READY; 00501 hcec->ErrorCode = HAL_CEC_ERROR_NONE; 00502 hcec->Init.RxBuffer -= hcec->RxXferSize; 00503 HAL_CEC_RxCpltCallback(hcec, hcec->RxXferSize); 00504 hcec->RxXferSize = 0U; 00505 } 00506 00507 /* ----------------------------Tx Management----------------------------------*/ 00508 /* CEC TX byte request interrupt ------------------------------------------------*/ 00509 if((reg & CEC_FLAG_TXBR) != RESET) 00510 { 00511 if (hcec->TxXferCount == 0U) 00512 { 00513 /* if this is the last byte transmission, set TX End of Message (TXEOM) bit */ 00514 __HAL_CEC_LAST_BYTE_TX_SET(hcec); 00515 hcec->Instance->TXDR = *hcec->pTxBuffPtr++; 00516 } 00517 else 00518 { 00519 hcec->Instance->TXDR = *hcec->pTxBuffPtr++; 00520 hcec->TxXferCount--; 00521 } 00522 /* clear Tx-Byte request flag */ 00523 __HAL_CEC_CLEAR_FLAG(hcec,CEC_FLAG_TXBR); 00524 } 00525 00526 /* CEC TX end interrupt ------------------------------------------------*/ 00527 if((reg & CEC_FLAG_TXEND) != RESET) 00528 { 00529 __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_TXEND); 00530 00531 /* Tx process is ended, restore hcec->gState to Ready */ 00532 hcec->gState = HAL_CEC_STATE_READY; 00533 /* Call the Process Unlocked before calling the Tx call back API to give the possibility to 00534 start again the Transmission under the Tx call back API */ 00535 __HAL_UNLOCK(hcec); 00536 hcec->ErrorCode = HAL_CEC_ERROR_NONE; 00537 HAL_CEC_TxCpltCallback(hcec); 00538 } 00539 00540 /* ----------------------------Rx/Tx Error Management----------------------------------*/ 00541 if ((reg & (CEC_ISR_RXOVR|CEC_ISR_BRE|CEC_ISR_SBPE|CEC_ISR_LBPE|CEC_ISR_RXACKE|CEC_ISR_TXUDR|CEC_ISR_TXERR|CEC_ISR_TXACKE)) != 0U) 00542 { 00543 hcec->ErrorCode = reg; 00544 __HAL_CEC_CLEAR_FLAG(hcec, HAL_CEC_ERROR_RXOVR|HAL_CEC_ERROR_BRE|CEC_FLAG_LBPE|CEC_FLAG_SBPE|HAL_CEC_ERROR_RXACKE|HAL_CEC_ERROR_TXUDR|HAL_CEC_ERROR_TXERR|HAL_CEC_ERROR_TXACKE); 00545 00546 00547 if((reg & (CEC_ISR_RXOVR|CEC_ISR_BRE|CEC_ISR_SBPE|CEC_ISR_LBPE|CEC_ISR_RXACKE)) != RESET) 00548 { 00549 hcec->Init.RxBuffer-=hcec->RxXferSize; 00550 hcec->RxXferSize = 0U; 00551 hcec->RxState = HAL_CEC_STATE_READY; 00552 } 00553 else if (((reg & (CEC_ISR_TXUDR|CEC_ISR_TXERR|CEC_ISR_TXACKE)) != RESET) && ((reg & CEC_ISR_ARBLST) == RESET)) 00554 { 00555 /* Set the CEC state ready to be able to start again the process */ 00556 hcec->gState = HAL_CEC_STATE_READY; 00557 } 00558 00559 /* Error Call Back */ 00560 HAL_CEC_ErrorCallback(hcec); 00561 } 00562 00563 } 00564 00565 /** 00566 * @brief Tx Transfer completed callback 00567 * @param hcec CEC handle 00568 * @retval None 00569 */ 00570 __weak void HAL_CEC_TxCpltCallback(CEC_HandleTypeDef *hcec) 00571 { 00572 /* Prevent unused argument(s) compilation warning */ 00573 UNUSED(hcec); 00574 /* NOTE : This function should not be modified, when the callback is needed, 00575 the HAL_CEC_TxCpltCallback can be implemented in the user file 00576 */ 00577 } 00578 00579 /** 00580 * @brief Rx Transfer completed callback 00581 * @param hcec CEC handle 00582 * @param RxFrameSize Size of frame 00583 * @retval None 00584 */ 00585 __weak void HAL_CEC_RxCpltCallback(CEC_HandleTypeDef *hcec, uint32_t RxFrameSize) 00586 { 00587 /* Prevent unused argument(s) compilation warning */ 00588 UNUSED(hcec); 00589 UNUSED(RxFrameSize); 00590 /* NOTE : This function should not be modified, when the callback is needed, 00591 the HAL_CEC_RxCpltCallback can be implemented in the user file 00592 */ 00593 } 00594 00595 /** 00596 * @brief CEC error callbacks 00597 * @param hcec CEC handle 00598 * @retval None 00599 */ 00600 __weak void HAL_CEC_ErrorCallback(CEC_HandleTypeDef *hcec) 00601 { 00602 /* Prevent unused argument(s) compilation warning */ 00603 UNUSED(hcec); 00604 /* NOTE : This function should not be modified, when the callback is needed, 00605 the HAL_CEC_ErrorCallback can be implemented in the user file 00606 */ 00607 } 00608 /** 00609 * @} 00610 */ 00611 00612 /** @defgroup CEC_Exported_Functions_Group3 Peripheral Control function 00613 * @brief CEC control functions 00614 * 00615 @verbatim 00616 =============================================================================== 00617 ##### Peripheral Control function ##### 00618 =============================================================================== 00619 [..] 00620 This subsection provides a set of functions allowing to control the CEC. 00621 (+) HAL_CEC_GetState() API can be helpful to check in run-time the state of the CEC peripheral. 00622 (+) HAL_CEC_GetError() API can be helpful to check in run-time the error of the CEC peripheral. 00623 @endverbatim 00624 * @{ 00625 */ 00626 /** 00627 * @brief return the CEC state 00628 * @param hcec pointer to a CEC_HandleTypeDef structure that contains 00629 * the configuration information for the specified CEC module. 00630 * @retval HAL state 00631 */ 00632 HAL_CEC_StateTypeDef HAL_CEC_GetState(CEC_HandleTypeDef *hcec) 00633 { 00634 uint32_t temp1 = 0x00U, temp2 = 0x00U; 00635 temp1 = hcec->gState; 00636 temp2 = hcec->RxState; 00637 00638 return (HAL_CEC_StateTypeDef)(temp1 | temp2); 00639 } 00640 00641 /** 00642 * @brief Return the CEC error code 00643 * @param hcec pointer to a CEC_HandleTypeDef structure that contains 00644 * the configuration information for the specified CEC. 00645 * @retval CEC Error Code 00646 */ 00647 uint32_t HAL_CEC_GetError(CEC_HandleTypeDef *hcec) 00648 { 00649 return hcec->ErrorCode; 00650 } 00651 00652 /** 00653 * @} 00654 */ 00655 00656 /** 00657 * @} 00658 */ 00659 00660 #endif /* STM32F446xx */ 00661 00662 #endif /* HAL_CEC_MODULE_ENABLED */ 00663 /** 00664 * @} 00665 */ 00666 00667 /** 00668 * @} 00669 */ 00670 00671 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/