ETH DMA receive process state

Defines
#define	ETH_DMA_RECEIVEPROCESS_STOPPED   0x00000000U
#define	ETH_DMA_RECEIVEPROCESS_FETCHING   0x00020000U
#define	ETH_DMA_RECEIVEPROCESS_WAITING   0x00060000U
#define	ETH_DMA_RECEIVEPROCESS_SUSPENDED   0x00080000U
#define	ETH_DMA_RECEIVEPROCESS_CLOSING   0x000A0000U
#define	ETH_DMA_RECEIVEPROCESS_QUEUING   0x000E0000U

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Define Documentation

#define ETH_DMA_RECEIVEPROCESS_CLOSING   0x000A0000U

Running - closing descriptor

Definition at line 1554 of file stm32f4xx_hal_eth.h.

#define ETH_DMA_RECEIVEPROCESS_FETCHING   0x00020000U

Running - fetching the Rx descriptor

Definition at line 1551 of file stm32f4xx_hal_eth.h.

#define ETH_DMA_RECEIVEPROCESS_QUEUING   0x000E0000U

Running - queuing the receive frame into host memory

Definition at line 1555 of file stm32f4xx_hal_eth.h.

#define ETH_DMA_RECEIVEPROCESS_STOPPED   0x00000000U

Stopped - Reset or Stop Rx Command issued

Definition at line 1550 of file stm32f4xx_hal_eth.h.

#define ETH_DMA_RECEIVEPROCESS_SUSPENDED   0x00080000U

Suspended - Rx Descriptor unavailable

Definition at line 1553 of file stm32f4xx_hal_eth.h.

#define ETH_DMA_RECEIVEPROCESS_WAITING   0x00060000U

Running - waiting for packet

Definition at line 1552 of file stm32f4xx_hal_eth.h.