Structure type to access the System Control Block (SCB).
Data Fields |
__I uint32_t | CPUID |
| Offset: 0x000 (R/ ) CPUID Base Register.
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__IO uint32_t | ICSR |
| Offset: 0x004 (R/W) Interrupt Control and State Register.
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__IO uint32_t | VTOR |
| Offset: 0x008 (R/W) Vector Table Offset Register.
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__IO uint32_t | AIRCR |
| Offset: 0x00C (R/W) Application Interrupt and Reset Control Register.
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__IO uint32_t | SCR |
| Offset: 0x010 (R/W) System Control Register.
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__IO uint32_t | CCR |
| Offset: 0x014 (R/W) Configuration Control Register.
|
__IO uint8_t | SHP [12] |
| Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15)
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__IO uint32_t | SHCSR |
| Offset: 0x024 (R/W) System Handler Control and State Register.
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__IO uint32_t | CFSR |
| Offset: 0x028 (R/W) Configurable Fault Status Register.
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__IO uint32_t | HFSR |
| Offset: 0x02C (R/W) HardFault Status Register.
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__IO uint32_t | DFSR |
| Offset: 0x030 (R/W) Debug Fault Status Register.
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__IO uint32_t | MMFAR |
| Offset: 0x034 (R/W) MemManage Fault Address Register.
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__IO uint32_t | BFAR |
| Offset: 0x038 (R/W) BusFault Address Register.
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__IO uint32_t | AFSR |
| Offset: 0x03C (R/W) Auxiliary Fault Status Register.
|
__I uint32_t | PFR [2] |
| Offset: 0x040 (R/ ) Processor Feature Register.
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__I uint32_t | DFR |
| Offset: 0x048 (R/ ) Debug Feature Register.
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__I uint32_t | ADR |
| Offset: 0x04C (R/ ) Auxiliary Feature Register.
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__I uint32_t | MMFR [4] |
| Offset: 0x050 (R/ ) Memory Model Feature Register.
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__I uint32_t | ISAR [5] |
| Offset: 0x060 (R/ ) Instruction Set Attributes Register.
|
uint32_t | RESERVED0 [5] |
| Reserved.
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__IO uint32_t | CPACR |
| Offset: 0x088 (R/W) Coprocessor Access Control Register.
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Field Documentation