STM32F439xx HAL User Manual
stm32f4xx_hal_spdifrx.c
Go to the documentation of this file.
00001 /**
00002   ******************************************************************************
00003   * @file    stm32f4xx_hal_spdifrx.c
00004   * @author  MCD Application Team
00005   * @brief   This file provides firmware functions to manage the following
00006   *          functionalities of the SPDIFRX audio interface:
00007   *           + Initialization and Configuration
00008   *           + Data transfers functions
00009   *           + DMA transfers management
00010   *           + Interrupts and flags management
00011   @verbatim
00012  ===============================================================================
00013                       ##### How to use this driver #####
00014  ===============================================================================
00015  [..]
00016     The SPDIFRX HAL driver can be used as follow:
00017 
00018     (#) Declare SPDIFRX_HandleTypeDef handle structure.
00019     (#) Initialize the SPDIFRX low level resources by implement the HAL_SPDIFRX_MspInit() API:
00020         (##) Enable the SPDIFRX interface clock.
00021         (##) SPDIFRX pins configuration:
00022             (+++) Enable the clock for the SPDIFRX GPIOs.
00023             (+++) Configure these SPDIFRX pins as alternate function pull-up.
00024         (##) NVIC configuration if you need to use interrupt process (HAL_SPDIFRX_ReceiveControlFlow_IT() and HAL_SPDIFRX_ReceiveDataFlow_IT() API's).
00025             (+++) Configure the SPDIFRX interrupt priority.
00026             (+++) Enable the NVIC SPDIFRX IRQ handle.
00027         (##) DMA Configuration if you need to use DMA process (HAL_SPDIFRX_ReceiveDataFlow_DMA() and HAL_SPDIFRX_ReceiveControlFlow_DMA() API's).
00028             (+++) Declare a DMA handle structure for the reception of the Data Flow channel.
00029             (+++) Declare a DMA handle structure for the reception of the Control Flow channel.
00030             (+++) Enable the DMAx interface clock.
00031             (+++) Configure the declared DMA handle structure CtrlRx/DataRx with the required parameters.
00032             (+++) Configure the DMA Channel.
00033             (+++) Associate the initialized DMA handle to the SPDIFRX DMA CtrlRx/DataRx handle.
00034             (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the 
00035                   DMA CtrlRx/DataRx channel.
00036 
00037    (#) Program the input selection, re-tries number, wait for activity, channel status selection, data format, stereo mode and masking of user bits
00038        using HAL_SPDIFRX_Init() function.
00039 
00040    -@- The specific SPDIFRX interrupts (RXNE/CSRNE and Error Interrupts) will be managed using the macros
00041        __SPDIFRX_ENABLE_IT() and __SPDIFRX_DISABLE_IT() inside the receive process.
00042    -@- Make sure that ck_spdif clock is configured.
00043 
00044    (#) Three operation modes are available within this driver :
00045 
00046    *** Polling mode for reception operation (for debug purpose) ***
00047    ================================================================
00048    [..]
00049      (+) Receive data flow in blocking mode using HAL_SPDIFRX_ReceiveDataFlow()
00050          (+) Receive control flow of data in blocking mode using HAL_SPDIFRX_ReceiveControlFlow()
00051 
00052    *** Interrupt mode for reception operation ***
00053    =========================================
00054    [..]    
00055      (+) Receive an amount of data (Data Flow) in non blocking mode using HAL_SPDIFRX_ReceiveDataFlow_IT() 
00056      (+) Receive an amount of data (Control Flow) in non blocking mode using HAL_SPDIFRX_ReceiveControlFlow_IT() 
00057      (+) At reception end of half transfer HAL_SPDIFRX_RxHalfCpltCallback is executed and user can 
00058          add his own code by customization of function pointer HAL_SPDIFRX_RxHalfCpltCallback 
00059      (+) At reception end of transfer HAL_SPDIFRX_RxCpltCallback is executed and user can
00060          add his own code by customization of function pointer HAL_SPDIFRX_RxCpltCallback
00061      (+) In case of transfer Error, HAL_SPDIFRX_ErrorCallback() function is executed and user can
00062          add his own code by customization of function pointer HAL_SPDIFRX_ErrorCallback
00063 
00064    *** DMA mode for reception operation ***
00065    ========================================
00066    [..]
00067      (+) Receive an amount of data (Data Flow) in non blocking mode (DMA) using HAL_SPDIFRX_ReceiveDataFlow_DMA() 
00068      (+) Receive an amount of data (Control Flow) in non blocking mode (DMA) using HAL_SPDIFRX_ReceiveControlFlow_DMA()
00069      (+) At reception end of half transfer HAL_SPDIFRX_RxHalfCpltCallback is executed and user can
00070          add his own code by customization of function pointer HAL_SPDIFRX_RxHalfCpltCallback
00071      (+) At reception end of transfer HAL_SPDIFRX_RxCpltCallback is executed and user can
00072          add his own code by customization of function pointer HAL_SPDIFRX_RxCpltCallback
00073      (+) In case of transfer Error, HAL_SPDIFRX_ErrorCallback() function is executed and user can
00074          add his own code by customization of function pointer HAL_SPDIFRX_ErrorCallback
00075      (+) Stop the DMA Transfer using HAL_SPDIFRX_DMAStop()
00076 
00077    *** SPDIFRX HAL driver macros list ***
00078    =============================================
00079    [..]
00080      Below the list of most used macros in SPDIFRX HAL driver.
00081       (+) __HAL_SPDIFRX_IDLE: Disable the specified SPDIFRX peripheral (IDEL State)
00082       (+) __HAL_SPDIFRX_SYNC: Enable the synchronization state of the specified SPDIFRX peripheral (SYNC State)
00083       (+) __HAL_SPDIFRX_RCV: Enable the receive state of the specified SPDIFRX peripheral (RCV State)
00084       (+) __HAL_SPDIFRX_ENABLE_IT : Enable the specified SPDIFRX interrupts
00085       (+) __HAL_SPDIFRX_DISABLE_IT : Disable the specified SPDIFRX interrupts
00086       (+) __HAL_SPDIFRX_GET_FLAG: Check whether the specified SPDIFRX flag is set or not.
00087 
00088    [..]
00089       (@) You can refer to the SPDIFRX HAL driver header file for more useful macros
00090 
00091   @endverbatim
00092   ******************************************************************************
00093   * @attention
00094   *
00095   * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
00096   *
00097   * Redistribution and use in source and binary forms, with or without modification,
00098   * are permitted provided that the following conditions are met:
00099   *   1. Redistributions of source code must retain the above copyright notice,
00100   *      this list of conditions and the following disclaimer.
00101   *   2. Redistributions in binary form must reproduce the above copyright notice,
00102   *      this list of conditions and the following disclaimer in the documentation
00103   *      and/or other materials provided with the distribution.
00104   *   3. Neither the name of STMicroelectronics nor the names of its contributors
00105   *      may be used to endorse or promote products derived from this software
00106   *      without specific prior written permission.
00107   *
00108   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
00109   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00110   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
00111   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
00112   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00113   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
00114   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
00115   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00116   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
00117   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00118   *
00119   ******************************************************************************
00120   */
00121 
00122 /* Includes ------------------------------------------------------------------*/
00123 #include "stm32f4xx_hal.h"
00124 
00125 /** @addtogroup STM32F4xx_HAL_Driver
00126   * @{
00127   */
00128 /** @defgroup SPDIFRX SPDIFRX
00129   * @brief SPDIFRX HAL module driver
00130   * @{
00131   */
00132 
00133 #ifdef HAL_SPDIFRX_MODULE_ENABLED
00134 
00135 #if defined(STM32F446xx)
00136 
00137 /* Private typedef -----------------------------------------------------------*/
00138 /* Private define ------------------------------------------------------------*/
00139 #define SPDIFRX_TIMEOUT_VALUE  0xFFFF
00140 
00141 /* Private macro -------------------------------------------------------------*/
00142 /* Private variables ---------------------------------------------------------*/
00143 /* Private function prototypes -----------------------------------------------*/
00144 
00145 /** @addtogroup SPDIFRX_Private_Functions
00146   * @{
00147   */
00148 static void  SPDIFRX_DMARxCplt(DMA_HandleTypeDef *hdma);
00149 static void  SPDIFRX_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
00150 static void  SPDIFRX_DMACxCplt(DMA_HandleTypeDef *hdma);
00151 static void  SPDIFRX_DMACxHalfCplt(DMA_HandleTypeDef *hdma);
00152 static void  SPDIFRX_DMAError(DMA_HandleTypeDef *hdma);
00153 static void  SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif);
00154 static void  SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif);
00155 static HAL_StatusTypeDef  SPDIFRX_WaitOnFlagUntilTimeout(SPDIFRX_HandleTypeDef *hspdif, uint32_t Flag, FlagStatus Status, uint32_t Timeout);
00156 
00157 /**
00158   * @}
00159   */
00160 /* Exported functions ---------------------------------------------------------*/
00161 
00162 /** @defgroup SPDIFRX_Exported_Functions SPDIFRX Exported Functions
00163   * @{
00164   */
00165 
00166 /** @defgroup  SPDIFRX_Exported_Functions_Group1 Initialization and de-initialization functions
00167   *  @brief    Initialization and Configuration functions
00168   *
00169   @verbatim
00170   ===============================================================================
00171            ##### Initialization and de-initialization functions #####
00172   ===============================================================================
00173   [..] This subsection provides a set of functions allowing to initialize and
00174        de-initialize the SPDIFRX peripheral:
00175 
00176      (+) User must Implement HAL_SPDIFRX_MspInit() function in which he configures
00177          all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
00178 
00179      (+) Call the function HAL_SPDIFRX_Init() to configure the SPDIFRX peripheral with
00180          the selected configuration:
00181          (++) Input Selection (IN0, IN1,...)
00182          (++) Maximum allowed re-tries during synchronization phase
00183          (++) Wait for activity on SPDIF selected input
00184          (++) Channel status selection (from channel A or B)
00185          (++) Data format (LSB, MSB, ...)
00186          (++) Stereo mode
00187          (++) User bits masking (PT,C,U,V,...)
00188 
00189      (+) Call the function HAL_SPDIFRX_DeInit() to restore the default configuration
00190          of the selected SPDIFRXx peripheral.
00191   @endverbatim
00192   * @{
00193   */
00194 
00195 /**
00196   * @brief Initializes the SPDIFRX according to the specified parameters
00197   *        in the SPDIFRX_InitTypeDef and create the associated handle.
00198   * @param hspdif SPDIFRX handle
00199   * @retval HAL status
00200   */
00201 HAL_StatusTypeDef HAL_SPDIFRX_Init(SPDIFRX_HandleTypeDef *hspdif)
00202 {
00203   uint32_t tmpreg = 0U;
00204 
00205   /* Check the SPDIFRX handle allocation */
00206   if(hspdif == NULL)
00207   {
00208     return HAL_ERROR;
00209   }
00210 
00211   /* Check the SPDIFRX parameters */
00212   assert_param(IS_STEREO_MODE(hspdif->Init.StereoMode));
00213   assert_param(IS_SPDIFRX_INPUT_SELECT(hspdif->Init.InputSelection));
00214   assert_param(IS_SPDIFRX_MAX_RETRIES(hspdif->Init.Retries));
00215   assert_param(IS_SPDIFRX_WAIT_FOR_ACTIVITY(hspdif->Init.WaitForActivity));
00216   assert_param(IS_SPDIFRX_CHANNEL(hspdif->Init.ChannelSelection));
00217   assert_param(IS_SPDIFRX_DATA_FORMAT(hspdif->Init.DataFormat));
00218   assert_param(IS_PREAMBLE_TYPE_MASK(hspdif->Init.PreambleTypeMask));
00219   assert_param(IS_CHANNEL_STATUS_MASK(hspdif->Init.ChannelStatusMask));
00220   assert_param(IS_VALIDITY_MASK(hspdif->Init.ValidityBitMask));
00221   assert_param(IS_PARITY_ERROR_MASK(hspdif->Init.ParityErrorMask));
00222 
00223   if(hspdif->State == HAL_SPDIFRX_STATE_RESET)
00224   {
00225     /* Allocate lock resource and initialize it */
00226     hspdif->Lock = HAL_UNLOCKED;
00227     /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */
00228     HAL_SPDIFRX_MspInit(hspdif);
00229   }
00230 
00231      /* SPDIFRX peripheral state is BUSY*/
00232    hspdif->State = HAL_SPDIFRX_STATE_BUSY;
00233 
00234   /* Disable SPDIFRX interface (IDLE State) */
00235   __HAL_SPDIFRX_IDLE(hspdif);
00236 
00237   /* Reset the old SPDIFRX CR configuration */
00238   tmpreg = hspdif->Instance->CR;
00239 
00240   tmpreg &= ~((uint16_t) SPDIFRX_CR_RXSTEO  | SPDIFRX_CR_DRFMT  | SPDIFRX_CR_PMSK |
00241                          SPDIFRX_CR_VMSK | SPDIFRX_CR_CUMSK | SPDIFRX_CR_PTMSK  |
00242                          SPDIFRX_CR_CHSEL | SPDIFRX_CR_NBTR | SPDIFRX_CR_WFA |
00243                          SPDIFRX_CR_INSEL);
00244 
00245   /* Sets the new configuration of the SPDIFRX peripheral */
00246   tmpreg |= ((uint16_t) hspdif->Init.StereoMode |
00247                         hspdif->Init.InputSelection |
00248                         hspdif->Init.Retries |
00249                         hspdif->Init.WaitForActivity |
00250                         hspdif->Init.ChannelSelection |
00251                         hspdif->Init.DataFormat |
00252                         hspdif->Init.PreambleTypeMask |
00253                         hspdif->Init.ChannelStatusMask |
00254                         hspdif->Init.ValidityBitMask |
00255                         hspdif->Init.ParityErrorMask);
00256 
00257   hspdif->Instance->CR = tmpreg;
00258 
00259   hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
00260 
00261     /* SPDIFRX peripheral state is READY*/
00262   hspdif->State = HAL_SPDIFRX_STATE_READY;
00263 
00264   return HAL_OK;
00265 }
00266 
00267 /**
00268   * @brief DeInitializes the SPDIFRX peripheral
00269   * @param hspdif SPDIFRX handle
00270   * @retval HAL status
00271   */
00272 HAL_StatusTypeDef HAL_SPDIFRX_DeInit(SPDIFRX_HandleTypeDef *hspdif)
00273 {
00274   /* Check the SPDIFRX handle allocation */
00275   if(hspdif == NULL)
00276   {
00277     return HAL_ERROR;
00278   }
00279 
00280   /* Check the parameters */
00281   assert_param(IS_SPDIFRX_ALL_INSTANCE(hspdif->Instance));
00282 
00283   hspdif->State = HAL_SPDIFRX_STATE_BUSY;
00284 
00285   /* Disable SPDIFRX interface (IDLE state) */
00286   __HAL_SPDIFRX_IDLE(hspdif);
00287 
00288   /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
00289   HAL_SPDIFRX_MspDeInit(hspdif);
00290 
00291   hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
00292 
00293   /* SPDIFRX peripheral state is RESET*/
00294   hspdif->State = HAL_SPDIFRX_STATE_RESET;
00295 
00296   /* Release Lock */
00297   __HAL_UNLOCK(hspdif);
00298 
00299   return HAL_OK;
00300 }
00301 
00302 /**
00303   * @brief SPDIFRX MSP Init
00304   * @param hspdif SPDIFRX handle
00305   * @retval None
00306   */
00307 __weak void HAL_SPDIFRX_MspInit(SPDIFRX_HandleTypeDef *hspdif)
00308 {
00309   /* Prevent unused argument(s) compilation warning */
00310   UNUSED(hspdif);
00311   /* NOTE : This function Should not be modified, when the callback is needed,
00312             the HAL_SPDIFRX_MspInit could be implemented in the user file
00313   */
00314 }
00315 
00316 /**
00317   * @brief SPDIFRX MSP DeInit
00318   * @param hspdif SPDIFRX handle
00319   * @retval None
00320   */
00321 __weak void HAL_SPDIFRX_MspDeInit(SPDIFRX_HandleTypeDef *hspdif)
00322 {
00323   /* Prevent unused argument(s) compilation warning */
00324   UNUSED(hspdif);
00325   /* NOTE : This function Should not be modified, when the callback is needed,
00326             the HAL_SPDIFRX_MspDeInit could be implemented in the user file
00327   */
00328 }
00329 
00330 /**
00331   * @brief Sets the SPDIFRX  dtat format according to the specified parameters
00332   *        in the SPDIFRX_InitTypeDef.
00333   * @param hspdif SPDIFRX handle
00334   * @param sDataFormat SPDIFRX data format
00335   * @retval HAL status
00336   */
00337 HAL_StatusTypeDef HAL_SPDIFRX_SetDataFormat(SPDIFRX_HandleTypeDef *hspdif, SPDIFRX_SetDataFormatTypeDef  sDataFormat)
00338 {
00339   uint32_t tmpreg = 0U;
00340 
00341   /* Check the SPDIFRX handle allocation */
00342   if(hspdif == NULL)
00343   {
00344     return HAL_ERROR;
00345   }
00346 
00347   /* Check the SPDIFRX parameters */
00348   assert_param(IS_STEREO_MODE(sDataFormat.StereoMode));
00349   assert_param(IS_SPDIFRX_DATA_FORMAT(sDataFormat.DataFormat));
00350   assert_param(IS_PREAMBLE_TYPE_MASK(sDataFormat.PreambleTypeMask));
00351   assert_param(IS_CHANNEL_STATUS_MASK(sDataFormat.ChannelStatusMask));
00352   assert_param(IS_VALIDITY_MASK(sDataFormat.ValidityBitMask));
00353   assert_param(IS_PARITY_ERROR_MASK(sDataFormat.ParityErrorMask));
00354 
00355   /* Reset the old SPDIFRX CR configuration */
00356   tmpreg = hspdif->Instance->CR;
00357 
00358   if(((tmpreg & SPDIFRX_STATE_RCV) == SPDIFRX_STATE_RCV) &&
00359     (((tmpreg & SPDIFRX_CR_DRFMT) != sDataFormat.DataFormat) ||
00360     ((tmpreg & SPDIFRX_CR_RXSTEO) != sDataFormat.StereoMode)))
00361   {
00362       return HAL_ERROR;
00363   }
00364 
00365   tmpreg &= ~((uint16_t) SPDIFRX_CR_RXSTEO  | SPDIFRX_CR_DRFMT  | SPDIFRX_CR_PMSK |
00366                          SPDIFRX_CR_VMSK | SPDIFRX_CR_CUMSK | SPDIFRX_CR_PTMSK);
00367 
00368   /* Sets the new configuration of the SPDIFRX peripheral */
00369   tmpreg |= ((uint16_t) sDataFormat.StereoMode |
00370                         sDataFormat.DataFormat |
00371                         sDataFormat.PreambleTypeMask |
00372                         sDataFormat.ChannelStatusMask |
00373                         sDataFormat.ValidityBitMask |
00374                         sDataFormat.ParityErrorMask);
00375 
00376   hspdif->Instance->CR = tmpreg;
00377 
00378   return HAL_OK;
00379 }
00380 
00381 /**
00382   * @}
00383   */
00384 
00385 /** @defgroup SPDIFRX_Exported_Functions_Group2 IO operation functions
00386   *  @brief Data transfers functions
00387   *
00388 @verbatim
00389 ===============================================================================
00390                       ##### IO operation functions #####
00391 ===============================================================================
00392     [..]
00393     This subsection provides a set of functions allowing to manage the SPDIFRX data
00394     transfers.
00395 
00396     (#) There is two mode of transfer:
00397         (++) Blocking mode : The communication is performed in the polling mode.
00398              The status of all data processing is returned by the same function
00399              after finishing transfer.
00400         (++) No-Blocking mode : The communication is performed using Interrupts
00401              or DMA. These functions return the status of the transfer start-up.
00402              The end of the data processing will be indicated through the
00403              dedicated SPDIFRX IRQ when using Interrupt mode or the DMA IRQ when
00404              using DMA mode.
00405 
00406     (#) Blocking mode functions are :
00407         (++) HAL_SPDIFRX_ReceiveDataFlow()
00408         (++) HAL_SPDIFRX_ReceiveControlFlow()
00409                 (+@) Do not use blocking mode to receive both control and data flow at the same time.
00410 
00411     (#) No-Blocking mode functions with Interrupt are :
00412         (++) HAL_SPDIFRX_ReceiveControlFlow_IT()
00413         (++) HAL_SPDIFRX_ReceiveDataFlow_IT()
00414 
00415     (#) No-Blocking mode functions with DMA are :
00416         (++) HAL_SPDIFRX_ReceiveControlFlow_DMA()
00417         (++) HAL_SPDIFRX_ReceiveDataFlow_DMA()
00418 
00419     (#) A set of Transfer Complete Callbacks are provided in No_Blocking mode:
00420         (++) HAL_SPDIFRX_RxCpltCallback()
00421         (++) HAL_SPDIFRX_ErrorCallback()
00422 
00423 @endverbatim
00424   * @{
00425   */
00426 
00427 /**
00428   * @brief  Receives an amount of data (Data Flow) in blocking mode.
00429   * @param  hspdif pointer to SPDIFRX_HandleTypeDef structure that contains
00430   *                 the configuration information for SPDIFRX module.
00431   * @param  pData Pointer to data buffer
00432   * @param  Size Amount of data to be received
00433   * @param  Timeout Timeout duration
00434   * @retval HAL status
00435   */
00436 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size, uint32_t Timeout)
00437 {
00438   if((pData == NULL ) || (Size == 0))
00439   {
00440     return  HAL_ERROR;
00441   }
00442 
00443   if(hspdif->State == HAL_SPDIFRX_STATE_READY)
00444   {
00445     /* Process Locked */
00446     __HAL_LOCK(hspdif);
00447 
00448     hspdif->State = HAL_SPDIFRX_STATE_BUSY;
00449 
00450     /* Start synchronisation */
00451     __HAL_SPDIFRX_SYNC(hspdif);
00452 
00453     /* Wait until SYNCD flag is set */
00454     if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_SYNCD, RESET, Timeout) != HAL_OK)
00455     {
00456       return HAL_TIMEOUT;
00457     }
00458 
00459     /* Start reception */
00460     __HAL_SPDIFRX_RCV(hspdif);
00461 
00462     /* Receive data flow */
00463     while(Size > 0)
00464     {
00465       /* Wait until RXNE flag is set */
00466       if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_RXNE, RESET, Timeout) != HAL_OK)
00467       {
00468         return HAL_TIMEOUT;
00469       }
00470 
00471       (*pData++) = hspdif->Instance->DR;
00472       Size--;
00473     }
00474 
00475     /* SPDIFRX ready */
00476     hspdif->State = HAL_SPDIFRX_STATE_READY;
00477 
00478     /* Process Unlocked */
00479     __HAL_UNLOCK(hspdif);
00480 
00481     return HAL_OK;
00482   }
00483   else
00484   {
00485     return HAL_BUSY;
00486   }
00487 }
00488 
00489 /**
00490   * @brief  Receives an amount of data (Control Flow) in blocking mode.
00491   * @param  hspdif pointer to a SPDIFRX_HandleTypeDef structure that contains
00492   *                 the configuration information for SPDIFRX module.
00493   * @param  pData Pointer to data buffer
00494   * @param  Size Amount of data to be received
00495   * @param  Timeout Timeout duration
00496   * @retval HAL status
00497   */
00498 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size, uint32_t Timeout)
00499 {
00500   if((pData == NULL ) || (Size == 0))
00501   {
00502     return  HAL_ERROR;
00503   }
00504 
00505   if(hspdif->State == HAL_SPDIFRX_STATE_READY)
00506   {
00507     /* Process Locked */
00508     __HAL_LOCK(hspdif);
00509 
00510     hspdif->State = HAL_SPDIFRX_STATE_BUSY;
00511 
00512     /* Start synchronization */
00513     __HAL_SPDIFRX_SYNC(hspdif);
00514 
00515     /* Wait until SYNCD flag is set */
00516     if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_SYNCD, RESET, Timeout) != HAL_OK)
00517     {
00518       return HAL_TIMEOUT;
00519     }
00520 
00521     /* Start reception */
00522     __HAL_SPDIFRX_RCV(hspdif);
00523 
00524     /* Receive control flow */
00525     while(Size > 0)
00526     {
00527       /* Wait until CSRNE flag is set */
00528       if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_CSRNE, RESET, Timeout) != HAL_OK)
00529       {
00530         return HAL_TIMEOUT;
00531       }
00532       
00533       (*pData++) = hspdif->Instance->CSR;
00534       Size--;
00535     }
00536 
00537     /* SPDIFRX ready */
00538     hspdif->State = HAL_SPDIFRX_STATE_READY;
00539 
00540     /* Process Unlocked */
00541     __HAL_UNLOCK(hspdif);
00542 
00543     return HAL_OK;
00544   }
00545   else
00546   {
00547     return HAL_BUSY;
00548   }
00549 }
00550 /**
00551   * @brief Receive an amount of data (Data Flow) in non-blocking mode with Interrupt
00552   * @param hspdif SPDIFRX handle
00553   * @param pData a 32-bit pointer to the Receive data buffer.
00554   * @param Size number of data sample to be received .
00555   * @retval HAL status
00556   */
00557 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
00558 {
00559   __IO uint32_t count = SPDIFRX_TIMEOUT_VALUE * (SystemCoreClock / 24U / 1000U);
00560 
00561   if((hspdif->State == HAL_SPDIFRX_STATE_READY) || (hspdif->State == HAL_SPDIFRX_STATE_BUSY_CX))
00562   {
00563     if((pData == NULL) || (Size == 0))
00564     {
00565       return HAL_ERROR;
00566     }
00567 
00568     /* Process Locked */
00569     __HAL_LOCK(hspdif);
00570 
00571     hspdif->pRxBuffPtr = pData;
00572     hspdif->RxXferSize = Size;
00573     hspdif->RxXferCount = Size;
00574 
00575     hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
00576 
00577     /* Check if a receive process is ongoing or not */
00578     hspdif->State = HAL_SPDIFRX_STATE_BUSY_RX;
00579 
00580     /* Enable the SPDIFRX  PE Error Interrupt */
00581     __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
00582 
00583     /* Enable the SPDIFRX  OVR Error Interrupt */
00584     __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
00585 
00586     /* Process Unlocked */
00587     __HAL_UNLOCK(hspdif);
00588 
00589     /* Enable the SPDIFRX RXNE interrupt */
00590     __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_RXNE);
00591 
00592     if ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_SYNC || (SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != 0x00U)
00593     {
00594       /* Start synchronization */
00595       __HAL_SPDIFRX_SYNC(hspdif);
00596 
00597       /* Wait until SYNCD flag is set */
00598       do
00599       {
00600         if (count-- == 0U)
00601         {
00602           /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
00603           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
00604           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
00605           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
00606           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
00607           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
00608           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
00609           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
00610 
00611           hspdif->State= HAL_SPDIFRX_STATE_READY;
00612 
00613           /* Process Unlocked */
00614           __HAL_UNLOCK(hspdif);
00615 
00616           return HAL_TIMEOUT;
00617         }
00618       }
00619       while (__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_SYNCD) == RESET);
00620 
00621       /* Start reception */
00622       __HAL_SPDIFRX_RCV(hspdif);
00623     }
00624 
00625     return HAL_OK;
00626   }
00627   else
00628   {
00629     return HAL_BUSY;
00630   }
00631 }
00632 
00633 /**
00634   * @brief Receive an amount of data (Control Flow) with Interrupt
00635   * @param hspdif SPDIFRX handle
00636   * @param pData a 32-bit pointer to the Receive data buffer.
00637   * @param Size number of data sample (Control Flow) to be received :
00638   * @retval HAL status
00639   */
00640 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
00641 {
00642   __IO uint32_t count = SPDIFRX_TIMEOUT_VALUE * (SystemCoreClock / 24U / 1000U);
00643 
00644   if((hspdif->State == HAL_SPDIFRX_STATE_READY) || (hspdif->State == HAL_SPDIFRX_STATE_BUSY_RX))
00645   {
00646     if((pData == NULL ) || (Size == 0))
00647     {
00648       return HAL_ERROR;
00649     }
00650 
00651     /* Process Locked */
00652     __HAL_LOCK(hspdif);
00653 
00654     hspdif->pCsBuffPtr = pData;
00655     hspdif->CsXferSize = Size;
00656     hspdif->CsXferCount = Size;
00657 
00658     hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
00659 
00660     /* Check if a receive process is ongoing or not */
00661     hspdif->State = HAL_SPDIFRX_STATE_BUSY_CX;
00662 
00663     /* Enable the SPDIFRX PE Error Interrupt */
00664     __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
00665 
00666     /* Enable the SPDIFRX OVR Error Interrupt */
00667     __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
00668 
00669     /* Process Unlocked */
00670     __HAL_UNLOCK(hspdif);
00671 
00672     /* Enable the SPDIFRX CSRNE interrupt */
00673     __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
00674 
00675     if ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_SYNC || (SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != 0x00U)
00676     {
00677       /* Start synchronization */
00678       __HAL_SPDIFRX_SYNC(hspdif);
00679 
00680       /* Wait until SYNCD flag is set */
00681       do
00682       {
00683         if (count-- == 0U)
00684         {
00685           /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
00686           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
00687           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
00688           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
00689           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
00690           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
00691           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
00692           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
00693 
00694           hspdif->State= HAL_SPDIFRX_STATE_READY;
00695 
00696           /* Process Unlocked */
00697           __HAL_UNLOCK(hspdif);
00698 
00699           return HAL_TIMEOUT;
00700         }
00701       }
00702       while (__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_SYNCD) == RESET);
00703 
00704       /* Start reception */
00705       __HAL_SPDIFRX_RCV(hspdif);
00706     }
00707 
00708     return HAL_OK;
00709   }
00710   else
00711   {
00712     return HAL_BUSY;
00713   }
00714 }
00715 
00716 /**
00717   * @brief Receive an amount of data (Data Flow) mode with DMA
00718   * @param hspdif SPDIFRX handle
00719   * @param pData a 32-bit pointer to the Receive data buffer.
00720   * @param Size number of data sample to be received :
00721   * @retval HAL status
00722   */
00723 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
00724 {
00725   __IO uint32_t count = SPDIFRX_TIMEOUT_VALUE * (SystemCoreClock / 24U / 1000U);
00726 
00727   if((pData == NULL) || (Size == 0))
00728   {
00729     return  HAL_ERROR;
00730   }
00731   
00732   if((hspdif->State == HAL_SPDIFRX_STATE_READY) || (hspdif->State == HAL_SPDIFRX_STATE_BUSY_CX))
00733   {
00734     hspdif->pRxBuffPtr = pData;
00735     hspdif->RxXferSize = Size;
00736     hspdif->RxXferCount = Size;
00737 
00738     /* Process Locked */
00739     __HAL_LOCK(hspdif);
00740 
00741     hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
00742     hspdif->State = HAL_SPDIFRX_STATE_BUSY_RX;
00743 
00744     /* Set the SPDIFRX Rx DMA Half transfer complete callback */
00745     hspdif->hdmaDrRx->XferHalfCpltCallback = SPDIFRX_DMARxHalfCplt;
00746 
00747     /* Set the SPDIFRX Rx DMA transfer complete callback */
00748     hspdif->hdmaDrRx->XferCpltCallback = SPDIFRX_DMARxCplt;
00749 
00750     /* Set the DMA error callback */
00751     hspdif->hdmaDrRx->XferErrorCallback = SPDIFRX_DMAError;
00752 
00753     /* Enable the DMA request */
00754     HAL_DMA_Start_IT(hspdif->hdmaDrRx, (uint32_t)&hspdif->Instance->DR, (uint32_t)hspdif->pRxBuffPtr, Size);
00755 
00756     /* Enable RXDMAEN bit in SPDIFRX CR register for data flow reception*/
00757     hspdif->Instance->CR |= SPDIFRX_CR_RXDMAEN;
00758 
00759     if ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_SYNC || (SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != 0x00U)
00760     {
00761       /* Start synchronization */
00762       __HAL_SPDIFRX_SYNC(hspdif);
00763 
00764       /* Wait until SYNCD flag is set */
00765       do
00766       {
00767         if (count-- == 0U)
00768         {
00769           /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
00770           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
00771           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
00772           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
00773           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
00774           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
00775           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
00776           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
00777 
00778           hspdif->State= HAL_SPDIFRX_STATE_READY;
00779 
00780           /* Process Unlocked */
00781           __HAL_UNLOCK(hspdif);
00782 
00783           return HAL_TIMEOUT;
00784         }
00785       }
00786       while (__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_SYNCD) == RESET);
00787 
00788       /* Start reception */
00789       __HAL_SPDIFRX_RCV(hspdif);
00790     }
00791 
00792     /* Process Unlocked */
00793     __HAL_UNLOCK(hspdif);
00794 
00795     return HAL_OK;
00796   }
00797   else
00798   {
00799     return HAL_BUSY;
00800   }
00801 }
00802 
00803 /**
00804   * @brief Receive an amount of data (Control Flow) with DMA
00805   * @param hspdif SPDIFRX handle
00806   * @param pData a 32-bit pointer to the Receive data buffer.
00807   * @param Size number of data (Control Flow) sample to be received :
00808   * @retval HAL status
00809   */
00810 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
00811 {
00812   __IO uint32_t count = SPDIFRX_TIMEOUT_VALUE * (SystemCoreClock / 24U / 1000U);
00813 
00814   if((pData == NULL) || (Size == 0))
00815   {
00816     return  HAL_ERROR;
00817   }
00818 
00819   if((hspdif->State == HAL_SPDIFRX_STATE_READY) || (hspdif->State == HAL_SPDIFRX_STATE_BUSY_RX))
00820   {
00821     hspdif->pCsBuffPtr = pData;
00822     hspdif->CsXferSize = Size;
00823     hspdif->CsXferCount = Size;
00824 
00825     /* Process Locked */
00826     __HAL_LOCK(hspdif);
00827 
00828     hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
00829     hspdif->State = HAL_SPDIFRX_STATE_BUSY_CX;
00830 
00831     /* Set the SPDIFRX Rx DMA Half transfer complete callback */
00832     hspdif->hdmaCsRx->XferHalfCpltCallback = SPDIFRX_DMACxHalfCplt;
00833 
00834     /* Set the SPDIFRX Rx DMA transfer complete callback */
00835     hspdif->hdmaCsRx->XferCpltCallback = SPDIFRX_DMACxCplt;
00836 
00837     /* Set the DMA error callback */
00838     hspdif->hdmaCsRx->XferErrorCallback = SPDIFRX_DMAError;
00839 
00840     /* Enable the DMA request */
00841     HAL_DMA_Start_IT(hspdif->hdmaCsRx, (uint32_t)&hspdif->Instance->CSR, (uint32_t)hspdif->pCsBuffPtr, Size);
00842 
00843     /* Enable CBDMAEN bit in SPDIFRX CR register for control flow reception*/
00844     hspdif->Instance->CR |= SPDIFRX_CR_CBDMAEN;
00845 
00846     if ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_SYNC || (SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != 0x00U)
00847     {
00848       /* Start synchronization */
00849       __HAL_SPDIFRX_SYNC(hspdif);
00850 
00851       /* Wait until SYNCD flag is set */
00852       do
00853       {
00854         if (count-- == 0U)
00855         {
00856           /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
00857           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
00858           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
00859           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
00860           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
00861           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
00862           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
00863           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
00864 
00865           hspdif->State= HAL_SPDIFRX_STATE_READY;
00866 
00867           /* Process Unlocked */
00868           __HAL_UNLOCK(hspdif);
00869 
00870           return HAL_TIMEOUT;
00871         }
00872       }
00873       while (__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_SYNCD) == RESET);
00874 
00875       /* Start reception */
00876       __HAL_SPDIFRX_RCV(hspdif);
00877     }
00878 
00879     /* Process Unlocked */
00880     __HAL_UNLOCK(hspdif);
00881 
00882     return HAL_OK;
00883   }
00884   else
00885   {
00886     return HAL_BUSY;
00887   }
00888 }
00889 
00890 /**
00891   * @brief stop the audio stream receive from the Media.
00892   * @param hspdif SPDIFRX handle
00893   * @retval None
00894   */
00895 HAL_StatusTypeDef HAL_SPDIFRX_DMAStop(SPDIFRX_HandleTypeDef *hspdif)
00896 {
00897   /* Process Locked */
00898   __HAL_LOCK(hspdif);
00899 
00900   /* Disable the SPDIFRX DMA requests */
00901   hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_RXDMAEN);
00902   hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_CBDMAEN);
00903 
00904   /* Disable the SPDIFRX DMA channel */
00905   __HAL_DMA_DISABLE(hspdif->hdmaDrRx);
00906   __HAL_DMA_DISABLE(hspdif->hdmaCsRx);
00907 
00908   /* Disable SPDIFRX peripheral */
00909   __HAL_SPDIFRX_IDLE(hspdif);
00910 
00911   hspdif->State = HAL_SPDIFRX_STATE_READY;
00912 
00913   /* Process Unlocked */
00914   __HAL_UNLOCK(hspdif);
00915 
00916   return HAL_OK;
00917 }
00918 
00919 /**
00920   * @brief  This function handles SPDIFRX interrupt request.
00921   * @param  hspdif SPDIFRX handle
00922   * @retval HAL status
00923   */
00924 void HAL_SPDIFRX_IRQHandler(SPDIFRX_HandleTypeDef *hspdif)
00925 {
00926   /* SPDIFRX in mode Data Flow Reception ------------------------------------------------*/
00927   if((__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_RXNE) != RESET) && (__HAL_SPDIFRX_GET_IT_SOURCE(hspdif, SPDIFRX_IT_RXNE) != RESET))
00928   {
00929     __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_IT_RXNE);
00930     SPDIFRX_ReceiveDataFlow_IT(hspdif);
00931   }
00932 
00933   /* SPDIFRX in mode Control Flow Reception ------------------------------------------------*/
00934   if((__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_CSRNE) != RESET) && (__HAL_SPDIFRX_GET_IT_SOURCE(hspdif, SPDIFRX_IT_CSRNE) != RESET))
00935   {
00936     __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_IT_CSRNE);
00937     SPDIFRX_ReceiveControlFlow_IT(hspdif);
00938   }
00939 
00940   /* SPDIFRX Overrun error interrupt occurred ---------------------------------*/
00941   if((__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_OVR) != RESET) && (__HAL_SPDIFRX_GET_IT_SOURCE(hspdif, SPDIFRX_IT_OVRIE) != RESET))
00942   {
00943     __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_FLAG_OVR);
00944 
00945     /* Change the SPDIFRX error code */
00946     hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_OVR;
00947 
00948     /* the transfer is not stopped */
00949     HAL_SPDIFRX_ErrorCallback(hspdif);
00950   }
00951 
00952   /* SPDIFRX Parity error interrupt occurred ---------------------------------*/
00953   if((__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_PERR) != RESET) && (__HAL_SPDIFRX_GET_IT_SOURCE(hspdif, SPDIFRX_IT_PERRIE) != RESET))
00954   {
00955     __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_FLAG_PERR);
00956 
00957     /* Change the SPDIFRX error code */
00958     hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_PE;
00959 
00960     /* the transfer is not stopped */
00961     HAL_SPDIFRX_ErrorCallback(hspdif);
00962   } 
00963 }
00964 
00965 /**
00966   * @brief Rx Transfer (Data flow) half completed callbacks
00967   * @param hspdif SPDIFRX handle
00968   * @retval None
00969   */
00970 __weak void HAL_SPDIFRX_RxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
00971 {
00972   /* Prevent unused argument(s) compilation warning */
00973   UNUSED(hspdif);
00974   /* NOTE : This function Should not be modified, when the callback is needed,
00975             the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
00976    */
00977 }
00978 
00979 /**
00980   * @brief Rx Transfer (Data flow) completed callbacks
00981   * @param hspdif SPDIFRX handle
00982   * @retval None
00983   */
00984 __weak void HAL_SPDIFRX_RxCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
00985 {
00986   /* Prevent unused argument(s) compilation warning */
00987   UNUSED(hspdif);
00988   /* NOTE : This function Should not be modified, when the callback is needed,
00989             the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
00990    */
00991 }
00992 
00993 /**
00994   * @brief Rx (Control flow) Transfer half completed callbacks
00995   * @param hspdif SPDIFRX handle
00996   * @retval None
00997   */
00998 __weak void HAL_SPDIFRX_CxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
00999 {
01000   /* Prevent unused argument(s) compilation warning */
01001   UNUSED(hspdif);
01002   /* NOTE : This function Should not be modified, when the callback is needed,
01003             the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
01004    */
01005 }
01006 
01007 /**
01008   * @brief Rx Transfer (Control flow) completed callbacks
01009   * @param hspdif SPDIFRX handle
01010   * @retval None
01011   */
01012 __weak void HAL_SPDIFRX_CxCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
01013 {
01014   /* Prevent unused argument(s) compilation warning */
01015   UNUSED(hspdif);
01016   /* NOTE : This function Should not be modified, when the callback is needed,
01017             the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
01018    */
01019 }
01020 
01021 /**
01022   * @brief SPDIFRX error callbacks
01023   * @param hspdif SPDIFRX handle
01024   * @retval None
01025   */
01026 __weak void HAL_SPDIFRX_ErrorCallback(SPDIFRX_HandleTypeDef *hspdif)
01027 {
01028   /* Prevent unused argument(s) compilation warning */
01029   UNUSED(hspdif);
01030   /* NOTE : This function Should not be modified, when the callback is needed,
01031             the HAL_SPDIFRX_ErrorCallback could be implemented in the user file
01032    */
01033 }
01034 
01035 /**
01036   * @}
01037   */
01038 
01039 /** @defgroup SPDIFRX_Exported_Functions_Group3 Peripheral State and Errors functions
01040   *  @brief   Peripheral State functions
01041   *
01042 @verbatim
01043 ===============================================================================
01044               ##### Peripheral State and Errors functions #####
01045 ===============================================================================
01046 [..]
01047      This subsection permit to get in run-time the status of the peripheral
01048      and the data flow.
01049 
01050 @endverbatim
01051   * @{
01052   */
01053 
01054 /**
01055   * @brief  Return the SPDIFRX state
01056   * @param  hspdif  SPDIFRX handle
01057   * @retval HAL state
01058   */
01059 HAL_SPDIFRX_StateTypeDef HAL_SPDIFRX_GetState(SPDIFRX_HandleTypeDef *hspdif)
01060 {
01061   return hspdif->State;
01062 }
01063 
01064 /**
01065   * @brief  Return the SPDIFRX error code
01066   * @param  hspdif  SPDIFRX handle
01067   * @retval SPDIFRX Error Code
01068   */
01069 uint32_t HAL_SPDIFRX_GetError(SPDIFRX_HandleTypeDef *hspdif)
01070 {
01071   return hspdif->ErrorCode;
01072 }
01073 
01074 /**
01075   * @}
01076   */
01077 
01078 /**
01079   * @brief DMA SPDIFRX receive process (Data flow) complete callback
01080   * @param hdma  DMA handle
01081   * @retval None
01082   */
01083 static void SPDIFRX_DMARxCplt(DMA_HandleTypeDef *hdma)
01084 {
01085   SPDIFRX_HandleTypeDef* hspdif = ( SPDIFRX_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
01086 
01087   /* Disable Rx DMA Request */
01088   hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_RXDMAEN);
01089   hspdif->RxXferCount = 0U;
01090 
01091   hspdif->State = HAL_SPDIFRX_STATE_READY;
01092   HAL_SPDIFRX_RxCpltCallback(hspdif);
01093 }
01094 
01095 /**
01096   * @brief DMA SPDIFRX receive process (Data flow) half complete callback
01097   * @param hdma  DMA handle
01098   * @retval None
01099   */
01100 static void SPDIFRX_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
01101 {
01102   SPDIFRX_HandleTypeDef* hspdif = (SPDIFRX_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
01103 
01104   HAL_SPDIFRX_RxHalfCpltCallback(hspdif);
01105 }
01106 
01107 /**
01108   * @brief DMA SPDIFRX receive process (Control flow) complete callback
01109   * @param hdma  DMA handle
01110   * @retval None
01111   */
01112 static void SPDIFRX_DMACxCplt(DMA_HandleTypeDef *hdma)
01113 {
01114   SPDIFRX_HandleTypeDef* hspdif = ( SPDIFRX_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
01115 
01116   /* Disable Cb DMA Request */
01117   hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_CBDMAEN);
01118   hspdif->CsXferCount = 0U;
01119 
01120   hspdif->State = HAL_SPDIFRX_STATE_READY;
01121   HAL_SPDIFRX_CxCpltCallback(hspdif);
01122 }
01123 
01124 /**
01125   * @brief DMA SPDIFRX receive process (Control flow) half complete callback
01126   * @param hdma  DMA handle
01127   * @retval None
01128   */
01129 static void SPDIFRX_DMACxHalfCplt(DMA_HandleTypeDef *hdma)
01130 {
01131   SPDIFRX_HandleTypeDef* hspdif = (SPDIFRX_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
01132 
01133   HAL_SPDIFRX_CxHalfCpltCallback(hspdif);
01134 }
01135 
01136 /**
01137   * @brief DMA SPDIFRX communication error callback
01138   * @param hdma  DMA handle
01139   * @retval None
01140   */
01141 static void SPDIFRX_DMAError(DMA_HandleTypeDef *hdma)
01142 {
01143   SPDIFRX_HandleTypeDef* hspdif = ( SPDIFRX_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
01144 
01145   /* Disable Rx and Cb DMA Request */
01146   hspdif->Instance->CR &= (uint16_t)(~(SPDIFRX_CR_RXDMAEN | SPDIFRX_CR_CBDMAEN));
01147   hspdif->RxXferCount = 0U;
01148 
01149   hspdif->State= HAL_SPDIFRX_STATE_READY;
01150 
01151   /* Set the error code and execute error callback*/
01152   hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_DMA;
01153   HAL_SPDIFRX_ErrorCallback(hspdif);
01154 }
01155 
01156 /**
01157   * @brief Receive an amount of data (Data Flow) with Interrupt
01158   * @param hspdif SPDIFRX handle
01159   * @retval None
01160   */
01161 static void SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif)
01162 {
01163   /* Receive data */
01164   (*hspdif->pRxBuffPtr++) = hspdif->Instance->DR;
01165   hspdif->RxXferCount--;
01166 
01167   if(hspdif->RxXferCount == 0U)
01168   {
01169     /* Disable RXNE/PE and OVR interrupts */
01170     __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE | SPDIFRX_IT_PERRIE | SPDIFRX_IT_RXNE);
01171 
01172     hspdif->State = HAL_SPDIFRX_STATE_READY;
01173 
01174     /* Process Unlocked */
01175     __HAL_UNLOCK(hspdif);
01176 
01177     HAL_SPDIFRX_RxCpltCallback(hspdif);
01178   }
01179 }
01180 
01181 /**
01182   * @brief Receive an amount of data (Control Flow) with Interrupt
01183   * @param hspdif SPDIFRX handle
01184   * @retval None
01185   */
01186 static void SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif)
01187 {
01188   /* Receive data */
01189   (*hspdif->pCsBuffPtr++) = hspdif->Instance->CSR;
01190   hspdif->CsXferCount--;
01191 
01192   if(hspdif->CsXferCount == 0U)
01193   {
01194     /* Disable CSRNE interrupt */
01195     __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
01196 
01197     hspdif->State = HAL_SPDIFRX_STATE_READY;
01198 
01199     /* Process Unlocked */
01200     __HAL_UNLOCK(hspdif);
01201 
01202     HAL_SPDIFRX_CxCpltCallback(hspdif);
01203   }
01204 }
01205 
01206 /**
01207   * @brief This function handles SPDIFRX Communication Timeout.
01208   * @param hspdif SPDIFRX handle
01209   * @param Flag Flag checked
01210   * @param Status Value of the flag expected
01211   * @param Timeout Duration of the timeout
01212   * @retval HAL status
01213   */
01214 static HAL_StatusTypeDef SPDIFRX_WaitOnFlagUntilTimeout(SPDIFRX_HandleTypeDef *hspdif, uint32_t Flag, FlagStatus Status, uint32_t Timeout)
01215 {
01216   uint32_t tickstart = 0U;
01217 
01218   /* Get tick */
01219   tickstart = HAL_GetTick();
01220 
01221   /* Wait until flag is set */
01222   if(Status == RESET)
01223   {
01224     while(__HAL_SPDIFRX_GET_FLAG(hspdif, Flag) == RESET)
01225     {
01226       /* Check for the Timeout */
01227       if(Timeout != HAL_MAX_DELAY)
01228       {
01229         if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
01230         {
01231           /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
01232           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
01233           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
01234           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
01235           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
01236           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
01237           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
01238           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
01239 
01240           hspdif->State= HAL_SPDIFRX_STATE_READY;
01241 
01242           /* Process Unlocked */
01243           __HAL_UNLOCK(hspdif);
01244 
01245           return HAL_TIMEOUT;
01246         }
01247       }
01248     }
01249   }
01250   else
01251   {
01252     while(__HAL_SPDIFRX_GET_FLAG(hspdif, Flag) != RESET)
01253     {
01254       /* Check for the Timeout */
01255       if(Timeout != HAL_MAX_DELAY)
01256       {
01257         if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
01258         {
01259           /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
01260           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
01261           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
01262           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
01263           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
01264           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
01265           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
01266           __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
01267 
01268           hspdif->State= HAL_SPDIFRX_STATE_READY;
01269 
01270           /* Process Unlocked */
01271           __HAL_UNLOCK(hspdif);
01272 
01273           return HAL_TIMEOUT;
01274         }
01275       }
01276     }
01277   }
01278   return HAL_OK;
01279 }
01280 
01281 /**
01282   * @}
01283   */
01284 #endif /* STM32F446xx */
01285 
01286 #endif /* HAL_SPDIFRX_MODULE_ENABLED */
01287 /**
01288   * @}
01289   */
01290 
01291 /**
01292   * @}
01293   */
01294 
01295 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
01296