STM32L486xx HAL User Manual
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32l4xx_ll_wwdg.h 00004 * @author MCD Application Team 00005 * @brief Header file of WWDG LL module. 00006 ****************************************************************************** 00007 * @attention 00008 * 00009 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> 00010 * 00011 * Redistribution and use in source and binary forms, with or without modification, 00012 * are permitted provided that the following conditions are met: 00013 * 1. Redistributions of source code must retain the above copyright notice, 00014 * this list of conditions and the following disclaimer. 00015 * 2. Redistributions in binary form must reproduce the above copyright notice, 00016 * this list of conditions and the following disclaimer in the documentation 00017 * and/or other materials provided with the distribution. 00018 * 3. Neither the name of STMicroelectronics nor the names of its contributors 00019 * may be used to endorse or promote products derived from this software 00020 * without specific prior written permission. 00021 * 00022 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 00023 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 00024 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 00025 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 00026 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 00027 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 00028 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00029 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 00030 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 00031 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00032 * 00033 ****************************************************************************** 00034 */ 00035 00036 /* Define to prevent recursive inclusion -------------------------------------*/ 00037 #ifndef __STM32L4xx_LL_WWDG_H 00038 #define __STM32L4xx_LL_WWDG_H 00039 00040 #ifdef __cplusplus 00041 extern "C" { 00042 #endif 00043 00044 /* Includes ------------------------------------------------------------------*/ 00045 #include "stm32l4xx.h" 00046 00047 /** @addtogroup STM32L4xx_LL_Driver 00048 * @{ 00049 */ 00050 00051 #if defined (WWDG) 00052 /** @defgroup WWDG_LL WWDG 00053 * @{ 00054 */ 00055 00056 /* Private types -------------------------------------------------------------*/ 00057 /* Private variables ---------------------------------------------------------*/ 00058 /* Private constants ---------------------------------------------------------*/ 00059 /* Private macros ------------------------------------------------------------*/ 00060 /* Exported types ------------------------------------------------------------*/ 00061 /* Exported constants --------------------------------------------------------*/ 00062 /** @defgroup WWDG_LL_Exported_Constants WWDG Exported Constants 00063 * @{ 00064 */ 00065 00066 /** @defgroup WWDG_LL_EC_IT IT Defines 00067 * @brief IT defines which can be used with LL_WWDG_ReadReg and LL_WWDG_WriteReg functions 00068 * @{ 00069 */ 00070 #define LL_WWDG_CFR_EWI WWDG_CFR_EWI 00071 /** 00072 * @} 00073 */ 00074 00075 /** @defgroup WWDG_LL_EC_PRESCALER PRESCALER 00076 * @{ 00077 */ 00078 #define LL_WWDG_PRESCALER_1 0x00000000u /*!< WWDG counter clock = (PCLK1/4096)/1 */ 00079 #define LL_WWDG_PRESCALER_2 WWDG_CFR_WDGTB_0 /*!< WWDG counter clock = (PCLK1/4096)/2 */ 00080 #define LL_WWDG_PRESCALER_4 WWDG_CFR_WDGTB_1 /*!< WWDG counter clock = (PCLK1/4096)/4 */ 00081 #define LL_WWDG_PRESCALER_8 (WWDG_CFR_WDGTB_0 | WWDG_CFR_WDGTB_1) /*!< WWDG counter clock = (PCLK1/4096)/8 */ 00082 /** 00083 * @} 00084 */ 00085 00086 /** 00087 * @} 00088 */ 00089 00090 /* Exported macro ------------------------------------------------------------*/ 00091 /** @defgroup WWDG_LL_Exported_Macros WWDG Exported Macros 00092 * @{ 00093 */ 00094 /** @defgroup WWDG_LL_EM_WRITE_READ Common Write and read registers macros 00095 * @{ 00096 */ 00097 /** 00098 * @brief Write a value in WWDG register 00099 * @param __INSTANCE__ WWDG Instance 00100 * @param __REG__ Register to be written 00101 * @param __VALUE__ Value to be written in the register 00102 * @retval None 00103 */ 00104 #define LL_WWDG_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__)) 00105 00106 /** 00107 * @brief Read a value in WWDG register 00108 * @param __INSTANCE__ WWDG Instance 00109 * @param __REG__ Register to be read 00110 * @retval Register value 00111 */ 00112 #define LL_WWDG_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) 00113 /** 00114 * @} 00115 */ 00116 00117 /** 00118 * @} 00119 */ 00120 00121 /* Exported functions --------------------------------------------------------*/ 00122 /** @defgroup WWDG_LL_Exported_Functions WWDG Exported Functions 00123 * @{ 00124 */ 00125 00126 /** @defgroup WWDG_LL_EF_Configuration Configuration 00127 * @{ 00128 */ 00129 /** 00130 * @brief Enable Window Watchdog. The watchdog is always disabled after a reset. 00131 * @note It is enabled by setting the WDGA bit in the WWDG_CR register, 00132 * then it cannot be disabled again except by a reset. 00133 * This bit is set by software and only cleared by hardware after a reset. 00134 * When WDGA = 1, the watchdog can generate a reset. 00135 * @rmtoll CR WDGA LL_WWDG_Enable 00136 * @param WWDGx WWDG Instance 00137 * @retval None 00138 */ 00139 __STATIC_INLINE void LL_WWDG_Enable(WWDG_TypeDef *WWDGx) 00140 { 00141 SET_BIT(WWDGx->CR, WWDG_CR_WDGA); 00142 } 00143 00144 /** 00145 * @brief Checks if Window Watchdog is enabled 00146 * @rmtoll CR WDGA LL_WWDG_IsEnabled 00147 * @param WWDGx WWDG Instance 00148 * @retval State of bit (1 or 0). 00149 */ 00150 __STATIC_INLINE uint32_t LL_WWDG_IsEnabled(WWDG_TypeDef *WWDGx) 00151 { 00152 return ((READ_BIT(WWDGx->CR, WWDG_CR_WDGA) == (WWDG_CR_WDGA)) ? 1UL : 0UL); 00153 } 00154 00155 /** 00156 * @brief Set the Watchdog counter value to provided value (7-bits T[6:0]) 00157 * @note When writing to the WWDG_CR register, always write 1 in the MSB b6 to avoid generating an immediate reset 00158 * This counter is decremented every (4096 x 2expWDGTB) PCLK cycles 00159 * A reset is produced when it rolls over from 0x40 to 0x3F (bit T6 becomes cleared) 00160 * Setting the counter lower then 0x40 causes an immediate reset (if WWDG enabled) 00161 * @rmtoll CR T LL_WWDG_SetCounter 00162 * @param WWDGx WWDG Instance 00163 * @param Counter 0..0x7F (7 bit counter value) 00164 * @retval None 00165 */ 00166 __STATIC_INLINE void LL_WWDG_SetCounter(WWDG_TypeDef *WWDGx, uint32_t Counter) 00167 { 00168 MODIFY_REG(WWDGx->CR, WWDG_CR_T, Counter); 00169 } 00170 00171 /** 00172 * @brief Return current Watchdog Counter Value (7 bits counter value) 00173 * @rmtoll CR T LL_WWDG_GetCounter 00174 * @param WWDGx WWDG Instance 00175 * @retval 7 bit Watchdog Counter value 00176 */ 00177 __STATIC_INLINE uint32_t LL_WWDG_GetCounter(WWDG_TypeDef *WWDGx) 00178 { 00179 return (READ_BIT(WWDGx->CR, WWDG_CR_T)); 00180 } 00181 00182 /** 00183 * @brief Set the time base of the prescaler (WDGTB). 00184 * @note Prescaler is used to apply ratio on PCLK clock, so that Watchdog counter 00185 * is decremented every (4096 x 2expWDGTB) PCLK cycles 00186 * @rmtoll CFR WDGTB LL_WWDG_SetPrescaler 00187 * @param WWDGx WWDG Instance 00188 * @param Prescaler This parameter can be one of the following values: 00189 * @arg @ref LL_WWDG_PRESCALER_1 00190 * @arg @ref LL_WWDG_PRESCALER_2 00191 * @arg @ref LL_WWDG_PRESCALER_4 00192 * @arg @ref LL_WWDG_PRESCALER_8 00193 * @retval None 00194 */ 00195 __STATIC_INLINE void LL_WWDG_SetPrescaler(WWDG_TypeDef *WWDGx, uint32_t Prescaler) 00196 { 00197 MODIFY_REG(WWDGx->CFR, WWDG_CFR_WDGTB, Prescaler); 00198 } 00199 00200 /** 00201 * @brief Return current Watchdog Prescaler Value 00202 * @rmtoll CFR WDGTB LL_WWDG_GetPrescaler 00203 * @param WWDGx WWDG Instance 00204 * @retval Returned value can be one of the following values: 00205 * @arg @ref LL_WWDG_PRESCALER_1 00206 * @arg @ref LL_WWDG_PRESCALER_2 00207 * @arg @ref LL_WWDG_PRESCALER_4 00208 * @arg @ref LL_WWDG_PRESCALER_8 00209 */ 00210 __STATIC_INLINE uint32_t LL_WWDG_GetPrescaler(WWDG_TypeDef *WWDGx) 00211 { 00212 return (READ_BIT(WWDGx->CFR, WWDG_CFR_WDGTB)); 00213 } 00214 00215 /** 00216 * @brief Set the Watchdog Window value to be compared to the downcounter (7-bits W[6:0]). 00217 * @note This window value defines when write in the WWDG_CR register 00218 * to program Watchdog counter is allowed. 00219 * Watchdog counter value update must occur only when the counter value 00220 * is lower than the Watchdog window register value. 00221 * Otherwise, a MCU reset is generated if the 7-bit Watchdog counter value 00222 * (in the control register) is refreshed before the downcounter has reached 00223 * the watchdog window register value. 00224 * Physically is possible to set the Window lower then 0x40 but it is not recommended. 00225 * To generate an immediate reset, it is possible to set the Counter lower than 0x40. 00226 * @rmtoll CFR W LL_WWDG_SetWindow 00227 * @param WWDGx WWDG Instance 00228 * @param Window 0x00..0x7F (7 bit Window value) 00229 * @retval None 00230 */ 00231 __STATIC_INLINE void LL_WWDG_SetWindow(WWDG_TypeDef *WWDGx, uint32_t Window) 00232 { 00233 MODIFY_REG(WWDGx->CFR, WWDG_CFR_W, Window); 00234 } 00235 00236 /** 00237 * @brief Return current Watchdog Window Value (7 bits value) 00238 * @rmtoll CFR W LL_WWDG_GetWindow 00239 * @param WWDGx WWDG Instance 00240 * @retval 7 bit Watchdog Window value 00241 */ 00242 __STATIC_INLINE uint32_t LL_WWDG_GetWindow(WWDG_TypeDef *WWDGx) 00243 { 00244 return (READ_BIT(WWDGx->CFR, WWDG_CFR_W)); 00245 } 00246 00247 /** 00248 * @} 00249 */ 00250 00251 /** @defgroup WWDG_LL_EF_FLAG_Management FLAG_Management 00252 * @{ 00253 */ 00254 /** 00255 * @brief Indicates if the WWDG Early Wakeup Interrupt Flag is set or not. 00256 * @note This bit is set by hardware when the counter has reached the value 0x40. 00257 * It must be cleared by software by writing 0. 00258 * A write of 1 has no effect. This bit is also set if the interrupt is not enabled. 00259 * @rmtoll SR EWIF LL_WWDG_IsActiveFlag_EWKUP 00260 * @param WWDGx WWDG Instance 00261 * @retval State of bit (1 or 0). 00262 */ 00263 __STATIC_INLINE uint32_t LL_WWDG_IsActiveFlag_EWKUP(WWDG_TypeDef *WWDGx) 00264 { 00265 return ((READ_BIT(WWDGx->SR, WWDG_SR_EWIF) == (WWDG_SR_EWIF)) ? 1UL : 0UL); 00266 } 00267 00268 /** 00269 * @brief Clear WWDG Early Wakeup Interrupt Flag (EWIF) 00270 * @rmtoll SR EWIF LL_WWDG_ClearFlag_EWKUP 00271 * @param WWDGx WWDG Instance 00272 * @retval None 00273 */ 00274 __STATIC_INLINE void LL_WWDG_ClearFlag_EWKUP(WWDG_TypeDef *WWDGx) 00275 { 00276 WRITE_REG(WWDGx->SR, ~WWDG_SR_EWIF); 00277 } 00278 00279 /** 00280 * @} 00281 */ 00282 00283 /** @defgroup WWDG_LL_EF_IT_Management IT_Management 00284 * @{ 00285 */ 00286 /** 00287 * @brief Enable the Early Wakeup Interrupt. 00288 * @note When set, an interrupt occurs whenever the counter reaches value 0x40. 00289 * This interrupt is only cleared by hardware after a reset 00290 * @rmtoll CFR EWI LL_WWDG_EnableIT_EWKUP 00291 * @param WWDGx WWDG Instance 00292 * @retval None 00293 */ 00294 __STATIC_INLINE void LL_WWDG_EnableIT_EWKUP(WWDG_TypeDef *WWDGx) 00295 { 00296 SET_BIT(WWDGx->CFR, WWDG_CFR_EWI); 00297 } 00298 00299 /** 00300 * @brief Check if Early Wakeup Interrupt is enabled 00301 * @rmtoll CFR EWI LL_WWDG_IsEnabledIT_EWKUP 00302 * @param WWDGx WWDG Instance 00303 * @retval State of bit (1 or 0). 00304 */ 00305 __STATIC_INLINE uint32_t LL_WWDG_IsEnabledIT_EWKUP(WWDG_TypeDef *WWDGx) 00306 { 00307 return ((READ_BIT(WWDGx->CFR, WWDG_CFR_EWI) == (WWDG_CFR_EWI)) ? 1UL : 0UL); 00308 } 00309 00310 /** 00311 * @} 00312 */ 00313 00314 /** 00315 * @} 00316 */ 00317 00318 /** 00319 * @} 00320 */ 00321 00322 #endif /* WWDG */ 00323 00324 /** 00325 * @} 00326 */ 00327 00328 #ifdef __cplusplus 00329 } 00330 #endif 00331 00332 #endif /* __STM32L4xx_LL_WWDG_H */ 00333 00334 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/