STM32L486xx HAL User Manual
stm32l4xx_ll_lptim.h
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00001 /**
00002   ******************************************************************************
00003   * @file    stm32l4xx_ll_lptim.h
00004   * @author  MCD Application Team
00005   * @brief   Header file of LPTIM LL module.
00006   ******************************************************************************
00007   * @attention
00008   *
00009   * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
00010   *
00011   * Redistribution and use in source and binary forms, with or without modification,
00012   * are permitted provided that the following conditions are met:
00013   *   1. Redistributions of source code must retain the above copyright notice,
00014   *      this list of conditions and the following disclaimer.
00015   *   2. Redistributions in binary form must reproduce the above copyright notice,
00016   *      this list of conditions and the following disclaimer in the documentation
00017   *      and/or other materials provided with the distribution.
00018   *   3. Neither the name of STMicroelectronics nor the names of its contributors
00019   *      may be used to endorse or promote products derived from this software
00020   *      without specific prior written permission.
00021   *
00022   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
00023   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00024   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
00025   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
00026   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00027   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
00028   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
00029   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00030   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
00031   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00032   *
00033   ******************************************************************************
00034   */
00035 
00036 /* Define to prevent recursive inclusion -------------------------------------*/
00037 #ifndef __STM32L4xx_LL_LPTIM_H
00038 #define __STM32L4xx_LL_LPTIM_H
00039 
00040 #ifdef __cplusplus
00041 extern "C" {
00042 #endif
00043 
00044 /* Includes ------------------------------------------------------------------*/
00045 #include "stm32l4xx.h"
00046 
00047 /** @addtogroup STM32L4xx_LL_Driver
00048   * @{
00049   */
00050 #if defined (LPTIM1) || defined (LPTIM2)
00051         
00052 /** @defgroup LPTIM_LL LPTIM
00053   * @{
00054   */
00055 
00056 /* Private types -------------------------------------------------------------*/
00057 /* Private variables ---------------------------------------------------------*/
00058 
00059 /* Private constants ---------------------------------------------------------*/
00060 
00061 /* Private macros ------------------------------------------------------------*/
00062 #if defined(USE_FULL_LL_DRIVER)
00063 /** @defgroup LPTIM_LL_Private_Macros LPTIM Private Macros
00064   * @{
00065   */
00066 /**
00067   * @}
00068   */
00069 #endif /*USE_FULL_LL_DRIVER*/
00070 
00071 /* Exported types ------------------------------------------------------------*/
00072 #if defined(USE_FULL_LL_DRIVER)
00073 /** @defgroup LPTIM_LL_ES_INIT LPTIM Exported Init structure
00074   * @{
00075   */
00076 
00077 /**
00078   * @brief  LPTIM Init structure definition
00079   */
00080 typedef struct
00081 {
00082   uint32_t ClockSource;    /*!< Specifies the source of the clock used by the LPTIM instance.
00083                                 This parameter can be a value of @ref LPTIM_LL_EC_CLK_SOURCE.
00084 
00085                                 This feature can be modified afterwards using unitary function @ref LL_LPTIM_SetClockSource().*/
00086 
00087   uint32_t Prescaler;      /*!< Specifies the prescaler division ratio.
00088                                 This parameter can be a value of @ref LPTIM_LL_EC_PRESCALER.
00089 
00090                                 This feature can be modified afterwards using using unitary function @ref LL_LPTIM_SetPrescaler().*/
00091 
00092   uint32_t Waveform;       /*!< Specifies the waveform shape.
00093                                 This parameter can be a value of @ref LPTIM_LL_EC_OUTPUT_WAVEFORM.
00094 
00095                                 This feature can be modified afterwards using unitary function @ref LL_LPTIM_ConfigOutput().*/
00096 
00097   uint32_t Polarity;       /*!< Specifies waveform polarity.
00098                                 This parameter can be a value of @ref LPTIM_LL_EC_OUTPUT_POLARITY.
00099 
00100                                 This feature can be modified afterwards using unitary function @ref LL_LPTIM_ConfigOutput().*/
00101 } LL_LPTIM_InitTypeDef;
00102 
00103 /**
00104   * @}
00105   */
00106 #endif /* USE_FULL_LL_DRIVER */
00107 
00108 /* Exported constants --------------------------------------------------------*/
00109 /** @defgroup LPTIM_LL_Exported_Constants LPTIM Exported Constants
00110   * @{
00111   */
00112 
00113 /** @defgroup LPTIM_LL_EC_GET_FLAG Get Flags Defines
00114   * @brief    Flags defines which can be used with LL_LPTIM_ReadReg function
00115   * @{
00116   */
00117 #define LL_LPTIM_ISR_CMPM                     LPTIM_ISR_CMPM     /*!< Compare match */
00118 #define LL_LPTIM_ISR_ARRM                     LPTIM_ISR_ARRM     /*!< Autoreload match */
00119 #define LL_LPTIM_ISR_EXTTRIG                  LPTIM_ISR_EXTTRIG  /*!< External trigger edge event */
00120 #define LL_LPTIM_ISR_CMPOK                    LPTIM_ISR_CMPOK    /*!< Compare register update OK */
00121 #define LL_LPTIM_ISR_ARROK                    LPTIM_ISR_ARROK    /*!< Autoreload register update OK */
00122 #define LL_LPTIM_ISR_UP                       LPTIM_ISR_UP       /*!< Counter direction change down to up */
00123 #define LL_LPTIM_ISR_DOWN                     LPTIM_ISR_DOWN     /*!< Counter direction change up to down */
00124 /**
00125   * @}
00126   */
00127 
00128 /** @defgroup LPTIM_LL_EC_IT IT Defines
00129   * @brief    IT defines which can be used with LL_LPTIM_ReadReg and  LL_LPTIM_WriteReg functions
00130   * @{
00131   */
00132 #define LL_LPTIM_IER_CMPMIE                   LPTIM_IER_CMPMIE       /*!< Compare match Interrupt Enable */
00133 #define LL_LPTIM_IER_ARRMIE                   LPTIM_IER_ARRMIE       /*!< Autoreload match Interrupt Enable */
00134 #define LL_LPTIM_IER_EXTTRIGIE                LPTIM_IER_EXTTRIGIE    /*!< External trigger valid edge Interrupt Enable */
00135 #define LL_LPTIM_IER_CMPOKIE                  LPTIM_IER_CMPOKIE      /*!< Compare register update OK Interrupt Enable */
00136 #define LL_LPTIM_IER_ARROKIE                  LPTIM_IER_ARROKIE      /*!< Autoreload register update OK Interrupt Enable */
00137 #define LL_LPTIM_IER_UPIE                     LPTIM_IER_UPIE         /*!< Direction change to UP Interrupt Enable */
00138 #define LL_LPTIM_IER_DOWNIE                   LPTIM_IER_DOWNIE       /*!< Direction change to down Interrupt Enable */
00139 /**
00140   * @}
00141   */
00142 
00143 /** @defgroup LPTIM_LL_EC_OPERATING_MODE Operating Mode
00144   * @{
00145   */
00146 #define LL_LPTIM_OPERATING_MODE_CONTINUOUS    LPTIM_CR_CNTSTRT       /*!<LP Timer starts in continuous mode*/
00147 #define LL_LPTIM_OPERATING_MODE_ONESHOT       LPTIM_CR_SNGSTRT       /*!<LP Tilmer starts in single mode*/
00148 /**
00149   * @}
00150   */
00151 
00152 /** @defgroup LPTIM_LL_EC_UPDATE_MODE Update Mode
00153   * @{
00154   */
00155 #define LL_LPTIM_UPDATE_MODE_IMMEDIATE        0x00000000U             /*!<Preload is disabled: registers are updated after each APB bus write access*/
00156 #define LL_LPTIM_UPDATE_MODE_ENDOFPERIOD      LPTIM_CFGR_PRELOAD      /*!<preload is enabled: registers are updated at the end of the current LPTIM period*/
00157 /**
00158   * @}
00159   */
00160 
00161 /** @defgroup LPTIM_LL_EC_COUNTER_MODE Counter Mode
00162   * @{
00163   */
00164 #define LL_LPTIM_COUNTER_MODE_INTERNAL        0x00000000U             /*!<The counter is incremented following each internal clock pulse*/
00165 #define LL_LPTIM_COUNTER_MODE_EXTERNAL        LPTIM_CFGR_COUNTMODE    /*!<The counter is incremented following each valid clock pulse on the LPTIM external Input1*/
00166 /**
00167   * @}
00168   */
00169 
00170 /** @defgroup LPTIM_LL_EC_OUTPUT_WAVEFORM Output Waveform Type
00171   * @{
00172   */
00173 #define LL_LPTIM_OUTPUT_WAVEFORM_PWM          0x00000000U             /*!<LPTIM  generates either a PWM waveform or a One pulse waveform depending on chosen operating mode CONTINOUS or SINGLE*/
00174 #define LL_LPTIM_OUTPUT_WAVEFORM_SETONCE      LPTIM_CFGR_WAVE         /*!<LPTIM  generates a Set Once waveform*/
00175 /**
00176   * @}
00177   */
00178 
00179 /** @defgroup LPTIM_LL_EC_OUTPUT_POLARITY Output Polarity
00180   * @{
00181   */
00182 #define LL_LPTIM_OUTPUT_POLARITY_REGULAR      0x00000000U              /*!<The LPTIM output reflects the compare results between LPTIMx_ARR and LPTIMx_CMP registers*/
00183 #define LL_LPTIM_OUTPUT_POLARITY_INVERSE      LPTIM_CFGR_WAVPOL        /*!<The LPTIM output reflects the inverse of the compare results between LPTIMx_ARR and LPTIMx_CMP registers*/
00184 /**
00185   * @}
00186   */
00187 
00188 /** @defgroup LPTIM_LL_EC_PRESCALER Prescaler Value
00189   * @{
00190   */
00191 #define LL_LPTIM_PRESCALER_DIV1               0x00000000U                               /*!<Prescaler division factor is set to 1*/
00192 #define LL_LPTIM_PRESCALER_DIV2               LPTIM_CFGR_PRESC_0                        /*!<Prescaler division factor is set to 2*/
00193 #define LL_LPTIM_PRESCALER_DIV4               LPTIM_CFGR_PRESC_1                        /*!<Prescaler division factor is set to 4*/
00194 #define LL_LPTIM_PRESCALER_DIV8               (LPTIM_CFGR_PRESC_1 | LPTIM_CFGR_PRESC_0) /*!<Prescaler division factor is set to 8*/
00195 #define LL_LPTIM_PRESCALER_DIV16              LPTIM_CFGR_PRESC_2                        /*!<Prescaler division factor is set to 16*/
00196 #define LL_LPTIM_PRESCALER_DIV32              (LPTIM_CFGR_PRESC_2 | LPTIM_CFGR_PRESC_0) /*!<Prescaler division factor is set to 32*/
00197 #define LL_LPTIM_PRESCALER_DIV64              (LPTIM_CFGR_PRESC_2 | LPTIM_CFGR_PRESC_1) /*!<Prescaler division factor is set to 64*/
00198 #define LL_LPTIM_PRESCALER_DIV128             LPTIM_CFGR_PRESC                          /*!<Prescaler division factor is set to 128*/
00199 /**
00200   * @}
00201   */
00202 
00203 /** @defgroup LPTIM_LL_EC_TRIG_SOURCE Trigger Source
00204   * @{
00205   */
00206 #define LL_LPTIM_TRIG_SOURCE_GPIO             0x00000000U                                   /*!<External input trigger is connected to TIMx_ETR input*/
00207 #define LL_LPTIM_TRIG_SOURCE_RTCALARMA        LPTIM_CFGR_TRIGSEL_0                          /*!<External input trigger is connected to RTC Alarm A*/
00208 #define LL_LPTIM_TRIG_SOURCE_RTCALARMB        LPTIM_CFGR_TRIGSEL_1                          /*!<External input trigger is connected to RTC Alarm B*/
00209 #define LL_LPTIM_TRIG_SOURCE_RTCTAMP1         (LPTIM_CFGR_TRIGSEL_1 | LPTIM_CFGR_TRIGSEL_0) /*!<External input trigger is connected to RTC Tamper 1*/
00210 #define LL_LPTIM_TRIG_SOURCE_RTCTAMP2         LPTIM_CFGR_TRIGSEL_2                          /*!<External input trigger is connected to RTC Tamper 2*/
00211 #define LL_LPTIM_TRIG_SOURCE_RTCTAMP3         (LPTIM_CFGR_TRIGSEL_2 | LPTIM_CFGR_TRIGSEL_0) /*!<External input trigger is connected to RTC Tamper 3*/
00212 #define LL_LPTIM_TRIG_SOURCE_COMP1            (LPTIM_CFGR_TRIGSEL_2 | LPTIM_CFGR_TRIGSEL_1) /*!<External input trigger is connected to COMP1 output*/
00213 #define LL_LPTIM_TRIG_SOURCE_COMP2            LPTIM_CFGR_TRIGSEL                            /*!<External input trigger is connected to COMP2 output*/
00214 /**
00215   * @}
00216   */
00217 
00218 /** @defgroup LPTIM_LL_EC_TRIG_FILTER Trigger Filter
00219   * @{
00220   */
00221 #define LL_LPTIM_TRIG_FILTER_NONE             0x00000000U             /*!<Any trigger active level change is considered as a valid trigger*/
00222 #define LL_LPTIM_TRIG_FILTER_2                LPTIM_CFGR_TRGFLT_0     /*!<Trigger active level change must be stable for at least 2 clock periods before it is considered as valid trigger*/
00223 #define LL_LPTIM_TRIG_FILTER_4                LPTIM_CFGR_TRGFLT_1     /*!<Trigger active level change must be stable for at least 4 clock periods before it is considered as valid trigger*/
00224 #define LL_LPTIM_TRIG_FILTER_8                LPTIM_CFGR_TRGFLT       /*!<Trigger active level change must be stable for at least 8 clock periods before it is considered as valid trigger*/
00225 /**
00226   * @}
00227   */
00228 
00229 /** @defgroup LPTIM_LL_EC_TRIG_POLARITY Trigger Polarity
00230   * @{
00231   */
00232 #define LL_LPTIM_TRIG_POLARITY_RISING         LPTIM_CFGR_TRIGEN_0    /*!<LPTIM counter starts when a rising edge is detected*/
00233 #define LL_LPTIM_TRIG_POLARITY_FALLING        LPTIM_CFGR_TRIGEN_1    /*!<LPTIM counter starts when a falling edge is detected*/
00234 #define LL_LPTIM_TRIG_POLARITY_RISING_FALLING LPTIM_CFGR_TRIGEN      /*!<LPTIM counter starts when a rising or a falling edge is detected*/
00235 /**
00236   * @}
00237   */
00238 
00239 /** @defgroup LPTIM_LL_EC_CLK_SOURCE Clock Source
00240   * @{
00241   */
00242 #define LL_LPTIM_CLK_SOURCE_INTERNAL          0x00000000U             /*!<LPTIM is clocked by internal clock source (APB clock or any of the embedded oscillators)*/
00243 #define LL_LPTIM_CLK_SOURCE_EXTERNAL          LPTIM_CFGR_CKSEL        /*!<LPTIM is clocked by an external clock source through the LPTIM external Input1*/
00244 /**
00245   * @}
00246   */
00247 
00248 /** @defgroup LPTIM_LL_EC_CLK_FILTER Clock Filter
00249   * @{
00250   */
00251 #define LL_LPTIM_CLK_FILTER_NONE              0x00000000U             /*!<Any external clock signal level change is considered as a valid transition*/
00252 #define LL_LPTIM_CLK_FILTER_2                 LPTIM_CFGR_CKFLT_0      /*!<External clock signal level change must be stable for at least 2 clock periods before it is considered as valid transition*/
00253 #define LL_LPTIM_CLK_FILTER_4                 LPTIM_CFGR_CKFLT_1      /*!<External clock signal level change must be stable for at least 4 clock periods before it is considered as valid transition*/
00254 #define LL_LPTIM_CLK_FILTER_8                 LPTIM_CFGR_CKFLT        /*!<External clock signal level change must be stable for at least 8 clock periods before it is considered as valid transition*/
00255 /**
00256   * @}
00257   */
00258 
00259 /** @defgroup LPTIM_LL_EC_CLK_POLARITY Clock Polarity
00260   * @{
00261   */
00262 #define LL_LPTIM_CLK_POLARITY_RISING          0x00000000U             /*!< The rising edge is the active edge used for counting*/
00263 #define LL_LPTIM_CLK_POLARITY_FALLING         LPTIM_CFGR_CKPOL_0      /*!< The falling edge is the active edge used for counting*/
00264 #define LL_LPTIM_CLK_POLARITY_RISING_FALLING  LPTIM_CFGR_CKPOL_1      /*!< Both edges are active edges*/
00265 /**
00266   * @}
00267   */
00268 
00269 /** @defgroup LPTIM_LL_EC_ENCODER_MODE Encoder Mode
00270   * @{
00271   */
00272 #define LL_LPTIM_ENCODER_MODE_RISING          0x00000000U             /*!< The rising edge is the active edge used for counting*/
00273 #define LL_LPTIM_ENCODER_MODE_FALLING         LPTIM_CFGR_CKPOL_0      /*!< The falling edge is the active edge used for counting*/
00274 #define LL_LPTIM_ENCODER_MODE_RISING_FALLING  LPTIM_CFGR_CKPOL_1      /*!< Both edges are active edges*/
00275 /**
00276   * @}
00277   */
00278 
00279 /** @defgroup LPTIM_EC_INPUT1_SRC Input1 Source
00280   * @{
00281   */
00282 #define LL_LPTIM_INPUT1_SRC_GPIO         0x00000000U             /*!< For LPTIM1 and LPTIM2 */
00283 #define LL_LPTIM_INPUT1_SRC_COMP1        LPTIM_OR_OR_0           /*!< For LPTIM1 and LPTIM2 */
00284 #define LL_LPTIM_INPUT1_SRC_COMP2        LPTIM_OR_OR_1           /*!< For LPTIM2 */
00285 #define LL_LPTIM_INPUT1_SRC_COMP1_COMP2  LPTIM_OR_OR             /*!< For LPTIM2 */
00286 /**
00287   * @}
00288   */
00289 
00290 /** @defgroup LPTIM_EC_INPUT2_SRC Input2 Source
00291   * @{
00292   */
00293 #define LL_LPTIM_INPUT2_SRC_GPIO         0x00000000U             /*!< For LPTIM1 */
00294 #define LL_LPTIM_INPUT2_SRC_COMP2        LPTIM_OR_OR_1           /*!< For LPTIM1 */
00295 /**
00296   * @}
00297   */
00298   
00299 /**
00300   * @}
00301   */
00302 
00303 /* Exported macro ------------------------------------------------------------*/
00304 /** @defgroup LPTIM_LL_Exported_Macros LPTIM Exported Macros
00305   * @{
00306   */
00307 
00308 /** @defgroup LPTIM_LL_EM_WRITE_READ Common Write and read registers Macros
00309   * @{
00310   */
00311 
00312 /**
00313   * @brief  Write a value in LPTIM register
00314   * @param  __INSTANCE__ LPTIM Instance
00315   * @param  __REG__ Register to be written
00316   * @param  __VALUE__ Value to be written in the register
00317   * @retval None
00318   */
00319 #define LL_LPTIM_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
00320 
00321 /**
00322   * @brief  Read a value in LPTIM register
00323   * @param  __INSTANCE__ LPTIM Instance
00324   * @param  __REG__ Register to be read
00325   * @retval Register value
00326   */
00327 #define LL_LPTIM_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
00328 /**
00329   * @}
00330   */
00331 
00332 /**
00333   * @}
00334   */
00335 
00336 
00337 /* Exported functions --------------------------------------------------------*/
00338 /** @defgroup LPTIM_LL_Exported_Functions LPTIM Exported Functions
00339   * @{
00340   */
00341 
00342 /** @defgroup LPTIM_LL_EF_LPTIM_Configuration LPTIM Configuration
00343   * @{
00344   */
00345 
00346 /**
00347   * @brief  Enable the LPTIM instance
00348   * @note After setting the ENABLE bit, a delay of two counter clock is needed
00349   *       before the LPTIM instance is actually enabled.
00350   * @rmtoll CR           ENABLE        LL_LPTIM_Enable
00351   * @param  LPTIMx Low-Power Timer instance
00352   * @retval None
00353   */
00354 __STATIC_INLINE void LL_LPTIM_Enable(LPTIM_TypeDef *LPTIMx)
00355 {
00356   SET_BIT(LPTIMx->CR, LPTIM_CR_ENABLE);
00357 }
00358 
00359 /**
00360   * @brief  Disable the LPTIM instance
00361   * @rmtoll CR           ENABLE        LL_LPTIM_Disable
00362   * @param  LPTIMx Low-Power Timer instance
00363   * @retval None
00364   */
00365 __STATIC_INLINE void LL_LPTIM_Disable(LPTIM_TypeDef *LPTIMx)
00366 {
00367   CLEAR_BIT(LPTIMx->CR, LPTIM_CR_ENABLE);
00368 }
00369 
00370 /**
00371   * @brief  Indicates whether the LPTIM instance is enabled.
00372   * @rmtoll CR           ENABLE        LL_LPTIM_IsEnabled
00373   * @param  LPTIMx Low-Power Timer instance
00374   * @retval State of bit (1 or 0).
00375   */
00376 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabled(LPTIM_TypeDef *LPTIMx)
00377 {
00378   return (READ_BIT(LPTIMx->CR, LPTIM_CR_ENABLE) == (LPTIM_CR_ENABLE));
00379 }
00380 
00381 /**
00382   * @brief  Starts the LPTIM counter in the desired mode.
00383   * @note LPTIM instance must be enabled before starting the counter.
00384   * @note It is possible to change on the fly from One Shot mode to
00385   *       Continuous mode.
00386   * @rmtoll CR           CNTSTRT       LL_LPTIM_StartCounter\n
00387   *         CR           SNGSTRT       LL_LPTIM_StartCounter
00388   * @param  LPTIMx Low-Power Timer instance
00389   * @param  OperatingMode This parameter can be one of the following values:
00390   *         @arg @ref LL_LPTIM_OPERATING_MODE_CONTINUOUS
00391   *         @arg @ref LL_LPTIM_OPERATING_MODE_ONESHOT
00392   * @retval None
00393   */
00394 __STATIC_INLINE void LL_LPTIM_StartCounter(LPTIM_TypeDef *LPTIMx, uint32_t OperatingMode)
00395 {
00396   MODIFY_REG(LPTIMx->CR, LPTIM_CR_CNTSTRT | LPTIM_CR_SNGSTRT, OperatingMode);
00397 }
00398 
00399 
00400 /**
00401   * @brief  Set the LPTIM registers update mode (enable/disable register preload)
00402   * @note This function must be called when the LPTIM instance is disabled.
00403   * @rmtoll CFGR         PRELOAD       LL_LPTIM_SetUpdateMode
00404   * @param  LPTIMx Low-Power Timer instance
00405   * @param  UpdateMode This parameter can be one of the following values:
00406   *         @arg @ref LL_LPTIM_UPDATE_MODE_IMMEDIATE
00407   *         @arg @ref LL_LPTIM_UPDATE_MODE_ENDOFPERIOD
00408   * @retval None
00409   */
00410 __STATIC_INLINE void LL_LPTIM_SetUpdateMode(LPTIM_TypeDef *LPTIMx, uint32_t UpdateMode)
00411 {
00412   MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_PRELOAD, UpdateMode);
00413 }
00414 
00415 /**
00416   * @brief  Get the LPTIM registers update mode
00417   * @rmtoll CFGR         PRELOAD       LL_LPTIM_GetUpdateMode
00418   * @param  LPTIMx Low-Power Timer instance
00419   * @retval Returned value can be one of the following values:
00420   *         @arg @ref LL_LPTIM_UPDATE_MODE_IMMEDIATE
00421   *         @arg @ref LL_LPTIM_UPDATE_MODE_ENDOFPERIOD
00422   */
00423 __STATIC_INLINE uint32_t LL_LPTIM_GetUpdateMode(LPTIM_TypeDef *LPTIMx)
00424 {
00425   return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_PRELOAD));
00426 }
00427 
00428 /**
00429   * @brief  Set the auto reload value
00430   * @note The LPTIMx_ARR register content must only be modified when the LPTIM is enabled
00431   * @note After a write to the LPTIMx_ARR register a new write operation to the
00432   *       same register can only be performed when the previous write operation
00433   *       is completed. Any successive write before  the ARROK flag be set, will
00434   *       lead to unpredictable results.
00435   * @note autoreload value be strictly greater than the compare value.
00436   * @rmtoll ARR          ARR           LL_LPTIM_SetAutoReload
00437   * @param  LPTIMx Low-Power Timer instance
00438   * @param  AutoReload Value between Min_Data=0x00 and Max_Data=0xFFFF
00439   * @retval None
00440   */
00441 __STATIC_INLINE void LL_LPTIM_SetAutoReload(LPTIM_TypeDef *LPTIMx, uint32_t AutoReload)
00442 {
00443   MODIFY_REG(LPTIMx->ARR, LPTIM_ARR_ARR, AutoReload);
00444 }
00445 
00446 /**
00447   * @brief  Get actual auto reload value
00448   * @rmtoll ARR          ARR           LL_LPTIM_GetAutoReload
00449   * @param  LPTIMx Low-Power Timer instance
00450   * @retval AutoReload Value between Min_Data=0x00 and Max_Data=0xFFFF
00451   */
00452 __STATIC_INLINE uint32_t LL_LPTIM_GetAutoReload(LPTIM_TypeDef *LPTIMx)
00453 {
00454   return (uint32_t)(READ_BIT(LPTIMx->ARR, LPTIM_ARR_ARR));
00455 }
00456 
00457 /**
00458   * @brief  Set the compare value
00459   * @note After a write to the LPTIMx_CMP register a new write operation to the
00460   *       same register can only be performed when the previous write operation
00461   *       is completed. Any successive write before the CMPOK flag be set, will
00462   *       lead to unpredictable results.
00463   * @rmtoll CMP          CMP           LL_LPTIM_SetCompare
00464   * @param  LPTIMx Low-Power Timer instance
00465   * @param  CompareValue Value between Min_Data=0x00 and Max_Data=0xFFFF
00466   * @retval None
00467   */
00468 __STATIC_INLINE void LL_LPTIM_SetCompare(LPTIM_TypeDef *LPTIMx, uint32_t CompareValue)
00469 {
00470   MODIFY_REG(LPTIMx->CMP, LPTIM_CMP_CMP, CompareValue);
00471 }
00472 
00473 /**
00474   * @brief  Get actual compare value
00475   * @rmtoll CMP          CMP           LL_LPTIM_GetCompare
00476   * @param  LPTIMx Low-Power Timer instance
00477   * @retval CompareValue Value between Min_Data=0x00 and Max_Data=0xFFFF
00478   */
00479 __STATIC_INLINE uint32_t LL_LPTIM_GetCompare(LPTIM_TypeDef *LPTIMx)
00480 {
00481   return (uint32_t)(READ_BIT(LPTIMx->CMP, LPTIM_CMP_CMP));
00482 }
00483 
00484 /**
00485   * @brief  Get actual counter value
00486   * @note When the LPTIM instance is running with an asynchronous clock, reading
00487   *       the LPTIMx_CNT register may return unreliable values. So in this case
00488   *       it is necessary to perform two consecutive read accesses and verify
00489   *       that the two returned values are identical.
00490   * @rmtoll CNT          CNT           LL_LPTIM_GetCounter
00491   * @param  LPTIMx Low-Power Timer instance
00492   * @retval Counter value
00493   */
00494 __STATIC_INLINE uint32_t LL_LPTIM_GetCounter(LPTIM_TypeDef *LPTIMx)
00495 {
00496   return (uint32_t)(READ_BIT(LPTIMx->CNT, LPTIM_CNT_CNT));
00497 }
00498 
00499 /**
00500   * @brief  Set the counter mode (selection of the LPTIM counter clock source).
00501   * @note The counter mode can be set only when the LPTIM instance is disabled.
00502   * @rmtoll CFGR         COUNTMODE     LL_LPTIM_SetCounterMode
00503   * @param  LPTIMx Low-Power Timer instance
00504   * @param  CounterMode This parameter can be one of the following values:
00505   *         @arg @ref LL_LPTIM_COUNTER_MODE_INTERNAL
00506   *         @arg @ref LL_LPTIM_COUNTER_MODE_EXTERNAL
00507   * @retval None
00508   */
00509 __STATIC_INLINE void LL_LPTIM_SetCounterMode(LPTIM_TypeDef *LPTIMx, uint32_t CounterMode)
00510 {
00511   MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_COUNTMODE, CounterMode);
00512 }
00513 
00514 /**
00515   * @brief  Get the counter mode
00516   * @rmtoll CFGR         COUNTMODE     LL_LPTIM_GetCounterMode
00517   * @param  LPTIMx Low-Power Timer instance
00518   * @retval Returned value can be one of the following values:
00519   *         @arg @ref LL_LPTIM_COUNTER_MODE_INTERNAL
00520   *         @arg @ref LL_LPTIM_COUNTER_MODE_EXTERNAL
00521   */
00522 __STATIC_INLINE uint32_t LL_LPTIM_GetCounterMode(LPTIM_TypeDef *LPTIMx)
00523 {
00524   return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_COUNTMODE));
00525 }
00526 
00527 /**
00528   * @brief  Configure the LPTIM instance output (LPTIMx_OUT)
00529   * @note This function must be called when the LPTIM instance is disabled.
00530   * @note Regarding the LPTIM output polarity the change takes effect
00531   *       immediately, so the output default value will change immediately after
00532   *       the polarity is re-configured, even before the timer is enabled.
00533   * @rmtoll CFGR         WAVE          LL_LPTIM_ConfigOutput\n
00534   *         CFGR         WAVPOL        LL_LPTIM_ConfigOutput
00535   * @param  LPTIMx Low-Power Timer instance
00536   * @param  Waveform This parameter can be one of the following values:
00537   *         @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
00538   *         @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
00539   * @param  Polarity This parameter can be one of the following values:
00540   *         @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
00541   *         @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
00542   * @retval None
00543   */
00544 __STATIC_INLINE void LL_LPTIM_ConfigOutput(LPTIM_TypeDef *LPTIMx, uint32_t Waveform, uint32_t Polarity)
00545 {
00546   MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVE | LPTIM_CFGR_WAVPOL, Waveform | Polarity);
00547 }
00548 
00549 /**
00550   * @brief  Set  waveform shape
00551   * @rmtoll CFGR         WAVE          LL_LPTIM_SetWaveform
00552   * @param  LPTIMx Low-Power Timer instance
00553   * @param  Waveform This parameter can be one of the following values:
00554   *         @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
00555   *         @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
00556   * @retval None
00557   */
00558 __STATIC_INLINE void LL_LPTIM_SetWaveform(LPTIM_TypeDef *LPTIMx, uint32_t Waveform)
00559 {
00560   MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVE, Waveform);
00561 }
00562 
00563 /**
00564   * @brief  Get actual waveform shape
00565   * @rmtoll CFGR         WAVE          LL_LPTIM_GetWaveform
00566   * @param  LPTIMx Low-Power Timer instance
00567   * @retval Returned value can be one of the following values:
00568   *         @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
00569   *         @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
00570   */
00571 __STATIC_INLINE uint32_t LL_LPTIM_GetWaveform(LPTIM_TypeDef *LPTIMx)
00572 {
00573   return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_WAVE));
00574 }
00575 
00576 /**
00577   * @brief  Set  output polarity
00578   * @rmtoll CFGR         WAVPOL        LL_LPTIM_SetPolarity
00579   * @param  LPTIMx Low-Power Timer instance
00580   * @param  Polarity This parameter can be one of the following values:
00581   *         @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
00582   *         @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
00583   * @retval None
00584   */
00585 __STATIC_INLINE void LL_LPTIM_SetPolarity(LPTIM_TypeDef *LPTIMx, uint32_t Polarity)
00586 {
00587   MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVPOL, Polarity);
00588 }
00589 
00590 /**
00591   * @brief  Get actual output polarity
00592   * @rmtoll CFGR         WAVPOL        LL_LPTIM_GetPolarity
00593   * @param  LPTIMx Low-Power Timer instance
00594   * @retval Returned value can be one of the following values:
00595   *         @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
00596   *         @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
00597   */
00598 __STATIC_INLINE uint32_t LL_LPTIM_GetPolarity(LPTIM_TypeDef *LPTIMx)
00599 {
00600   return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_WAVPOL));
00601 }
00602 
00603 /**
00604   * @brief  Set actual prescaler division ratio.
00605   * @note This function must be called when the LPTIM instance is disabled.
00606   * @note When the LPTIM is configured to be clocked by an internal clock source
00607   *       and the LPTIM counter is configured to be updated by active edges
00608   *       detected on the LPTIM external Input1, the internal clock provided to
00609   *       the LPTIM must be not be prescaled.
00610   * @rmtoll CFGR         PRESC         LL_LPTIM_SetPrescaler
00611   * @param  LPTIMx Low-Power Timer instance
00612   * @param  Prescaler This parameter can be one of the following values:
00613   *         @arg @ref LL_LPTIM_PRESCALER_DIV1
00614   *         @arg @ref LL_LPTIM_PRESCALER_DIV2
00615   *         @arg @ref LL_LPTIM_PRESCALER_DIV4
00616   *         @arg @ref LL_LPTIM_PRESCALER_DIV8
00617   *         @arg @ref LL_LPTIM_PRESCALER_DIV16
00618   *         @arg @ref LL_LPTIM_PRESCALER_DIV32
00619   *         @arg @ref LL_LPTIM_PRESCALER_DIV64
00620   *         @arg @ref LL_LPTIM_PRESCALER_DIV128
00621   * @retval None
00622   */
00623 __STATIC_INLINE void LL_LPTIM_SetPrescaler(LPTIM_TypeDef *LPTIMx, uint32_t Prescaler)
00624 {
00625   MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_PRESC, Prescaler);
00626 }
00627 
00628 /**
00629   * @brief  Get actual prescaler division ratio.
00630   * @rmtoll CFGR         PRESC         LL_LPTIM_GetPrescaler
00631   * @param  LPTIMx Low-Power Timer instance
00632   * @retval Returned value can be one of the following values:
00633   *         @arg @ref LL_LPTIM_PRESCALER_DIV1
00634   *         @arg @ref LL_LPTIM_PRESCALER_DIV2
00635   *         @arg @ref LL_LPTIM_PRESCALER_DIV4
00636   *         @arg @ref LL_LPTIM_PRESCALER_DIV8
00637   *         @arg @ref LL_LPTIM_PRESCALER_DIV16
00638   *         @arg @ref LL_LPTIM_PRESCALER_DIV32
00639   *         @arg @ref LL_LPTIM_PRESCALER_DIV64
00640   *         @arg @ref LL_LPTIM_PRESCALER_DIV128
00641   */
00642 __STATIC_INLINE uint32_t LL_LPTIM_GetPrescaler(LPTIM_TypeDef *LPTIMx)
00643 {
00644   return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_PRESC));
00645 }
00646 
00647 /**
00648   * @brief  Set LPTIM input 1 source (default GPIO).
00649   * @rmtoll OR         OR_0         LL_LPTIM_SetInput1Src
00650   * @rmtoll OR         OR_1         LL_LPTIM_SetInput1Src
00651   * @param  LPTIMx Low-Power Timer instance
00652   * @param  Src This parameter can be one of the following values:
00653   *         @arg @ref LL_LPTIM_INPUT1_SRC_GPIO
00654   *         @arg @ref LL_LPTIM_INPUT1_SRC_COMP1
00655   *         @arg @ref LL_LPTIM_INPUT1_SRC_COMP2
00656   *         @arg @ref LL_LPTIM_INPUT1_SRC_COMP1_COMP2
00657   * @retval None
00658   */
00659 __STATIC_INLINE void LL_LPTIM_SetInput1Src(LPTIM_TypeDef *LPTIMx, uint32_t Src)
00660 {
00661   WRITE_REG(LPTIMx->OR, Src);
00662 }
00663 
00664 /**
00665   * @brief  Set LPTIM input 2 source (default GPIO).
00666   * @rmtoll OR         OR_0         LL_LPTIM_SetInput2Src
00667   * @param  LPTIMx Low-Power Timer instance
00668   * @param  Src This parameter can be one of the following values:
00669   *         @arg @ref LL_LPTIM_INPUT2_SRC_GPIO
00670   *         @arg @ref LL_LPTIM_INPUT2_SRC_COMP2
00671   * @retval None
00672   */
00673 __STATIC_INLINE void LL_LPTIM_SetInput2Src(LPTIM_TypeDef *LPTIMx, uint32_t Src)
00674 {
00675   WRITE_REG(LPTIMx->OR, Src);
00676 }
00677 
00678 /**
00679   * @}
00680   */
00681 
00682 /** @defgroup LPTIM_LL_EF_Trigger_Configuration Trigger Configuration
00683   * @{
00684   */
00685 
00686 /**
00687   * @brief  Enable the timeout function
00688   * @note This function must be called when the LPTIM instance is disabled.
00689   * @note The first trigger event will start the timer, any successive trigger
00690   *       event will reset the counter and the timer will restart.
00691   * @note The timeout value corresponds to the compare value; if no trigger
00692   *       occurs within the expected time frame, the MCU is waked-up by the
00693   *       compare match event.
00694   * @rmtoll CFGR         TIMOUT        LL_LPTIM_EnableTimeout
00695   * @param  LPTIMx Low-Power Timer instance
00696   * @retval None
00697   */
00698 __STATIC_INLINE void LL_LPTIM_EnableTimeout(LPTIM_TypeDef *LPTIMx)
00699 {
00700   SET_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT);
00701 }
00702 
00703 /**
00704   * @brief  Disable the timeout function
00705   * @note This function must be called when the LPTIM instance is disabled.
00706   * @note A trigger event arriving when the timer is already started will be
00707   *       ignored.
00708   * @rmtoll CFGR         TIMOUT        LL_LPTIM_DisableTimeout
00709   * @param  LPTIMx Low-Power Timer instance
00710   * @retval None
00711   */
00712 __STATIC_INLINE void LL_LPTIM_DisableTimeout(LPTIM_TypeDef *LPTIMx)
00713 {
00714   CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT);
00715 }
00716 
00717 /**
00718   * @brief  Indicate whether the timeout function is enabled.
00719   * @rmtoll CFGR         TIMOUT        LL_LPTIM_IsEnabledTimeout
00720   * @param  LPTIMx Low-Power Timer instance
00721   * @retval State of bit (1 or 0).
00722   */
00723 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledTimeout(LPTIM_TypeDef *LPTIMx)
00724 {
00725   return (READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT) == (LPTIM_CFGR_TIMOUT));
00726 }
00727 
00728 /**
00729   * @brief  Start the LPTIM counter
00730   * @note This function must be called when the LPTIM instance is disabled.
00731   * @rmtoll CFGR         TRIGEN        LL_LPTIM_TrigSw
00732   * @param  LPTIMx Low-Power Timer instance
00733   * @retval None
00734   */
00735 __STATIC_INLINE void LL_LPTIM_TrigSw(LPTIM_TypeDef *LPTIMx)
00736 {
00737   CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGEN);
00738 }
00739 
00740 /**
00741   * @brief  Configure the external trigger used as a trigger event for the LPTIM.
00742   * @note This function must be called when the LPTIM instance is disabled.
00743   * @note An internal clock source must be present when a digital filter is
00744   *       required for the trigger.
00745   * @rmtoll CFGR         TRIGSEL       LL_LPTIM_ConfigTrigger\n
00746   *         CFGR         TRGFLT        LL_LPTIM_ConfigTrigger\n
00747   *         CFGR         TRIGEN        LL_LPTIM_ConfigTrigger
00748   * @param  LPTIMx Low-Power Timer instance
00749   * @param  Source This parameter can be one of the following values:
00750   *         @arg @ref LL_LPTIM_TRIG_SOURCE_GPIO
00751   *         @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMA
00752   *         @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMB
00753   *         @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP1
00754   *         @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP2
00755   *         @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP3
00756   *         @arg @ref LL_LPTIM_TRIG_SOURCE_COMP1
00757   *         @arg @ref LL_LPTIM_TRIG_SOURCE_COMP2
00758   * @param  Filter This parameter can be one of the following values:
00759   *         @arg @ref LL_LPTIM_TRIG_FILTER_NONE
00760   *         @arg @ref LL_LPTIM_TRIG_FILTER_2
00761   *         @arg @ref LL_LPTIM_TRIG_FILTER_4
00762   *         @arg @ref LL_LPTIM_TRIG_FILTER_8
00763   * @param  Polarity This parameter can be one of the following values:
00764   *         @arg @ref LL_LPTIM_TRIG_POLARITY_RISING
00765   *         @arg @ref LL_LPTIM_TRIG_POLARITY_FALLING
00766   *         @arg @ref LL_LPTIM_TRIG_POLARITY_RISING_FALLING
00767   * @retval None
00768   */
00769 __STATIC_INLINE void LL_LPTIM_ConfigTrigger(LPTIM_TypeDef *LPTIMx, uint32_t Source, uint32_t Filter, uint32_t Polarity)
00770 {
00771   MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_TRIGSEL | LPTIM_CFGR_TRGFLT | LPTIM_CFGR_TRIGEN, Source | Filter | Polarity);
00772 }
00773 
00774 /**
00775   * @brief  Get actual external trigger source.
00776   * @rmtoll CFGR         TRIGSEL       LL_LPTIM_GetTriggerSource
00777   * @param  LPTIMx Low-Power Timer instance
00778   * @retval Returned value can be one of the following values:
00779   *         @arg @ref LL_LPTIM_TRIG_SOURCE_GPIO
00780   *         @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMA
00781   *         @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMB
00782   *         @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP1
00783   *         @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP2
00784   *         @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP3
00785   *         @arg @ref LL_LPTIM_TRIG_SOURCE_COMP1
00786   *         @arg @ref LL_LPTIM_TRIG_SOURCE_COMP2
00787   */
00788 __STATIC_INLINE uint32_t LL_LPTIM_GetTriggerSource(LPTIM_TypeDef *LPTIMx)
00789 {
00790   return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGSEL));
00791 }
00792 
00793 /**
00794   * @brief  Get actual external trigger filter.
00795   * @rmtoll CFGR         TRGFLT        LL_LPTIM_GetTriggerFilter
00796   * @param  LPTIMx Low-Power Timer instance
00797   * @retval Returned value can be one of the following values:
00798   *         @arg @ref LL_LPTIM_TRIG_FILTER_NONE
00799   *         @arg @ref LL_LPTIM_TRIG_FILTER_2
00800   *         @arg @ref LL_LPTIM_TRIG_FILTER_4
00801   *         @arg @ref LL_LPTIM_TRIG_FILTER_8
00802   */
00803 __STATIC_INLINE uint32_t LL_LPTIM_GetTriggerFilter(LPTIM_TypeDef *LPTIMx)
00804 {
00805   return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRGFLT));
00806 }
00807 
00808 /**
00809   * @brief  Get actual external trigger polarity.
00810   * @rmtoll CFGR         TRIGEN        LL_LPTIM_GetTriggerPolarity
00811   * @param  LPTIMx Low-Power Timer instance
00812   * @retval Returned value can be one of the following values:
00813   *         @arg @ref LL_LPTIM_TRIG_POLARITY_RISING
00814   *         @arg @ref LL_LPTIM_TRIG_POLARITY_FALLING
00815   *         @arg @ref LL_LPTIM_TRIG_POLARITY_RISING_FALLING
00816   */
00817 __STATIC_INLINE uint32_t LL_LPTIM_GetTriggerPolarity(LPTIM_TypeDef *LPTIMx)
00818 {
00819   return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGEN));
00820 }
00821 
00822 /**
00823   * @}
00824   */
00825 
00826 /** @defgroup LPTIM_LL_EF_Clock_Configuration Clock Configuration
00827   * @{
00828   */
00829 
00830 /**
00831   * @brief  Set the source of the clock used by the LPTIM instance.
00832   * @note This function must be called when the LPTIM instance is disabled.
00833   * @rmtoll CFGR         CKSEL         LL_LPTIM_SetClockSource
00834   * @param  LPTIMx Low-Power Timer instance
00835   * @param  ClockSource This parameter can be one of the following values:
00836   *         @arg @ref LL_LPTIM_CLK_SOURCE_INTERNAL
00837   *         @arg @ref LL_LPTIM_CLK_SOURCE_EXTERNAL
00838   * @retval None
00839   */
00840 __STATIC_INLINE void LL_LPTIM_SetClockSource(LPTIM_TypeDef *LPTIMx, uint32_t ClockSource)
00841 {
00842   MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKSEL, ClockSource);
00843 }
00844 
00845 /**
00846   * @brief  Get actual LPTIM instance clock source.
00847   * @rmtoll CFGR         CKSEL         LL_LPTIM_GetClockSource
00848   * @param  LPTIMx Low-Power Timer instance
00849   * @retval Returned value can be one of the following values:
00850   *         @arg @ref LL_LPTIM_CLK_SOURCE_INTERNAL
00851   *         @arg @ref LL_LPTIM_CLK_SOURCE_EXTERNAL
00852   */
00853 __STATIC_INLINE uint32_t LL_LPTIM_GetClockSource(LPTIM_TypeDef *LPTIMx)
00854 {
00855   return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKSEL));
00856 }
00857 
00858 /**
00859   * @brief  Configure the active edge or edges used by the counter when the LPTIM is clocked by an external clock source.
00860   * @note This function must be called when the LPTIM instance is disabled.
00861   * @note When both external clock signal edges are considered active ones,
00862   *       the LPTIM must also be clocked by an internal clock source with a
00863   *       frequency equal to at least four times the external clock frequency.
00864   * @note An internal clock source must be present when a digital filter is
00865   *       required for external clock.
00866   * @rmtoll CFGR         CKFLT         LL_LPTIM_ConfigClock\n
00867   *         CFGR         CKPOL         LL_LPTIM_ConfigClock
00868   * @param  LPTIMx Low-Power Timer instance
00869   * @param  ClockFilter This parameter can be one of the following values:
00870   *         @arg @ref LL_LPTIM_CLK_FILTER_NONE
00871   *         @arg @ref LL_LPTIM_CLK_FILTER_2
00872   *         @arg @ref LL_LPTIM_CLK_FILTER_4
00873   *         @arg @ref LL_LPTIM_CLK_FILTER_8
00874   * @param  ClockPolarity This parameter can be one of the following values:
00875   *         @arg @ref LL_LPTIM_CLK_POLARITY_RISING
00876   *         @arg @ref LL_LPTIM_CLK_POLARITY_FALLING
00877   *         @arg @ref LL_LPTIM_CLK_POLARITY_RISING_FALLING
00878   * @retval None
00879   */
00880 __STATIC_INLINE void LL_LPTIM_ConfigClock(LPTIM_TypeDef *LPTIMx, uint32_t ClockFilter, uint32_t ClockPolarity)
00881 {
00882   MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKFLT | LPTIM_CFGR_CKPOL, ClockFilter | ClockPolarity);
00883 }
00884 
00885 /**
00886   * @brief  Get actual clock polarity
00887   * @rmtoll CFGR         CKPOL         LL_LPTIM_GetClockPolarity
00888   * @param  LPTIMx Low-Power Timer instance
00889   * @retval Returned value can be one of the following values:
00890   *         @arg @ref LL_LPTIM_CLK_POLARITY_RISING
00891   *         @arg @ref LL_LPTIM_CLK_POLARITY_FALLING
00892   *         @arg @ref LL_LPTIM_CLK_POLARITY_RISING_FALLING
00893   */
00894 __STATIC_INLINE uint32_t LL_LPTIM_GetClockPolarity(LPTIM_TypeDef *LPTIMx)
00895 {
00896   return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKPOL));
00897 }
00898 
00899 /**
00900   * @brief  Get actual clock digital filter
00901   * @rmtoll CFGR         CKFLT         LL_LPTIM_GetClockFilter
00902   * @param  LPTIMx Low-Power Timer instance
00903   * @retval Returned value can be one of the following values:
00904   *         @arg @ref LL_LPTIM_CLK_FILTER_NONE
00905   *         @arg @ref LL_LPTIM_CLK_FILTER_2
00906   *         @arg @ref LL_LPTIM_CLK_FILTER_4
00907   *         @arg @ref LL_LPTIM_CLK_FILTER_8
00908   */
00909 __STATIC_INLINE uint32_t LL_LPTIM_GetClockFilter(LPTIM_TypeDef *LPTIMx)
00910 {
00911   return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKFLT));
00912 }
00913 
00914 /**
00915   * @}
00916   */
00917 
00918 /** @defgroup LPTIM_LL_EF_Encoder_Mode Encoder Mode
00919   * @{
00920   */
00921 
00922 /**
00923   * @brief  Configure the encoder mode.
00924   * @note This function must be called when the LPTIM instance is disabled.
00925   * @rmtoll CFGR         CKPOL         LL_LPTIM_SetEncoderMode
00926   * @param  LPTIMx Low-Power Timer instance
00927   * @param  EncoderMode This parameter can be one of the following values:
00928   *         @arg @ref LL_LPTIM_ENCODER_MODE_RISING
00929   *         @arg @ref LL_LPTIM_ENCODER_MODE_FALLING
00930   *         @arg @ref LL_LPTIM_ENCODER_MODE_RISING_FALLING
00931   * @retval None
00932   */
00933 __STATIC_INLINE void LL_LPTIM_SetEncoderMode(LPTIM_TypeDef *LPTIMx, uint32_t EncoderMode)
00934 {
00935   MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKPOL, EncoderMode);
00936 }
00937 
00938 /**
00939   * @brief  Get actual encoder mode.
00940   * @rmtoll CFGR         CKPOL         LL_LPTIM_GetEncoderMode
00941   * @param  LPTIMx Low-Power Timer instance
00942   * @retval Returned value can be one of the following values:
00943   *         @arg @ref LL_LPTIM_ENCODER_MODE_RISING
00944   *         @arg @ref LL_LPTIM_ENCODER_MODE_FALLING
00945   *         @arg @ref LL_LPTIM_ENCODER_MODE_RISING_FALLING
00946   */
00947 __STATIC_INLINE uint32_t LL_LPTIM_GetEncoderMode(LPTIM_TypeDef *LPTIMx)
00948 {
00949   return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKPOL));
00950 }
00951 
00952 /**
00953   * @brief  Enable the encoder mode
00954   * @note This function must be called when the LPTIM instance is disabled.
00955   * @note In this mode the LPTIM instance must be clocked by an internal clock
00956   *       source. Also, the prescaler division ratio must be equal to 1.
00957   * @note LPTIM instance must be configured in continuous mode prior enabling
00958   *       the encoder mode.
00959   * @rmtoll CFGR         ENC           LL_LPTIM_EnableEncoderMode
00960   * @param  LPTIMx Low-Power Timer instance
00961   * @retval None
00962   */
00963 __STATIC_INLINE void LL_LPTIM_EnableEncoderMode(LPTIM_TypeDef *LPTIMx)
00964 {
00965   SET_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC);
00966 }
00967 
00968 /**
00969   * @brief  Disable the encoder mode
00970   * @note This function must be called when the LPTIM instance is disabled.
00971   * @rmtoll CFGR         ENC           LL_LPTIM_DisableEncoderMode
00972   * @param  LPTIMx Low-Power Timer instance
00973   * @retval None
00974   */
00975 __STATIC_INLINE void LL_LPTIM_DisableEncoderMode(LPTIM_TypeDef *LPTIMx)
00976 {
00977   CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC);
00978 }
00979 
00980 /**
00981   * @brief  Indicates whether the LPTIM operates in encoder mode.
00982   * @rmtoll CFGR         ENC           LL_LPTIM_IsEnabledEncoderMode
00983   * @param  LPTIMx Low-Power Timer instance
00984   * @retval State of bit (1 or 0).
00985   */
00986 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledEncoderMode(LPTIM_TypeDef *LPTIMx)
00987 {
00988   return (READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC) == (LPTIM_CFGR_ENC));
00989 }
00990 
00991 /**
00992   * @}
00993   */
00994 
00995 /** @defgroup LPTIM_LL_EF_FLAG_Management FLAG Management
00996   * @{
00997   */
00998 
00999 /**
01000   * @brief  Clear the compare match flag (CMPMCF)
01001   * @rmtoll ICR          CMPMCF        LL_LPTIM_ClearFLAG_CMPM
01002   * @param  LPTIMx Low-Power Timer instance
01003   * @retval None
01004   */
01005 __STATIC_INLINE void LL_LPTIM_ClearFLAG_CMPM(LPTIM_TypeDef *LPTIMx)
01006 {
01007   SET_BIT(LPTIMx->ICR, LPTIM_ICR_CMPMCF);
01008 }
01009 
01010 /**
01011   * @brief  Inform application whether a compare match interrupt has occurred.
01012   * @rmtoll ISR          CMPM          LL_LPTIM_IsActiveFlag_CMPM
01013   * @param  LPTIMx Low-Power Timer instance
01014   * @retval State of bit (1 or 0).
01015   */
01016 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_CMPM(LPTIM_TypeDef *LPTIMx)
01017 {
01018   return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_CMPM) == (LPTIM_ISR_CMPM));
01019 }
01020 
01021 /**
01022   * @brief  Clear the autoreload match flag (ARRMCF)
01023   * @rmtoll ICR          ARRMCF        LL_LPTIM_ClearFLAG_ARRM
01024   * @param  LPTIMx Low-Power Timer instance
01025   * @retval None
01026   */
01027 __STATIC_INLINE void LL_LPTIM_ClearFLAG_ARRM(LPTIM_TypeDef *LPTIMx)
01028 {
01029   SET_BIT(LPTIMx->ICR, LPTIM_ICR_ARRMCF);
01030 }
01031 
01032 /**
01033   * @brief  Inform application whether a autoreload match interrupt has occurred.
01034   * @rmtoll ISR          ARRM          LL_LPTIM_IsActiveFlag_ARRM
01035   * @param  LPTIMx Low-Power Timer instance
01036   * @retval State of bit (1 or 0).
01037   */
01038 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_ARRM(LPTIM_TypeDef *LPTIMx)
01039 {
01040   return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_ARRM) == (LPTIM_ISR_ARRM));
01041 }
01042 
01043 /**
01044   * @brief  Clear the external trigger valid edge flag(EXTTRIGCF).
01045   * @rmtoll ICR          EXTTRIGCF     LL_LPTIM_ClearFlag_EXTTRIG
01046   * @param  LPTIMx Low-Power Timer instance
01047   * @retval None
01048   */
01049 __STATIC_INLINE void LL_LPTIM_ClearFlag_EXTTRIG(LPTIM_TypeDef *LPTIMx)
01050 {
01051   SET_BIT(LPTIMx->ICR, LPTIM_ICR_EXTTRIGCF);
01052 }
01053 
01054 /**
01055   * @brief  Inform application whether a valid edge on the selected external trigger input has occurred.
01056   * @rmtoll ISR          EXTTRIG       LL_LPTIM_IsActiveFlag_EXTTRIG
01057   * @param  LPTIMx Low-Power Timer instance
01058   * @retval State of bit (1 or 0).
01059   */
01060 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_EXTTRIG(LPTIM_TypeDef *LPTIMx)
01061 {
01062   return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_EXTTRIG) == (LPTIM_ISR_EXTTRIG));
01063 }
01064 
01065 /**
01066   * @brief  Clear the compare register update interrupt flag (CMPOKCF).
01067   * @rmtoll ICR          CMPOKCF       LL_LPTIM_ClearFlag_CMPOK
01068   * @param  LPTIMx Low-Power Timer instance
01069   * @retval None
01070   */
01071 __STATIC_INLINE void LL_LPTIM_ClearFlag_CMPOK(LPTIM_TypeDef *LPTIMx)
01072 {
01073   SET_BIT(LPTIMx->ICR, LPTIM_ICR_CMPOKCF);
01074 }
01075 
01076 /**
01077   * @brief  Informs application whether the APB bus write operation to the LPTIMx_CMP register has been successfully completed; If so, a new one can be initiated.
01078   * @rmtoll ISR          CMPOK         LL_LPTIM_IsActiveFlag_CMPOK
01079   * @param  LPTIMx Low-Power Timer instance
01080   * @retval State of bit (1 or 0).
01081   */
01082 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_CMPOK(LPTIM_TypeDef *LPTIMx)
01083 {
01084   return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_CMPOK) == (LPTIM_ISR_CMPOK));
01085 }
01086 
01087 /**
01088   * @brief  Clear the autoreload register update interrupt flag (ARROKCF).
01089   * @rmtoll ICR          ARROKCF       LL_LPTIM_ClearFlag_ARROK
01090   * @param  LPTIMx Low-Power Timer instance
01091   * @retval None
01092   */
01093 __STATIC_INLINE void LL_LPTIM_ClearFlag_ARROK(LPTIM_TypeDef *LPTIMx)
01094 {
01095   SET_BIT(LPTIMx->ICR, LPTIM_ICR_ARROKCF);
01096 }
01097 
01098 /**
01099   * @brief  Informs application whether the APB bus write operation to the LPTIMx_ARR register has been successfully completed; If so, a new one can be initiated.
01100   * @rmtoll ISR          ARROK         LL_LPTIM_IsActiveFlag_ARROK
01101   * @param  LPTIMx Low-Power Timer instance
01102   * @retval State of bit (1 or 0).
01103   */
01104 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_ARROK(LPTIM_TypeDef *LPTIMx)
01105 {
01106   return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_ARROK) == (LPTIM_ISR_ARROK));
01107 }
01108 
01109 /**
01110   * @brief  Clear the counter direction change to up interrupt flag (UPCF).
01111   * @rmtoll ICR          UPCF          LL_LPTIM_ClearFlag_UP
01112   * @param  LPTIMx Low-Power Timer instance
01113   * @retval None
01114   */
01115 __STATIC_INLINE void LL_LPTIM_ClearFlag_UP(LPTIM_TypeDef *LPTIMx)
01116 {
01117   SET_BIT(LPTIMx->ICR, LPTIM_ICR_UPCF);
01118 }
01119 
01120 /**
01121   * @brief  Informs the application whether the counter direction has changed from down to up (when the LPTIM instance operates in encoder mode).
01122   * @rmtoll ISR          UP            LL_LPTIM_IsActiveFlag_UP
01123   * @param  LPTIMx Low-Power Timer instance
01124   * @retval State of bit (1 or 0).
01125   */
01126 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_UP(LPTIM_TypeDef *LPTIMx)
01127 {
01128   return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_UP) == (LPTIM_ISR_UP));
01129 }
01130 
01131 /**
01132   * @brief  Clear the counter direction change to down interrupt flag (DOWNCF).
01133   * @rmtoll ICR          DOWNCF        LL_LPTIM_ClearFlag_DOWN
01134   * @param  LPTIMx Low-Power Timer instance
01135   * @retval None
01136   */
01137 __STATIC_INLINE void LL_LPTIM_ClearFlag_DOWN(LPTIM_TypeDef *LPTIMx)
01138 {
01139   SET_BIT(LPTIMx->ICR, LPTIM_ICR_DOWNCF);
01140 }
01141 
01142 /**
01143   * @brief  Informs the application whether the counter direction has changed from up to down (when the LPTIM instance operates in encoder mode).
01144   * @rmtoll ISR          DOWN          LL_LPTIM_IsActiveFlag_DOWN
01145   * @param  LPTIMx Low-Power Timer instance
01146   * @retval State of bit (1 or 0).
01147   */
01148 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_DOWN(LPTIM_TypeDef *LPTIMx)
01149 {
01150   return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_DOWN) == (LPTIM_ISR_DOWN));
01151 }
01152 
01153 /**
01154   * @}
01155   */
01156 
01157 /** @defgroup LPTIM_LL_EF_IT_Management Interrupt Management
01158   * @{
01159   */
01160 
01161 /**
01162   * @brief  Enable compare match interrupt (CMPMIE).
01163   * @rmtoll IER          CMPMIE        LL_LPTIM_EnableIT_CMPM
01164   * @param  LPTIMx Low-Power Timer instance
01165   * @retval None
01166   */
01167 __STATIC_INLINE void LL_LPTIM_EnableIT_CMPM(LPTIM_TypeDef *LPTIMx)
01168 {
01169   SET_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE);
01170 }
01171 
01172 /**
01173   * @brief  Disable compare match interrupt (CMPMIE).
01174   * @rmtoll IER          CMPMIE        LL_LPTIM_DisableIT_CMPM
01175   * @param  LPTIMx Low-Power Timer instance
01176   * @retval None
01177   */
01178 __STATIC_INLINE void LL_LPTIM_DisableIT_CMPM(LPTIM_TypeDef *LPTIMx)
01179 {
01180   CLEAR_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE);
01181 }
01182 
01183 /**
01184   * @brief  Indicates whether the compare match interrupt (CMPMIE) is enabled.
01185   * @rmtoll IER          CMPMIE        LL_LPTIM_IsEnabledIT_CMPM
01186   * @param  LPTIMx Low-Power Timer instance
01187   * @retval State of bit (1 or 0).
01188   */
01189 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_CMPM(LPTIM_TypeDef *LPTIMx)
01190 {
01191   return (READ_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE) == (LPTIM_IER_CMPMIE));
01192 }
01193 
01194 /**
01195   * @brief  Enable autoreload match interrupt (ARRMIE).
01196   * @rmtoll IER          ARRMIE        LL_LPTIM_EnableIT_ARRM
01197   * @param  LPTIMx Low-Power Timer instance
01198   * @retval None
01199   */
01200 __STATIC_INLINE void LL_LPTIM_EnableIT_ARRM(LPTIM_TypeDef *LPTIMx)
01201 {
01202   SET_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE);
01203 }
01204 
01205 /**
01206   * @brief  Disable autoreload match interrupt (ARRMIE).
01207   * @rmtoll IER          ARRMIE        LL_LPTIM_DisableIT_ARRM
01208   * @param  LPTIMx Low-Power Timer instance
01209   * @retval None
01210   */
01211 __STATIC_INLINE void LL_LPTIM_DisableIT_ARRM(LPTIM_TypeDef *LPTIMx)
01212 {
01213   CLEAR_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE);
01214 }
01215 
01216 /**
01217   * @brief  Indicates whether the autoreload match interrupt (ARRMIE) is enabled.
01218   * @rmtoll IER          ARRMIE        LL_LPTIM_IsEnabledIT_ARRM
01219   * @param  LPTIMx Low-Power Timer instance
01220   * @retval State of bit (1 or 0).
01221   */
01222 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_ARRM(LPTIM_TypeDef *LPTIMx)
01223 {
01224   return (READ_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE) == (LPTIM_IER_ARRMIE));
01225 }
01226 
01227 /**
01228   * @brief  Enable external trigger valid edge interrupt (EXTTRIGIE).
01229   * @rmtoll IER          EXTTRIGIE     LL_LPTIM_EnableIT_EXTTRIG
01230   * @param  LPTIMx Low-Power Timer instance
01231   * @retval None
01232   */
01233 __STATIC_INLINE void LL_LPTIM_EnableIT_EXTTRIG(LPTIM_TypeDef *LPTIMx)
01234 {
01235   SET_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE);
01236 }
01237 
01238 /**
01239   * @brief  Disable external trigger valid edge interrupt (EXTTRIGIE).
01240   * @rmtoll IER          EXTTRIGIE     LL_LPTIM_DisableIT_EXTTRIG
01241   * @param  LPTIMx Low-Power Timer instance
01242   * @retval None
01243   */
01244 __STATIC_INLINE void LL_LPTIM_DisableIT_EXTTRIG(LPTIM_TypeDef *LPTIMx)
01245 {
01246   CLEAR_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE);
01247 }
01248 
01249 /**
01250   * @brief  Indicates external trigger valid edge interrupt (EXTTRIGIE) is enabled.
01251   * @rmtoll IER          EXTTRIGIE     LL_LPTIM_IsEnabledIT_EXTTRIG
01252   * @param  LPTIMx Low-Power Timer instance
01253   * @retval State of bit (1 or 0).
01254   */
01255 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_EXTTRIG(LPTIM_TypeDef *LPTIMx)
01256 {
01257   return (READ_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE) == (LPTIM_IER_EXTTRIGIE));
01258 }
01259 
01260 /**
01261   * @brief  Enable compare register write completed interrupt (CMPOKIE).
01262   * @rmtoll IER          CMPOKIE       LL_LPTIM_EnableIT_CMPOK
01263   * @param  LPTIMx Low-Power Timer instance
01264   * @retval None
01265   */
01266 __STATIC_INLINE void LL_LPTIM_EnableIT_CMPOK(LPTIM_TypeDef *LPTIMx)
01267 {
01268   SET_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE);
01269 }
01270 
01271 /**
01272   * @brief  Disable compare register write completed interrupt (CMPOKIE).
01273   * @rmtoll IER          CMPOKIE       LL_LPTIM_DisableIT_CMPOK
01274   * @param  LPTIMx Low-Power Timer instance
01275   * @retval None
01276   */
01277 __STATIC_INLINE void LL_LPTIM_DisableIT_CMPOK(LPTIM_TypeDef *LPTIMx)
01278 {
01279   CLEAR_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE);
01280 }
01281 
01282 /**
01283   * @brief  Indicates whether the compare register write completed interrupt (CMPOKIE) is enabled.
01284   * @rmtoll IER          CMPOKIE       LL_LPTIM_IsEnabledIT_CMPOK
01285   * @param  LPTIMx Low-Power Timer instance
01286   * @retval State of bit (1 or 0).
01287   */
01288 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_CMPOK(LPTIM_TypeDef *LPTIMx)
01289 {
01290   return (READ_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE) == (LPTIM_IER_CMPOKIE));
01291 }
01292 
01293 /**
01294   * @brief  Enable autoreload register write completed interrupt (ARROKIE).
01295   * @rmtoll IER          ARROKIE       LL_LPTIM_EnableIT_ARROK
01296   * @param  LPTIMx Low-Power Timer instance
01297   * @retval None
01298   */
01299 __STATIC_INLINE void LL_LPTIM_EnableIT_ARROK(LPTIM_TypeDef *LPTIMx)
01300 {
01301   SET_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE);
01302 }
01303 
01304 /**
01305   * @brief  Disable autoreload register write completed interrupt (ARROKIE).
01306   * @rmtoll IER          ARROKIE       LL_LPTIM_DisableIT_ARROK
01307   * @param  LPTIMx Low-Power Timer instance
01308   * @retval None
01309   */
01310 __STATIC_INLINE void LL_LPTIM_DisableIT_ARROK(LPTIM_TypeDef *LPTIMx)
01311 {
01312   CLEAR_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE);
01313 }
01314 
01315 /**
01316   * @brief  Indicates whether the autoreload register write completed interrupt (ARROKIE) is enabled.
01317   * @rmtoll IER          ARROKIE       LL_LPTIM_IsEnabledIT_ARROK
01318   * @param  LPTIMx Low-Power Timer instance
01319   * @retval State of bit (1 or 0).
01320   */
01321 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_ARROK(LPTIM_TypeDef *LPTIMx)
01322 {
01323   return (READ_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE) == (LPTIM_IER_ARROKIE));
01324 }
01325 
01326 /**
01327   * @brief  Enable direction change to up interrupt (UPIE).
01328   * @rmtoll IER          UPIE          LL_LPTIM_EnableIT_UP
01329   * @param  LPTIMx Low-Power Timer instance
01330   * @retval None
01331   */
01332 __STATIC_INLINE void LL_LPTIM_EnableIT_UP(LPTIM_TypeDef *LPTIMx)
01333 {
01334   SET_BIT(LPTIMx->IER, LPTIM_IER_UPIE);
01335 }
01336 
01337 /**
01338   * @brief  Disable direction change to up interrupt (UPIE).
01339   * @rmtoll IER          UPIE          LL_LPTIM_DisableIT_UP
01340   * @param  LPTIMx Low-Power Timer instance
01341   * @retval None
01342   */
01343 __STATIC_INLINE void LL_LPTIM_DisableIT_UP(LPTIM_TypeDef *LPTIMx)
01344 {
01345   CLEAR_BIT(LPTIMx->IER, LPTIM_IER_UPIE);
01346 }
01347 
01348 /**
01349   * @brief  Indicates whether the direction change to up interrupt (UPIE) is enabled.
01350   * @rmtoll IER          UPIE          LL_LPTIM_IsEnabledIT_UP
01351   * @param  LPTIMx Low-Power Timer instance
01352   * @retval State of bit (1 or 0).
01353   */
01354 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_UP(LPTIM_TypeDef *LPTIMx)
01355 {
01356   return (READ_BIT(LPTIMx->IER, LPTIM_IER_UPIE) == (LPTIM_IER_UPIE));
01357 }
01358 
01359 /**
01360   * @brief  Enable direction change to down interrupt (DOWNIE).
01361   * @rmtoll IER          DOWNIE        LL_LPTIM_EnableIT_DOWN
01362   * @param  LPTIMx Low-Power Timer instance
01363   * @retval None
01364   */
01365 __STATIC_INLINE void LL_LPTIM_EnableIT_DOWN(LPTIM_TypeDef *LPTIMx)
01366 {
01367   SET_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE);
01368 }
01369 
01370 /**
01371   * @brief  Disable direction change to down interrupt (DOWNIE).
01372   * @rmtoll IER          DOWNIE        LL_LPTIM_DisableIT_DOWN
01373   * @param  LPTIMx Low-Power Timer instance
01374   * @retval None
01375   */
01376 __STATIC_INLINE void LL_LPTIM_DisableIT_DOWN(LPTIM_TypeDef *LPTIMx)
01377 {
01378   CLEAR_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE);
01379 }
01380 
01381 /**
01382   * @brief  Indicates whether the direction change to down interrupt (DOWNIE) is enabled.
01383   * @rmtoll IER          DOWNIE        LL_LPTIM_IsEnabledIT_DOWN
01384   * @param  LPTIMx Low-Power Timer instance
01385   * @retval State of bit (1 or 0).
01386   */
01387 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_DOWN(LPTIM_TypeDef *LPTIMx)
01388 {
01389   return (READ_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE) == (LPTIM_IER_DOWNIE));
01390 }
01391 
01392 /**
01393   * @}
01394   */
01395 
01396 #if defined(USE_FULL_LL_DRIVER)
01397 /** @defgroup LPTIM_LL_EF_Init Initialisation and deinitialisation functions
01398   * @{
01399   */
01400 
01401 ErrorStatus LL_LPTIM_DeInit(LPTIM_TypeDef *LPTIMx);
01402 void LL_LPTIM_StructInit(LL_LPTIM_InitTypeDef *LPTIM_InitStruct);
01403 ErrorStatus LL_LPTIM_Init(LPTIM_TypeDef *LPTIMx, LL_LPTIM_InitTypeDef *LPTIM_InitStruct);
01404 /**
01405   * @}
01406   */
01407 #endif /* USE_FULL_LL_DRIVER */
01408 
01409 /**
01410   * @}
01411   */
01412 
01413 /**
01414   * @}
01415   */
01416 
01417 #endif /* LPTIM1 || LPTIM2 */
01418 
01419 /**
01420   * @}
01421   */
01422 
01423 #ifdef __cplusplus
01424 }
01425 #endif
01426 
01427 #endif /* __STM32L4xx_LL_LPTIM_H */
01428 
01429 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/