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STM32L486xx HAL User Manual
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32l4xx_ll_dma2d.h 00004 * @author MCD Application Team 00005 * @brief Header file of DMA2D LL module. 00006 ****************************************************************************** 00007 * @attention 00008 * 00009 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> 00010 * 00011 * Redistribution and use in source and binary forms, with or without modification, 00012 * are permitted provided that the following conditions are met: 00013 * 1. Redistributions of source code must retain the above copyright notice, 00014 * this list of conditions and the following disclaimer. 00015 * 2. Redistributions in binary form must reproduce the above copyright notice, 00016 * this list of conditions and the following disclaimer in the documentation 00017 * and/or other materials provided with the distribution. 00018 * 3. Neither the name of STMicroelectronics nor the names of its contributors 00019 * may be used to endorse or promote products derived from this software 00020 * without specific prior written permission. 00021 * 00022 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 00023 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 00024 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 00025 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 00026 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 00027 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 00028 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00029 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 00030 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 00031 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00032 * 00033 ****************************************************************************** 00034 */ 00035 00036 /* Define to prevent recursive inclusion -------------------------------------*/ 00037 #ifndef STM32L4xx_LL_DMA2D_H 00038 #define STM32L4xx_LL_DMA2D_H 00039 00040 #ifdef __cplusplus 00041 extern "C" { 00042 #endif 00043 00044 /* Includes ------------------------------------------------------------------*/ 00045 #include "stm32l4xx.h" 00046 00047 /** @addtogroup STM32L4xx_LL_Driver 00048 * @{ 00049 */ 00050 00051 #if defined (DMA2D) 00052 00053 /** @defgroup DMA2D_LL DMA2D 00054 * @{ 00055 */ 00056 00057 /* Private types -------------------------------------------------------------*/ 00058 /* Private variables ---------------------------------------------------------*/ 00059 /* Private constants ---------------------------------------------------------*/ 00060 /* Private macros ------------------------------------------------------------*/ 00061 #if defined(USE_FULL_LL_DRIVER) 00062 /** @defgroup DMA2D_LL_Private_Macros DMA2D Private Macros 00063 * @{ 00064 */ 00065 00066 /** 00067 * @} 00068 */ 00069 #endif /*USE_FULL_LL_DRIVER*/ 00070 00071 /* Exported types ------------------------------------------------------------*/ 00072 #if defined(USE_FULL_LL_DRIVER) 00073 /** @defgroup DMA2D_LL_ES_Init_Struct DMA2D Exported Init structures 00074 * @{ 00075 */ 00076 00077 /** 00078 * @brief LL DMA2D Init Structure Definition 00079 */ 00080 typedef struct 00081 { 00082 uint32_t Mode; /*!< Specifies the DMA2D transfer mode. 00083 - This parameter can be one value of @ref DMA2D_LL_EC_MODE. 00084 00085 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetMode().*/ 00086 00087 uint32_t ColorMode; /*!< Specifies the color format of the output image. 00088 - This parameter can be one value of @ref DMA2D_LL_EC_OUTPUT_COLOR_MODE. 00089 00090 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColorMode(). */ 00091 00092 uint32_t OutputBlue; /*!< Specifies the Blue value of the output image. 00093 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected. 00094 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected. 00095 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected. 00096 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected. 00097 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected. 00098 00099 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration 00100 function @ref LL_DMA2D_ConfigOutputColor(). */ 00101 00102 uint32_t OutputGreen; /*!< Specifies the Green value of the output image. 00103 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected. 00104 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected. 00105 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x3F if RGB565 color mode is selected. 00106 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected. 00107 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected. 00108 00109 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration 00110 function @ref LL_DMA2D_ConfigOutputColor(). */ 00111 00112 uint32_t OutputRed; /*!< Specifies the Red value of the output image. 00113 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected. 00114 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected. 00115 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected. 00116 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected. 00117 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected. 00118 00119 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration 00120 function @ref LL_DMA2D_ConfigOutputColor(). */ 00121 00122 uint32_t OutputAlpha; /*!< Specifies the Alpha channel of the output image. 00123 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected. 00124 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x01 if ARGB1555 color mode is selected. 00125 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected. 00126 - This parameter is not considered if RGB888 or RGB565 color mode is selected. 00127 00128 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration 00129 function @ref LL_DMA2D_ConfigOutputColor(). */ 00130 00131 uint32_t OutputMemoryAddress; /*!< Specifies the memory address. 00132 - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF. 00133 00134 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputMemAddr(). */ 00135 00136 #if defined(DMA2D_OUTPUT_TWO_BY_TWO_SWAP_SUPPORT) 00137 uint32_t OutputSwapMode; /*!< Specifies the output swap mode color format of the output image. 00138 - This parameter can be one value of @ref DMA2D_LL_EC_OUTPUT_SWAP_MODE. 00139 00140 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputSwapMode(). */ 00141 #endif /* DMA2D_OUTPUT_TWO_BY_TWO_SWAP_SUPPORT */ 00142 00143 #if defined(DMA2D_LINE_OFFSET_MODE_SUPPORT) 00144 uint32_t LineOffsetMode; /*!< Specifies the output line offset mode. 00145 - This parameter can be one value of @ref DMA2D_LL_EC_LINE_OFFSET_MODE. 00146 00147 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetLineOffsetMode(). */ 00148 #endif /* DMA2D_LINE_OFFSET_MODE_SUPPORT */ 00149 00150 uint32_t LineOffset; /*!< Specifies the output line offset value. 00151 - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF on devices 00152 where the Line Offset Mode feature is available. 00153 else between Min_Data = 0x0000 and Max_Data = 0xFFFF on other devices. 00154 00155 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetLineOffset(). */ 00156 00157 uint32_t NbrOfLines; /*!< Specifies the number of lines of the area to be transferred. 00158 - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. 00159 00160 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetNbrOfLines(). */ 00161 00162 uint32_t NbrOfPixelsPerLines; /*!< Specifies the number of pixels per lines of the area to be transfered. 00163 - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF. 00164 00165 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetNbrOfPixelsPerLines(). */ 00166 00167 uint32_t AlphaInversionMode; /*!< Specifies the output alpha inversion mode. 00168 - This parameter can be one value of @ref DMA2D_LL_EC_ALPHA_INVERSION. 00169 00170 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputAlphaInvMode(). */ 00171 00172 uint32_t RBSwapMode; /*!< Specifies the output Red Blue swap mode. 00173 - This parameter can be one value of @ref DMA2D_LL_EC_RED_BLUE_SWAP. 00174 00175 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputRBSwapMode(). */ 00176 00177 } LL_DMA2D_InitTypeDef; 00178 00179 /** 00180 * @brief LL DMA2D Layer Configuration Structure Definition 00181 */ 00182 typedef struct 00183 { 00184 uint32_t MemoryAddress; /*!< Specifies the foreground or background memory address. 00185 - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF. 00186 00187 This parameter can be modified afterwards using unitary functions 00188 - @ref LL_DMA2D_FGND_SetMemAddr() for foreground layer, 00189 - @ref LL_DMA2D_BGND_SetMemAddr() for background layer. */ 00190 00191 uint32_t LineOffset; /*!< Specifies the foreground or background line offset value. 00192 - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF. 00193 00194 This parameter can be modified afterwards using unitary functions 00195 - @ref LL_DMA2D_FGND_SetLineOffset() for foreground layer, 00196 - @ref LL_DMA2D_BGND_SetLineOffset() for background layer. */ 00197 00198 uint32_t ColorMode; /*!< Specifies the foreground or background color mode. 00199 - This parameter can be one value of @ref DMA2D_LL_EC_INPUT_COLOR_MODE. 00200 00201 This parameter can be modified afterwards using unitary functions 00202 - @ref LL_DMA2D_FGND_SetColorMode() for foreground layer, 00203 - @ref LL_DMA2D_BGND_SetColorMode() for background layer. */ 00204 00205 uint32_t CLUTColorMode; /*!< Specifies the foreground or background CLUT color mode. 00206 - This parameter can be one value of @ref DMA2D_LL_EC_CLUT_COLOR_MODE. 00207 00208 This parameter can be modified afterwards using unitary functions 00209 - @ref LL_DMA2D_FGND_SetCLUTColorMode() for foreground layer, 00210 - @ref LL_DMA2D_BGND_SetCLUTColorMode() for background layer. */ 00211 00212 uint32_t CLUTSize; /*!< Specifies the foreground or background CLUT size. 00213 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. 00214 00215 This parameter can be modified afterwards using unitary functions 00216 - @ref LL_DMA2D_FGND_SetCLUTSize() for foreground layer, 00217 - @ref LL_DMA2D_BGND_SetCLUTSize() for background layer. */ 00218 00219 uint32_t AlphaMode; /*!< Specifies the foreground or background alpha mode. 00220 - This parameter can be one value of @ref DMA2D_LL_EC_ALPHA_MODE. 00221 00222 This parameter can be modified afterwards using unitary functions 00223 - @ref LL_DMA2D_FGND_SetAlphaMode() for foreground layer, 00224 - @ref LL_DMA2D_BGND_SetAlphaMode() for background layer. */ 00225 00226 uint32_t Alpha; /*!< Specifies the foreground or background Alpha value. 00227 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. 00228 00229 This parameter can be modified afterwards using unitary functions 00230 - @ref LL_DMA2D_FGND_SetAlpha() for foreground layer, 00231 - @ref LL_DMA2D_BGND_SetAlpha() for background layer. */ 00232 00233 uint32_t Blue; /*!< Specifies the foreground or background Blue color value. 00234 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. 00235 00236 This parameter can be modified afterwards using unitary functions 00237 - @ref LL_DMA2D_FGND_SetBlueColor() for foreground layer, 00238 - @ref LL_DMA2D_BGND_SetBlueColor() for background layer. */ 00239 00240 uint32_t Green; /*!< Specifies the foreground or background Green color value. 00241 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. 00242 00243 This parameter can be modified afterwards using unitary functions 00244 - @ref LL_DMA2D_FGND_SetGreenColor() for foreground layer, 00245 - @ref LL_DMA2D_BGND_SetGreenColor() for background layer. */ 00246 00247 uint32_t Red; /*!< Specifies the foreground or background Red color value. 00248 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. 00249 00250 This parameter can be modified afterwards using unitary functions 00251 - @ref LL_DMA2D_FGND_SetRedColor() for foreground layer, 00252 - @ref LL_DMA2D_BGND_SetRedColor() for background layer. */ 00253 00254 uint32_t CLUTMemoryAddress; /*!< Specifies the foreground or background CLUT memory address. 00255 - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF. 00256 00257 This parameter can be modified afterwards using unitary functions 00258 - @ref LL_DMA2D_FGND_SetCLUTMemAddr() for foreground layer, 00259 - @ref LL_DMA2D_BGND_SetCLUTMemAddr() for background layer. */ 00260 00261 uint32_t AlphaInversionMode; /*!< Specifies the foreground or background alpha inversion mode. 00262 - This parameter can be one value of @ref DMA2D_LL_EC_ALPHA_INVERSION. 00263 00264 This parameter can be modified afterwards using unitary functions 00265 - @ref LL_DMA2D_FGND_SetAlphaInvMode() for foreground layer, 00266 - @ref LL_DMA2D_BGND_SetAlphaInvMode() for background layer. */ 00267 00268 uint32_t RBSwapMode; /*!< Specifies the foreground or background Red Blue swap mode. 00269 This parameter can be one value of @ref DMA2D_LL_EC_RED_BLUE_SWAP . 00270 00271 This parameter can be modified afterwards using unitary functions 00272 - @ref LL_DMA2D_FGND_SetRBSwapMode() for foreground layer, 00273 - @ref LL_DMA2D_BGND_SetRBSwapMode() for background layer. */ 00274 00275 00276 } LL_DMA2D_LayerCfgTypeDef; 00277 00278 /** 00279 * @brief LL DMA2D Output Color Structure Definition 00280 */ 00281 typedef struct 00282 { 00283 uint32_t ColorMode; /*!< Specifies the color format of the output image. 00284 - This parameter can be one value of @ref DMA2D_LL_EC_OUTPUT_COLOR_MODE. 00285 00286 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColorMode(). */ 00287 00288 uint32_t OutputBlue; /*!< Specifies the Blue value of the output image. 00289 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected. 00290 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected. 00291 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected. 00292 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected. 00293 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected. 00294 00295 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration 00296 function @ref LL_DMA2D_ConfigOutputColor(). */ 00297 00298 uint32_t OutputGreen; /*!< Specifies the Green value of the output image. 00299 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected. 00300 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected. 00301 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x3F if RGB565 color mode is selected. 00302 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected. 00303 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected. 00304 00305 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration 00306 function @ref LL_DMA2D_ConfigOutputColor(). */ 00307 00308 uint32_t OutputRed; /*!< Specifies the Red value of the output image. 00309 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected. 00310 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected. 00311 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected. 00312 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected. 00313 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected. 00314 00315 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration 00316 function @ref LL_DMA2D_ConfigOutputColor(). */ 00317 00318 uint32_t OutputAlpha; /*!< Specifies the Alpha channel of the output image. 00319 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected. 00320 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x01 if ARGB1555 color mode is selected. 00321 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected. 00322 - This parameter is not considered if RGB888 or RGB565 color mode is selected. 00323 00324 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration 00325 function @ref LL_DMA2D_ConfigOutputColor(). */ 00326 00327 } LL_DMA2D_ColorTypeDef; 00328 00329 /** 00330 * @} 00331 */ 00332 #endif /* USE_FULL_LL_DRIVER */ 00333 00334 /* Exported constants --------------------------------------------------------*/ 00335 /** @defgroup DMA2D_LL_Exported_Constants DMA2D Exported Constants 00336 * @{ 00337 */ 00338 00339 /** @defgroup DMA2D_LL_EC_GET_FLAG Get Flags Defines 00340 * @brief Flags defines which can be used with LL_DMA2D_ReadReg function 00341 * @{ 00342 */ 00343 #define LL_DMA2D_FLAG_CEIF DMA2D_ISR_CEIF /*!< Configuration Error Interrupt Flag */ 00344 #define LL_DMA2D_FLAG_CTCIF DMA2D_ISR_CTCIF /*!< CLUT Transfer Complete Interrupt Flag */ 00345 #define LL_DMA2D_FLAG_CAEIF DMA2D_ISR_CAEIF /*!< CLUT Access Error Interrupt Flag */ 00346 #define LL_DMA2D_FLAG_TWIF DMA2D_ISR_TWIF /*!< Transfer Watermark Interrupt Flag */ 00347 #define LL_DMA2D_FLAG_TCIF DMA2D_ISR_TCIF /*!< Transfer Complete Interrupt Flag */ 00348 #define LL_DMA2D_FLAG_TEIF DMA2D_ISR_TEIF /*!< Transfer Error Interrupt Flag */ 00349 /** 00350 * @} 00351 */ 00352 00353 /** @defgroup DMA2D_LL_EC_IT IT Defines 00354 * @brief IT defines which can be used with LL_DMA2D_ReadReg and LL_DMA2D_WriteReg functions 00355 * @{ 00356 */ 00357 #define LL_DMA2D_IT_CEIE DMA2D_CR_CEIE /*!< Configuration Error Interrupt */ 00358 #define LL_DMA2D_IT_CTCIE DMA2D_CR_CTCIE /*!< CLUT Transfer Complete Interrupt */ 00359 #define LL_DMA2D_IT_CAEIE DMA2D_CR_CAEIE /*!< CLUT Access Error Interrupt */ 00360 #define LL_DMA2D_IT_TWIE DMA2D_CR_TWIE /*!< Transfer Watermark Interrupt */ 00361 #define LL_DMA2D_IT_TCIE DMA2D_CR_TCIE /*!< Transfer Complete Interrupt */ 00362 #define LL_DMA2D_IT_TEIE DMA2D_CR_TEIE /*!< Transfer Error Interrupt */ 00363 /** 00364 * @} 00365 */ 00366 00367 /** @defgroup DMA2D_LL_EC_MODE Mode 00368 * @{ 00369 */ 00370 #define LL_DMA2D_MODE_M2M 0x00000000U /*!< DMA2D memory to memory transfer mode */ 00371 #define LL_DMA2D_MODE_M2M_PFC DMA2D_CR_MODE_0 /*!< DMA2D memory to memory with pixel format conversion transfer mode */ 00372 #define LL_DMA2D_MODE_M2M_BLEND DMA2D_CR_MODE_1 /*!< DMA2D memory to memory with blending transfer mode */ 00373 #define LL_DMA2D_MODE_R2M (DMA2D_CR_MODE_0|DMA2D_CR_MODE_1) /*!< DMA2D register to memory transfer mode */ 00374 #if defined(DMA2D_M2M_BLEND_FIXED_COLOR_FG_BG_SUPPORT) 00375 #define LL_DMA2D_MODE_M2M_BLEND_FIXED_COLOR_FG DMA2D_CR_MODE_2 /*!< DMA2D memory to memory with blending transfer mode and fixed color foreground */ 00376 #define LL_DMA2D_MODE_M2M_BLEND_FIXED_COLOR_BG (DMA2D_CR_MODE_0|DMA2D_CR_MODE_2) /*!< DMA2D memory to memory with blending transfer mode and fixed color background */ 00377 #endif /* DMA2D_M2M_BLEND_FIXED_COLOR_FG_BG_SUPPORT */ 00378 /** 00379 * @} 00380 */ 00381 00382 /** @defgroup DMA2D_LL_EC_OUTPUT_COLOR_MODE Output Color Mode 00383 * @{ 00384 */ 00385 #define LL_DMA2D_OUTPUT_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */ 00386 #define LL_DMA2D_OUTPUT_MODE_RGB888 DMA2D_OPFCCR_CM_0 /*!< RGB888 */ 00387 #define LL_DMA2D_OUTPUT_MODE_RGB565 DMA2D_OPFCCR_CM_1 /*!< RGB565 */ 00388 #define LL_DMA2D_OUTPUT_MODE_ARGB1555 (DMA2D_OPFCCR_CM_0|DMA2D_OPFCCR_CM_1) /*!< ARGB1555 */ 00389 #define LL_DMA2D_OUTPUT_MODE_ARGB4444 DMA2D_OPFCCR_CM_2 /*!< ARGB4444 */ 00390 /** 00391 * @} 00392 */ 00393 00394 /** @defgroup DMA2D_LL_EC_INPUT_COLOR_MODE Input Color Mode 00395 * @{ 00396 */ 00397 #define LL_DMA2D_INPUT_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */ 00398 #define LL_DMA2D_INPUT_MODE_RGB888 DMA2D_FGPFCCR_CM_0 /*!< RGB888 */ 00399 #define LL_DMA2D_INPUT_MODE_RGB565 DMA2D_FGPFCCR_CM_1 /*!< RGB565 */ 00400 #define LL_DMA2D_INPUT_MODE_ARGB1555 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_1) /*!< ARGB1555 */ 00401 #define LL_DMA2D_INPUT_MODE_ARGB4444 DMA2D_FGPFCCR_CM_2 /*!< ARGB4444 */ 00402 #define LL_DMA2D_INPUT_MODE_L8 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_2) /*!< L8 */ 00403 #define LL_DMA2D_INPUT_MODE_AL44 (DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_2) /*!< AL44 */ 00404 #define LL_DMA2D_INPUT_MODE_AL88 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_2) /*!< AL88 */ 00405 #define LL_DMA2D_INPUT_MODE_L4 DMA2D_FGPFCCR_CM_3 /*!< L4 */ 00406 #define LL_DMA2D_INPUT_MODE_A8 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_3) /*!< A8 */ 00407 #define LL_DMA2D_INPUT_MODE_A4 (DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_3) /*!< A4 */ 00408 /** 00409 * @} 00410 */ 00411 00412 /** @defgroup DMA2D_LL_EC_ALPHA_MODE Alpha Mode 00413 * @{ 00414 */ 00415 #define LL_DMA2D_ALPHA_MODE_NO_MODIF 0x00000000U /*!< No modification of the alpha channel value */ 00416 #define LL_DMA2D_ALPHA_MODE_REPLACE DMA2D_FGPFCCR_AM_0 /*!< Replace original alpha channel value by programmed alpha value */ 00417 #define LL_DMA2D_ALPHA_MODE_COMBINE DMA2D_FGPFCCR_AM_1 /*!< Replace original alpha channel value by programmed alpha value 00418 with original alpha channel value */ 00419 /** 00420 * @} 00421 */ 00422 00423 #if defined(DMA2D_OUTPUT_TWO_BY_TWO_SWAP_SUPPORT) 00424 /** @defgroup DMA2D_LL_EC_OUTPUT_SWAP_MODE Swap Mode 00425 * @{ 00426 */ 00427 #define LL_DMA2D_SWAP_MODE_REGULAR 0x00000000U /*!< Regular order */ 00428 #define LL_DMA2D_SWAP_MODE_TWO_BY_TWO DMA2D_OPFCCR_SB /*!< Bytes swapped two by two */ 00429 /** 00430 * @} 00431 */ 00432 #endif /* DMA2D_OUTPUT_TWO_BY_TWO_SWAP_SUPPORT */ 00433 00434 /** @defgroup DMA2D_LL_EC_RED_BLUE_SWAP Red Blue Swap 00435 * @{ 00436 */ 00437 #define LL_DMA2D_RB_MODE_REGULAR 0x00000000U /*!< RGB or ARGB */ 00438 #define LL_DMA2D_RB_MODE_SWAP DMA2D_FGPFCCR_RBS /*!< BGR or ABGR */ 00439 /** 00440 * @} 00441 */ 00442 00443 /** @defgroup DMA2D_LL_EC_ALPHA_INVERSION Alpha Inversion 00444 * @{ 00445 */ 00446 #define LL_DMA2D_ALPHA_REGULAR 0x00000000U /*!< Regular alpha */ 00447 #define LL_DMA2D_ALPHA_INVERTED DMA2D_FGPFCCR_AI /*!< Inverted alpha */ 00448 /** 00449 * @} 00450 */ 00451 00452 00453 #if defined(DMA2D_LINE_OFFSET_MODE_SUPPORT) 00454 /** @defgroup DMA2D_LL_EC_LINE_OFFSET_MODE Line Offset Mode 00455 * @{ 00456 */ 00457 #define LL_DMA2D_LINE_OFFSET_PIXELS 0x00000000U /*!< Line offsets are expressed in pixels */ 00458 #define LL_DMA2D_LINE_OFFSET_BYTES DMA2D_CR_LOM /*!< Line offsets are expressed in bytes */ 00459 /** 00460 * @} 00461 */ 00462 #endif /* DMA2D_LINE_OFFSET_MODE_SUPPORT */ 00463 00464 /** @defgroup DMA2D_LL_EC_CLUT_COLOR_MODE CLUT Color Mode 00465 * @{ 00466 */ 00467 #define LL_DMA2D_CLUT_COLOR_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */ 00468 #define LL_DMA2D_CLUT_COLOR_MODE_RGB888 DMA2D_FGPFCCR_CCM /*!< RGB888 */ 00469 /** 00470 * @} 00471 */ 00472 00473 00474 /** 00475 * @} 00476 */ 00477 00478 /* Exported macro ------------------------------------------------------------*/ 00479 /** @defgroup DMA2D_LL_Exported_Macros DMA2D Exported Macros 00480 * @{ 00481 */ 00482 00483 /** @defgroup DMA2D_LL_EM_WRITE_READ Common Write and read registers Macros 00484 * @{ 00485 */ 00486 00487 /** 00488 * @brief Write a value in DMA2D register. 00489 * @param __INSTANCE__ DMA2D Instance 00490 * @param __REG__ Register to be written 00491 * @param __VALUE__ Value to be written in the register 00492 * @retval None 00493 */ 00494 #define LL_DMA2D_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG((__INSTANCE__)->__REG__, (__VALUE__)) 00495 00496 /** 00497 * @brief Read a value in DMA2D register. 00498 * @param __INSTANCE__ DMA2D Instance 00499 * @param __REG__ Register to be read 00500 * @retval Register value 00501 */ 00502 #define LL_DMA2D_ReadReg(__INSTANCE__, __REG__) READ_REG((__INSTANCE__)->__REG__) 00503 /** 00504 * @} 00505 */ 00506 00507 /** 00508 * @} 00509 */ 00510 00511 /* Exported functions --------------------------------------------------------*/ 00512 /** @defgroup DMA2D_LL_Exported_Functions DMA2D Exported Functions 00513 * @{ 00514 */ 00515 00516 /** @defgroup DMA2D_LL_EF_Configuration Configuration Functions 00517 * @{ 00518 */ 00519 00520 /** 00521 * @brief Start a DMA2D transfer. 00522 * @rmtoll CR START LL_DMA2D_Start 00523 * @param DMA2Dx DMA2D Instance 00524 * @retval None 00525 */ 00526 __STATIC_INLINE void LL_DMA2D_Start(DMA2D_TypeDef *DMA2Dx) 00527 { 00528 SET_BIT(DMA2Dx->CR, DMA2D_CR_START); 00529 } 00530 00531 /** 00532 * @brief Indicate if a DMA2D transfer is ongoing. 00533 * @rmtoll CR START LL_DMA2D_IsTransferOngoing 00534 * @param DMA2Dx DMA2D Instance 00535 * @retval State of bit (1 or 0). 00536 */ 00537 __STATIC_INLINE uint32_t LL_DMA2D_IsTransferOngoing(DMA2D_TypeDef *DMA2Dx) 00538 { 00539 return (uint32_t)(READ_BIT(DMA2Dx->CR, DMA2D_CR_START) == (DMA2D_CR_START)); 00540 } 00541 00542 /** 00543 * @brief Suspend DMA2D transfer. 00544 * @note This API can be used to suspend automatic foreground or background CLUT loading. 00545 * @rmtoll CR SUSP LL_DMA2D_Suspend 00546 * @param DMA2Dx DMA2D Instance 00547 * @retval None 00548 */ 00549 __STATIC_INLINE void LL_DMA2D_Suspend(DMA2D_TypeDef *DMA2Dx) 00550 { 00551 MODIFY_REG(DMA2Dx->CR, DMA2D_CR_SUSP | DMA2D_CR_START, DMA2D_CR_SUSP); 00552 } 00553 00554 /** 00555 * @brief Resume DMA2D transfer. 00556 * @note This API can be used to resume automatic foreground or background CLUT loading. 00557 * @rmtoll CR SUSP LL_DMA2D_Resume 00558 * @param DMA2Dx DMA2D Instance 00559 * @retval None 00560 */ 00561 __STATIC_INLINE void LL_DMA2D_Resume(DMA2D_TypeDef *DMA2Dx) 00562 { 00563 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_SUSP | DMA2D_CR_START); 00564 } 00565 00566 /** 00567 * @brief Indicate if DMA2D transfer is suspended. 00568 * @note This API can be used to indicate whether or not automatic foreground or 00569 * background CLUT loading is suspended. 00570 * @rmtoll CR SUSP LL_DMA2D_IsSuspended 00571 * @param DMA2Dx DMA2D Instance 00572 * @retval State of bit (1 or 0). 00573 */ 00574 __STATIC_INLINE uint32_t LL_DMA2D_IsSuspended(DMA2D_TypeDef *DMA2Dx) 00575 { 00576 return (uint32_t)(READ_BIT(DMA2Dx->CR, DMA2D_CR_SUSP) == (DMA2D_CR_SUSP)); 00577 } 00578 00579 /** 00580 * @brief Abort DMA2D transfer. 00581 * @note This API can be used to abort automatic foreground or background CLUT loading. 00582 * @rmtoll CR ABORT LL_DMA2D_Abort 00583 * @param DMA2Dx DMA2D Instance 00584 * @retval None 00585 */ 00586 __STATIC_INLINE void LL_DMA2D_Abort(DMA2D_TypeDef *DMA2Dx) 00587 { 00588 MODIFY_REG(DMA2Dx->CR, DMA2D_CR_ABORT | DMA2D_CR_START, DMA2D_CR_ABORT); 00589 } 00590 00591 /** 00592 * @brief Indicate if DMA2D transfer is aborted. 00593 * @note This API can be used to indicate whether or not automatic foreground or 00594 * background CLUT loading is aborted. 00595 * @rmtoll CR ABORT LL_DMA2D_IsAborted 00596 * @param DMA2Dx DMA2D Instance 00597 * @retval State of bit (1 or 0). 00598 */ 00599 __STATIC_INLINE uint32_t LL_DMA2D_IsAborted(DMA2D_TypeDef *DMA2Dx) 00600 { 00601 return (uint32_t)(READ_BIT(DMA2Dx->CR, DMA2D_CR_ABORT) == (DMA2D_CR_ABORT)); 00602 } 00603 00604 /** 00605 * @brief Set DMA2D mode. 00606 * @rmtoll CR MODE LL_DMA2D_SetMode 00607 * @param DMA2Dx DMA2D Instance 00608 * @param Mode This parameter can be one of the following values: 00609 * @arg @ref LL_DMA2D_MODE_M2M 00610 * @arg @ref LL_DMA2D_MODE_M2M_PFC 00611 * @arg @ref LL_DMA2D_MODE_M2M_BLEND 00612 * @arg @ref LL_DMA2D_MODE_R2M 00613 * @arg @ref LL_DMA2D_MODE_M2M_BLEND_FIXED_COLOR_FG (*) 00614 * @arg @ref LL_DMA2D_MODE_M2M_BLEND_FIXED_COLOR_BG (*) 00615 * 00616 * (*) value not defined in all devices. 00617 * @retval None 00618 */ 00619 __STATIC_INLINE void LL_DMA2D_SetMode(DMA2D_TypeDef *DMA2Dx, uint32_t Mode) 00620 { 00621 MODIFY_REG(DMA2Dx->CR, DMA2D_CR_MODE, Mode); 00622 } 00623 00624 /** 00625 * @brief Return DMA2D mode 00626 * @rmtoll CR MODE LL_DMA2D_GetMode 00627 * @param DMA2Dx DMA2D Instance 00628 * @retval Returned value can be one of the following values: 00629 * @arg @ref LL_DMA2D_MODE_M2M 00630 * @arg @ref LL_DMA2D_MODE_M2M_PFC 00631 * @arg @ref LL_DMA2D_MODE_M2M_BLEND 00632 * @arg @ref LL_DMA2D_MODE_R2M 00633 * @arg @ref LL_DMA2D_MODE_M2M_BLEND_FIXED_COLOR_FG (*) 00634 * @arg @ref LL_DMA2D_MODE_M2M_BLEND_FIXED_COLOR_BG (*) 00635 * 00636 * (*) value not defined in all devices. 00637 */ 00638 __STATIC_INLINE uint32_t LL_DMA2D_GetMode(DMA2D_TypeDef *DMA2Dx) 00639 { 00640 return (uint32_t)(READ_BIT(DMA2Dx->CR, DMA2D_CR_MODE)); 00641 } 00642 00643 /** 00644 * @brief Set DMA2D output color mode. 00645 * @rmtoll OPFCCR CM LL_DMA2D_SetOutputColorMode 00646 * @param DMA2Dx DMA2D Instance 00647 * @param ColorMode This parameter can be one of the following values: 00648 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB8888 00649 * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB888 00650 * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB565 00651 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB1555 00652 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444 00653 * @retval None 00654 */ 00655 __STATIC_INLINE void LL_DMA2D_SetOutputColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode) 00656 { 00657 MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_CM, ColorMode); 00658 } 00659 00660 /** 00661 * @brief Return DMA2D output color mode. 00662 * @rmtoll OPFCCR CM LL_DMA2D_GetOutputColorMode 00663 * @param DMA2Dx DMA2D Instance 00664 * @retval Returned value can be one of the following values: 00665 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB8888 00666 * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB888 00667 * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB565 00668 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB1555 00669 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444 00670 */ 00671 __STATIC_INLINE uint32_t LL_DMA2D_GetOutputColorMode(DMA2D_TypeDef *DMA2Dx) 00672 { 00673 return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_CM)); 00674 } 00675 00676 /** 00677 * @brief Set DMA2D output Red Blue swap mode. 00678 * @rmtoll OPFCCR RBS LL_DMA2D_SetOutputRBSwapMode 00679 * @param DMA2Dx DMA2D Instance 00680 * @param RBSwapMode This parameter can be one of the following values: 00681 * @arg @ref LL_DMA2D_RB_MODE_REGULAR 00682 * @arg @ref LL_DMA2D_RB_MODE_SWAP 00683 * @retval None 00684 */ 00685 __STATIC_INLINE void LL_DMA2D_SetOutputRBSwapMode(DMA2D_TypeDef *DMA2Dx, uint32_t RBSwapMode) 00686 { 00687 MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_RBS, RBSwapMode); 00688 } 00689 00690 /** 00691 * @brief Return DMA2D output Red Blue swap mode. 00692 * @rmtoll OPFCCR RBS LL_DMA2D_GetOutputRBSwapMode 00693 * @param DMA2Dx DMA2D Instance 00694 * @retval Returned value can be one of the following values: 00695 * @arg @ref LL_DMA2D_RB_MODE_REGULAR 00696 * @arg @ref LL_DMA2D_RB_MODE_SWAP 00697 */ 00698 __STATIC_INLINE uint32_t LL_DMA2D_GetOutputRBSwapMode(DMA2D_TypeDef *DMA2Dx) 00699 { 00700 return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_RBS)); 00701 } 00702 00703 /** 00704 * @brief Set DMA2D output alpha inversion mode. 00705 * @rmtoll OPFCCR AI LL_DMA2D_SetOutputAlphaInvMode 00706 * @param DMA2Dx DMA2D Instance 00707 * @param AlphaInversionMode This parameter can be one of the following values: 00708 * @arg @ref LL_DMA2D_ALPHA_REGULAR 00709 * @arg @ref LL_DMA2D_ALPHA_INVERTED 00710 * @retval None 00711 */ 00712 __STATIC_INLINE void LL_DMA2D_SetOutputAlphaInvMode(DMA2D_TypeDef *DMA2Dx, uint32_t AlphaInversionMode) 00713 { 00714 MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_AI, AlphaInversionMode); 00715 } 00716 00717 /** 00718 * @brief Return DMA2D output alpha inversion mode. 00719 * @rmtoll OPFCCR AI LL_DMA2D_GetOutputAlphaInvMode 00720 * @param DMA2Dx DMA2D Instance 00721 * @retval Returned value can be one of the following values: 00722 * @arg @ref LL_DMA2D_ALPHA_REGULAR 00723 * @arg @ref LL_DMA2D_ALPHA_INVERTED 00724 */ 00725 __STATIC_INLINE uint32_t LL_DMA2D_GetOutputAlphaInvMode(DMA2D_TypeDef *DMA2Dx) 00726 { 00727 return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_AI)); 00728 } 00729 00730 00731 #if defined(DMA2D_OUTPUT_TWO_BY_TWO_SWAP_SUPPORT) 00732 /** 00733 * @brief Set DMA2D output swap mode. 00734 * @rmtoll OPFCCR SB LL_DMA2D_SetOutputSwapMode 00735 * @param DMA2Dx DMA2D Instance 00736 * @param OutputSwapMode This parameter can be one of the following values: 00737 * @arg @ref LL_DMA2D_SWAP_MODE_REGULAR 00738 * @arg @ref LL_DMA2D_SWAP_MODE_TWO_BY_TWO 00739 * @retval None 00740 */ 00741 __STATIC_INLINE void LL_DMA2D_SetOutputSwapMode(DMA2D_TypeDef *DMA2Dx, uint32_t OutputSwapMode) 00742 { 00743 MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_SB, OutputSwapMode); 00744 } 00745 00746 /** 00747 * @brief Return DMA2D output swap mode. 00748 * @rmtoll OPFCCR SB LL_DMA2D_GetOutputSwapMode 00749 * @param DMA2Dx DMA2D Instance 00750 * @retval Returned value can be one of the following values: 00751 * @arg @ref LL_DMA2D_SWAP_MODE_REGULAR 00752 * @arg @ref LL_DMA2D_SWAP_MODE_TWO_BY_TWO 00753 */ 00754 __STATIC_INLINE uint32_t LL_DMA2D_GetOutputSwapMode(DMA2D_TypeDef *DMA2Dx) 00755 { 00756 return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_SB)); 00757 } 00758 #endif /* DMA2D_OUTPUT_TWO_BY_TWO_SWAP_SUPPORT */ 00759 00760 #if defined(DMA2D_LINE_OFFSET_MODE_SUPPORT) 00761 /** 00762 * @brief Set DMA2D line offset mode. 00763 * @rmtoll CR LOM LL_DMA2D_SetLineOffsetMode 00764 * @param DMA2Dx DMA2D Instance 00765 * @param LineOffsetMode This parameter can be one of the following values: 00766 * @arg @ref LL_DMA2D_LINE_OFFSET_PIXELS 00767 * @arg @ref LL_DMA2D_LINE_OFFSET_BYTES 00768 * @retval None 00769 */ 00770 __STATIC_INLINE void LL_DMA2D_SetLineOffsetMode(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffsetMode) 00771 { 00772 MODIFY_REG(DMA2Dx->CR, DMA2D_CR_LOM, LineOffsetMode); 00773 } 00774 00775 /** 00776 * @brief Return DMA2D line offset mode. 00777 * @rmtoll CR LOM LL_DMA2D_GetLineOffsetMode 00778 * @param DMA2Dx DMA2D Instance 00779 * @retval Returned value can be one of the following values: 00780 * @arg @ref LL_DMA2D_LINE_OFFSET_PIXELS 00781 * @arg @ref LL_DMA2D_LINE_OFFSET_BYTES 00782 */ 00783 __STATIC_INLINE uint32_t LL_DMA2D_GetLineOffsetMode(DMA2D_TypeDef *DMA2Dx) 00784 { 00785 return (uint32_t)(READ_BIT(DMA2Dx->CR, DMA2D_CR_LOM)); 00786 } 00787 #endif /* DMA2D_LINE_OFFSET_MODE_SUPPORT */ 00788 00789 /** 00790 * @brief Set DMA2D line offset, expressed on 14 bits ([13:0] bits). 00791 * @rmtoll OOR LO LL_DMA2D_SetLineOffset 00792 * @param DMA2Dx DMA2D Instance 00793 @if DMA2D_LINE_OFFSET_MODE_SUPPORT 00794 * @param LineOffset Value between Min_Data=0 and Max_Data=0xFFFF 00795 @else 00796 * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FFF 00797 @endif 00798 * @retval None 00799 */ 00800 __STATIC_INLINE void LL_DMA2D_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset) 00801 { 00802 MODIFY_REG(DMA2Dx->OOR, DMA2D_OOR_LO, LineOffset); 00803 } 00804 00805 /** 00806 * @brief Return DMA2D line offset, expressed on 14 bits ([13:0] bits). 00807 * @rmtoll OOR LO LL_DMA2D_GetLineOffset 00808 * @param DMA2Dx DMA2D Instance 00809 @if DMA2D_LINE_OFFSET_MODE_SUPPORT 00810 * @retval Line offset value between Min_Data=0 and Max_Data=0xFFFF 00811 @else 00812 * @retval Line offset value between Min_Data=0 and Max_Data=0x3FFF 00813 @endif 00814 */ 00815 __STATIC_INLINE uint32_t LL_DMA2D_GetLineOffset(DMA2D_TypeDef *DMA2Dx) 00816 { 00817 return (uint32_t)(READ_BIT(DMA2Dx->OOR, DMA2D_OOR_LO)); 00818 } 00819 00820 /** 00821 * @brief Set DMA2D number of pixels per lines, expressed on 14 bits ([13:0] bits). 00822 * @rmtoll NLR PL LL_DMA2D_SetNbrOfPixelsPerLines 00823 * @param DMA2Dx DMA2D Instance 00824 * @param NbrOfPixelsPerLines Value between Min_Data=0 and Max_Data=0x3FFF 00825 * @retval None 00826 */ 00827 __STATIC_INLINE void LL_DMA2D_SetNbrOfPixelsPerLines(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfPixelsPerLines) 00828 { 00829 MODIFY_REG(DMA2Dx->NLR, DMA2D_NLR_PL, (NbrOfPixelsPerLines << DMA2D_NLR_PL_Pos)); 00830 } 00831 00832 /** 00833 * @brief Return DMA2D number of pixels per lines, expressed on 14 bits ([13:0] bits) 00834 * @rmtoll NLR PL LL_DMA2D_GetNbrOfPixelsPerLines 00835 * @param DMA2Dx DMA2D Instance 00836 * @retval Number of pixels per lines value between Min_Data=0 and Max_Data=0x3FFF 00837 */ 00838 __STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfPixelsPerLines(DMA2D_TypeDef *DMA2Dx) 00839 { 00840 return (uint32_t)(READ_BIT(DMA2Dx->NLR, DMA2D_NLR_PL) >> DMA2D_NLR_PL_Pos); 00841 } 00842 00843 /** 00844 * @brief Set DMA2D number of lines, expressed on 16 bits ([15:0] bits). 00845 * @rmtoll NLR NL LL_DMA2D_SetNbrOfLines 00846 * @param DMA2Dx DMA2D Instance 00847 * @param NbrOfLines Value between Min_Data=0 and Max_Data=0xFFFF 00848 * @retval None 00849 */ 00850 __STATIC_INLINE void LL_DMA2D_SetNbrOfLines(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines) 00851 { 00852 MODIFY_REG(DMA2Dx->NLR, DMA2D_NLR_NL, NbrOfLines); 00853 } 00854 00855 /** 00856 * @brief Return DMA2D number of lines, expressed on 16 bits ([15:0] bits). 00857 * @rmtoll NLR NL LL_DMA2D_GetNbrOfLines 00858 * @param DMA2Dx DMA2D Instance 00859 * @retval Number of lines value between Min_Data=0 and Max_Data=0xFFFF 00860 */ 00861 __STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfLines(DMA2D_TypeDef *DMA2Dx) 00862 { 00863 return (uint32_t)(READ_BIT(DMA2Dx->NLR, DMA2D_NLR_NL)); 00864 } 00865 00866 /** 00867 * @brief Set DMA2D output memory address, expressed on 32 bits ([31:0] bits). 00868 * @rmtoll OMAR MA LL_DMA2D_SetOutputMemAddr 00869 * @param DMA2Dx DMA2D Instance 00870 * @param OutputMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF 00871 * @retval None 00872 */ 00873 __STATIC_INLINE void LL_DMA2D_SetOutputMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t OutputMemoryAddress) 00874 { 00875 LL_DMA2D_WriteReg(DMA2Dx, OMAR, OutputMemoryAddress); 00876 } 00877 00878 /** 00879 * @brief Get DMA2D output memory address, expressed on 32 bits ([31:0] bits). 00880 * @rmtoll OMAR MA LL_DMA2D_GetOutputMemAddr 00881 * @param DMA2Dx DMA2D Instance 00882 * @retval Output memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF 00883 */ 00884 __STATIC_INLINE uint32_t LL_DMA2D_GetOutputMemAddr(DMA2D_TypeDef *DMA2Dx) 00885 { 00886 return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, OMAR)); 00887 } 00888 00889 /** 00890 * @brief Set DMA2D output color, expressed on 32 bits ([31:0] bits). 00891 * @note Output color format depends on output color mode, ARGB8888, RGB888, 00892 * RGB565, ARGB1555 or ARGB4444. 00893 * @note LL_DMA2D_ConfigOutputColor() API may be used instead if colors values formatting 00894 * with respect to color mode is not done by the user code. 00895 * @rmtoll OCOLR BLUE LL_DMA2D_SetOutputColor\n 00896 * OCOLR GREEN LL_DMA2D_SetOutputColor\n 00897 * OCOLR RED LL_DMA2D_SetOutputColor\n 00898 * OCOLR ALPHA LL_DMA2D_SetOutputColor 00899 * @param DMA2Dx DMA2D Instance 00900 * @param OutputColor Value between Min_Data=0 and Max_Data=0xFFFFFFFF 00901 * @retval None 00902 */ 00903 __STATIC_INLINE void LL_DMA2D_SetOutputColor(DMA2D_TypeDef *DMA2Dx, uint32_t OutputColor) 00904 { 00905 MODIFY_REG(DMA2Dx->OCOLR, (DMA2D_OCOLR_BLUE_1 | DMA2D_OCOLR_GREEN_1 | DMA2D_OCOLR_RED_1 | DMA2D_OCOLR_ALPHA_1), \ 00906 OutputColor); 00907 } 00908 00909 /** 00910 * @brief Get DMA2D output color, expressed on 32 bits ([31:0] bits). 00911 * @note Alpha channel and red, green, blue color values must be retrieved from the returned 00912 * value based on the output color mode (ARGB8888, RGB888, RGB565, ARGB1555 or ARGB4444) 00913 * as set by @ref LL_DMA2D_SetOutputColorMode. 00914 * @rmtoll OCOLR BLUE LL_DMA2D_GetOutputColor\n 00915 * OCOLR GREEN LL_DMA2D_GetOutputColor\n 00916 * OCOLR RED LL_DMA2D_GetOutputColor\n 00917 * OCOLR ALPHA LL_DMA2D_GetOutputColor 00918 * @param DMA2Dx DMA2D Instance 00919 * @retval Output color value between Min_Data=0 and Max_Data=0xFFFFFFFF 00920 */ 00921 __STATIC_INLINE uint32_t LL_DMA2D_GetOutputColor(DMA2D_TypeDef *DMA2Dx) 00922 { 00923 return (uint32_t)(READ_BIT(DMA2Dx->OCOLR, \ 00924 (DMA2D_OCOLR_BLUE_1 | DMA2D_OCOLR_GREEN_1 | DMA2D_OCOLR_RED_1 | DMA2D_OCOLR_ALPHA_1))); 00925 } 00926 00927 /** 00928 * @brief Set DMA2D line watermark, expressed on 16 bits ([15:0] bits). 00929 * @rmtoll LWR LW LL_DMA2D_SetLineWatermark 00930 * @param DMA2Dx DMA2D Instance 00931 * @param LineWatermark Value between Min_Data=0 and Max_Data=0xFFFF 00932 * @retval None 00933 */ 00934 __STATIC_INLINE void LL_DMA2D_SetLineWatermark(DMA2D_TypeDef *DMA2Dx, uint32_t LineWatermark) 00935 { 00936 MODIFY_REG(DMA2Dx->LWR, DMA2D_LWR_LW, LineWatermark); 00937 } 00938 00939 /** 00940 * @brief Return DMA2D line watermark, expressed on 16 bits ([15:0] bits). 00941 * @rmtoll LWR LW LL_DMA2D_GetLineWatermark 00942 * @param DMA2Dx DMA2D Instance 00943 * @retval Line watermark value between Min_Data=0 and Max_Data=0xFFFF 00944 */ 00945 __STATIC_INLINE uint32_t LL_DMA2D_GetLineWatermark(DMA2D_TypeDef *DMA2Dx) 00946 { 00947 return (uint32_t)(READ_BIT(DMA2Dx->LWR, DMA2D_LWR_LW)); 00948 } 00949 00950 /** 00951 * @brief Set DMA2D dead time, expressed on 8 bits ([7:0] bits). 00952 * @rmtoll AMTCR DT LL_DMA2D_SetDeadTime 00953 * @param DMA2Dx DMA2D Instance 00954 * @param DeadTime Value between Min_Data=0 and Max_Data=0xFF 00955 * @retval None 00956 */ 00957 __STATIC_INLINE void LL_DMA2D_SetDeadTime(DMA2D_TypeDef *DMA2Dx, uint32_t DeadTime) 00958 { 00959 MODIFY_REG(DMA2Dx->AMTCR, DMA2D_AMTCR_DT, (DeadTime << DMA2D_AMTCR_DT_Pos)); 00960 } 00961 00962 /** 00963 * @brief Return DMA2D dead time, expressed on 8 bits ([7:0] bits). 00964 * @rmtoll AMTCR DT LL_DMA2D_GetDeadTime 00965 * @param DMA2Dx DMA2D Instance 00966 * @retval Dead time value between Min_Data=0 and Max_Data=0xFF 00967 */ 00968 __STATIC_INLINE uint32_t LL_DMA2D_GetDeadTime(DMA2D_TypeDef *DMA2Dx) 00969 { 00970 return (uint32_t)(READ_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_DT) >> DMA2D_AMTCR_DT_Pos); 00971 } 00972 00973 /** 00974 * @brief Enable DMA2D dead time functionality. 00975 * @rmtoll AMTCR EN LL_DMA2D_EnableDeadTime 00976 * @param DMA2Dx DMA2D Instance 00977 * @retval None 00978 */ 00979 __STATIC_INLINE void LL_DMA2D_EnableDeadTime(DMA2D_TypeDef *DMA2Dx) 00980 { 00981 SET_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN); 00982 } 00983 00984 /** 00985 * @brief Disable DMA2D dead time functionality. 00986 * @rmtoll AMTCR EN LL_DMA2D_DisableDeadTime 00987 * @param DMA2Dx DMA2D Instance 00988 * @retval None 00989 */ 00990 __STATIC_INLINE void LL_DMA2D_DisableDeadTime(DMA2D_TypeDef *DMA2Dx) 00991 { 00992 CLEAR_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN); 00993 } 00994 00995 /** 00996 * @brief Indicate if DMA2D dead time functionality is enabled. 00997 * @rmtoll AMTCR EN LL_DMA2D_IsEnabledDeadTime 00998 * @param DMA2Dx DMA2D Instance 00999 * @retval State of bit (1 or 0). 01000 */ 01001 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledDeadTime(DMA2D_TypeDef *DMA2Dx) 01002 { 01003 return (uint32_t)(READ_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN) == (DMA2D_AMTCR_EN)); 01004 } 01005 01006 /** @defgroup DMA2D_LL_EF_FGND_Configuration Foreground Configuration Functions 01007 * @{ 01008 */ 01009 01010 /** 01011 * @brief Set DMA2D foreground memory address, expressed on 32 bits ([31:0] bits). 01012 * @rmtoll FGMAR MA LL_DMA2D_FGND_SetMemAddr 01013 * @param DMA2Dx DMA2D Instance 01014 * @param MemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF 01015 * @retval None 01016 */ 01017 __STATIC_INLINE void LL_DMA2D_FGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t MemoryAddress) 01018 { 01019 LL_DMA2D_WriteReg(DMA2Dx, FGMAR, MemoryAddress); 01020 } 01021 01022 /** 01023 * @brief Get DMA2D foreground memory address, expressed on 32 bits ([31:0] bits). 01024 * @rmtoll FGMAR MA LL_DMA2D_FGND_GetMemAddr 01025 * @param DMA2Dx DMA2D Instance 01026 * @retval Foreground memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF 01027 */ 01028 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetMemAddr(DMA2D_TypeDef *DMA2Dx) 01029 { 01030 return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGMAR)); 01031 } 01032 01033 /** 01034 * @brief Enable DMA2D foreground CLUT loading. 01035 * @rmtoll FGPFCCR START LL_DMA2D_FGND_EnableCLUTLoad 01036 * @param DMA2Dx DMA2D Instance 01037 * @retval None 01038 */ 01039 __STATIC_INLINE void LL_DMA2D_FGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx) 01040 { 01041 SET_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START); 01042 } 01043 01044 /** 01045 * @brief Indicate if DMA2D foreground CLUT loading is enabled. 01046 * @rmtoll FGPFCCR START LL_DMA2D_FGND_IsEnabledCLUTLoad 01047 * @param DMA2Dx DMA2D Instance 01048 * @retval State of bit (1 or 0). 01049 */ 01050 __STATIC_INLINE uint32_t LL_DMA2D_FGND_IsEnabledCLUTLoad(DMA2D_TypeDef *DMA2Dx) 01051 { 01052 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START) == (DMA2D_FGPFCCR_START)); 01053 } 01054 01055 /** 01056 * @brief Set DMA2D foreground color mode. 01057 * @rmtoll FGPFCCR CM LL_DMA2D_FGND_SetColorMode 01058 * @param DMA2Dx DMA2D Instance 01059 * @param ColorMode This parameter can be one of the following values: 01060 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888 01061 * @arg @ref LL_DMA2D_INPUT_MODE_RGB888 01062 * @arg @ref LL_DMA2D_INPUT_MODE_RGB565 01063 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555 01064 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444 01065 * @arg @ref LL_DMA2D_INPUT_MODE_L8 01066 * @arg @ref LL_DMA2D_INPUT_MODE_AL44 01067 * @arg @ref LL_DMA2D_INPUT_MODE_AL88 01068 * @arg @ref LL_DMA2D_INPUT_MODE_L4 01069 * @arg @ref LL_DMA2D_INPUT_MODE_A8 01070 * @arg @ref LL_DMA2D_INPUT_MODE_A4 01071 * @retval None 01072 */ 01073 __STATIC_INLINE void LL_DMA2D_FGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode) 01074 { 01075 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM, ColorMode); 01076 } 01077 01078 /** 01079 * @brief Return DMA2D foreground color mode. 01080 * @rmtoll FGPFCCR CM LL_DMA2D_FGND_GetColorMode 01081 * @param DMA2Dx DMA2D Instance 01082 * @retval Returned value can be one of the following values: 01083 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888 01084 * @arg @ref LL_DMA2D_INPUT_MODE_RGB888 01085 * @arg @ref LL_DMA2D_INPUT_MODE_RGB565 01086 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555 01087 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444 01088 * @arg @ref LL_DMA2D_INPUT_MODE_L8 01089 * @arg @ref LL_DMA2D_INPUT_MODE_AL44 01090 * @arg @ref LL_DMA2D_INPUT_MODE_AL88 01091 * @arg @ref LL_DMA2D_INPUT_MODE_L4 01092 * @arg @ref LL_DMA2D_INPUT_MODE_A8 01093 * @arg @ref LL_DMA2D_INPUT_MODE_A4 01094 */ 01095 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetColorMode(DMA2D_TypeDef *DMA2Dx) 01096 { 01097 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM)); 01098 } 01099 01100 /** 01101 * @brief Set DMA2D foreground alpha mode. 01102 * @rmtoll FGPFCCR AM LL_DMA2D_FGND_SetAlphaMode 01103 * @param DMA2Dx DMA2D Instance 01104 * @param AphaMode This parameter can be one of the following values: 01105 * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF 01106 * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE 01107 * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE 01108 * @retval None 01109 */ 01110 __STATIC_INLINE void LL_DMA2D_FGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t AphaMode) 01111 { 01112 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM, AphaMode); 01113 } 01114 01115 /** 01116 * @brief Return DMA2D foreground alpha mode. 01117 * @rmtoll FGPFCCR AM LL_DMA2D_FGND_GetAlphaMode 01118 * @param DMA2Dx DMA2D Instance 01119 * @retval Returned value can be one of the following values: 01120 * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF 01121 * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE 01122 * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE 01123 */ 01124 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlphaMode(DMA2D_TypeDef *DMA2Dx) 01125 { 01126 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM)); 01127 } 01128 01129 /** 01130 * @brief Set DMA2D foreground alpha value, expressed on 8 bits ([7:0] bits). 01131 * @rmtoll FGPFCCR ALPHA LL_DMA2D_FGND_SetAlpha 01132 * @param DMA2Dx DMA2D Instance 01133 * @param Alpha Value between Min_Data=0 and Max_Data=0xFF 01134 * @retval None 01135 */ 01136 __STATIC_INLINE void LL_DMA2D_FGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alpha) 01137 { 01138 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA, (Alpha << DMA2D_FGPFCCR_ALPHA_Pos)); 01139 } 01140 01141 /** 01142 * @brief Return DMA2D foreground alpha value, expressed on 8 bits ([7:0] bits). 01143 * @rmtoll FGPFCCR ALPHA LL_DMA2D_FGND_GetAlpha 01144 * @param DMA2Dx DMA2D Instance 01145 * @retval Alpha value between Min_Data=0 and Max_Data=0xFF 01146 */ 01147 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlpha(DMA2D_TypeDef *DMA2Dx) 01148 { 01149 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA) >> DMA2D_FGPFCCR_ALPHA_Pos); 01150 } 01151 01152 /** 01153 * @brief Set DMA2D foreground Red Blue swap mode. 01154 * @rmtoll FGPFCCR RBS LL_DMA2D_FGND_SetRBSwapMode 01155 * @param DMA2Dx DMA2D Instance 01156 * @param RBSwapMode This parameter can be one of the following values: 01157 * @arg @ref LL_DMA2D_RB_MODE_REGULAR 01158 * @arg @ref LL_DMA2D_RB_MODE_SWAP 01159 * @retval None 01160 */ 01161 __STATIC_INLINE void LL_DMA2D_FGND_SetRBSwapMode(DMA2D_TypeDef *DMA2Dx, uint32_t RBSwapMode) 01162 { 01163 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_RBS, RBSwapMode); 01164 } 01165 01166 /** 01167 * @brief Return DMA2D foreground Red Blue swap mode. 01168 * @rmtoll FGPFCCR RBS LL_DMA2D_FGND_GetRBSwapMode 01169 * @param DMA2Dx DMA2D Instance 01170 * @retval Returned value can be one of the following values: 01171 * @arg @ref LL_DMA2D_RB_MODE_REGULAR 01172 * @arg @ref LL_DMA2D_RB_MODE_SWAP 01173 */ 01174 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetRBSwapMode(DMA2D_TypeDef *DMA2Dx) 01175 { 01176 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_RBS)); 01177 } 01178 01179 /** 01180 * @brief Set DMA2D foreground alpha inversion mode. 01181 * @rmtoll FGPFCCR AI LL_DMA2D_FGND_SetAlphaInvMode 01182 * @param DMA2Dx DMA2D Instance 01183 * @param AlphaInversionMode This parameter can be one of the following values: 01184 * @arg @ref LL_DMA2D_ALPHA_REGULAR 01185 * @arg @ref LL_DMA2D_ALPHA_INVERTED 01186 * @retval None 01187 */ 01188 __STATIC_INLINE void LL_DMA2D_FGND_SetAlphaInvMode(DMA2D_TypeDef *DMA2Dx, uint32_t AlphaInversionMode) 01189 { 01190 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AI, AlphaInversionMode); 01191 } 01192 01193 /** 01194 * @brief Return DMA2D foreground alpha inversion mode. 01195 * @rmtoll FGPFCCR AI LL_DMA2D_FGND_GetAlphaInvMode 01196 * @param DMA2Dx DMA2D Instance 01197 * @retval Returned value can be one of the following values: 01198 * @arg @ref LL_DMA2D_ALPHA_REGULAR 01199 * @arg @ref LL_DMA2D_ALPHA_INVERTED 01200 */ 01201 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlphaInvMode(DMA2D_TypeDef *DMA2Dx) 01202 { 01203 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AI)); 01204 } 01205 01206 /** 01207 * @brief Set DMA2D foreground line offset, expressed on 14 bits ([13:0] bits). 01208 * @rmtoll FGOR LO LL_DMA2D_FGND_SetLineOffset 01209 * @param DMA2Dx DMA2D Instance 01210 * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FF 01211 * @retval None 01212 */ 01213 __STATIC_INLINE void LL_DMA2D_FGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset) 01214 { 01215 MODIFY_REG(DMA2Dx->FGOR, DMA2D_FGOR_LO, LineOffset); 01216 } 01217 01218 /** 01219 * @brief Return DMA2D foreground line offset, expressed on 14 bits ([13:0] bits). 01220 * @rmtoll FGOR LO LL_DMA2D_FGND_GetLineOffset 01221 * @param DMA2Dx DMA2D Instance 01222 * @retval Foreground line offset value between Min_Data=0 and Max_Data=0x3FF 01223 */ 01224 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetLineOffset(DMA2D_TypeDef *DMA2Dx) 01225 { 01226 return (uint32_t)(READ_BIT(DMA2Dx->FGOR, DMA2D_FGOR_LO)); 01227 } 01228 01229 /** 01230 * @brief Set DMA2D foreground color values, expressed on 24 bits ([23:0] bits). 01231 * @rmtoll FGCOLR RED LL_DMA2D_FGND_SetColor 01232 * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_SetColor 01233 * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_SetColor 01234 * @param DMA2Dx DMA2D Instance 01235 * @param Red Value between Min_Data=0 and Max_Data=0xFF 01236 * @param Green Value between Min_Data=0 and Max_Data=0xFF 01237 * @param Blue Value between Min_Data=0 and Max_Data=0xFF 01238 * @retval None 01239 */ 01240 __STATIC_INLINE void LL_DMA2D_FGND_SetColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red, uint32_t Green, uint32_t Blue) 01241 { 01242 MODIFY_REG(DMA2Dx->FGCOLR, (DMA2D_FGCOLR_RED | DMA2D_FGCOLR_GREEN | DMA2D_FGCOLR_BLUE), \ 01243 ((Red << DMA2D_FGCOLR_RED_Pos) | (Green << DMA2D_FGCOLR_GREEN_Pos) | Blue)); 01244 } 01245 01246 /** 01247 * @brief Set DMA2D foreground red color value, expressed on 8 bits ([7:0] bits). 01248 * @rmtoll FGCOLR RED LL_DMA2D_FGND_SetRedColor 01249 * @param DMA2Dx DMA2D Instance 01250 * @param Red Value between Min_Data=0 and Max_Data=0xFF 01251 * @retval None 01252 */ 01253 __STATIC_INLINE void LL_DMA2D_FGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red) 01254 { 01255 MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_RED, (Red << DMA2D_FGCOLR_RED_Pos)); 01256 } 01257 01258 /** 01259 * @brief Return DMA2D foreground red color value, expressed on 8 bits ([7:0] bits). 01260 * @rmtoll FGCOLR RED LL_DMA2D_FGND_GetRedColor 01261 * @param DMA2Dx DMA2D Instance 01262 * @retval Red color value between Min_Data=0 and Max_Data=0xFF 01263 */ 01264 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetRedColor(DMA2D_TypeDef *DMA2Dx) 01265 { 01266 return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_RED) >> DMA2D_FGCOLR_RED_Pos); 01267 } 01268 01269 /** 01270 * @brief Set DMA2D foreground green color value, expressed on 8 bits ([7:0] bits). 01271 * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_SetGreenColor 01272 * @param DMA2Dx DMA2D Instance 01273 * @param Green Value between Min_Data=0 and Max_Data=0xFF 01274 * @retval None 01275 */ 01276 __STATIC_INLINE void LL_DMA2D_FGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t Green) 01277 { 01278 MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_GREEN, (Green << DMA2D_FGCOLR_GREEN_Pos)); 01279 } 01280 01281 /** 01282 * @brief Return DMA2D foreground green color value, expressed on 8 bits ([7:0] bits). 01283 * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_GetGreenColor 01284 * @param DMA2Dx DMA2D Instance 01285 * @retval Green color value between Min_Data=0 and Max_Data=0xFF 01286 */ 01287 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetGreenColor(DMA2D_TypeDef *DMA2Dx) 01288 { 01289 return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_GREEN) >> DMA2D_FGCOLR_GREEN_Pos); 01290 } 01291 01292 /** 01293 * @brief Set DMA2D foreground blue color value, expressed on 8 bits ([7:0] bits). 01294 * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_SetBlueColor 01295 * @param DMA2Dx DMA2D Instance 01296 * @param Blue Value between Min_Data=0 and Max_Data=0xFF 01297 * @retval None 01298 */ 01299 __STATIC_INLINE void LL_DMA2D_FGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t Blue) 01300 { 01301 MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_BLUE, Blue); 01302 } 01303 01304 /** 01305 * @brief Return DMA2D foreground blue color value, expressed on 8 bits ([7:0] bits). 01306 * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_GetBlueColor 01307 * @param DMA2Dx DMA2D Instance 01308 * @retval Blue color value between Min_Data=0 and Max_Data=0xFF 01309 */ 01310 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetBlueColor(DMA2D_TypeDef *DMA2Dx) 01311 { 01312 return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_BLUE)); 01313 } 01314 01315 /** 01316 * @brief Set DMA2D foreground CLUT memory address, expressed on 32 bits ([31:0] bits). 01317 * @rmtoll FGCMAR MA LL_DMA2D_FGND_SetCLUTMemAddr 01318 * @param DMA2Dx DMA2D Instance 01319 * @param CLUTMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF 01320 * @retval None 01321 */ 01322 __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTMemoryAddress) 01323 { 01324 LL_DMA2D_WriteReg(DMA2Dx, FGCMAR, CLUTMemoryAddress); 01325 } 01326 01327 /** 01328 * @brief Get DMA2D foreground CLUT memory address, expressed on 32 bits ([31:0] bits). 01329 * @rmtoll FGCMAR MA LL_DMA2D_FGND_GetCLUTMemAddr 01330 * @param DMA2Dx DMA2D Instance 01331 * @retval Foreground CLUT memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF 01332 */ 01333 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx) 01334 { 01335 return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGCMAR)); 01336 } 01337 01338 /** 01339 * @brief Set DMA2D foreground CLUT size, expressed on 8 bits ([7:0] bits). 01340 * @rmtoll FGPFCCR CS LL_DMA2D_FGND_SetCLUTSize 01341 * @param DMA2Dx DMA2D Instance 01342 * @param CLUTSize Value between Min_Data=0 and Max_Data=0xFF 01343 * @retval None 01344 */ 01345 __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTSize) 01346 { 01347 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CS, (CLUTSize << DMA2D_FGPFCCR_CS_Pos)); 01348 } 01349 01350 /** 01351 * @brief Get DMA2D foreground CLUT size, expressed on 8 bits ([7:0] bits). 01352 * @rmtoll FGPFCCR CS LL_DMA2D_FGND_GetCLUTSize 01353 * @param DMA2Dx DMA2D Instance 01354 * @retval Foreground CLUT size value between Min_Data=0 and Max_Data=0xFF 01355 */ 01356 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTSize(DMA2D_TypeDef *DMA2Dx) 01357 { 01358 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CS) >> DMA2D_FGPFCCR_CS_Pos); 01359 } 01360 01361 /** 01362 * @brief Set DMA2D foreground CLUT color mode. 01363 * @rmtoll FGPFCCR CCM LL_DMA2D_FGND_SetCLUTColorMode 01364 * @param DMA2Dx DMA2D Instance 01365 * @param CLUTColorMode This parameter can be one of the following values: 01366 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888 01367 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888 01368 * @retval None 01369 */ 01370 __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTColorMode) 01371 { 01372 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CCM, CLUTColorMode); 01373 } 01374 01375 /** 01376 * @brief Return DMA2D foreground CLUT color mode. 01377 * @rmtoll FGPFCCR CCM LL_DMA2D_FGND_GetCLUTColorMode 01378 * @param DMA2Dx DMA2D Instance 01379 * @retval Returned value can be one of the following values: 01380 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888 01381 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888 01382 */ 01383 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTColorMode(DMA2D_TypeDef *DMA2Dx) 01384 { 01385 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CCM)); 01386 } 01387 01388 /** 01389 * @} 01390 */ 01391 01392 /** @defgroup DMA2D_LL_EF_BGND_Configuration Background Configuration Functions 01393 * @{ 01394 */ 01395 01396 /** 01397 * @brief Set DMA2D background memory address, expressed on 32 bits ([31:0] bits). 01398 * @rmtoll BGMAR MA LL_DMA2D_BGND_SetMemAddr 01399 * @param DMA2Dx DMA2D Instance 01400 * @param MemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF 01401 * @retval None 01402 */ 01403 __STATIC_INLINE void LL_DMA2D_BGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t MemoryAddress) 01404 { 01405 LL_DMA2D_WriteReg(DMA2Dx, BGMAR, MemoryAddress); 01406 } 01407 01408 /** 01409 * @brief Get DMA2D background memory address, expressed on 32 bits ([31:0] bits). 01410 * @rmtoll BGMAR MA LL_DMA2D_BGND_GetMemAddr 01411 * @param DMA2Dx DMA2D Instance 01412 * @retval Background memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF 01413 */ 01414 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetMemAddr(DMA2D_TypeDef *DMA2Dx) 01415 { 01416 return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGMAR)); 01417 } 01418 01419 /** 01420 * @brief Enable DMA2D background CLUT loading. 01421 * @rmtoll BGPFCCR START LL_DMA2D_BGND_EnableCLUTLoad 01422 * @param DMA2Dx DMA2D Instance 01423 * @retval None 01424 */ 01425 __STATIC_INLINE void LL_DMA2D_BGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx) 01426 { 01427 SET_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_START); 01428 } 01429 01430 /** 01431 * @brief Indicate if DMA2D background CLUT loading is enabled. 01432 * @rmtoll BGPFCCR START LL_DMA2D_BGND_IsEnabledCLUTLoad 01433 * @param DMA2Dx DMA2D Instance 01434 * @retval State of bit (1 or 0). 01435 */ 01436 __STATIC_INLINE uint32_t LL_DMA2D_BGND_IsEnabledCLUTLoad(DMA2D_TypeDef *DMA2Dx) 01437 { 01438 return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_START) == (DMA2D_BGPFCCR_START)); 01439 } 01440 01441 /** 01442 * @brief Set DMA2D background color mode. 01443 * @rmtoll BGPFCCR CM LL_DMA2D_BGND_SetColorMode 01444 * @param DMA2Dx DMA2D Instance 01445 * @param ColorMode This parameter can be one of the following values: 01446 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888 01447 * @arg @ref LL_DMA2D_INPUT_MODE_RGB888 01448 * @arg @ref LL_DMA2D_INPUT_MODE_RGB565 01449 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555 01450 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444 01451 * @arg @ref LL_DMA2D_INPUT_MODE_L8 01452 * @arg @ref LL_DMA2D_INPUT_MODE_AL44 01453 * @arg @ref LL_DMA2D_INPUT_MODE_AL88 01454 * @arg @ref LL_DMA2D_INPUT_MODE_L4 01455 * @arg @ref LL_DMA2D_INPUT_MODE_A8 01456 * @arg @ref LL_DMA2D_INPUT_MODE_A4 01457 * @retval None 01458 */ 01459 __STATIC_INLINE void LL_DMA2D_BGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode) 01460 { 01461 MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CM, ColorMode); 01462 } 01463 01464 /** 01465 * @brief Return DMA2D background color mode. 01466 * @rmtoll BGPFCCR CM LL_DMA2D_BGND_GetColorMode 01467 * @param DMA2Dx DMA2D Instance 01468 * @retval Returned value can be one of the following values: 01469 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888 01470 * @arg @ref LL_DMA2D_INPUT_MODE_RGB888 01471 * @arg @ref LL_DMA2D_INPUT_MODE_RGB565 01472 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555 01473 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444 01474 * @arg @ref LL_DMA2D_INPUT_MODE_L8 01475 * @arg @ref LL_DMA2D_INPUT_MODE_AL44 01476 * @arg @ref LL_DMA2D_INPUT_MODE_AL88 01477 * @arg @ref LL_DMA2D_INPUT_MODE_L4 01478 * @arg @ref LL_DMA2D_INPUT_MODE_A8 01479 * @arg @ref LL_DMA2D_INPUT_MODE_A4 01480 */ 01481 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetColorMode(DMA2D_TypeDef *DMA2Dx) 01482 { 01483 return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CM)); 01484 } 01485 01486 /** 01487 * @brief Set DMA2D background alpha mode. 01488 * @rmtoll BGPFCCR AM LL_DMA2D_BGND_SetAlphaMode 01489 * @param DMA2Dx DMA2D Instance 01490 * @param AphaMode This parameter can be one of the following values: 01491 * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF 01492 * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE 01493 * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE 01494 * @retval None 01495 */ 01496 __STATIC_INLINE void LL_DMA2D_BGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t AphaMode) 01497 { 01498 MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AM, AphaMode); 01499 } 01500 01501 /** 01502 * @brief Return DMA2D background alpha mode. 01503 * @rmtoll BGPFCCR AM LL_DMA2D_BGND_GetAlphaMode 01504 * @param DMA2Dx DMA2D Instance 01505 * @retval Returned value can be one of the following values: 01506 * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF 01507 * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE 01508 * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE 01509 */ 01510 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlphaMode(DMA2D_TypeDef *DMA2Dx) 01511 { 01512 return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AM)); 01513 } 01514 01515 /** 01516 * @brief Set DMA2D background alpha value, expressed on 8 bits ([7:0] bits). 01517 * @rmtoll BGPFCCR ALPHA LL_DMA2D_BGND_SetAlpha 01518 * @param DMA2Dx DMA2D Instance 01519 * @param Alpha Value between Min_Data=0 and Max_Data=0xFF 01520 * @retval None 01521 */ 01522 __STATIC_INLINE void LL_DMA2D_BGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alpha) 01523 { 01524 MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_ALPHA, (Alpha << DMA2D_BGPFCCR_ALPHA_Pos)); 01525 } 01526 01527 /** 01528 * @brief Return DMA2D background alpha value, expressed on 8 bits ([7:0] bits). 01529 * @rmtoll BGPFCCR ALPHA LL_DMA2D_BGND_GetAlpha 01530 * @param DMA2Dx DMA2D Instance 01531 * @retval Alpha value between Min_Data=0 and Max_Data=0xFF 01532 */ 01533 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlpha(DMA2D_TypeDef *DMA2Dx) 01534 { 01535 return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_ALPHA) >> DMA2D_BGPFCCR_ALPHA_Pos); 01536 } 01537 01538 /** 01539 * @brief Set DMA2D background Red Blue swap mode. 01540 * @rmtoll BGPFCCR RBS LL_DMA2D_BGND_SetRBSwapMode 01541 * @param DMA2Dx DMA2D Instance 01542 * @param RBSwapMode This parameter can be one of the following values: 01543 * @arg @ref LL_DMA2D_RB_MODE_REGULAR 01544 * @arg @ref LL_DMA2D_RB_MODE_SWAP 01545 * @retval None 01546 */ 01547 __STATIC_INLINE void LL_DMA2D_BGND_SetRBSwapMode(DMA2D_TypeDef *DMA2Dx, uint32_t RBSwapMode) 01548 { 01549 MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_RBS, RBSwapMode); 01550 } 01551 01552 /** 01553 * @brief Return DMA2D background Red Blue swap mode. 01554 * @rmtoll BGPFCCR RBS LL_DMA2D_BGND_GetRBSwapMode 01555 * @param DMA2Dx DMA2D Instance 01556 * @retval Returned value can be one of the following values: 01557 * @arg @ref LL_DMA2D_RB_MODE_REGULAR 01558 * @arg @ref LL_DMA2D_RB_MODE_SWAP 01559 */ 01560 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetRBSwapMode(DMA2D_TypeDef *DMA2Dx) 01561 { 01562 return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_RBS)); 01563 } 01564 01565 /** 01566 * @brief Set DMA2D background alpha inversion mode. 01567 * @rmtoll BGPFCCR AI LL_DMA2D_BGND_SetAlphaInvMode 01568 * @param DMA2Dx DMA2D Instance 01569 * @param AlphaInversionMode This parameter can be one of the following values: 01570 * @arg @ref LL_DMA2D_ALPHA_REGULAR 01571 * @arg @ref LL_DMA2D_ALPHA_INVERTED 01572 * @retval None 01573 */ 01574 __STATIC_INLINE void LL_DMA2D_BGND_SetAlphaInvMode(DMA2D_TypeDef *DMA2Dx, uint32_t AlphaInversionMode) 01575 { 01576 MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AI, AlphaInversionMode); 01577 } 01578 01579 /** 01580 * @brief Return DMA2D background alpha inversion mode. 01581 * @rmtoll BGPFCCR AI LL_DMA2D_BGND_GetAlphaInvMode 01582 * @param DMA2Dx DMA2D Instance 01583 * @retval Returned value can be one of the following values: 01584 * @arg @ref LL_DMA2D_ALPHA_REGULAR 01585 * @arg @ref LL_DMA2D_ALPHA_INVERTED 01586 */ 01587 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlphaInvMode(DMA2D_TypeDef *DMA2Dx) 01588 { 01589 return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AI)); 01590 } 01591 01592 /** 01593 * @brief Set DMA2D background line offset, expressed on 14 bits ([13:0] bits). 01594 * @rmtoll BGOR LO LL_DMA2D_BGND_SetLineOffset 01595 * @param DMA2Dx DMA2D Instance 01596 * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FF 01597 * @retval None 01598 */ 01599 __STATIC_INLINE void LL_DMA2D_BGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset) 01600 { 01601 MODIFY_REG(DMA2Dx->BGOR, DMA2D_BGOR_LO, LineOffset); 01602 } 01603 01604 /** 01605 * @brief Return DMA2D background line offset, expressed on 14 bits ([13:0] bits). 01606 * @rmtoll BGOR LO LL_DMA2D_BGND_GetLineOffset 01607 * @param DMA2Dx DMA2D Instance 01608 * @retval Background line offset value between Min_Data=0 and Max_Data=0x3FF 01609 */ 01610 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetLineOffset(DMA2D_TypeDef *DMA2Dx) 01611 { 01612 return (uint32_t)(READ_BIT(DMA2Dx->BGOR, DMA2D_BGOR_LO)); 01613 } 01614 01615 /** 01616 * @brief Set DMA2D background color values, expressed on 24 bits ([23:0] bits). 01617 * @rmtoll BGCOLR RED LL_DMA2D_BGND_SetColor 01618 * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_SetColor 01619 * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_SetColor 01620 * @param DMA2Dx DMA2D Instance 01621 * @param Red Value between Min_Data=0 and Max_Data=0xFF 01622 * @param Green Value between Min_Data=0 and Max_Data=0xFF 01623 * @param Blue Value between Min_Data=0 and Max_Data=0xFF 01624 * @retval None 01625 */ 01626 __STATIC_INLINE void LL_DMA2D_BGND_SetColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red, uint32_t Green, uint32_t Blue) 01627 { 01628 MODIFY_REG(DMA2Dx->BGCOLR, (DMA2D_BGCOLR_RED | DMA2D_BGCOLR_GREEN | DMA2D_BGCOLR_BLUE), \ 01629 ((Red << DMA2D_BGCOLR_RED_Pos) | (Green << DMA2D_BGCOLR_GREEN_Pos) | Blue)); 01630 } 01631 01632 /** 01633 * @brief Set DMA2D background red color value, expressed on 8 bits ([7:0] bits). 01634 * @rmtoll BGCOLR RED LL_DMA2D_BGND_SetRedColor 01635 * @param DMA2Dx DMA2D Instance 01636 * @param Red Value between Min_Data=0 and Max_Data=0xFF 01637 * @retval None 01638 */ 01639 __STATIC_INLINE void LL_DMA2D_BGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red) 01640 { 01641 MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_RED, (Red << DMA2D_BGCOLR_RED_Pos)); 01642 } 01643 01644 /** 01645 * @brief Return DMA2D background red color value, expressed on 8 bits ([7:0] bits). 01646 * @rmtoll BGCOLR RED LL_DMA2D_BGND_GetRedColor 01647 * @param DMA2Dx DMA2D Instance 01648 * @retval Red color value between Min_Data=0 and Max_Data=0xFF 01649 */ 01650 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetRedColor(DMA2D_TypeDef *DMA2Dx) 01651 { 01652 return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_RED) >> DMA2D_BGCOLR_RED_Pos); 01653 } 01654 01655 /** 01656 * @brief Set DMA2D background green color value, expressed on 8 bits ([7:0] bits). 01657 * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_SetGreenColor 01658 * @param DMA2Dx DMA2D Instance 01659 * @param Green Value between Min_Data=0 and Max_Data=0xFF 01660 * @retval None 01661 */ 01662 __STATIC_INLINE void LL_DMA2D_BGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t Green) 01663 { 01664 MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_GREEN, (Green << DMA2D_BGCOLR_GREEN_Pos)); 01665 } 01666 01667 /** 01668 * @brief Return DMA2D background green color value, expressed on 8 bits ([7:0] bits). 01669 * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_GetGreenColor 01670 * @param DMA2Dx DMA2D Instance 01671 * @retval Green color value between Min_Data=0 and Max_Data=0xFF 01672 */ 01673 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetGreenColor(DMA2D_TypeDef *DMA2Dx) 01674 { 01675 return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_GREEN) >> DMA2D_BGCOLR_GREEN_Pos); 01676 } 01677 01678 /** 01679 * @brief Set DMA2D background blue color value, expressed on 8 bits ([7:0] bits). 01680 * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_SetBlueColor 01681 * @param DMA2Dx DMA2D Instance 01682 * @param Blue Value between Min_Data=0 and Max_Data=0xFF 01683 * @retval None 01684 */ 01685 __STATIC_INLINE void LL_DMA2D_BGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t Blue) 01686 { 01687 MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_BLUE, Blue); 01688 } 01689 01690 /** 01691 * @brief Return DMA2D background blue color value, expressed on 8 bits ([7:0] bits). 01692 * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_GetBlueColor 01693 * @param DMA2Dx DMA2D Instance 01694 * @retval Blue color value between Min_Data=0 and Max_Data=0xFF 01695 */ 01696 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetBlueColor(DMA2D_TypeDef *DMA2Dx) 01697 { 01698 return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_BLUE)); 01699 } 01700 01701 /** 01702 * @brief Set DMA2D background CLUT memory address, expressed on 32 bits ([31:0] bits). 01703 * @rmtoll BGCMAR MA LL_DMA2D_BGND_SetCLUTMemAddr 01704 * @param DMA2Dx DMA2D Instance 01705 * @param CLUTMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF 01706 * @retval None 01707 */ 01708 __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTMemoryAddress) 01709 { 01710 LL_DMA2D_WriteReg(DMA2Dx, BGCMAR, CLUTMemoryAddress); 01711 } 01712 01713 /** 01714 * @brief Get DMA2D background CLUT memory address, expressed on 32 bits ([31:0] bits). 01715 * @rmtoll BGCMAR MA LL_DMA2D_BGND_GetCLUTMemAddr 01716 * @param DMA2Dx DMA2D Instance 01717 * @retval Background CLUT memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF 01718 */ 01719 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx) 01720 { 01721 return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGCMAR)); 01722 } 01723 01724 /** 01725 * @brief Set DMA2D background CLUT size, expressed on 8 bits ([7:0] bits). 01726 * @rmtoll BGPFCCR CS LL_DMA2D_BGND_SetCLUTSize 01727 * @param DMA2Dx DMA2D Instance 01728 * @param CLUTSize Value between Min_Data=0 and Max_Data=0xFF 01729 * @retval None 01730 */ 01731 __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTSize) 01732 { 01733 MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CS, (CLUTSize << DMA2D_BGPFCCR_CS_Pos)); 01734 } 01735 01736 /** 01737 * @brief Get DMA2D background CLUT size, expressed on 8 bits ([7:0] bits). 01738 * @rmtoll BGPFCCR CS LL_DMA2D_BGND_GetCLUTSize 01739 * @param DMA2Dx DMA2D Instance 01740 * @retval Background CLUT size value between Min_Data=0 and Max_Data=0xFF 01741 */ 01742 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTSize(DMA2D_TypeDef *DMA2Dx) 01743 { 01744 return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CS) >> DMA2D_BGPFCCR_CS_Pos); 01745 } 01746 01747 /** 01748 * @brief Set DMA2D background CLUT color mode. 01749 * @rmtoll BGPFCCR CCM LL_DMA2D_BGND_SetCLUTColorMode 01750 * @param DMA2Dx DMA2D Instance 01751 * @param CLUTColorMode This parameter can be one of the following values: 01752 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888 01753 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888 01754 * @retval None 01755 */ 01756 __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTColorMode) 01757 { 01758 MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CCM, CLUTColorMode); 01759 } 01760 01761 /** 01762 * @brief Return DMA2D background CLUT color mode. 01763 * @rmtoll BGPFCCR CCM LL_DMA2D_BGND_GetCLUTColorMode 01764 * @param DMA2Dx DMA2D Instance 01765 * @retval Returned value can be one of the following values: 01766 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888 01767 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888 01768 */ 01769 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTColorMode(DMA2D_TypeDef *DMA2Dx) 01770 { 01771 return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CCM)); 01772 } 01773 01774 /** 01775 * @} 01776 */ 01777 01778 /** 01779 * @} 01780 */ 01781 01782 01783 /** @defgroup DMA2D_LL_EF_FLAG_MANAGEMENT Flag Management 01784 * @{ 01785 */ 01786 01787 /** 01788 * @brief Check if the DMA2D Configuration Error Interrupt Flag is set or not 01789 * @rmtoll ISR CEIF LL_DMA2D_IsActiveFlag_CE 01790 * @param DMA2Dx DMA2D Instance 01791 * @retval State of bit (1 or 0). 01792 */ 01793 __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CE(DMA2D_TypeDef *DMA2Dx) 01794 { 01795 return (uint32_t)(READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CEIF) == (DMA2D_ISR_CEIF)); 01796 } 01797 01798 /** 01799 * @brief Check if the DMA2D CLUT Transfer Complete Interrupt Flag is set or not 01800 * @rmtoll ISR CTCIF LL_DMA2D_IsActiveFlag_CTC 01801 * @param DMA2Dx DMA2D Instance 01802 * @retval State of bit (1 or 0). 01803 */ 01804 __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CTC(DMA2D_TypeDef *DMA2Dx) 01805 { 01806 return (uint32_t)(READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CTCIF) == (DMA2D_ISR_CTCIF)); 01807 } 01808 01809 /** 01810 * @brief Check if the DMA2D CLUT Access Error Interrupt Flag is set or not 01811 * @rmtoll ISR CAEIF LL_DMA2D_IsActiveFlag_CAE 01812 * @param DMA2Dx DMA2D Instance 01813 * @retval State of bit (1 or 0). 01814 */ 01815 __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CAE(DMA2D_TypeDef *DMA2Dx) 01816 { 01817 return (uint32_t)(READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CAEIF) == (DMA2D_ISR_CAEIF)); 01818 } 01819 01820 /** 01821 * @brief Check if the DMA2D Transfer Watermark Interrupt Flag is set or not 01822 * @rmtoll ISR TWIF LL_DMA2D_IsActiveFlag_TW 01823 * @param DMA2Dx DMA2D Instance 01824 * @retval State of bit (1 or 0). 01825 */ 01826 __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TW(DMA2D_TypeDef *DMA2Dx) 01827 { 01828 return (uint32_t)(READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TWIF) == (DMA2D_ISR_TWIF)); 01829 } 01830 01831 /** 01832 * @brief Check if the DMA2D Transfer Complete Interrupt Flag is set or not 01833 * @rmtoll ISR TCIF LL_DMA2D_IsActiveFlag_TC 01834 * @param DMA2Dx DMA2D Instance 01835 * @retval State of bit (1 or 0). 01836 */ 01837 __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TC(DMA2D_TypeDef *DMA2Dx) 01838 { 01839 return (uint32_t)(READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TCIF) == (DMA2D_ISR_TCIF)); 01840 } 01841 01842 /** 01843 * @brief Check if the DMA2D Transfer Error Interrupt Flag is set or not 01844 * @rmtoll ISR TEIF LL_DMA2D_IsActiveFlag_TE 01845 * @param DMA2Dx DMA2D Instance 01846 * @retval State of bit (1 or 0). 01847 */ 01848 __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TE(DMA2D_TypeDef *DMA2Dx) 01849 { 01850 return (uint32_t)(READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TEIF) == (DMA2D_ISR_TEIF)); 01851 } 01852 01853 /** 01854 * @brief Clear DMA2D Configuration Error Interrupt Flag 01855 * @rmtoll IFCR CCEIF LL_DMA2D_ClearFlag_CE 01856 * @param DMA2Dx DMA2D Instance 01857 * @retval None 01858 */ 01859 __STATIC_INLINE void LL_DMA2D_ClearFlag_CE(DMA2D_TypeDef *DMA2Dx) 01860 { 01861 WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CCEIF); 01862 } 01863 01864 /** 01865 * @brief Clear DMA2D CLUT Transfer Complete Interrupt Flag 01866 * @rmtoll IFCR CCTCIF LL_DMA2D_ClearFlag_CTC 01867 * @param DMA2Dx DMA2D Instance 01868 * @retval None 01869 */ 01870 __STATIC_INLINE void LL_DMA2D_ClearFlag_CTC(DMA2D_TypeDef *DMA2Dx) 01871 { 01872 WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CCTCIF); 01873 } 01874 01875 /** 01876 * @brief Clear DMA2D CLUT Access Error Interrupt Flag 01877 * @rmtoll IFCR CAECIF LL_DMA2D_ClearFlag_CAE 01878 * @param DMA2Dx DMA2D Instance 01879 * @retval None 01880 */ 01881 __STATIC_INLINE void LL_DMA2D_ClearFlag_CAE(DMA2D_TypeDef *DMA2Dx) 01882 { 01883 WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CAECIF); 01884 } 01885 01886 /** 01887 * @brief Clear DMA2D Transfer Watermark Interrupt Flag 01888 * @rmtoll IFCR CTWIF LL_DMA2D_ClearFlag_TW 01889 * @param DMA2Dx DMA2D Instance 01890 * @retval None 01891 */ 01892 __STATIC_INLINE void LL_DMA2D_ClearFlag_TW(DMA2D_TypeDef *DMA2Dx) 01893 { 01894 WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTWIF); 01895 } 01896 01897 /** 01898 * @brief Clear DMA2D Transfer Complete Interrupt Flag 01899 * @rmtoll IFCR CTCIF LL_DMA2D_ClearFlag_TC 01900 * @param DMA2Dx DMA2D Instance 01901 * @retval None 01902 */ 01903 __STATIC_INLINE void LL_DMA2D_ClearFlag_TC(DMA2D_TypeDef *DMA2Dx) 01904 { 01905 WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTCIF); 01906 } 01907 01908 /** 01909 * @brief Clear DMA2D Transfer Error Interrupt Flag 01910 * @rmtoll IFCR CTEIF LL_DMA2D_ClearFlag_TE 01911 * @param DMA2Dx DMA2D Instance 01912 * @retval None 01913 */ 01914 __STATIC_INLINE void LL_DMA2D_ClearFlag_TE(DMA2D_TypeDef *DMA2Dx) 01915 { 01916 WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTEIF); 01917 } 01918 01919 /** 01920 * @} 01921 */ 01922 01923 /** @defgroup DMA2D_LL_EF_IT_MANAGEMENT Interruption Management 01924 * @{ 01925 */ 01926 01927 /** 01928 * @brief Enable Configuration Error Interrupt 01929 * @rmtoll CR CEIE LL_DMA2D_EnableIT_CE 01930 * @param DMA2Dx DMA2D Instance 01931 * @retval None 01932 */ 01933 __STATIC_INLINE void LL_DMA2D_EnableIT_CE(DMA2D_TypeDef *DMA2Dx) 01934 { 01935 SET_BIT(DMA2Dx->CR, DMA2D_CR_CEIE); 01936 } 01937 01938 /** 01939 * @brief Enable CLUT Transfer Complete Interrupt 01940 * @rmtoll CR CTCIE LL_DMA2D_EnableIT_CTC 01941 * @param DMA2Dx DMA2D Instance 01942 * @retval None 01943 */ 01944 __STATIC_INLINE void LL_DMA2D_EnableIT_CTC(DMA2D_TypeDef *DMA2Dx) 01945 { 01946 SET_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE); 01947 } 01948 01949 /** 01950 * @brief Enable CLUT Access Error Interrupt 01951 * @rmtoll CR CAEIE LL_DMA2D_EnableIT_CAE 01952 * @param DMA2Dx DMA2D Instance 01953 * @retval None 01954 */ 01955 __STATIC_INLINE void LL_DMA2D_EnableIT_CAE(DMA2D_TypeDef *DMA2Dx) 01956 { 01957 SET_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE); 01958 } 01959 01960 /** 01961 * @brief Enable Transfer Watermark Interrupt 01962 * @rmtoll CR TWIE LL_DMA2D_EnableIT_TW 01963 * @param DMA2Dx DMA2D Instance 01964 * @retval None 01965 */ 01966 __STATIC_INLINE void LL_DMA2D_EnableIT_TW(DMA2D_TypeDef *DMA2Dx) 01967 { 01968 SET_BIT(DMA2Dx->CR, DMA2D_CR_TWIE); 01969 } 01970 01971 /** 01972 * @brief Enable Transfer Complete Interrupt 01973 * @rmtoll CR TCIE LL_DMA2D_EnableIT_TC 01974 * @param DMA2Dx DMA2D Instance 01975 * @retval None 01976 */ 01977 __STATIC_INLINE void LL_DMA2D_EnableIT_TC(DMA2D_TypeDef *DMA2Dx) 01978 { 01979 SET_BIT(DMA2Dx->CR, DMA2D_CR_TCIE); 01980 } 01981 01982 /** 01983 * @brief Enable Transfer Error Interrupt 01984 * @rmtoll CR TEIE LL_DMA2D_EnableIT_TE 01985 * @param DMA2Dx DMA2D Instance 01986 * @retval None 01987 */ 01988 __STATIC_INLINE void LL_DMA2D_EnableIT_TE(DMA2D_TypeDef *DMA2Dx) 01989 { 01990 SET_BIT(DMA2Dx->CR, DMA2D_CR_TEIE); 01991 } 01992 01993 /** 01994 * @brief Disable Configuration Error Interrupt 01995 * @rmtoll CR CEIE LL_DMA2D_DisableIT_CE 01996 * @param DMA2Dx DMA2D Instance 01997 * @retval None 01998 */ 01999 __STATIC_INLINE void LL_DMA2D_DisableIT_CE(DMA2D_TypeDef *DMA2Dx) 02000 { 02001 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CEIE); 02002 } 02003 02004 /** 02005 * @brief Disable CLUT Transfer Complete Interrupt 02006 * @rmtoll CR CTCIE LL_DMA2D_DisableIT_CTC 02007 * @param DMA2Dx DMA2D Instance 02008 * @retval None 02009 */ 02010 __STATIC_INLINE void LL_DMA2D_DisableIT_CTC(DMA2D_TypeDef *DMA2Dx) 02011 { 02012 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE); 02013 } 02014 02015 /** 02016 * @brief Disable CLUT Access Error Interrupt 02017 * @rmtoll CR CAEIE LL_DMA2D_DisableIT_CAE 02018 * @param DMA2Dx DMA2D Instance 02019 * @retval None 02020 */ 02021 __STATIC_INLINE void LL_DMA2D_DisableIT_CAE(DMA2D_TypeDef *DMA2Dx) 02022 { 02023 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE); 02024 } 02025 02026 /** 02027 * @brief Disable Transfer Watermark Interrupt 02028 * @rmtoll CR TWIE LL_DMA2D_DisableIT_TW 02029 * @param DMA2Dx DMA2D Instance 02030 * @retval None 02031 */ 02032 __STATIC_INLINE void LL_DMA2D_DisableIT_TW(DMA2D_TypeDef *DMA2Dx) 02033 { 02034 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TWIE); 02035 } 02036 02037 /** 02038 * @brief Disable Transfer Complete Interrupt 02039 * @rmtoll CR TCIE LL_DMA2D_DisableIT_TC 02040 * @param DMA2Dx DMA2D Instance 02041 * @retval None 02042 */ 02043 __STATIC_INLINE void LL_DMA2D_DisableIT_TC(DMA2D_TypeDef *DMA2Dx) 02044 { 02045 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TCIE); 02046 } 02047 02048 /** 02049 * @brief Disable Transfer Error Interrupt 02050 * @rmtoll CR TEIE LL_DMA2D_DisableIT_TE 02051 * @param DMA2Dx DMA2D Instance 02052 * @retval None 02053 */ 02054 __STATIC_INLINE void LL_DMA2D_DisableIT_TE(DMA2D_TypeDef *DMA2Dx) 02055 { 02056 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TEIE); 02057 } 02058 02059 /** 02060 * @brief Check if the DMA2D Configuration Error interrupt source is enabled or disabled. 02061 * @rmtoll CR CEIE LL_DMA2D_IsEnabledIT_CE 02062 * @param DMA2Dx DMA2D Instance 02063 * @retval State of bit (1 or 0). 02064 */ 02065 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CE(DMA2D_TypeDef *DMA2Dx) 02066 { 02067 return (uint32_t)(READ_BIT(DMA2Dx->CR, DMA2D_CR_CEIE) == (DMA2D_CR_CEIE)); 02068 } 02069 02070 /** 02071 * @brief Check if the DMA2D CLUT Transfer Complete interrupt source is enabled or disabled. 02072 * @rmtoll CR CTCIE LL_DMA2D_IsEnabledIT_CTC 02073 * @param DMA2Dx DMA2D Instance 02074 * @retval State of bit (1 or 0). 02075 */ 02076 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CTC(DMA2D_TypeDef *DMA2Dx) 02077 { 02078 return (uint32_t)(READ_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE) == (DMA2D_CR_CTCIE)); 02079 } 02080 02081 /** 02082 * @brief Check if the DMA2D CLUT Access Error interrupt source is enabled or disabled. 02083 * @rmtoll CR CAEIE LL_DMA2D_IsEnabledIT_CAE 02084 * @param DMA2Dx DMA2D Instance 02085 * @retval State of bit (1 or 0). 02086 */ 02087 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CAE(DMA2D_TypeDef *DMA2Dx) 02088 { 02089 return (uint32_t)(READ_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE) == (DMA2D_CR_CAEIE)); 02090 } 02091 02092 /** 02093 * @brief Check if the DMA2D Transfer Watermark interrupt source is enabled or disabled. 02094 * @rmtoll CR TWIE LL_DMA2D_IsEnabledIT_TW 02095 * @param DMA2Dx DMA2D Instance 02096 * @retval State of bit (1 or 0). 02097 */ 02098 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TW(DMA2D_TypeDef *DMA2Dx) 02099 { 02100 return (uint32_t)(READ_BIT(DMA2Dx->CR, DMA2D_CR_TWIE) == (DMA2D_CR_TWIE)); 02101 } 02102 02103 /** 02104 * @brief Check if the DMA2D Transfer Complete interrupt source is enabled or disabled. 02105 * @rmtoll CR TCIE LL_DMA2D_IsEnabledIT_TC 02106 * @param DMA2Dx DMA2D Instance 02107 * @retval State of bit (1 or 0). 02108 */ 02109 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TC(DMA2D_TypeDef *DMA2Dx) 02110 { 02111 return (uint32_t)(READ_BIT(DMA2Dx->CR, DMA2D_CR_TCIE) == (DMA2D_CR_TCIE)); 02112 } 02113 02114 /** 02115 * @brief Check if the DMA2D Transfer Error interrupt source is enabled or disabled. 02116 * @rmtoll CR TEIE LL_DMA2D_IsEnabledIT_TE 02117 * @param DMA2Dx DMA2D Instance 02118 * @retval State of bit (1 or 0). 02119 */ 02120 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TE(DMA2D_TypeDef *DMA2Dx) 02121 { 02122 return (uint32_t)(READ_BIT(DMA2Dx->CR, DMA2D_CR_TEIE) == (DMA2D_CR_TEIE)); 02123 } 02124 02125 02126 02127 /** 02128 * @} 02129 */ 02130 02131 #if defined(USE_FULL_LL_DRIVER) 02132 /** @defgroup DMA2D_LL_EF_Init_Functions Initialization and De-initialization Functions 02133 * @{ 02134 */ 02135 02136 ErrorStatus LL_DMA2D_DeInit(DMA2D_TypeDef *DMA2Dx); 02137 ErrorStatus LL_DMA2D_Init(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_InitTypeDef *DMA2D_InitStruct); 02138 void LL_DMA2D_StructInit(LL_DMA2D_InitTypeDef *DMA2D_InitStruct); 02139 void LL_DMA2D_ConfigLayer(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg, uint32_t LayerIdx); 02140 void LL_DMA2D_LayerCfgStructInit(LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg); 02141 void LL_DMA2D_ConfigOutputColor(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_ColorTypeDef *DMA2D_ColorStruct); 02142 uint32_t LL_DMA2D_GetOutputBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode); 02143 uint32_t LL_DMA2D_GetOutputGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode); 02144 uint32_t LL_DMA2D_GetOutputRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode); 02145 uint32_t LL_DMA2D_GetOutputAlphaColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode); 02146 void LL_DMA2D_ConfigSize(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines, uint32_t NbrOfPixelsPerLines); 02147 02148 /** 02149 * @} 02150 */ 02151 #endif /* USE_FULL_LL_DRIVER */ 02152 02153 /** 02154 * @} 02155 */ 02156 02157 /** 02158 * @} 02159 */ 02160 02161 #endif /* defined (DMA2D) */ 02162 02163 /** 02164 * @} 02165 */ 02166 02167 #ifdef __cplusplus 02168 } 02169 #endif 02170 02171 #endif /* STM32L4xx_LL_DMA2D_H */ 02172 02173 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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