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STM32L486xx HAL User Manual
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32l4xx_hal_uart_ex.h 00004 * @author MCD Application Team 00005 * @brief Header file of UART HAL Extended module. 00006 ****************************************************************************** 00007 * @attention 00008 * 00009 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> 00010 * 00011 * Redistribution and use in source and binary forms, with or without modification, 00012 * are permitted provided that the following conditions are met: 00013 * 1. Redistributions of source code must retain the above copyright notice, 00014 * this list of conditions and the following disclaimer. 00015 * 2. Redistributions in binary form must reproduce the above copyright notice, 00016 * this list of conditions and the following disclaimer in the documentation 00017 * and/or other materials provided with the distribution. 00018 * 3. Neither the name of STMicroelectronics nor the names of its contributors 00019 * may be used to endorse or promote products derived from this software 00020 * without specific prior written permission. 00021 * 00022 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 00023 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 00024 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 00025 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 00026 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 00027 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 00028 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00029 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 00030 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 00031 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00032 * 00033 ****************************************************************************** 00034 */ 00035 00036 /* Define to prevent recursive inclusion -------------------------------------*/ 00037 #ifndef __STM32L4xx_HAL_UART_EX_H 00038 #define __STM32L4xx_HAL_UART_EX_H 00039 00040 #ifdef __cplusplus 00041 extern "C" { 00042 #endif 00043 00044 /* Includes ------------------------------------------------------------------*/ 00045 #include "stm32l4xx_hal_def.h" 00046 00047 /** @addtogroup STM32L4xx_HAL_Driver 00048 * @{ 00049 */ 00050 00051 /** @addtogroup UARTEx 00052 * @{ 00053 */ 00054 00055 /* Exported types ------------------------------------------------------------*/ 00056 /** @defgroup UARTEx_Exported_Types UARTEx Exported Types 00057 * @{ 00058 */ 00059 00060 /** 00061 * @brief UART wake up from stop mode parameters 00062 */ 00063 typedef struct 00064 { 00065 uint32_t WakeUpEvent; /*!< Specifies which event will activat the Wakeup from Stop mode flag (WUF). 00066 This parameter can be a value of @ref UART_WakeUp_from_Stop_Selection. 00067 If set to UART_WAKEUP_ON_ADDRESS, the two other fields below must 00068 be filled up. */ 00069 00070 uint16_t AddressLength; /*!< Specifies whether the address is 4 or 7-bit long. 00071 This parameter can be a value of @ref UARTEx_WakeUp_Address_Length. */ 00072 00073 uint8_t Address; /*!< UART/USART node address (7-bit long max). */ 00074 } UART_WakeUpTypeDef; 00075 00076 /** 00077 * @} 00078 */ 00079 00080 /* Exported constants --------------------------------------------------------*/ 00081 /** @defgroup UARTEx_Exported_Constants UARTEx Exported Constants 00082 * @{ 00083 */ 00084 00085 /** @defgroup UARTEx_Word_Length UARTEx Word Length 00086 * @{ 00087 */ 00088 #define UART_WORDLENGTH_7B USART_CR1_M1 /*!< 7-bit long UART frame */ 00089 #define UART_WORDLENGTH_8B 0x00000000U /*!< 8-bit long UART frame */ 00090 #define UART_WORDLENGTH_9B USART_CR1_M0 /*!< 9-bit long UART frame */ 00091 /** 00092 * @} 00093 */ 00094 00095 /** @defgroup UARTEx_WakeUp_Address_Length UARTEx WakeUp Address Length 00096 * @{ 00097 */ 00098 #define UART_ADDRESS_DETECT_4B 0x00000000U /*!< 4-bit long wake-up address */ 00099 #define UART_ADDRESS_DETECT_7B USART_CR2_ADDM7 /*!< 7-bit long wake-up address */ 00100 /** 00101 * @} 00102 */ 00103 00104 #if defined(USART_CR1_FIFOEN) 00105 /** @defgroup UARTEx_FIFO_mode UARTEx FIFO mode 00106 * @brief UART FIFO mode 00107 * @{ 00108 */ 00109 #define UART_FIFOMODE_DISABLE 0x00000000U /*!< FIFO mode disable */ 00110 #define UART_FIFOMODE_ENABLE USART_CR1_FIFOEN /*!< FIFO mode enable */ 00111 /** 00112 * @} 00113 */ 00114 00115 /** @defgroup UARTEx_TXFIFO_threshold_level UARTEx TXFIFO threshold level 00116 * @brief UART TXFIFO threshold level 00117 * @{ 00118 */ 00119 #define UART_TXFIFO_THRESHOLD_1_8 0x00000000U /*!< TXFIFO reaches 1/8 of its depth */ 00120 #define UART_TXFIFO_THRESHOLD_1_4 USART_CR3_TXFTCFG_0 /*!< TXFIFO reaches 1/4 of its depth */ 00121 #define UART_TXFIFO_THRESHOLD_1_2 USART_CR3_TXFTCFG_1 /*!< TXFIFO reaches 1/2 of its depth */ 00122 #define UART_TXFIFO_THRESHOLD_3_4 (USART_CR3_TXFTCFG_0|USART_CR3_TXFTCFG_1) /*!< TXFIFO reaches 3/4 of its depth */ 00123 #define UART_TXFIFO_THRESHOLD_7_8 USART_CR3_TXFTCFG_2 /*!< TXFIFO reaches 7/8 of its depth */ 00124 #define UART_TXFIFO_THRESHOLD_8_8 (USART_CR3_TXFTCFG_2|USART_CR3_TXFTCFG_0) /*!< TXFIFO becomes empty */ 00125 /** 00126 * @} 00127 */ 00128 00129 /** @defgroup UARTEx_RXFIFO_threshold_level UARTEx RXFIFO threshold level 00130 * @brief UART RXFIFO threshold level 00131 * @{ 00132 */ 00133 #define UART_RXFIFO_THRESHOLD_1_8 0x00000000U /*!< RXFIFO FIFO reaches 1/8 of its depth */ 00134 #define UART_RXFIFO_THRESHOLD_1_4 USART_CR3_RXFTCFG_0 /*!< RXFIFO FIFO reaches 1/4 of its depth */ 00135 #define UART_RXFIFO_THRESHOLD_1_2 USART_CR3_RXFTCFG_1 /*!< RXFIFO FIFO reaches 1/2 of its depth */ 00136 #define UART_RXFIFO_THRESHOLD_3_4 (USART_CR3_RXFTCFG_0|USART_CR3_RXFTCFG_1) /*!< RXFIFO FIFO reaches 3/4 of its depth */ 00137 #define UART_RXFIFO_THRESHOLD_7_8 USART_CR3_RXFTCFG_2 /*!< RXFIFO FIFO reaches 7/8 of its depth */ 00138 #define UART_RXFIFO_THRESHOLD_8_8 (USART_CR3_RXFTCFG_2|USART_CR3_RXFTCFG_0) /*!< RXFIFO FIFO becomes full */ 00139 /** 00140 * @} 00141 */ 00142 #endif 00143 00144 /** 00145 * @} 00146 */ 00147 00148 /* Exported macros -----------------------------------------------------------*/ 00149 /* Exported functions --------------------------------------------------------*/ 00150 /** @addtogroup UARTEx_Exported_Functions 00151 * @{ 00152 */ 00153 00154 /** @addtogroup UARTEx_Exported_Functions_Group1 00155 * @{ 00156 */ 00157 00158 /* Initialization and de-initialization functions ****************************/ 00159 HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity, uint32_t AssertionTime, uint32_t DeassertionTime); 00160 00161 /** 00162 * @} 00163 */ 00164 00165 /** @addtogroup UARTEx_Exported_Functions_Group2 00166 * @{ 00167 */ 00168 00169 void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart); 00170 00171 #if defined(USART_CR1_FIFOEN) 00172 void HAL_UARTEx_RxFifoFullCallback(UART_HandleTypeDef *huart); 00173 void HAL_UARTEx_TxFifoEmptyCallback(UART_HandleTypeDef *huart); 00174 #endif 00175 00176 /** 00177 * @} 00178 */ 00179 00180 /** @addtogroup UARTEx_Exported_Functions_Group3 00181 * @{ 00182 */ 00183 00184 /* Peripheral Control functions **********************************************/ 00185 HAL_StatusTypeDef HAL_UARTEx_StopModeWakeUpSourceConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection); 00186 HAL_StatusTypeDef HAL_UARTEx_EnableStopMode(UART_HandleTypeDef *huart); 00187 HAL_StatusTypeDef HAL_UARTEx_DisableStopMode(UART_HandleTypeDef *huart); 00188 #if defined(USART_CR3_UCESM) 00189 HAL_StatusTypeDef HAL_UARTEx_EnableClockStopMode(UART_HandleTypeDef *huart); 00190 HAL_StatusTypeDef HAL_UARTEx_DisableClockStopMode(UART_HandleTypeDef *huart); 00191 #endif /* USART_CR3_UCESM */ 00192 HAL_StatusTypeDef HAL_MultiProcessorEx_AddressLength_Set(UART_HandleTypeDef *huart, uint32_t AddressLength); 00193 #if defined(USART_CR1_FIFOEN) 00194 HAL_StatusTypeDef HAL_UARTEx_EnableFifoMode(UART_HandleTypeDef *huart); 00195 HAL_StatusTypeDef HAL_UARTEx_DisableFifoMode(UART_HandleTypeDef *huart); 00196 HAL_StatusTypeDef HAL_UARTEx_SetTxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold); 00197 HAL_StatusTypeDef HAL_UARTEx_SetRxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold); 00198 #endif 00199 00200 /** 00201 * @} 00202 */ 00203 00204 /** 00205 * @} 00206 */ 00207 00208 /* Private macros ------------------------------------------------------------*/ 00209 /** @defgroup UARTEx_Private_Macros UARTEx Private Macros 00210 * @{ 00211 */ 00212 00213 /** @brief Report the UART clock source. 00214 * @param __HANDLE__ specifies the UART Handle. 00215 * @param __CLOCKSOURCE__ output variable. 00216 * @retval UART clocking source, written in __CLOCKSOURCE__. 00217 */ 00218 #if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) \ 00219 || defined (STM32L496xx) || defined (STM32L4A6xx) \ 00220 || defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) 00221 #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ 00222 do { \ 00223 if((__HANDLE__)->Instance == USART1) \ 00224 { \ 00225 switch(__HAL_RCC_GET_USART1_SOURCE()) \ 00226 { \ 00227 case RCC_USART1CLKSOURCE_PCLK2: \ 00228 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \ 00229 break; \ 00230 case RCC_USART1CLKSOURCE_HSI: \ 00231 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 00232 break; \ 00233 case RCC_USART1CLKSOURCE_SYSCLK: \ 00234 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 00235 break; \ 00236 case RCC_USART1CLKSOURCE_LSE: \ 00237 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 00238 break; \ 00239 default: \ 00240 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 00241 break; \ 00242 } \ 00243 } \ 00244 else if((__HANDLE__)->Instance == USART2) \ 00245 { \ 00246 switch(__HAL_RCC_GET_USART2_SOURCE()) \ 00247 { \ 00248 case RCC_USART2CLKSOURCE_PCLK1: \ 00249 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 00250 break; \ 00251 case RCC_USART2CLKSOURCE_HSI: \ 00252 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 00253 break; \ 00254 case RCC_USART2CLKSOURCE_SYSCLK: \ 00255 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 00256 break; \ 00257 case RCC_USART2CLKSOURCE_LSE: \ 00258 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 00259 break; \ 00260 default: \ 00261 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 00262 break; \ 00263 } \ 00264 } \ 00265 else if((__HANDLE__)->Instance == USART3) \ 00266 { \ 00267 switch(__HAL_RCC_GET_USART3_SOURCE()) \ 00268 { \ 00269 case RCC_USART3CLKSOURCE_PCLK1: \ 00270 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 00271 break; \ 00272 case RCC_USART3CLKSOURCE_HSI: \ 00273 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 00274 break; \ 00275 case RCC_USART3CLKSOURCE_SYSCLK: \ 00276 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 00277 break; \ 00278 case RCC_USART3CLKSOURCE_LSE: \ 00279 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 00280 break; \ 00281 default: \ 00282 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 00283 break; \ 00284 } \ 00285 } \ 00286 else if((__HANDLE__)->Instance == UART4) \ 00287 { \ 00288 switch(__HAL_RCC_GET_UART4_SOURCE()) \ 00289 { \ 00290 case RCC_UART4CLKSOURCE_PCLK1: \ 00291 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 00292 break; \ 00293 case RCC_UART4CLKSOURCE_HSI: \ 00294 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 00295 break; \ 00296 case RCC_UART4CLKSOURCE_SYSCLK: \ 00297 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 00298 break; \ 00299 case RCC_UART4CLKSOURCE_LSE: \ 00300 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 00301 break; \ 00302 default: \ 00303 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 00304 break; \ 00305 } \ 00306 } \ 00307 else if((__HANDLE__)->Instance == UART5) \ 00308 { \ 00309 switch(__HAL_RCC_GET_UART5_SOURCE()) \ 00310 { \ 00311 case RCC_UART5CLKSOURCE_PCLK1: \ 00312 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 00313 break; \ 00314 case RCC_UART5CLKSOURCE_HSI: \ 00315 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 00316 break; \ 00317 case RCC_UART5CLKSOURCE_SYSCLK: \ 00318 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 00319 break; \ 00320 case RCC_UART5CLKSOURCE_LSE: \ 00321 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 00322 break; \ 00323 default: \ 00324 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 00325 break; \ 00326 } \ 00327 } \ 00328 else if((__HANDLE__)->Instance == LPUART1) \ 00329 { \ 00330 switch(__HAL_RCC_GET_LPUART1_SOURCE()) \ 00331 { \ 00332 case RCC_LPUART1CLKSOURCE_PCLK1: \ 00333 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 00334 break; \ 00335 case RCC_LPUART1CLKSOURCE_HSI: \ 00336 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 00337 break; \ 00338 case RCC_LPUART1CLKSOURCE_SYSCLK: \ 00339 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 00340 break; \ 00341 case RCC_LPUART1CLKSOURCE_LSE: \ 00342 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 00343 break; \ 00344 default: \ 00345 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 00346 break; \ 00347 } \ 00348 } \ 00349 } while(0U) 00350 #elif defined (STM32L431xx) || defined (STM32L433xx) || defined (STM32L443xx) 00351 #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ 00352 do { \ 00353 if((__HANDLE__)->Instance == USART1) \ 00354 { \ 00355 switch(__HAL_RCC_GET_USART1_SOURCE()) \ 00356 { \ 00357 case RCC_USART1CLKSOURCE_PCLK2: \ 00358 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \ 00359 break; \ 00360 case RCC_USART1CLKSOURCE_HSI: \ 00361 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 00362 break; \ 00363 case RCC_USART1CLKSOURCE_SYSCLK: \ 00364 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 00365 break; \ 00366 case RCC_USART1CLKSOURCE_LSE: \ 00367 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 00368 break; \ 00369 default: \ 00370 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 00371 break; \ 00372 } \ 00373 } \ 00374 else if((__HANDLE__)->Instance == USART2) \ 00375 { \ 00376 switch(__HAL_RCC_GET_USART2_SOURCE()) \ 00377 { \ 00378 case RCC_USART2CLKSOURCE_PCLK1: \ 00379 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 00380 break; \ 00381 case RCC_USART2CLKSOURCE_HSI: \ 00382 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 00383 break; \ 00384 case RCC_USART2CLKSOURCE_SYSCLK: \ 00385 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 00386 break; \ 00387 case RCC_USART2CLKSOURCE_LSE: \ 00388 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 00389 break; \ 00390 default: \ 00391 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 00392 break; \ 00393 } \ 00394 } \ 00395 else if((__HANDLE__)->Instance == USART3) \ 00396 { \ 00397 switch(__HAL_RCC_GET_USART3_SOURCE()) \ 00398 { \ 00399 case RCC_USART3CLKSOURCE_PCLK1: \ 00400 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 00401 break; \ 00402 case RCC_USART3CLKSOURCE_HSI: \ 00403 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 00404 break; \ 00405 case RCC_USART3CLKSOURCE_SYSCLK: \ 00406 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 00407 break; \ 00408 case RCC_USART3CLKSOURCE_LSE: \ 00409 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 00410 break; \ 00411 default: \ 00412 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 00413 break; \ 00414 } \ 00415 } \ 00416 else if((__HANDLE__)->Instance == LPUART1) \ 00417 { \ 00418 switch(__HAL_RCC_GET_LPUART1_SOURCE()) \ 00419 { \ 00420 case RCC_LPUART1CLKSOURCE_PCLK1: \ 00421 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 00422 break; \ 00423 case RCC_LPUART1CLKSOURCE_HSI: \ 00424 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 00425 break; \ 00426 case RCC_LPUART1CLKSOURCE_SYSCLK: \ 00427 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 00428 break; \ 00429 case RCC_LPUART1CLKSOURCE_LSE: \ 00430 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 00431 break; \ 00432 default: \ 00433 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 00434 break; \ 00435 } \ 00436 } \ 00437 } while(0U) 00438 #elif defined (STM32L432xx) || defined (STM32L442xx) 00439 #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ 00440 do { \ 00441 if((__HANDLE__)->Instance == USART1) \ 00442 { \ 00443 switch(__HAL_RCC_GET_USART1_SOURCE()) \ 00444 { \ 00445 case RCC_USART1CLKSOURCE_PCLK2: \ 00446 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \ 00447 break; \ 00448 case RCC_USART1CLKSOURCE_HSI: \ 00449 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 00450 break; \ 00451 case RCC_USART1CLKSOURCE_SYSCLK: \ 00452 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 00453 break; \ 00454 case RCC_USART1CLKSOURCE_LSE: \ 00455 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 00456 break; \ 00457 default: \ 00458 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 00459 break; \ 00460 } \ 00461 } \ 00462 else if((__HANDLE__)->Instance == USART2) \ 00463 { \ 00464 switch(__HAL_RCC_GET_USART2_SOURCE()) \ 00465 { \ 00466 case RCC_USART2CLKSOURCE_PCLK1: \ 00467 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 00468 break; \ 00469 case RCC_USART2CLKSOURCE_HSI: \ 00470 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 00471 break; \ 00472 case RCC_USART2CLKSOURCE_SYSCLK: \ 00473 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 00474 break; \ 00475 case RCC_USART2CLKSOURCE_LSE: \ 00476 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 00477 break; \ 00478 default: \ 00479 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 00480 break; \ 00481 } \ 00482 } \ 00483 else if((__HANDLE__)->Instance == LPUART1) \ 00484 { \ 00485 switch(__HAL_RCC_GET_LPUART1_SOURCE()) \ 00486 { \ 00487 case RCC_LPUART1CLKSOURCE_PCLK1: \ 00488 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 00489 break; \ 00490 case RCC_LPUART1CLKSOURCE_HSI: \ 00491 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 00492 break; \ 00493 case RCC_LPUART1CLKSOURCE_SYSCLK: \ 00494 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 00495 break; \ 00496 case RCC_LPUART1CLKSOURCE_LSE: \ 00497 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 00498 break; \ 00499 default: \ 00500 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 00501 break; \ 00502 } \ 00503 } \ 00504 } while(0U) 00505 #elif defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) 00506 #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ 00507 do { \ 00508 if((__HANDLE__)->Instance == USART1) \ 00509 { \ 00510 switch(__HAL_RCC_GET_USART1_SOURCE()) \ 00511 { \ 00512 case RCC_USART1CLKSOURCE_PCLK2: \ 00513 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \ 00514 break; \ 00515 case RCC_USART1CLKSOURCE_HSI: \ 00516 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 00517 break; \ 00518 case RCC_USART1CLKSOURCE_SYSCLK: \ 00519 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 00520 break; \ 00521 case RCC_USART1CLKSOURCE_LSE: \ 00522 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 00523 break; \ 00524 default: \ 00525 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 00526 break; \ 00527 } \ 00528 } \ 00529 else if((__HANDLE__)->Instance == USART2) \ 00530 { \ 00531 switch(__HAL_RCC_GET_USART2_SOURCE()) \ 00532 { \ 00533 case RCC_USART2CLKSOURCE_PCLK1: \ 00534 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 00535 break; \ 00536 case RCC_USART2CLKSOURCE_HSI: \ 00537 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 00538 break; \ 00539 case RCC_USART2CLKSOURCE_SYSCLK: \ 00540 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 00541 break; \ 00542 case RCC_USART2CLKSOURCE_LSE: \ 00543 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 00544 break; \ 00545 default: \ 00546 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 00547 break; \ 00548 } \ 00549 } \ 00550 else if((__HANDLE__)->Instance == USART3) \ 00551 { \ 00552 switch(__HAL_RCC_GET_USART3_SOURCE()) \ 00553 { \ 00554 case RCC_USART3CLKSOURCE_PCLK1: \ 00555 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 00556 break; \ 00557 case RCC_USART3CLKSOURCE_HSI: \ 00558 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 00559 break; \ 00560 case RCC_USART3CLKSOURCE_SYSCLK: \ 00561 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 00562 break; \ 00563 case RCC_USART3CLKSOURCE_LSE: \ 00564 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 00565 break; \ 00566 default: \ 00567 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 00568 break; \ 00569 } \ 00570 } \ 00571 else if((__HANDLE__)->Instance == UART4) \ 00572 { \ 00573 switch(__HAL_RCC_GET_UART4_SOURCE()) \ 00574 { \ 00575 case RCC_UART4CLKSOURCE_PCLK1: \ 00576 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 00577 break; \ 00578 case RCC_UART4CLKSOURCE_HSI: \ 00579 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 00580 break; \ 00581 case RCC_UART4CLKSOURCE_SYSCLK: \ 00582 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 00583 break; \ 00584 case RCC_UART4CLKSOURCE_LSE: \ 00585 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 00586 break; \ 00587 default: \ 00588 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 00589 break; \ 00590 } \ 00591 } \ 00592 else if((__HANDLE__)->Instance == LPUART1) \ 00593 { \ 00594 switch(__HAL_RCC_GET_LPUART1_SOURCE()) \ 00595 { \ 00596 case RCC_LPUART1CLKSOURCE_PCLK1: \ 00597 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 00598 break; \ 00599 case RCC_LPUART1CLKSOURCE_HSI: \ 00600 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 00601 break; \ 00602 case RCC_LPUART1CLKSOURCE_SYSCLK: \ 00603 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 00604 break; \ 00605 case RCC_LPUART1CLKSOURCE_LSE: \ 00606 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 00607 break; \ 00608 default: \ 00609 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 00610 break; \ 00611 } \ 00612 } \ 00613 } while(0U) 00614 #endif 00615 00616 /** @brief Report the UART mask to apply to retrieve the received data 00617 * according to the word length and to the parity bits activation. 00618 * @note If PCE = 1, the parity bit is not included in the data extracted 00619 * by the reception API(). 00620 * This masking operation is not carried out in the case of 00621 * DMA transfers. 00622 * @param __HANDLE__ specifies the UART Handle. 00623 * @retval None, the mask to apply to UART RDR register is stored in (__HANDLE__)->Mask field. 00624 */ 00625 #define UART_MASK_COMPUTATION(__HANDLE__) \ 00626 do { \ 00627 if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_9B) \ 00628 { \ 00629 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ 00630 { \ 00631 (__HANDLE__)->Mask = 0x01FFU ; \ 00632 } \ 00633 else \ 00634 { \ 00635 (__HANDLE__)->Mask = 0x00FFU ; \ 00636 } \ 00637 } \ 00638 else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_8B) \ 00639 { \ 00640 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ 00641 { \ 00642 (__HANDLE__)->Mask = 0x00FFU ; \ 00643 } \ 00644 else \ 00645 { \ 00646 (__HANDLE__)->Mask = 0x007FU ; \ 00647 } \ 00648 } \ 00649 else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_7B) \ 00650 { \ 00651 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ 00652 { \ 00653 (__HANDLE__)->Mask = 0x007FU ; \ 00654 } \ 00655 else \ 00656 { \ 00657 (__HANDLE__)->Mask = 0x003FU ; \ 00658 } \ 00659 } \ 00660 } while(0U) 00661 00662 00663 /** 00664 * @brief Ensure that UART frame length is valid. 00665 * @param __LENGTH__ UART frame length. 00666 * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) 00667 */ 00668 #define IS_UART_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == UART_WORDLENGTH_7B) || \ 00669 ((__LENGTH__) == UART_WORDLENGTH_8B) || \ 00670 ((__LENGTH__) == UART_WORDLENGTH_9B)) 00671 00672 /** 00673 * @brief Ensure that UART wake-up address length is valid. 00674 * @param __ADDRESS__ UART wake-up address length. 00675 * @retval SET (__ADDRESS__ is valid) or RESET (__ADDRESS__ is invalid) 00676 */ 00677 #define IS_UART_ADDRESSLENGTH_DETECT(__ADDRESS__) (((__ADDRESS__) == UART_ADDRESS_DETECT_4B) || \ 00678 ((__ADDRESS__) == UART_ADDRESS_DETECT_7B)) 00679 00680 #if defined(USART_CR1_FIFOEN) 00681 /** 00682 * @brief Ensure that UART TXFIFO threshold level is valid. 00683 * @param __THRESHOLD__ UART TXFIFO threshold level. 00684 * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid) 00685 */ 00686 #define IS_UART_TXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_8) || \ 00687 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_4) || \ 00688 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_2) || \ 00689 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_3_4) || \ 00690 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_7_8) || \ 00691 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_8_8)) 00692 00693 /** 00694 * @brief Ensure that UART RXFIFO threshold level is valid. 00695 * @param __THRESHOLD__ UART RXFIFO threshold level. 00696 * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid) 00697 */ 00698 #define IS_UART_RXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_8) || \ 00699 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_4) || \ 00700 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_2) || \ 00701 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_3_4) || \ 00702 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_7_8) || \ 00703 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_8_8)) 00704 #endif 00705 00706 /** 00707 * @} 00708 */ 00709 00710 /* Private functions ---------------------------------------------------------*/ 00711 00712 /** 00713 * @} 00714 */ 00715 00716 /** 00717 * @} 00718 */ 00719 00720 #ifdef __cplusplus 00721 } 00722 #endif 00723 00724 #endif /* __STM32L4xx_HAL_UART_EX_H */ 00725 00726 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
1.7.6.1