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STM32L486xx HAL User Manual
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32l4xx_hal_uart.h 00004 * @author MCD Application Team 00005 * @brief Header file of UART HAL module. 00006 ****************************************************************************** 00007 * @attention 00008 * 00009 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> 00010 * 00011 * Redistribution and use in source and binary forms, with or without modification, 00012 * are permitted provided that the following conditions are met: 00013 * 1. Redistributions of source code must retain the above copyright notice, 00014 * this list of conditions and the following disclaimer. 00015 * 2. Redistributions in binary form must reproduce the above copyright notice, 00016 * this list of conditions and the following disclaimer in the documentation 00017 * and/or other materials provided with the distribution. 00018 * 3. Neither the name of STMicroelectronics nor the names of its contributors 00019 * may be used to endorse or promote products derived from this software 00020 * without specific prior written permission. 00021 * 00022 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 00023 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 00024 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 00025 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 00026 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 00027 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 00028 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00029 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 00030 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 00031 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00032 * 00033 ****************************************************************************** 00034 */ 00035 00036 /* Define to prevent recursive inclusion -------------------------------------*/ 00037 #ifndef __STM32L4xx_HAL_UART_H 00038 #define __STM32L4xx_HAL_UART_H 00039 00040 #ifdef __cplusplus 00041 extern "C" { 00042 #endif 00043 00044 /* Includes ------------------------------------------------------------------*/ 00045 #include "stm32l4xx_hal_def.h" 00046 00047 /** @addtogroup STM32L4xx_HAL_Driver 00048 * @{ 00049 */ 00050 00051 /** @addtogroup UART 00052 * @{ 00053 */ 00054 00055 /* Exported types ------------------------------------------------------------*/ 00056 /** @defgroup UART_Exported_Types UART Exported Types 00057 * @{ 00058 */ 00059 00060 /** 00061 * @brief UART Init Structure definition 00062 */ 00063 typedef struct 00064 { 00065 uint32_t BaudRate; /*!< This member configures the UART communication baud rate. 00066 The baud rate register is computed using the following formula: 00067 UART: 00068 ===== 00069 - If oversampling is 16 or in LIN mode, 00070 Baud Rate Register = ((uart_ker_ckpres) / ((huart->Init.BaudRate))) 00071 - If oversampling is 8, 00072 Baud Rate Register[15:4] = ((2 * uart_ker_ckpres) / ((huart->Init.BaudRate)))[15:4] 00073 Baud Rate Register[3] = 0 00074 Baud Rate Register[2:0] = (((2 * uart_ker_ckpres) / ((huart->Init.BaudRate)))[3:0]) >> 1 00075 LPUART: 00076 ======= 00077 Baud Rate Register = ((256 * lpuart_ker_ckpres) / ((huart->Init.BaudRate))) 00078 00079 where (uart/lpuart)_ker_ck_pres is the UART input clock divided by a prescaler */ 00080 00081 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. 00082 This parameter can be a value of @ref UARTEx_Word_Length. */ 00083 00084 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted. 00085 This parameter can be a value of @ref UART_Stop_Bits. */ 00086 00087 uint32_t Parity; /*!< Specifies the parity mode. 00088 This parameter can be a value of @ref UART_Parity 00089 @note When parity is enabled, the computed parity is inserted 00090 at the MSB position of the transmitted data (9th bit when 00091 the word length is set to 9 data bits; 8th bit when the 00092 word length is set to 8 data bits). */ 00093 00094 uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled. 00095 This parameter can be a value of @ref UART_Mode. */ 00096 00097 uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled 00098 or disabled. 00099 This parameter can be a value of @ref UART_Hardware_Flow_Control. */ 00100 00101 uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to f_PCLK/8). 00102 This parameter can be a value of @ref UART_Over_Sampling. */ 00103 00104 uint32_t OneBitSampling; /*!< Specifies whether a single sample or three samples' majority vote is selected. 00105 Selecting the single sample method increases the receiver tolerance to clock 00106 deviations. This parameter can be a value of @ref UART_OneBit_Sampling. */ 00107 00108 #if defined(USART_PRESC_PRESCALER) 00109 uint32_t ClockPrescaler; /*!< Specifies the prescaler value used to divide the UART clock source. 00110 This parameter can be a value of @ref UART_ClockPrescaler. */ 00111 #endif 00112 00113 } UART_InitTypeDef; 00114 00115 /** 00116 * @brief UART Advanced Features initalization structure definition 00117 */ 00118 typedef struct 00119 { 00120 uint32_t AdvFeatureInit; /*!< Specifies which advanced UART features is initialized. Several 00121 Advanced Features may be initialized at the same time . 00122 This parameter can be a value of @ref UART_Advanced_Features_Initialization_Type. */ 00123 00124 uint32_t TxPinLevelInvert; /*!< Specifies whether the TX pin active level is inverted. 00125 This parameter can be a value of @ref UART_Tx_Inv. */ 00126 00127 uint32_t RxPinLevelInvert; /*!< Specifies whether the RX pin active level is inverted. 00128 This parameter can be a value of @ref UART_Rx_Inv. */ 00129 00130 uint32_t DataInvert; /*!< Specifies whether data are inverted (positive/direct logic 00131 vs negative/inverted logic). 00132 This parameter can be a value of @ref UART_Data_Inv. */ 00133 00134 uint32_t Swap; /*!< Specifies whether TX and RX pins are swapped. 00135 This parameter can be a value of @ref UART_Rx_Tx_Swap. */ 00136 00137 uint32_t OverrunDisable; /*!< Specifies whether the reception overrun detection is disabled. 00138 This parameter can be a value of @ref UART_Overrun_Disable. */ 00139 00140 uint32_t DMADisableonRxError; /*!< Specifies whether the DMA is disabled in case of reception error. 00141 This parameter can be a value of @ref UART_DMA_Disable_on_Rx_Error. */ 00142 00143 uint32_t AutoBaudRateEnable; /*!< Specifies whether auto Baud rate detection is enabled. 00144 This parameter can be a value of @ref UART_AutoBaudRate_Enable */ 00145 00146 uint32_t AutoBaudRateMode; /*!< If auto Baud rate detection is enabled, specifies how the rate 00147 detection is carried out. 00148 This parameter can be a value of @ref UART_AutoBaud_Rate_Mode. */ 00149 00150 uint32_t MSBFirst; /*!< Specifies whether MSB is sent first on UART line. 00151 This parameter can be a value of @ref UART_MSB_First. */ 00152 } UART_AdvFeatureInitTypeDef; 00153 00154 00155 00156 /** 00157 * @brief HAL UART State structures definition 00158 * @note HAL UART State value is a combination of 2 different substates: gState and RxState. 00159 * - gState contains UART state information related to global Handle management 00160 * and also information related to Tx operations. 00161 * gState value coding follow below described bitmap : 00162 * b7-b6 Error information 00163 * 00 : No Error 00164 * 01 : (Not Used) 00165 * 10 : Timeout 00166 * 11 : Error 00167 * b5 IP initilisation status 00168 * 0 : Reset (IP not initialized) 00169 * 1 : Init done (IP not initialized. HAL UART Init function already called) 00170 * b4-b3 (not used) 00171 * xx : Should be set to 00 00172 * b2 Intrinsic process state 00173 * 0 : Ready 00174 * 1 : Busy (IP busy with some configuration or internal operations) 00175 * b1 (not used) 00176 * x : Should be set to 0 00177 * b0 Tx state 00178 * 0 : Ready (no Tx operation ongoing) 00179 * 1 : Busy (Tx operation ongoing) 00180 * - RxState contains information related to Rx operations. 00181 * RxState value coding follow below described bitmap : 00182 * b7-b6 (not used) 00183 * xx : Should be set to 00 00184 * b5 IP initilisation status 00185 * 0 : Reset (IP not initialized) 00186 * 1 : Init done (IP not initialized) 00187 * b4-b2 (not used) 00188 * xxx : Should be set to 000 00189 * b1 Rx state 00190 * 0 : Ready (no Rx operation ongoing) 00191 * 1 : Busy (Rx operation ongoing) 00192 * b0 (not used) 00193 * x : Should be set to 0. 00194 */ 00195 typedef enum 00196 { 00197 HAL_UART_STATE_RESET = 0x00U, /*!< Peripheral is not initialized 00198 Value is allowed for gState and RxState */ 00199 HAL_UART_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use 00200 Value is allowed for gState and RxState */ 00201 HAL_UART_STATE_BUSY = 0x24U, /*!< an internal process is ongoing 00202 Value is allowed for gState only */ 00203 HAL_UART_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing 00204 Value is allowed for gState only */ 00205 HAL_UART_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing 00206 Value is allowed for RxState only */ 00207 HAL_UART_STATE_BUSY_TX_RX = 0x23U, /*!< Data Transmission and Reception process is ongoing 00208 Not to be used for neither gState nor RxState. 00209 Value is result of combination (Or) between gState and RxState values */ 00210 HAL_UART_STATE_TIMEOUT = 0xA0U, /*!< Timeout state 00211 Value is allowed for gState only */ 00212 HAL_UART_STATE_ERROR = 0xE0U /*!< Error 00213 Value is allowed for gState only */ 00214 } HAL_UART_StateTypeDef; 00215 00216 /** 00217 * @brief UART clock sources definition 00218 */ 00219 typedef enum 00220 { 00221 UART_CLOCKSOURCE_PCLK1 = 0x00U, /*!< PCLK1 clock source */ 00222 UART_CLOCKSOURCE_PCLK2 = 0x01U, /*!< PCLK2 clock source */ 00223 UART_CLOCKSOURCE_HSI = 0x02U, /*!< HSI clock source */ 00224 UART_CLOCKSOURCE_SYSCLK = 0x04U, /*!< SYSCLK clock source */ 00225 UART_CLOCKSOURCE_LSE = 0x08U, /*!< LSE clock source */ 00226 UART_CLOCKSOURCE_UNDEFINED = 0x10U /*!< Undefined clock source */ 00227 } UART_ClockSourceTypeDef; 00228 00229 /** 00230 * @brief UART handle Structure definition 00231 */ 00232 typedef struct __UART_HandleTypeDef 00233 { 00234 USART_TypeDef *Instance; /*!< UART registers base address */ 00235 00236 UART_InitTypeDef Init; /*!< UART communication parameters */ 00237 00238 UART_AdvFeatureInitTypeDef AdvancedInit; /*!< UART Advanced Features initialization parameters */ 00239 00240 uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */ 00241 00242 uint16_t TxXferSize; /*!< UART Tx Transfer size */ 00243 00244 __IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */ 00245 00246 uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */ 00247 00248 uint16_t RxXferSize; /*!< UART Rx Transfer size */ 00249 00250 __IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */ 00251 00252 uint16_t Mask; /*!< UART Rx RDR register mask */ 00253 00254 #if defined(USART_CR1_FIFOEN) 00255 uint32_t FifoMode; /*!< Specifies if the FIFO mode is being used. 00256 This parameter can be a value of @ref UARTEx_FIFO_mode. */ 00257 00258 uint16_t NbRxDataToProcess; /*!< Number of data to process during RX ISR execution */ 00259 00260 uint16_t NbTxDataToProcess; /*!< Number of data to process during TX ISR execution */ 00261 #endif 00262 00263 void (*RxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Rx IRQ handler */ 00264 00265 void (*TxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Tx IRQ handler */ 00266 00267 DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */ 00268 00269 DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */ 00270 00271 HAL_LockTypeDef Lock; /*!< Locking object */ 00272 00273 __IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management 00274 and also related to Tx operations. 00275 This parameter can be a value of @ref HAL_UART_StateTypeDef */ 00276 00277 __IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations. 00278 This parameter can be a value of @ref HAL_UART_StateTypeDef */ 00279 00280 __IO uint32_t ErrorCode; /*!< UART Error code */ 00281 00282 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 00283 void (* TxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Half Complete Callback */ 00284 void (* TxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Complete Callback */ 00285 void (* RxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Half Complete Callback */ 00286 void (* RxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Complete Callback */ 00287 void (* ErrorCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Error Callback */ 00288 void (* AbortCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Complete Callback */ 00289 void (* AbortTransmitCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Transmit Complete Callback */ 00290 void (* AbortReceiveCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Receive Complete Callback */ 00291 void (* WakeupCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Wakeup Callback */ 00292 #if defined(USART_CR1_FIFOEN) 00293 void (* RxFifoFullCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Fifo Full Callback */ 00294 void (* TxFifoEmptyCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Fifo Empty Callback */ 00295 #endif 00296 00297 void (* MspInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp Init callback */ 00298 void (* MspDeInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp DeInit callback */ 00299 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 00300 00301 } UART_HandleTypeDef; 00302 00303 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 00304 /** 00305 * @brief HAL UART Callback ID enumeration definition 00306 */ 00307 typedef enum 00308 { 00309 HAL_UART_TX_HALFCOMPLETE_CB_ID = 0x00U, /*!< UART Tx Half Complete Callback ID */ 00310 HAL_UART_TX_COMPLETE_CB_ID = 0x01U, /*!< UART Tx Complete Callback ID */ 00311 HAL_UART_RX_HALFCOMPLETE_CB_ID = 0x02U, /*!< UART Rx Half Complete Callback ID */ 00312 HAL_UART_RX_COMPLETE_CB_ID = 0x03U, /*!< UART Rx Complete Callback ID */ 00313 HAL_UART_ERROR_CB_ID = 0x04U, /*!< UART Error Callback ID */ 00314 HAL_UART_ABORT_COMPLETE_CB_ID = 0x05U, /*!< UART Abort Complete Callback ID */ 00315 HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID = 0x06U, /*!< UART Abort Transmit Complete Callback ID */ 00316 HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID = 0x07U, /*!< UART Abort Receive Complete Callback ID */ 00317 HAL_UART_WAKEUP_CB_ID = 0x08U, /*!< UART Wakeup Callback ID */ 00318 #if defined(USART_CR1_FIFOEN) 00319 HAL_UART_RX_FIFO_FULL_CB_ID = 0x09U, /*!< UART Rx Fifo Full Callback ID */ 00320 HAL_UART_TX_FIFO_EMPTY_CB_ID = 0x0AU, /*!< UART Tx Fifo Empty Callback ID */ 00321 #endif 00322 00323 HAL_UART_MSPINIT_CB_ID = 0x0BU, /*!< UART MspInit callback ID */ 00324 HAL_UART_MSPDEINIT_CB_ID = 0x0CU /*!< UART MspDeInit callback ID */ 00325 00326 } HAL_UART_CallbackIDTypeDef; 00327 00328 /** 00329 * @brief HAL UART Callback pointer definition 00330 */ 00331 typedef void (*pUART_CallbackTypeDef)(UART_HandleTypeDef *huart); /*!< pointer to an UART callback function */ 00332 00333 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 00334 00335 /** 00336 * @} 00337 */ 00338 00339 /* Exported constants --------------------------------------------------------*/ 00340 /** @defgroup UART_Exported_Constants UART Exported Constants 00341 * @{ 00342 */ 00343 00344 /** @defgroup UART_Error_Definition UART Error Definition 00345 * @{ 00346 */ 00347 #define HAL_UART_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */ 00348 #define HAL_UART_ERROR_PE ((uint32_t)0x00000001U) /*!< Parity error */ 00349 #define HAL_UART_ERROR_NE ((uint32_t)0x00000002U) /*!< Noise error */ 00350 #define HAL_UART_ERROR_FE ((uint32_t)0x00000004U) /*!< Frame error */ 00351 #define HAL_UART_ERROR_ORE ((uint32_t)0x00000008U) /*!< Overrun error */ 00352 #define HAL_UART_ERROR_DMA ((uint32_t)0x00000010U) /*!< DMA transfer error */ 00353 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 00354 #define HAL_UART_ERROR_INVALID_CALLBACK ((uint32_t)0x00000020U) /*!< Invalid Callback error */ 00355 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 00356 /** 00357 * @} 00358 */ 00359 00360 /** @defgroup UART_Stop_Bits UART Number of Stop Bits 00361 * @{ 00362 */ 00363 #define UART_STOPBITS_0_5 USART_CR2_STOP_0 /*!< UART frame with 0.5 stop bit */ 00364 #define UART_STOPBITS_1 0x00000000U /*!< UART frame with 1 stop bit */ 00365 #define UART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< UART frame with 1.5 stop bits */ 00366 #define UART_STOPBITS_2 USART_CR2_STOP_1 /*!< UART frame with 2 stop bits */ 00367 /** 00368 * @} 00369 */ 00370 00371 /** @defgroup UART_Parity UART Parity 00372 * @{ 00373 */ 00374 #define UART_PARITY_NONE 0x00000000U /*!< No parity */ 00375 #define UART_PARITY_EVEN USART_CR1_PCE /*!< Even parity */ 00376 #define UART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Odd parity */ 00377 /** 00378 * @} 00379 */ 00380 00381 /** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control 00382 * @{ 00383 */ 00384 #define UART_HWCONTROL_NONE 0x00000000U /*!< No hardware control */ 00385 #define UART_HWCONTROL_RTS USART_CR3_RTSE /*!< Request To Send */ 00386 #define UART_HWCONTROL_CTS USART_CR3_CTSE /*!< Clear To Send */ 00387 #define UART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) /*!< Request and Clear To Send */ 00388 /** 00389 * @} 00390 */ 00391 00392 /** @defgroup UART_Mode UART Transfer Mode 00393 * @{ 00394 */ 00395 #define UART_MODE_RX USART_CR1_RE /*!< RX mode */ 00396 #define UART_MODE_TX USART_CR1_TE /*!< TX mode */ 00397 #define UART_MODE_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< RX and TX mode */ 00398 /** 00399 * @} 00400 */ 00401 00402 /** @defgroup UART_State UART State 00403 * @{ 00404 */ 00405 #define UART_STATE_DISABLE 0x00000000U /*!< UART disabled */ 00406 #define UART_STATE_ENABLE USART_CR1_UE /*!< UART enabled */ 00407 /** 00408 * @} 00409 */ 00410 00411 /** @defgroup UART_Over_Sampling UART Over Sampling 00412 * @{ 00413 */ 00414 #define UART_OVERSAMPLING_16 0x00000000U /*!< Oversampling by 16 */ 00415 #define UART_OVERSAMPLING_8 USART_CR1_OVER8 /*!< Oversampling by 8 */ 00416 /** 00417 * @} 00418 */ 00419 00420 /** @defgroup UART_OneBit_Sampling UART One Bit Sampling Method 00421 * @{ 00422 */ 00423 #define UART_ONE_BIT_SAMPLE_DISABLE 0x00000000U /*!< One-bit sampling disable */ 00424 #define UART_ONE_BIT_SAMPLE_ENABLE USART_CR3_ONEBIT /*!< One-bit sampling enable */ 00425 /** 00426 * @} 00427 */ 00428 00429 #if defined(USART_PRESC_PRESCALER) 00430 /** @defgroup UART_ClockPrescaler UART Clock Prescaler 00431 * @{ 00432 */ 00433 #define UART_PRESCALER_DIV1 0x00000000U /*!< fclk_pres = fclk */ 00434 #define UART_PRESCALER_DIV2 0x00000001U /*!< fclk_pres = fclk/2 */ 00435 #define UART_PRESCALER_DIV4 0x00000002U /*!< fclk_pres = fclk/4 */ 00436 #define UART_PRESCALER_DIV6 0x00000003U /*!< fclk_pres = fclk/6 */ 00437 #define UART_PRESCALER_DIV8 0x00000004U /*!< fclk_pres = fclk/8 */ 00438 #define UART_PRESCALER_DIV10 0x00000005U /*!< fclk_pres = fclk/10 */ 00439 #define UART_PRESCALER_DIV12 0x00000006U /*!< fclk_pres = fclk/12 */ 00440 #define UART_PRESCALER_DIV16 0x00000007U /*!< fclk_pres = fclk/16 */ 00441 #define UART_PRESCALER_DIV32 0x00000008U /*!< fclk_pres = fclk/32 */ 00442 #define UART_PRESCALER_DIV64 0x00000009U /*!< fclk_pres = fclk/64 */ 00443 #define UART_PRESCALER_DIV128 0x0000000AU /*!< fclk_pres = fclk/128 */ 00444 #define UART_PRESCALER_DIV256 0x0000000BU /*!< fclk_pres = fclk/256 */ 00445 00446 /** 00447 * @} 00448 */ 00449 #endif 00450 00451 /** @defgroup UART_AutoBaud_Rate_Mode UART Advanced Feature AutoBaud Rate Mode 00452 * @{ 00453 */ 00454 #define UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT 0x00000000U /*!< Auto Baud rate detection on start bit */ 00455 #define UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE USART_CR2_ABRMODE_0 /*!< Auto Baud rate detection on falling edge */ 00456 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME USART_CR2_ABRMODE_1 /*!< Auto Baud rate detection on 0x7F frame detection */ 00457 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME USART_CR2_ABRMODE /*!< Auto Baud rate detection on 0x55 frame detection */ 00458 /** 00459 * @} 00460 */ 00461 00462 /** @defgroup UART_Receiver_TimeOut UART Receiver TimeOut 00463 * @{ 00464 */ 00465 #define UART_RECEIVER_TIMEOUT_DISABLE 0x00000000U /*!< UART receiver timeout disable */ 00466 #define UART_RECEIVER_TIMEOUT_ENABLE USART_CR2_RTOEN /*!< UART receiver timeout enable */ 00467 /** 00468 * @} 00469 */ 00470 00471 /** @defgroup UART_LIN UART Local Interconnection Network mode 00472 * @{ 00473 */ 00474 #define UART_LIN_DISABLE 0x00000000U /*!< Local Interconnect Network disable */ 00475 #define UART_LIN_ENABLE USART_CR2_LINEN /*!< Local Interconnect Network enable */ 00476 /** 00477 * @} 00478 */ 00479 00480 /** @defgroup UART_LIN_Break_Detection UART LIN Break Detection 00481 * @{ 00482 */ 00483 #define UART_LINBREAKDETECTLENGTH_10B 0x00000000U /*!< LIN 10-bit break detection length */ 00484 #define UART_LINBREAKDETECTLENGTH_11B USART_CR2_LBDL /*!< LIN 11-bit break detection length */ 00485 /** 00486 * @} 00487 */ 00488 00489 /** @defgroup UART_DMA_Tx UART DMA Tx 00490 * @{ 00491 */ 00492 #define UART_DMA_TX_DISABLE 0x00000000U /*!< UART DMA TX disabled */ 00493 #define UART_DMA_TX_ENABLE USART_CR3_DMAT /*!< UART DMA TX enabled */ 00494 /** 00495 * @} 00496 */ 00497 00498 /** @defgroup UART_DMA_Rx UART DMA Rx 00499 * @{ 00500 */ 00501 #define UART_DMA_RX_DISABLE 0x00000000U /*!< UART DMA RX disabled */ 00502 #define UART_DMA_RX_ENABLE USART_CR3_DMAR /*!< UART DMA RX enabled */ 00503 /** 00504 * @} 00505 */ 00506 00507 /** @defgroup UART_Half_Duplex_Selection UART Half Duplex Selection 00508 * @{ 00509 */ 00510 #define UART_HALF_DUPLEX_DISABLE 0x00000000U /*!< UART half-duplex disabled */ 00511 #define UART_HALF_DUPLEX_ENABLE USART_CR3_HDSEL /*!< UART half-duplex enabled */ 00512 /** 00513 * @} 00514 */ 00515 00516 /** @defgroup UART_WakeUp_Methods UART WakeUp Methods 00517 * @{ 00518 */ 00519 #define UART_WAKEUPMETHOD_IDLELINE 0x00000000U /*!< UART wake-up on idle line */ 00520 #define UART_WAKEUPMETHOD_ADDRESSMARK USART_CR1_WAKE /*!< UART wake-up on address mark */ 00521 /** 00522 * @} 00523 */ 00524 00525 /** @defgroup UART_Request_Parameters UART Request Parameters 00526 * @{ 00527 */ 00528 #define UART_AUTOBAUD_REQUEST USART_RQR_ABRRQ /*!< Auto-Baud Rate Request */ 00529 #define UART_SENDBREAK_REQUEST USART_RQR_SBKRQ /*!< Send Break Request */ 00530 #define UART_MUTE_MODE_REQUEST USART_RQR_MMRQ /*!< Mute Mode Request */ 00531 #define UART_RXDATA_FLUSH_REQUEST USART_RQR_RXFRQ /*!< Receive Data flush Request */ 00532 #define UART_TXDATA_FLUSH_REQUEST USART_RQR_TXFRQ /*!< Transmit data flush Request */ 00533 /** 00534 * @} 00535 */ 00536 00537 /** @defgroup UART_Advanced_Features_Initialization_Type UART Advanced Feature Initialization Type 00538 * @{ 00539 */ 00540 #define UART_ADVFEATURE_NO_INIT 0x00000000U /*!< No advanced feature initialization */ 00541 #define UART_ADVFEATURE_TXINVERT_INIT 0x00000001U /*!< TX pin active level inversion */ 00542 #define UART_ADVFEATURE_RXINVERT_INIT 0x00000002U /*!< RX pin active level inversion */ 00543 #define UART_ADVFEATURE_DATAINVERT_INIT 0x00000004U /*!< Binary data inversion */ 00544 #define UART_ADVFEATURE_SWAP_INIT 0x00000008U /*!< TX/RX pins swap */ 00545 #define UART_ADVFEATURE_RXOVERRUNDISABLE_INIT 0x00000010U /*!< RX overrun disable */ 00546 #define UART_ADVFEATURE_DMADISABLEONERROR_INIT 0x00000020U /*!< DMA disable on Reception Error */ 00547 #define UART_ADVFEATURE_AUTOBAUDRATE_INIT 0x00000040U /*!< Auto Baud rate detection initialization */ 00548 #define UART_ADVFEATURE_MSBFIRST_INIT 0x00000080U /*!< Most significant bit sent/received first */ 00549 /** 00550 * @} 00551 */ 00552 00553 /** @defgroup UART_Tx_Inv UART Advanced Feature TX Pin Active Level Inversion 00554 * @{ 00555 */ 00556 #define UART_ADVFEATURE_TXINV_DISABLE 0x00000000U /*!< TX pin active level inversion disable */ 00557 #define UART_ADVFEATURE_TXINV_ENABLE USART_CR2_TXINV /*!< TX pin active level inversion enable */ 00558 /** 00559 * @} 00560 */ 00561 00562 /** @defgroup UART_Rx_Inv UART Advanced Feature RX Pin Active Level Inversion 00563 * @{ 00564 */ 00565 #define UART_ADVFEATURE_RXINV_DISABLE 0x00000000U /*!< RX pin active level inversion disable */ 00566 #define UART_ADVFEATURE_RXINV_ENABLE USART_CR2_RXINV /*!< RX pin active level inversion enable */ 00567 /** 00568 * @} 00569 */ 00570 00571 /** @defgroup UART_Data_Inv UART Advanced Feature Binary Data Inversion 00572 * @{ 00573 */ 00574 #define UART_ADVFEATURE_DATAINV_DISABLE 0x00000000U /*!< Binary data inversion disable */ 00575 #define UART_ADVFEATURE_DATAINV_ENABLE USART_CR2_DATAINV /*!< Binary data inversion enable */ 00576 /** 00577 * @} 00578 */ 00579 00580 /** @defgroup UART_Rx_Tx_Swap UART Advanced Feature RX TX Pins Swap 00581 * @{ 00582 */ 00583 #define UART_ADVFEATURE_SWAP_DISABLE 0x00000000U /*!< TX/RX pins swap disable */ 00584 #define UART_ADVFEATURE_SWAP_ENABLE USART_CR2_SWAP /*!< TX/RX pins swap enable */ 00585 /** 00586 * @} 00587 */ 00588 00589 /** @defgroup UART_Overrun_Disable UART Advanced Feature Overrun Disable 00590 * @{ 00591 */ 00592 #define UART_ADVFEATURE_OVERRUN_ENABLE 0x00000000U /*!< RX overrun enable */ 00593 #define UART_ADVFEATURE_OVERRUN_DISABLE USART_CR3_OVRDIS /*!< RX overrun disable */ 00594 /** 00595 * @} 00596 */ 00597 00598 /** @defgroup UART_AutoBaudRate_Enable UART Advanced Feature Auto BaudRate Enable 00599 * @{ 00600 */ 00601 #define UART_ADVFEATURE_AUTOBAUDRATE_DISABLE 0x00000000U /*!< RX Auto Baud rate detection enable */ 00602 #define UART_ADVFEATURE_AUTOBAUDRATE_ENABLE USART_CR2_ABREN /*!< RX Auto Baud rate detection disable */ 00603 /** 00604 * @} 00605 */ 00606 00607 /** @defgroup UART_DMA_Disable_on_Rx_Error UART Advanced Feature DMA Disable On Rx Error 00608 * @{ 00609 */ 00610 #define UART_ADVFEATURE_DMA_ENABLEONRXERROR 0x00000000U /*!< DMA enable on Reception Error */ 00611 #define UART_ADVFEATURE_DMA_DISABLEONRXERROR USART_CR3_DDRE /*!< DMA disable on Reception Error */ 00612 /** 00613 * @} 00614 */ 00615 00616 /** @defgroup UART_MSB_First UART Advanced Feature MSB First 00617 * @{ 00618 */ 00619 #define UART_ADVFEATURE_MSBFIRST_DISABLE 0x00000000U /*!< Most significant bit sent/received first disable */ 00620 #define UART_ADVFEATURE_MSBFIRST_ENABLE USART_CR2_MSBFIRST /*!< Most significant bit sent/received first enable */ 00621 /** 00622 * @} 00623 */ 00624 00625 /** @defgroup UART_Stop_Mode_Enable UART Advanced Feature Stop Mode Enable 00626 * @{ 00627 */ 00628 #define UART_ADVFEATURE_STOPMODE_DISABLE 0x00000000U /*!< UART stop mode disable */ 00629 #define UART_ADVFEATURE_STOPMODE_ENABLE USART_CR1_UESM /*!< UART stop mode enable */ 00630 /** 00631 * @} 00632 */ 00633 00634 /** @defgroup UART_Mute_Mode UART Advanced Feature Mute Mode Enable 00635 * @{ 00636 */ 00637 #define UART_ADVFEATURE_MUTEMODE_DISABLE 0x00000000U /*!< UART mute mode disable */ 00638 #define UART_ADVFEATURE_MUTEMODE_ENABLE USART_CR1_MME /*!< UART mute mode enable */ 00639 /** 00640 * @} 00641 */ 00642 00643 /** @defgroup UART_CR2_ADDRESS_LSB_POS UART Address-matching LSB Position In CR2 Register 00644 * @{ 00645 */ 00646 #define UART_CR2_ADDRESS_LSB_POS 24U /*!< UART address-matching LSB position in CR2 register */ 00647 /** 00648 * @} 00649 */ 00650 00651 /** @defgroup UART_WakeUp_from_Stop_Selection UART WakeUp From Stop Selection 00652 * @{ 00653 */ 00654 #define UART_WAKEUP_ON_ADDRESS 0x00000000U /*!< UART wake-up on address */ 00655 #define UART_WAKEUP_ON_STARTBIT USART_CR3_WUS_1 /*!< UART wake-up on start bit */ 00656 #define UART_WAKEUP_ON_READDATA_NONEMPTY USART_CR3_WUS /*!< UART wake-up on receive data register not empty or RXFIFO is not empty */ 00657 /** 00658 * @} 00659 */ 00660 00661 /** @defgroup UART_DriverEnable_Polarity UART DriverEnable Polarity 00662 * @{ 00663 */ 00664 #define UART_DE_POLARITY_HIGH 0x00000000U /*!< Driver enable signal is active high */ 00665 #define UART_DE_POLARITY_LOW USART_CR3_DEP /*!< Driver enable signal is active low */ 00666 /** 00667 * @} 00668 */ 00669 00670 /** @defgroup UART_CR1_DEAT_ADDRESS_LSB_POS UART Driver Enable Assertion Time LSB Position In CR1 Register 00671 * @{ 00672 */ 00673 #define UART_CR1_DEAT_ADDRESS_LSB_POS 21U /*!< UART Driver Enable assertion time LSB position in CR1 register */ 00674 /** 00675 * @} 00676 */ 00677 00678 /** @defgroup UART_CR1_DEDT_ADDRESS_LSB_POS UART Driver Enable DeAssertion Time LSB Position In CR1 Register 00679 * @{ 00680 */ 00681 #define UART_CR1_DEDT_ADDRESS_LSB_POS 16U /*!< UART Driver Enable de-assertion time LSB position in CR1 register */ 00682 /** 00683 * @} 00684 */ 00685 00686 /** @defgroup UART_Interruption_Mask UART Interruptions Flag Mask 00687 * @{ 00688 */ 00689 #define UART_IT_MASK 0x001FU /*!< UART interruptions flags mask */ 00690 /** 00691 * @} 00692 */ 00693 00694 /** @defgroup UART_TimeOut_Value UART polling-based communications time-out value 00695 * @{ 00696 */ 00697 #define HAL_UART_TIMEOUT_VALUE 0x1FFFFFFU /*!< UART polling-based communications time-out value */ 00698 /** 00699 * @} 00700 */ 00701 00702 /** @defgroup UART_Flags UART Status Flags 00703 * Elements values convention: 0xXXXX 00704 * - 0xXXXX : Flag mask in the ISR register 00705 * @{ 00706 */ 00707 #define UART_FLAG_TXFT USART_ISR_TXFT /*!< UART TXFIFO threshold flag */ 00708 #define UART_FLAG_RXFT USART_ISR_RXFT /*!< UART RXFIFO threshold flag */ 00709 #define UART_FLAG_RXFF USART_ISR_RXFF /*!< UART RXFIFO Full flag */ 00710 #define UART_FLAG_TXFE USART_ISR_TXFE /*!< UART TXFIFO Empty flag */ 00711 #define UART_FLAG_REACK USART_ISR_REACK /*!< UART receive enable acknowledge flag */ 00712 #define UART_FLAG_TEACK USART_ISR_TEACK /*!< UART transmit enable acknowledge flag */ 00713 #define UART_FLAG_WUF USART_ISR_WUF /*!< UART wake-up from stop mode flag */ 00714 #define UART_FLAG_RWU USART_ISR_RWU /*!< UART receiver wake-up from mute mode flag */ 00715 #define UART_FLAG_SBKF USART_ISR_SBKF /*!< UART send break flag */ 00716 #define UART_FLAG_CMF USART_ISR_CMF /*!< UART character match flag */ 00717 #define UART_FLAG_BUSY USART_ISR_BUSY /*!< UART busy flag */ 00718 #define UART_FLAG_ABRF USART_ISR_ABRF /*!< UART auto Baud rate flag */ 00719 #define UART_FLAG_ABRE USART_ISR_ABRE /*!< UART auto Baud rate error */ 00720 #define UART_FLAG_CTS USART_ISR_CTS /*!< UART clear to send flag */ 00721 #define UART_FLAG_CTSIF USART_ISR_CTSIF /*!< UART clear to send interrupt flag */ 00722 #define UART_FLAG_LBDF USART_ISR_LBDF /*!< UART LIN break detection flag */ 00723 #if defined(USART_CR1_FIFOEN) 00724 #define UART_FLAG_TXE USART_ISR_TXE_TXFNF /*!< UART transmit data register empty */ 00725 #define UART_FLAG_TXFNF USART_ISR_TXE_TXFNF /*!< UART TXFIFO not full */ 00726 #else 00727 #define UART_FLAG_TXE USART_ISR_TXE /*!< UART transmit data register empty */ 00728 #endif 00729 #define UART_FLAG_TC USART_ISR_TC /*!< UART transmission complete */ 00730 #if defined(USART_CR1_FIFOEN) 00731 #define UART_FLAG_RXNE USART_ISR_RXNE_RXFNE /*!< UART read data register not empty */ 00732 #define UART_FLAG_RXFNE USART_ISR_RXNE_RXFNE /*!< UART RXFIFO not empty */ 00733 #else 00734 #define UART_FLAG_RXNE USART_ISR_RXNE /*!< UART read data register not empty */ 00735 #endif 00736 #define UART_FLAG_IDLE USART_ISR_IDLE /*!< UART idle flag */ 00737 #define UART_FLAG_ORE USART_ISR_ORE /*!< UART overrun error */ 00738 #define UART_FLAG_NE USART_ISR_NE /*!< UART noise error */ 00739 #define UART_FLAG_FE USART_ISR_FE /*!< UART frame error */ 00740 #define UART_FLAG_PE USART_ISR_PE /*!< UART parity error */ 00741 /** 00742 * @} 00743 */ 00744 00745 /** @defgroup UART_Interrupt_definition UART Interrupts Definition 00746 * Elements values convention: 000ZZZZZ0XXYYYYYb 00747 * - YYYYY : Interrupt source position in the XX register (5bits) 00748 * - XX : Interrupt source register (2bits) 00749 * - 01: CR1 register 00750 * - 10: CR2 register 00751 * - 11: CR3 register 00752 * - ZZZZZ : Flag position in the ISR register(5bits) 00753 * @{ 00754 */ 00755 #define UART_IT_PE 0x0028U /*!< UART parity error interruption */ 00756 #define UART_IT_TXE 0x0727U /*!< UART transmit data register empty interruption */ 00757 #if defined(USART_CR1_FIFOEN) 00758 #define UART_IT_TXFNF 0x0727U /*!< UART TX FIFO not full interruption */ 00759 #endif 00760 #define UART_IT_TC 0x0626U /*!< UART transmission complete interruption */ 00761 #define UART_IT_RXNE 0x0525U /*!< UART read data register not empty interruption */ 00762 #if defined(USART_CR1_FIFOEN) 00763 #define UART_IT_RXFNE 0x0525U /*!< UART RXFIFO not empty interruption */ 00764 #endif 00765 #define UART_IT_IDLE 0x0424U /*!< UART idle interruption */ 00766 #define UART_IT_LBD 0x0846U /*!< UART LIN break detection interruption */ 00767 #define UART_IT_CTS 0x096AU /*!< UART CTS interruption */ 00768 #define UART_IT_CM 0x112EU /*!< UART character match interruption */ 00769 #define UART_IT_WUF 0x1476U /*!< UART wake-up from stop mode interruption */ 00770 #if defined(USART_CR1_FIFOEN) 00771 #define UART_IT_RXFF 0x183FU /*!< UART RXFIFO full interruption */ 00772 #define UART_IT_TXFE 0x173EU /*!< UART TXFIFO empty interruption */ 00773 #define UART_IT_RXFT 0x1A7CU /*!< UART RXFIFO threshold reached interruption */ 00774 #define UART_IT_TXFT 0x1B77U /*!< UART TXFIFO threshold reached interruption */ 00775 #endif 00776 00777 /* Elements values convention: 000000000XXYYYYYb 00778 - YYYYY : Interrupt source position in the XX register (5bits) 00779 - XX : Interrupt source register (2bits) 00780 - 01: CR1 register 00781 - 10: CR2 register 00782 - 11: CR3 register */ 00783 #define UART_IT_ERR 0x0060U /*!< UART error interruption */ 00784 00785 /* Elements values convention: 0000ZZZZ00000000b 00786 - ZZZZ : Flag position in the ISR register(4bits) */ 00787 #define UART_IT_ORE 0x0300U /*!< UART overrun error interruption */ 00788 #define UART_IT_NE 0x0200U /*!< UART noise error interruption */ 00789 #define UART_IT_FE 0x0100U /*!< UART frame error interruption */ 00790 /** 00791 * @} 00792 */ 00793 00794 /** @defgroup UART_IT_CLEAR_Flags UART Interruption Clear Flags 00795 * @{ 00796 */ 00797 #define UART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */ 00798 #define UART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */ 00799 #define UART_CLEAR_NEF USART_ICR_NECF /*!< Noise Error detected Clear Flag */ 00800 #define UART_CLEAR_OREF USART_ICR_ORECF /*!< Overrun Error Clear Flag */ 00801 #define UART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */ 00802 #if defined(USART_CR1_FIFOEN) 00803 #define UART_CLEAR_TXFECF USART_ICR_TXFECF /*!< TXFIFO empty clear flag */ 00804 #endif 00805 #define UART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */ 00806 #define UART_CLEAR_LBDF USART_ICR_LBDCF /*!< LIN Break Detection Clear Flag */ 00807 #define UART_CLEAR_CTSF USART_ICR_CTSCF /*!< CTS Interrupt Clear Flag */ 00808 #define UART_CLEAR_CMF USART_ICR_CMCF /*!< Character Match Clear Flag */ 00809 #define UART_CLEAR_WUF USART_ICR_WUCF /*!< Wake Up from stop mode Clear Flag */ 00810 /** 00811 * @} 00812 */ 00813 00814 00815 /** 00816 * @} 00817 */ 00818 00819 /* Exported macros -----------------------------------------------------------*/ 00820 /** @defgroup UART_Exported_Macros UART Exported Macros 00821 * @{ 00822 */ 00823 00824 /** @brief Reset UART handle states. 00825 * @param __HANDLE__ UART handle. 00826 * @retval None 00827 */ 00828 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 00829 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ 00830 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ 00831 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ 00832 (__HANDLE__)->MspInitCallback = NULL; \ 00833 (__HANDLE__)->MspDeInitCallback = NULL; \ 00834 } while(0U) 00835 #else 00836 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ 00837 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ 00838 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ 00839 } while(0U) 00840 #endif /*USE_HAL_UART_REGISTER_CALLBACKS */ 00841 00842 /** @brief Flush the UART Data registers. 00843 * @param __HANDLE__ specifies the UART Handle. 00844 * @retval None 00845 */ 00846 #define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) \ 00847 do{ \ 00848 SET_BIT((__HANDLE__)->Instance->RQR, UART_RXDATA_FLUSH_REQUEST); \ 00849 SET_BIT((__HANDLE__)->Instance->RQR, UART_TXDATA_FLUSH_REQUEST); \ 00850 } while(0U) 00851 00852 /** @brief Clear the specified UART pending flag. 00853 * @param __HANDLE__ specifies the UART Handle. 00854 * @param __FLAG__ specifies the flag to check. 00855 * This parameter can be any combination of the following values: 00856 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag 00857 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag 00858 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag 00859 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag 00860 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag 00861 * @arg @ref UART_CLEAR_TXFECF TXFIFO empty clear Flag 00862 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag 00863 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag 00864 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag 00865 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag 00866 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag 00867 * @retval None 00868 */ 00869 #define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) 00870 00871 /** @brief Clear the UART PE pending flag. 00872 * @param __HANDLE__ specifies the UART Handle. 00873 * @retval None 00874 */ 00875 #define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_PEF) 00876 00877 /** @brief Clear the UART FE pending flag. 00878 * @param __HANDLE__ specifies the UART Handle. 00879 * @retval None 00880 */ 00881 #define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_FEF) 00882 00883 /** @brief Clear the UART NE pending flag. 00884 * @param __HANDLE__ specifies the UART Handle. 00885 * @retval None 00886 */ 00887 #define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_NEF) 00888 00889 /** @brief Clear the UART ORE pending flag. 00890 * @param __HANDLE__ specifies the UART Handle. 00891 * @retval None 00892 */ 00893 #define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_OREF) 00894 00895 /** @brief Clear the UART IDLE pending flag. 00896 * @param __HANDLE__ specifies the UART Handle. 00897 * @retval None 00898 */ 00899 #define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_IDLEF) 00900 00901 #if defined(USART_CR1_FIFOEN) 00902 /** @brief Clear the UART TX FIFO empty clear flag. 00903 * @param __HANDLE__ specifies the UART Handle. 00904 * @retval None 00905 */ 00906 #define __HAL_UART_CLEAR_TXFECF(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_TXFECF) 00907 #endif 00908 00909 /** @brief Check whether the specified UART flag is set or not. 00910 * @param __HANDLE__ specifies the UART Handle. 00911 * @param __FLAG__ specifies the flag to check. 00912 * This parameter can be one of the following values: 00913 * @arg @ref UART_FLAG_TXFT TXFIFO threshold flag 00914 * @arg @ref UART_FLAG_RXFT RXFIFO threshold flag 00915 * @arg @ref UART_FLAG_RXFF RXFIFO Full flag 00916 * @arg @ref UART_FLAG_TXFE TXFIFO Empty flag 00917 * @arg @ref UART_FLAG_REACK Receive enable acknowledge flag 00918 * @arg @ref UART_FLAG_TEACK Transmit enable acknowledge flag 00919 * @arg @ref UART_FLAG_WUF Wake up from stop mode flag 00920 * @arg @ref UART_FLAG_RWU Receiver wake up flag (if the UART in mute mode) 00921 * @arg @ref UART_FLAG_SBKF Send Break flag 00922 * @arg @ref UART_FLAG_CMF Character match flag 00923 * @arg @ref UART_FLAG_BUSY Busy flag 00924 * @arg @ref UART_FLAG_ABRF Auto Baud rate detection flag 00925 * @arg @ref UART_FLAG_ABRE Auto Baud rate detection error flag 00926 * @arg @ref UART_FLAG_CTS CTS Change flag 00927 * @arg @ref UART_FLAG_LBDF LIN Break detection flag 00928 * @arg @ref UART_FLAG_TXE Transmit data register empty flag 00929 * @arg @ref UART_FLAG_TXFNF UART TXFIFO not full flag 00930 * @arg @ref UART_FLAG_TC Transmission Complete flag 00931 * @arg @ref UART_FLAG_RXNE Receive data register not empty flag 00932 * @arg @ref UART_FLAG_RXFNE UART RXFIFO not empty flag 00933 * @arg @ref UART_FLAG_IDLE Idle Line detection flag 00934 * @arg @ref UART_FLAG_ORE Overrun Error flag 00935 * @arg @ref UART_FLAG_NE Noise Error flag 00936 * @arg @ref UART_FLAG_FE Framing Error flag 00937 * @arg @ref UART_FLAG_PE Parity Error flag 00938 * @retval The new state of __FLAG__ (TRUE or FALSE). 00939 */ 00940 #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__)) 00941 00942 /** @brief Enable the specified UART interrupt. 00943 * @param __HANDLE__ specifies the UART Handle. 00944 * @param __INTERRUPT__ specifies the UART interrupt source to enable. 00945 * This parameter can be one of the following values: 00946 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 00947 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 00948 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 00949 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 00950 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 00951 * @arg @ref UART_IT_CM Character match interrupt 00952 * @arg @ref UART_IT_CTS CTS change interrupt 00953 * @arg @ref UART_IT_LBD LIN Break detection interrupt 00954 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 00955 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 00956 * @arg @ref UART_IT_TC Transmission complete interrupt 00957 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 00958 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 00959 * @arg @ref UART_IT_IDLE Idle line detection interrupt 00960 * @arg @ref UART_IT_PE Parity Error interrupt 00961 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 00962 * @retval None 00963 */ 00964 #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))): \ 00965 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))): \ 00966 ((__HANDLE__)->Instance->CR3 |= (1U << ((__INTERRUPT__) & UART_IT_MASK)))) 00967 00968 00969 /** @brief Disable the specified UART interrupt. 00970 * @param __HANDLE__ specifies the UART Handle. 00971 * @param __INTERRUPT__ specifies the UART interrupt source to disable. 00972 * This parameter can be one of the following values: 00973 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 00974 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 00975 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 00976 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 00977 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 00978 * @arg @ref UART_IT_CM Character match interrupt 00979 * @arg @ref UART_IT_CTS CTS change interrupt 00980 * @arg @ref UART_IT_LBD LIN Break detection interrupt 00981 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 00982 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 00983 * @arg @ref UART_IT_TC Transmission complete interrupt 00984 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 00985 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 00986 * @arg @ref UART_IT_IDLE Idle line detection interrupt 00987 * @arg @ref UART_IT_PE Parity Error interrupt 00988 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 00989 * @retval None 00990 */ 00991 #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))): \ 00992 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))): \ 00993 ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK)))) 00994 00995 /** @brief Check whether the specified UART interrupt has occurred or not. 00996 * @param __HANDLE__ specifies the UART Handle. 00997 * @param __INTERRUPT__ specifies the UART interrupt to check. 00998 * This parameter can be one of the following values: 00999 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 01000 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 01001 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 01002 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 01003 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 01004 * @arg @ref UART_IT_CM Character match interrupt 01005 * @arg @ref UART_IT_CTS CTS change interrupt 01006 * @arg @ref UART_IT_LBD LIN Break detection interrupt 01007 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 01008 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 01009 * @arg @ref UART_IT_TC Transmission complete interrupt 01010 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 01011 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 01012 * @arg @ref UART_IT_IDLE Idle line detection interrupt 01013 * @arg @ref UART_IT_PE Parity Error interrupt 01014 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 01015 * @retval The new state of __INTERRUPT__ (SET or RESET). 01016 */ 01017 #define __HAL_UART_GET_IT(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISR & (1U << ((__INTERRUPT__)>> 8U))) != RESET) ? SET : RESET) 01018 01019 /** @brief Check whether the specified UART interrupt source is enabled or not. 01020 * @param __HANDLE__ specifies the UART Handle. 01021 * @param __INTERRUPT__ specifies the UART interrupt source to check. 01022 * This parameter can be one of the following values: 01023 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 01024 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 01025 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 01026 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 01027 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 01028 * @arg @ref UART_IT_CM Character match interrupt 01029 * @arg @ref UART_IT_CTS CTS change interrupt 01030 * @arg @ref UART_IT_LBD LIN Break detection interrupt 01031 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 01032 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 01033 * @arg @ref UART_IT_TC Transmission complete interrupt 01034 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 01035 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 01036 * @arg @ref UART_IT_IDLE Idle line detection interrupt 01037 * @arg @ref UART_IT_PE Parity Error interrupt 01038 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 01039 * @retval The new state of __INTERRUPT__ (SET or RESET). 01040 */ 01041 #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U) ? (__HANDLE__)->Instance->CR1 : \ 01042 (((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U) ? (__HANDLE__)->Instance->CR2 : \ 01043 (__HANDLE__)->Instance->CR3)) & (1U << (((uint16_t)(__INTERRUPT__)) & UART_IT_MASK))) != RESET) ? SET : RESET) 01044 01045 /** @brief Clear the specified UART ISR flag, in setting the proper ICR register flag. 01046 * @param __HANDLE__ specifies the UART Handle. 01047 * @param __IT_CLEAR__ specifies the interrupt clear register flag that needs to be set 01048 * to clear the corresponding interrupt 01049 * This parameter can be one of the following values: 01050 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag 01051 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag 01052 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag 01053 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag 01054 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag 01055 * @arg @ref UART_CLEAR_TXFECF TXFIFO empty Clear Flag 01056 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag 01057 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag 01058 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag 01059 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag 01060 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag 01061 * @retval None 01062 */ 01063 #define __HAL_UART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__)) 01064 01065 /** @brief Set a specific UART request flag. 01066 * @param __HANDLE__ specifies the UART Handle. 01067 * @param __REQ__ specifies the request flag to set 01068 * This parameter can be one of the following values: 01069 * @arg @ref UART_AUTOBAUD_REQUEST Auto-Baud Rate Request 01070 * @arg @ref UART_SENDBREAK_REQUEST Send Break Request 01071 * @arg @ref UART_MUTE_MODE_REQUEST Mute Mode Request 01072 * @arg @ref UART_RXDATA_FLUSH_REQUEST Receive Data flush Request 01073 * @arg @ref UART_TXDATA_FLUSH_REQUEST Transmit data flush Request 01074 * @retval None 01075 */ 01076 #define __HAL_UART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (__REQ__)) 01077 01078 /** @brief Enable the UART one bit sample method. 01079 * @param __HANDLE__ specifies the UART Handle. 01080 * @retval None 01081 */ 01082 #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT) 01083 01084 /** @brief Disable the UART one bit sample method. 01085 * @param __HANDLE__ specifies the UART Handle. 01086 * @retval None 01087 */ 01088 #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= ~USART_CR3_ONEBIT) 01089 01090 /** @brief Enable UART. 01091 * @param __HANDLE__ specifies the UART Handle. 01092 * @retval None 01093 */ 01094 #define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE) 01095 01096 /** @brief Disable UART. 01097 * @param __HANDLE__ specifies the UART Handle. 01098 * @retval None 01099 */ 01100 #define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE) 01101 01102 /** @brief Enable CTS flow control. 01103 * @note This macro allows to enable CTS hardware flow control for a given UART instance, 01104 * without need to call HAL_UART_Init() function. 01105 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 01106 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need 01107 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 01108 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 01109 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__)) 01110 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 01111 * @param __HANDLE__ specifies the UART Handle. 01112 * @retval None 01113 */ 01114 #define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \ 01115 do{ \ 01116 SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ 01117 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \ 01118 } while(0U) 01119 01120 /** @brief Disable CTS flow control. 01121 * @note This macro allows to disable CTS hardware flow control for a given UART instance, 01122 * without need to call HAL_UART_Init() function. 01123 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 01124 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need 01125 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 01126 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 01127 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__)) 01128 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 01129 * @param __HANDLE__ specifies the UART Handle. 01130 * @retval None 01131 */ 01132 #define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \ 01133 do{ \ 01134 CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ 01135 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \ 01136 } while(0U) 01137 01138 /** @brief Enable RTS flow control. 01139 * @note This macro allows to enable RTS hardware flow control for a given UART instance, 01140 * without need to call HAL_UART_Init() function. 01141 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 01142 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need 01143 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 01144 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 01145 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__)) 01146 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 01147 * @param __HANDLE__ specifies the UART Handle. 01148 * @retval None 01149 */ 01150 #define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \ 01151 do{ \ 01152 SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \ 01153 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \ 01154 } while(0U) 01155 01156 /** @brief Disable RTS flow control. 01157 * @note This macro allows to disable RTS hardware flow control for a given UART instance, 01158 * without need to call HAL_UART_Init() function. 01159 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 01160 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need 01161 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 01162 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 01163 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__)) 01164 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 01165 * @param __HANDLE__ specifies the UART Handle. 01166 * @retval None 01167 */ 01168 #define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \ 01169 do{ \ 01170 CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\ 01171 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \ 01172 } while(0U) 01173 /** 01174 * @} 01175 */ 01176 01177 /* Private macros --------------------------------------------------------*/ 01178 /** @defgroup UART_Private_Macros UART Private Macros 01179 * @{ 01180 */ 01181 #if defined(USART_PRESC_PRESCALER) 01182 /** @brief Get UART clok division factor from clock prescaler value. 01183 * @param __CLOCKPRESCALER__ UART prescaler value. 01184 * @retval UART clock division factor 01185 */ 01186 #define UART_GET_DIV_FACTOR(__CLOCKPRESCALER__) \ 01187 (((__CLOCKPRESCALER__) == UART_PRESCALER_DIV1) ? 1U : \ 01188 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV2) ? 2U : \ 01189 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV4) ? 4U : \ 01190 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV6) ? 6U : \ 01191 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV8) ? 8U : \ 01192 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV10) ? 10U : \ 01193 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV12) ? 12U : \ 01194 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV16) ? 16U : \ 01195 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV32) ? 32U : \ 01196 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV64) ? 64U : \ 01197 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV128) ? 128U : \ 01198 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV256) ? 256U : 1U) 01199 01200 /** @brief BRR division operation to set BRR register with LPUART. 01201 * @param __PCLK__ LPUART clock. 01202 * @param __BAUD__ Baud rate set by the user. 01203 * @param __CLOCKPRESCALER__ UART prescaler value. 01204 * @retval Division result 01205 */ 01206 #define UART_DIV_LPUART(__PCLK__, __BAUD__, __CLOCKPRESCALER__) ((((((uint64_t)(__PCLK__)/UART_GET_DIV_FACTOR((__CLOCKPRESCALER__)))*256U)) + ((__BAUD__)/2U)) / (__BAUD__)) 01207 01208 /** @brief BRR division operation to set BRR register in 8-bit oversampling mode. 01209 * @param __PCLK__ UART clock. 01210 * @param __BAUD__ Baud rate set by the user. 01211 * @param __CLOCKPRESCALER__ UART prescaler value. 01212 * @retval Division result 01213 */ 01214 #define UART_DIV_SAMPLING8(__PCLK__, __BAUD__, __CLOCKPRESCALER__) (((((__PCLK__)/UART_GET_DIV_FACTOR((__CLOCKPRESCALER__)))*2U) + ((__BAUD__)/2U)) / (__BAUD__)) 01215 01216 /** @brief BRR division operation to set BRR register in 16-bit oversampling mode. 01217 * @param __PCLK__ UART clock. 01218 * @param __BAUD__ Baud rate set by the user. 01219 * @param __CLOCKPRESCALER__ UART prescaler value. 01220 * @retval Division result 01221 */ 01222 #define UART_DIV_SAMPLING16(__PCLK__, __BAUD__, __CLOCKPRESCALER__) ((((__PCLK__)/UART_GET_DIV_FACTOR((__CLOCKPRESCALER__))) + ((__BAUD__)/2U)) / (__BAUD__)) 01223 #else 01224 01225 /** @brief BRR division operation to set BRR register with LPUART. 01226 * @param __PCLK__ LPUART clock. 01227 * @param __BAUD__ Baud rate set by the user. 01228 * @retval Division result 01229 */ 01230 #define UART_DIV_LPUART(__PCLK__, __BAUD__) (((((uint64_t)(__PCLK__)*256U)) + ((__BAUD__)/2U)) / (__BAUD__)) 01231 01232 /** @brief BRR division operation to set BRR register in 8-bit oversampling mode. 01233 * @param __PCLK__ UART clock. 01234 * @param __BAUD__ Baud rate set by the user. 01235 * @retval Division result 01236 */ 01237 #define UART_DIV_SAMPLING8(__PCLK__, __BAUD__) ((((__PCLK__)*2U) + ((__BAUD__)/2U)) / (__BAUD__)) 01238 01239 /** @brief BRR division operation to set BRR register in 16-bit oversampling mode. 01240 * @param __PCLK__ UART clock. 01241 * @param __BAUD__ Baud rate set by the user. 01242 * @retval Division result 01243 */ 01244 #define UART_DIV_SAMPLING16(__PCLK__, __BAUD__) (((__PCLK__) + ((__BAUD__)/2U)) / (__BAUD__)) 01245 #endif 01246 01247 /** @brief Check whether or not UART instance is Low Power UART. 01248 * @param __HANDLE__ specifies the UART Handle. 01249 * @retval SET (instance is LPUART) or RESET (instance isn't LPUART) 01250 */ 01251 #define UART_INSTANCE_LOWPOWER(__HANDLE__) (IS_LPUART_INSTANCE((__HANDLE__)->Instance)) 01252 01253 /** @brief Check UART Baud rate. 01254 * @param __BAUDRATE__ Baudrate specified by the user. 01255 * The maximum Baud Rate is derived from the maximum clock on L4 01256 * divided by the smallest oversampling used on the USART (i.e. 8) 01257 * (i.e. 120 MHz on STM32L4Rx/L4Sx, 80 Mhz otherwise) 01258 * @retval SET (__BAUDRATE__ is valid) or RESET (__BAUDRATE__ is invalid) 01259 */ 01260 #if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 01261 #define IS_UART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 15000001U) 01262 #else 01263 #define IS_UART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 10000001U) 01264 #endif 01265 01266 /** @brief Check UART assertion time. 01267 * @param __TIME__ 5-bit value assertion time. 01268 * @retval Test result (TRUE or FALSE). 01269 */ 01270 #define IS_UART_ASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU) 01271 01272 /** @brief Check UART deassertion time. 01273 * @param __TIME__ 5-bit value deassertion time. 01274 * @retval Test result (TRUE or FALSE). 01275 */ 01276 #define IS_UART_DEASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU) 01277 01278 /** 01279 * @brief Ensure that UART frame number of stop bits is valid. 01280 * @param __STOPBITS__ UART frame number of stop bits. 01281 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid) 01282 */ 01283 #define IS_UART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_0_5) || \ 01284 ((__STOPBITS__) == UART_STOPBITS_1) || \ 01285 ((__STOPBITS__) == UART_STOPBITS_1_5) || \ 01286 ((__STOPBITS__) == UART_STOPBITS_2)) 01287 01288 /** 01289 * @brief Ensure that LPUART frame number of stop bits is valid. 01290 * @param __STOPBITS__ LPUART frame number of stop bits. 01291 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid) 01292 */ 01293 #define IS_LPUART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_1) || \ 01294 ((__STOPBITS__) == UART_STOPBITS_2)) 01295 01296 /** 01297 * @brief Ensure that UART frame parity is valid. 01298 * @param __PARITY__ UART frame parity. 01299 * @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid) 01300 */ 01301 #define IS_UART_PARITY(__PARITY__) (((__PARITY__) == UART_PARITY_NONE) || \ 01302 ((__PARITY__) == UART_PARITY_EVEN) || \ 01303 ((__PARITY__) == UART_PARITY_ODD)) 01304 01305 /** 01306 * @brief Ensure that UART hardware flow control is valid. 01307 * @param __CONTROL__ UART hardware flow control. 01308 * @retval SET (__CONTROL__ is valid) or RESET (__CONTROL__ is invalid) 01309 */ 01310 #define IS_UART_HARDWARE_FLOW_CONTROL(__CONTROL__)\ 01311 (((__CONTROL__) == UART_HWCONTROL_NONE) || \ 01312 ((__CONTROL__) == UART_HWCONTROL_RTS) || \ 01313 ((__CONTROL__) == UART_HWCONTROL_CTS) || \ 01314 ((__CONTROL__) == UART_HWCONTROL_RTS_CTS)) 01315 01316 /** 01317 * @brief Ensure that UART communication mode is valid. 01318 * @param __MODE__ UART communication mode. 01319 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 01320 */ 01321 #define IS_UART_MODE(__MODE__) ((((__MODE__) & (~((uint32_t)(UART_MODE_TX_RX)))) == 0x00U) && ((__MODE__) != 0x00U)) 01322 01323 /** 01324 * @brief Ensure that UART state is valid. 01325 * @param __STATE__ UART state. 01326 * @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid) 01327 */ 01328 #define IS_UART_STATE(__STATE__) (((__STATE__) == UART_STATE_DISABLE) || \ 01329 ((__STATE__) == UART_STATE_ENABLE)) 01330 01331 /** 01332 * @brief Ensure that UART oversampling is valid. 01333 * @param __SAMPLING__ UART oversampling. 01334 * @retval SET (__SAMPLING__ is valid) or RESET (__SAMPLING__ is invalid) 01335 */ 01336 #define IS_UART_OVERSAMPLING(__SAMPLING__) (((__SAMPLING__) == UART_OVERSAMPLING_16) || \ 01337 ((__SAMPLING__) == UART_OVERSAMPLING_8)) 01338 01339 /** 01340 * @brief Ensure that UART frame sampling is valid. 01341 * @param __ONEBIT__ UART frame sampling. 01342 * @retval SET (__ONEBIT__ is valid) or RESET (__ONEBIT__ is invalid) 01343 */ 01344 #define IS_UART_ONE_BIT_SAMPLE(__ONEBIT__) (((__ONEBIT__) == UART_ONE_BIT_SAMPLE_DISABLE) || \ 01345 ((__ONEBIT__) == UART_ONE_BIT_SAMPLE_ENABLE)) 01346 01347 /** 01348 * @brief Ensure that UART auto Baud rate detection mode is valid. 01349 * @param __MODE__ UART auto Baud rate detection mode. 01350 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 01351 */ 01352 #define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(__MODE__) (((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT) || \ 01353 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE) || \ 01354 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME) || \ 01355 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME)) 01356 01357 /** 01358 * @brief Ensure that UART receiver timeout setting is valid. 01359 * @param __TIMEOUT__ UART receiver timeout setting. 01360 * @retval SET (__TIMEOUT__ is valid) or RESET (__TIMEOUT__ is invalid) 01361 */ 01362 #define IS_UART_RECEIVER_TIMEOUT(__TIMEOUT__) (((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_DISABLE) || \ 01363 ((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_ENABLE)) 01364 01365 /** 01366 * @brief Ensure that UART LIN state is valid. 01367 * @param __LIN__ UART LIN state. 01368 * @retval SET (__LIN__ is valid) or RESET (__LIN__ is invalid) 01369 */ 01370 #define IS_UART_LIN(__LIN__) (((__LIN__) == UART_LIN_DISABLE) || \ 01371 ((__LIN__) == UART_LIN_ENABLE)) 01372 01373 /** 01374 * @brief Ensure that UART LIN break detection length is valid. 01375 * @param __LENGTH__ UART LIN break detection length. 01376 * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) 01377 */ 01378 #define IS_UART_LIN_BREAK_DETECT_LENGTH(__LENGTH__) (((__LENGTH__) == UART_LINBREAKDETECTLENGTH_10B) || \ 01379 ((__LENGTH__) == UART_LINBREAKDETECTLENGTH_11B)) 01380 01381 /** 01382 * @brief Ensure that UART DMA TX state is valid. 01383 * @param __DMATX__ UART DMA TX state. 01384 * @retval SET (__DMATX__ is valid) or RESET (__DMATX__ is invalid) 01385 */ 01386 #define IS_UART_DMA_TX(__DMATX__) (((__DMATX__) == UART_DMA_TX_DISABLE) || \ 01387 ((__DMATX__) == UART_DMA_TX_ENABLE)) 01388 01389 /** 01390 * @brief Ensure that UART DMA RX state is valid. 01391 * @param __DMARX__ UART DMA RX state. 01392 * @retval SET (__DMARX__ is valid) or RESET (__DMARX__ is invalid) 01393 */ 01394 #define IS_UART_DMA_RX(__DMARX__) (((__DMARX__) == UART_DMA_RX_DISABLE) || \ 01395 ((__DMARX__) == UART_DMA_RX_ENABLE)) 01396 01397 /** 01398 * @brief Ensure that UART half-duplex state is valid. 01399 * @param __HDSEL__ UART half-duplex state. 01400 * @retval SET (__HDSEL__ is valid) or RESET (__HDSEL__ is invalid) 01401 */ 01402 #define IS_UART_HALF_DUPLEX(__HDSEL__) (((__HDSEL__) == UART_HALF_DUPLEX_DISABLE) || \ 01403 ((__HDSEL__) == UART_HALF_DUPLEX_ENABLE)) 01404 01405 /** 01406 * @brief Ensure that UART wake-up method is valid. 01407 * @param __WAKEUP__ UART wake-up method . 01408 * @retval SET (__WAKEUP__ is valid) or RESET (__WAKEUP__ is invalid) 01409 */ 01410 #define IS_UART_WAKEUPMETHOD(__WAKEUP__) (((__WAKEUP__) == UART_WAKEUPMETHOD_IDLELINE) || \ 01411 ((__WAKEUP__) == UART_WAKEUPMETHOD_ADDRESSMARK)) 01412 01413 /** 01414 * @brief Ensure that UART request parameter is valid. 01415 * @param __PARAM__ UART request parameter. 01416 * @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid) 01417 */ 01418 #define IS_UART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == UART_AUTOBAUD_REQUEST) || \ 01419 ((__PARAM__) == UART_SENDBREAK_REQUEST) || \ 01420 ((__PARAM__) == UART_MUTE_MODE_REQUEST) || \ 01421 ((__PARAM__) == UART_RXDATA_FLUSH_REQUEST) || \ 01422 ((__PARAM__) == UART_TXDATA_FLUSH_REQUEST)) 01423 01424 /** 01425 * @brief Ensure that UART advanced features initialization is valid. 01426 * @param __INIT__ UART advanced features initialization. 01427 * @retval SET (__INIT__ is valid) or RESET (__INIT__ is invalid) 01428 */ 01429 #define IS_UART_ADVFEATURE_INIT(__INIT__) ((__INIT__) <= (UART_ADVFEATURE_NO_INIT | \ 01430 UART_ADVFEATURE_TXINVERT_INIT | \ 01431 UART_ADVFEATURE_RXINVERT_INIT | \ 01432 UART_ADVFEATURE_DATAINVERT_INIT | \ 01433 UART_ADVFEATURE_SWAP_INIT | \ 01434 UART_ADVFEATURE_RXOVERRUNDISABLE_INIT | \ 01435 UART_ADVFEATURE_DMADISABLEONERROR_INIT | \ 01436 UART_ADVFEATURE_AUTOBAUDRATE_INIT | \ 01437 UART_ADVFEATURE_MSBFIRST_INIT)) 01438 01439 /** 01440 * @brief Ensure that UART frame TX inversion setting is valid. 01441 * @param __TXINV__ UART frame TX inversion setting. 01442 * @retval SET (__TXINV__ is valid) or RESET (__TXINV__ is invalid) 01443 */ 01444 #define IS_UART_ADVFEATURE_TXINV(__TXINV__) (((__TXINV__) == UART_ADVFEATURE_TXINV_DISABLE) || \ 01445 ((__TXINV__) == UART_ADVFEATURE_TXINV_ENABLE)) 01446 01447 /** 01448 * @brief Ensure that UART frame RX inversion setting is valid. 01449 * @param __RXINV__ UART frame RX inversion setting. 01450 * @retval SET (__RXINV__ is valid) or RESET (__RXINV__ is invalid) 01451 */ 01452 #define IS_UART_ADVFEATURE_RXINV(__RXINV__) (((__RXINV__) == UART_ADVFEATURE_RXINV_DISABLE) || \ 01453 ((__RXINV__) == UART_ADVFEATURE_RXINV_ENABLE)) 01454 01455 /** 01456 * @brief Ensure that UART frame data inversion setting is valid. 01457 * @param __DATAINV__ UART frame data inversion setting. 01458 * @retval SET (__DATAINV__ is valid) or RESET (__DATAINV__ is invalid) 01459 */ 01460 #define IS_UART_ADVFEATURE_DATAINV(__DATAINV__) (((__DATAINV__) == UART_ADVFEATURE_DATAINV_DISABLE) || \ 01461 ((__DATAINV__) == UART_ADVFEATURE_DATAINV_ENABLE)) 01462 01463 /** 01464 * @brief Ensure that UART frame RX/TX pins swap setting is valid. 01465 * @param __SWAP__ UART frame RX/TX pins swap setting. 01466 * @retval SET (__SWAP__ is valid) or RESET (__SWAP__ is invalid) 01467 */ 01468 #define IS_UART_ADVFEATURE_SWAP(__SWAP__) (((__SWAP__) == UART_ADVFEATURE_SWAP_DISABLE) || \ 01469 ((__SWAP__) == UART_ADVFEATURE_SWAP_ENABLE)) 01470 01471 /** 01472 * @brief Ensure that UART frame overrun setting is valid. 01473 * @param __OVERRUN__ UART frame overrun setting. 01474 * @retval SET (__OVERRUN__ is valid) or RESET (__OVERRUN__ is invalid) 01475 */ 01476 #define IS_UART_OVERRUN(__OVERRUN__) (((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_ENABLE) || \ 01477 ((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_DISABLE)) 01478 01479 /** 01480 * @brief Ensure that UART auto Baud rate state is valid. 01481 * @param __AUTOBAUDRATE__ UART auto Baud rate state. 01482 * @retval SET (__AUTOBAUDRATE__ is valid) or RESET (__AUTOBAUDRATE__ is invalid) 01483 */ 01484 #define IS_UART_ADVFEATURE_AUTOBAUDRATE(__AUTOBAUDRATE__) (((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_DISABLE) || \ 01485 ((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)) 01486 01487 /** 01488 * @brief Ensure that UART DMA enabling or disabling on error setting is valid. 01489 * @param __DMA__ UART DMA enabling or disabling on error setting. 01490 * @retval SET (__DMA__ is valid) or RESET (__DMA__ is invalid) 01491 */ 01492 #define IS_UART_ADVFEATURE_DMAONRXERROR(__DMA__) (((__DMA__) == UART_ADVFEATURE_DMA_ENABLEONRXERROR) || \ 01493 ((__DMA__) == UART_ADVFEATURE_DMA_DISABLEONRXERROR)) 01494 01495 /** 01496 * @brief Ensure that UART frame MSB first setting is valid. 01497 * @param __MSBFIRST__ UART frame MSB first setting. 01498 * @retval SET (__MSBFIRST__ is valid) or RESET (__MSBFIRST__ is invalid) 01499 */ 01500 #define IS_UART_ADVFEATURE_MSBFIRST(__MSBFIRST__) (((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_DISABLE) || \ 01501 ((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_ENABLE)) 01502 01503 /** 01504 * @brief Ensure that UART stop mode state is valid. 01505 * @param __STOPMODE__ UART stop mode state. 01506 * @retval SET (__STOPMODE__ is valid) or RESET (__STOPMODE__ is invalid) 01507 */ 01508 #define IS_UART_ADVFEATURE_STOPMODE(__STOPMODE__) (((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_DISABLE) || \ 01509 ((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_ENABLE)) 01510 01511 /** 01512 * @brief Ensure that UART mute mode state is valid. 01513 * @param __MUTE__ UART mute mode state. 01514 * @retval SET (__MUTE__ is valid) or RESET (__MUTE__ is invalid) 01515 */ 01516 #define IS_UART_MUTE_MODE(__MUTE__) (((__MUTE__) == UART_ADVFEATURE_MUTEMODE_DISABLE) || \ 01517 ((__MUTE__) == UART_ADVFEATURE_MUTEMODE_ENABLE)) 01518 01519 /** 01520 * @brief Ensure that UART wake-up selection is valid. 01521 * @param __WAKE__ UART wake-up selection. 01522 * @retval SET (__WAKE__ is valid) or RESET (__WAKE__ is invalid) 01523 */ 01524 #define IS_UART_WAKEUP_SELECTION(__WAKE__) (((__WAKE__) == UART_WAKEUP_ON_ADDRESS) || \ 01525 ((__WAKE__) == UART_WAKEUP_ON_STARTBIT) || \ 01526 ((__WAKE__) == UART_WAKEUP_ON_READDATA_NONEMPTY)) 01527 01528 /** 01529 * @brief Ensure that UART driver enable polarity is valid. 01530 * @param __POLARITY__ UART driver enable polarity. 01531 * @retval SET (__POLARITY__ is valid) or RESET (__POLARITY__ is invalid) 01532 */ 01533 #define IS_UART_DE_POLARITY(__POLARITY__) (((__POLARITY__) == UART_DE_POLARITY_HIGH) || \ 01534 ((__POLARITY__) == UART_DE_POLARITY_LOW)) 01535 01536 #if defined(USART_PRESC_PRESCALER) 01537 /** 01538 * @brief Ensure that UART Prescaler is valid. 01539 * @param __CLOCKPRESCALER__ UART Prescaler value. 01540 * @retval SET (__CLOCKPRESCALER__ is valid) or RESET (__CLOCKPRESCALER__ is invalid) 01541 */ 01542 #define IS_UART_PRESCALER(__CLOCKPRESCALER__) (((__CLOCKPRESCALER__) == UART_PRESCALER_DIV1) || \ 01543 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV2) || \ 01544 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV4) || \ 01545 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV6) || \ 01546 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV8) || \ 01547 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV10) || \ 01548 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV12) || \ 01549 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV16) || \ 01550 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV32) || \ 01551 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV64) || \ 01552 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV128) || \ 01553 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV256)) 01554 #endif 01555 01556 /** 01557 * @} 01558 */ 01559 01560 /* Include UART HAL Extended module */ 01561 #include "stm32l4xx_hal_uart_ex.h" 01562 01563 01564 /* Exported functions --------------------------------------------------------*/ 01565 /** @addtogroup UART_Exported_Functions UART Exported Functions 01566 * @{ 01567 */ 01568 01569 /** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions 01570 * @{ 01571 */ 01572 01573 /* Initialization and de-initialization functions ****************************/ 01574 HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart); 01575 HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart); 01576 HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength); 01577 HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod); 01578 HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart); 01579 void HAL_UART_MspInit(UART_HandleTypeDef *huart); 01580 void HAL_UART_MspDeInit(UART_HandleTypeDef *huart); 01581 01582 /* Callbacks Register/UnRegister functions ***********************************/ 01583 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 01584 HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID, pUART_CallbackTypeDef pCallback); 01585 HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID); 01586 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 01587 01588 /** 01589 * @} 01590 */ 01591 01592 /** @addtogroup UART_Exported_Functions_Group2 IO operation functions 01593 * @{ 01594 */ 01595 01596 /* IO operation functions *****************************************************/ 01597 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); 01598 HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); 01599 HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 01600 HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 01601 HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 01602 HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 01603 HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart); 01604 HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart); 01605 HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart); 01606 /* Transfer Abort functions */ 01607 HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart); 01608 HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart); 01609 HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart); 01610 HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart); 01611 HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart); 01612 HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart); 01613 01614 void HAL_UART_IRQHandler(UART_HandleTypeDef *huart); 01615 void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart); 01616 void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart); 01617 void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart); 01618 void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart); 01619 void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart); 01620 void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart); 01621 void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart); 01622 void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart); 01623 01624 /** 01625 * @} 01626 */ 01627 01628 /** @addtogroup UART_Exported_Functions_Group3 Peripheral Control functions 01629 * @{ 01630 */ 01631 01632 /* Peripheral Control functions ************************************************/ 01633 HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart); 01634 HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart); 01635 HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart); 01636 void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart); 01637 HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart); 01638 HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart); 01639 /** 01640 * @} 01641 */ 01642 01643 /** @addtogroup UART_Exported_Functions_Group4 Peripheral State and Error functions 01644 * @{ 01645 */ 01646 01647 /* Peripheral State and Errors functions **************************************************/ 01648 HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart); 01649 uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart); 01650 01651 /** 01652 * @} 01653 */ 01654 01655 /** 01656 * @} 01657 */ 01658 01659 /* Private functions -----------------------------------------------------------*/ 01660 /** @addtogroup UART_Private_Functions UART Private Functions 01661 * @{ 01662 */ 01663 01664 HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart); 01665 HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart); 01666 HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout); 01667 void UART_AdvFeatureConfig(UART_HandleTypeDef *huart); 01668 01669 /** 01670 * @} 01671 */ 01672 01673 /** 01674 * @} 01675 */ 01676 01677 /** 01678 * @} 01679 */ 01680 01681 #ifdef __cplusplus 01682 } 01683 #endif 01684 01685 #endif /* __STM32L4xx_HAL_UART_H */ 01686 01687 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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