STM32L486xx HAL User Manual
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32l4xx_hal_uart.c 00004 * @author MCD Application Team 00005 * @brief UART HAL module driver. 00006 * This file provides firmware functions to manage the following 00007 * functionalities of the Universal Asynchronous Receiver Transmitter Peripheral (UART). 00008 * + Initialization and de-initialization functions 00009 * + IO operation functions 00010 * + Peripheral Control functions 00011 * 00012 * 00013 @verbatim 00014 =============================================================================== 00015 ##### How to use this driver ##### 00016 =============================================================================== 00017 [..] 00018 The UART HAL driver can be used as follows: 00019 00020 (#) Declare a UART_HandleTypeDef handle structure (eg. UART_HandleTypeDef huart). 00021 (#) Initialize the UART low level resources by implementing the HAL_UART_MspInit() API: 00022 (++) Enable the USARTx interface clock. 00023 (++) UART pins configuration: 00024 (+++) Enable the clock for the UART GPIOs. 00025 (+++) Configure these UART pins as alternate function pull-up. 00026 (++) NVIC configuration if you need to use interrupt process (HAL_UART_Transmit_IT() 00027 and HAL_UART_Receive_IT() APIs): 00028 (+++) Configure the USARTx interrupt priority. 00029 (+++) Enable the NVIC USART IRQ handle. 00030 (++) UART interrupts handling: 00031 -@@- The specific UART interrupts (Transmission complete interrupt, 00032 RXNE interrupt, RX/TX FIFOs related interrupts and Error Interrupts) 00033 are managed using the macros __HAL_UART_ENABLE_IT() and __HAL_UART_DISABLE_IT() 00034 inside the transmit and receive processes. 00035 (++) DMA Configuration if you need to use DMA process (HAL_UART_Transmit_DMA() 00036 and HAL_UART_Receive_DMA() APIs): 00037 (+++) Declare a DMA handle structure for the Tx/Rx channel. 00038 (+++) Enable the DMAx interface clock. 00039 (+++) Configure the declared DMA handle structure with the required Tx/Rx parameters. 00040 (+++) Configure the DMA Tx/Rx channel. 00041 (+++) Associate the initialized DMA handle to the UART DMA Tx/Rx handle. 00042 (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx/Rx channel. 00043 00044 (#) Program the Baud Rate, Word Length, Stop Bit, Parity, Prescaler value , Hardware 00045 flow control and Mode (Receiver/Transmitter) in the huart handle Init structure. 00046 00047 (#) If required, program UART advanced features (TX/RX pins swap, auto Baud rate detection,...) 00048 in the huart handle AdvancedInit structure. 00049 00050 (#) For the UART asynchronous mode, initialize the UART registers by calling 00051 the HAL_UART_Init() API. 00052 00053 (#) For the UART Half duplex mode, initialize the UART registers by calling 00054 the HAL_HalfDuplex_Init() API. 00055 00056 (#) For the UART LIN (Local Interconnection Network) mode, initialize the UART registers 00057 by calling the HAL_LIN_Init() API. 00058 00059 (#) For the UART Multiprocessor mode, initialize the UART registers 00060 by calling the HAL_MultiProcessor_Init() API. 00061 00062 (#) For the UART RS485 Driver Enabled mode, initialize the UART registers 00063 by calling the HAL_RS485Ex_Init() API. 00064 00065 [..] 00066 (@) These API's (HAL_UART_Init(), HAL_HalfDuplex_Init(), HAL_LIN_Init(), HAL_MultiProcessor_Init(), 00067 also configure the low level Hardware GPIO, CLOCK, CORTEX...etc) by 00068 calling the customized HAL_UART_MspInit() API. 00069 00070 ##### Callback registration ##### 00071 ================================== 00072 00073 [..] 00074 The compilation define USE_HAL_UART_REGISTER_CALLBACKS when set to 1 00075 allows the user to configure dynamically the driver callbacks. 00076 00077 [..] 00078 Use Function @ref HAL_UART_RegisterCallback() to register a user callback. 00079 Function @ref HAL_UART_RegisterCallback() allows to register following callbacks: 00080 (+) TxHalfCpltCallback : Tx Half Complete Callback. 00081 (+) TxCpltCallback : Tx Complete Callback. 00082 (+) RxHalfCpltCallback : Rx Half Complete Callback. 00083 (+) RxCpltCallback : Rx Complete Callback. 00084 (+) ErrorCallback : Error Callback. 00085 (+) AbortCpltCallback : Abort Complete Callback. 00086 (+) AbortTransmitCpltCallback : Abort Transmit Complete Callback. 00087 (+) AbortReceiveCpltCallback : Abort Receive Complete Callback. 00088 (+) WakeupCallback : Wakeup Callback. 00089 (+) RxFifoFullCallback : Rx Fifo Full Callback. 00090 (+) TxFifoEmptyCallback : Tx Fifo Empty Callback. 00091 (+) MspInitCallback : UART MspInit. 00092 (+) MspDeInitCallback : UART MspDeInit. 00093 This function takes as parameters the HAL peripheral handle, the Callback ID 00094 and a pointer to the user callback function. 00095 00096 [..] 00097 Use function @ref HAL_UART_UnRegisterCallback() to reset a callback to the default 00098 weak (surcharged) function. 00099 @ref HAL_UART_UnRegisterCallback() takes as parameters the HAL peripheral handle, 00100 and the Callback ID. 00101 This function allows to reset following callbacks: 00102 (+) TxHalfCpltCallback : Tx Half Complete Callback. 00103 (+) TxCpltCallback : Tx Complete Callback. 00104 (+) RxHalfCpltCallback : Rx Half Complete Callback. 00105 (+) RxCpltCallback : Rx Complete Callback. 00106 (+) ErrorCallback : Error Callback. 00107 (+) AbortCpltCallback : Abort Complete Callback. 00108 (+) AbortTransmitCpltCallback : Abort Transmit Complete Callback. 00109 (+) AbortReceiveCpltCallback : Abort Receive Complete Callback. 00110 (+) WakeupCallback : Wakeup Callback. 00111 (+) RxFifoFullCallback : Rx Fifo Full Callback. 00112 (+) TxFifoEmptyCallback : Tx Fifo Empty Callback. 00113 (+) MspInitCallback : UART MspInit. 00114 (+) MspDeInitCallback : UART MspDeInit. 00115 00116 [..] 00117 By default, after the @ref HAL_UART_Init() and when the state is HAL_UART_STATE_RESET 00118 all callbacks are set to the corresponding weak (surcharged) functions: 00119 examples @ref HAL_UART_TxCpltCallback(), @ref HAL_UART_RxHalfCpltCallback(). 00120 Exception done for MspInit and MspDeInit functions that are respectively 00121 reset to the legacy weak (surcharged) functions in the @ref HAL_UART_Init() 00122 and @ref HAL_UART_DeInit() only when these callbacks are null (not registered beforehand). 00123 If not, MspInit or MspDeInit are not null, the @ref HAL_UART_Init() and @ref HAL_UART_DeInit() 00124 keep and use the user MspInit/MspDeInit callbacks (registered beforehand). 00125 00126 [..] 00127 Callbacks can be registered/unregistered in HAL_UART_STATE_READY state only. 00128 Exception done MspInit/MspDeInit that can be registered/unregistered 00129 in HAL_UART_STATE_READY or HAL_UART_STATE_RESET state, thus registered (user) 00130 MspInit/DeInit callbacks can be used during the Init/DeInit. 00131 In that case first register the MspInit/MspDeInit user callbacks 00132 using @ref HAL_UART_RegisterCallback() before calling @ref HAL_UART_DeInit() 00133 or @ref HAL_UART_Init() function. 00134 00135 [..] 00136 When The compilation define USE_HAL_UART_REGISTER_CALLBACKS is set to 0 or 00137 not defined, the callback registration feature is not available 00138 and weak (surcharged) callbacks are used. 00139 00140 00141 @endverbatim 00142 ****************************************************************************** 00143 * @attention 00144 * 00145 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> 00146 * 00147 * Redistribution and use in source and binary forms, with or without modification, 00148 * are permitted provided that the following conditions are met: 00149 * 1. Redistributions of source code must retain the above copyright notice, 00150 * this list of conditions and the following disclaimer. 00151 * 2. Redistributions in binary form must reproduce the above copyright notice, 00152 * this list of conditions and the following disclaimer in the documentation 00153 * and/or other materials provided with the distribution. 00154 * 3. Neither the name of STMicroelectronics nor the names of its contributors 00155 * may be used to endorse or promote products derived from this software 00156 * without specific prior written permission. 00157 * 00158 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 00159 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 00160 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 00161 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 00162 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 00163 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 00164 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00165 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 00166 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 00167 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00168 * 00169 ****************************************************************************** 00170 */ 00171 00172 /* Includes ------------------------------------------------------------------*/ 00173 #include "stm32l4xx_hal.h" 00174 00175 /** @addtogroup STM32L4xx_HAL_Driver 00176 * @{ 00177 */ 00178 00179 /** @defgroup UART UART 00180 * @brief HAL UART module driver 00181 * @{ 00182 */ 00183 00184 #ifdef HAL_UART_MODULE_ENABLED 00185 00186 /* Private typedef -----------------------------------------------------------*/ 00187 /* Private define ------------------------------------------------------------*/ 00188 /** @defgroup UART_Private_Constants UART Private Constants 00189 * @{ 00190 */ 00191 #if defined(USART_CR1_FIFOEN) 00192 #define USART_CR1_FIELDS ((uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | \ 00193 USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8| \ 00194 USART_CR1_FIFOEN )) /*!< UART or USART CR1 fields of parameters set by UART_SetConfig API */ 00195 #else 00196 #define USART_CR1_FIELDS ((uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | \ 00197 USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8 )) /*!< UART or USART CR1 fields of parameters set by UART_SetConfig API */ 00198 #endif 00199 00200 #if defined(USART_CR1_FIFOEN) 00201 #define USART_CR3_FIELDS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE | USART_CR3_ONEBIT| \ 00202 USART_CR3_TXFTCFG | USART_CR3_RXFTCFG )) /*!< UART or USART CR3 fields of parameters set by UART_SetConfig API */ 00203 #else 00204 #define USART_CR3_FIELDS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE | USART_CR3_ONEBIT)) /*!< UART or USART CR3 fields of parameters set by UART_SetConfig API */ 00205 #endif 00206 00207 #define LPUART_BRR_MIN 0x00000300U /* LPUART BRR minimum authorized value */ 00208 #define LPUART_BRR_MAX 0x000FFFFFU /* LPUART BRR maximum authorized value */ 00209 00210 #define UART_BRR_MIN 0x10U /* UART BRR minimum authorized value */ 00211 #define UART_BRR_MAX 0x0000FFFFU /* UART BRR maximum authorized value */ 00212 00213 /** 00214 * @} 00215 */ 00216 00217 /* Private macros ------------------------------------------------------------*/ 00218 /* Private variables ---------------------------------------------------------*/ 00219 /* Private function prototypes -----------------------------------------------*/ 00220 /** @addtogroup UART_Private_Functions 00221 * @{ 00222 */ 00223 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 00224 void UART_InitCallbacksToDefault(UART_HandleTypeDef *huart); 00225 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 00226 static void UART_EndTxTransfer(UART_HandleTypeDef *huart); 00227 static void UART_EndRxTransfer(UART_HandleTypeDef *huart); 00228 static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma); 00229 static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma); 00230 static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma); 00231 static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma); 00232 static void UART_DMAError(DMA_HandleTypeDef *hdma); 00233 static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma); 00234 static void UART_DMATxAbortCallback(DMA_HandleTypeDef *hdma); 00235 static void UART_DMARxAbortCallback(DMA_HandleTypeDef *hdma); 00236 static void UART_DMATxOnlyAbortCallback(DMA_HandleTypeDef *hdma); 00237 static void UART_DMARxOnlyAbortCallback(DMA_HandleTypeDef *hdma); 00238 static void UART_TxISR_8BIT(UART_HandleTypeDef *huart); 00239 static void UART_TxISR_16BIT(UART_HandleTypeDef *huart); 00240 #if defined(USART_CR1_FIFOEN) 00241 static void UART_TxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart); 00242 static void UART_TxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart); 00243 #endif 00244 static void UART_EndTransmit_IT(UART_HandleTypeDef *huart); 00245 static void UART_RxISR_8BIT(UART_HandleTypeDef *huart); 00246 static void UART_RxISR_16BIT(UART_HandleTypeDef *huart); 00247 #if defined(USART_CR1_FIFOEN) 00248 static void UART_RxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart); 00249 static void UART_RxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart); 00250 #endif 00251 /** 00252 * @} 00253 */ 00254 00255 /* Exported functions --------------------------------------------------------*/ 00256 00257 /** @defgroup UART_Exported_Functions UART Exported Functions 00258 * @{ 00259 */ 00260 00261 /** @defgroup UART_Exported_Functions_Group1 Initialization and de-initialization functions 00262 * @brief Initialization and Configuration functions 00263 * 00264 @verbatim 00265 =============================================================================== 00266 ##### Initialization and Configuration functions ##### 00267 =============================================================================== 00268 [..] 00269 This subsection provides a set of functions allowing to initialize the USARTx or the UARTy 00270 in asynchronous mode. 00271 (+) For the asynchronous mode the parameters below can be configured: 00272 (++) Baud Rate 00273 (++) Word Length 00274 (++) Stop Bit 00275 (++) Parity: If the parity is enabled, then the MSB bit of the data written 00276 in the data register is transmitted but is changed by the parity bit. 00277 (++) Hardware flow control 00278 (++) Receiver/transmitter modes 00279 (++) Over Sampling Method 00280 (++) One-Bit Sampling Method 00281 (+) For the asynchronous mode, the following advanced features can be configured as well: 00282 (++) TX and/or RX pin level inversion 00283 (++) data logical level inversion 00284 (++) RX and TX pins swap 00285 (++) RX overrun detection disabling 00286 (++) DMA disabling on RX error 00287 (++) MSB first on communication line 00288 (++) auto Baud rate detection 00289 [..] 00290 The HAL_UART_Init(), HAL_HalfDuplex_Init(), HAL_LIN_Init()and HAL_MultiProcessor_Init()API 00291 follow respectively the UART asynchronous, UART Half duplex, UART LIN mode 00292 and UART multiprocessor mode configuration procedures (details for the procedures 00293 are available in reference manual). 00294 00295 @endverbatim 00296 00297 Depending on the frame length defined by the M1 and M0 bits (7-bit, 00298 8-bit or 9-bit), the possible UART formats are listed in the 00299 following table. 00300 00301 Table 1. UART frame format. 00302 +-----------------------------------------------------------------------+ 00303 | M1 bit | M0 bit | PCE bit | UART frame | 00304 |---------|---------|-----------|---------------------------------------| 00305 | 0 | 0 | 0 | | SB | 8 bit data | STB | | 00306 |---------|---------|-----------|---------------------------------------| 00307 | 0 | 0 | 1 | | SB | 7 bit data | PB | STB | | 00308 |---------|---------|-----------|---------------------------------------| 00309 | 0 | 1 | 0 | | SB | 9 bit data | STB | | 00310 |---------|---------|-----------|---------------------------------------| 00311 | 0 | 1 | 1 | | SB | 8 bit data | PB | STB | | 00312 |---------|---------|-----------|---------------------------------------| 00313 | 1 | 0 | 0 | | SB | 7 bit data | STB | | 00314 |---------|---------|-----------|---------------------------------------| 00315 | 1 | 0 | 1 | | SB | 6 bit data | PB | STB | | 00316 +-----------------------------------------------------------------------+ 00317 00318 * @{ 00319 */ 00320 00321 /** 00322 * @brief Initialize the UART mode according to the specified 00323 * parameters in the UART_InitTypeDef and initialize the associated handle. 00324 * @param huart UART handle. 00325 * @retval HAL status 00326 */ 00327 HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart) 00328 { 00329 /* Check the UART handle allocation */ 00330 if (huart == NULL) 00331 { 00332 return HAL_ERROR; 00333 } 00334 00335 if (huart->Init.HwFlowCtl != UART_HWCONTROL_NONE) 00336 { 00337 /* Check the parameters */ 00338 assert_param(IS_UART_HWFLOW_INSTANCE(huart->Instance)); 00339 } 00340 else 00341 { 00342 /* Check the parameters */ 00343 assert_param((IS_UART_INSTANCE(huart->Instance)) || (IS_LPUART_INSTANCE(huart->Instance))); 00344 } 00345 00346 if (huart->gState == HAL_UART_STATE_RESET) 00347 { 00348 /* Allocate lock resource and initialize it */ 00349 huart->Lock = HAL_UNLOCKED; 00350 00351 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 00352 UART_InitCallbacksToDefault(huart); 00353 00354 if (huart->MspInitCallback == NULL) 00355 { 00356 huart->MspInitCallback = HAL_UART_MspInit; 00357 } 00358 00359 /* Init the low level hardware */ 00360 huart->MspInitCallback(huart); 00361 #else 00362 /* Init the low level hardware : GPIO, CLOCK */ 00363 HAL_UART_MspInit(huart); 00364 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ 00365 } 00366 00367 huart->gState = HAL_UART_STATE_BUSY; 00368 00369 /* Disable the Peripheral */ 00370 __HAL_UART_DISABLE(huart); 00371 00372 /* Set the UART Communication parameters */ 00373 if (UART_SetConfig(huart) == HAL_ERROR) 00374 { 00375 return HAL_ERROR; 00376 } 00377 00378 if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) 00379 { 00380 UART_AdvFeatureConfig(huart); 00381 } 00382 00383 /* In asynchronous mode, the following bits must be kept cleared: 00384 - LINEN and CLKEN bits in the USART_CR2 register, 00385 - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/ 00386 CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); 00387 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); 00388 00389 /* Enable the Peripheral */ 00390 __HAL_UART_ENABLE(huart); 00391 00392 /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */ 00393 return (UART_CheckIdleState(huart)); 00394 } 00395 00396 /** 00397 * @brief Initialize the half-duplex mode according to the specified 00398 * parameters in the UART_InitTypeDef and creates the associated handle. 00399 * @param huart UART handle. 00400 * @retval HAL status 00401 */ 00402 HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart) 00403 { 00404 /* Check the UART handle allocation */ 00405 if (huart == NULL) 00406 { 00407 return HAL_ERROR; 00408 } 00409 00410 /* Check UART instance */ 00411 assert_param(IS_UART_HALFDUPLEX_INSTANCE(huart->Instance)); 00412 00413 if (huart->gState == HAL_UART_STATE_RESET) 00414 { 00415 /* Allocate lock resource and initialize it */ 00416 huart->Lock = HAL_UNLOCKED; 00417 00418 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 00419 UART_InitCallbacksToDefault(huart); 00420 00421 if (huart->MspInitCallback == NULL) 00422 { 00423 huart->MspInitCallback = HAL_UART_MspInit; 00424 } 00425 00426 /* Init the low level hardware */ 00427 huart->MspInitCallback(huart); 00428 #else 00429 /* Init the low level hardware : GPIO, CLOCK */ 00430 HAL_UART_MspInit(huart); 00431 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ 00432 } 00433 00434 huart->gState = HAL_UART_STATE_BUSY; 00435 00436 /* Disable the Peripheral */ 00437 __HAL_UART_DISABLE(huart); 00438 00439 /* Set the UART Communication parameters */ 00440 if (UART_SetConfig(huart) == HAL_ERROR) 00441 { 00442 return HAL_ERROR; 00443 } 00444 00445 if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) 00446 { 00447 UART_AdvFeatureConfig(huart); 00448 } 00449 00450 /* In half-duplex mode, the following bits must be kept cleared: 00451 - LINEN and CLKEN bits in the USART_CR2 register, 00452 - SCEN and IREN bits in the USART_CR3 register.*/ 00453 CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); 00454 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_IREN | USART_CR3_SCEN)); 00455 00456 /* Enable the Half-Duplex mode by setting the HDSEL bit in the CR3 register */ 00457 SET_BIT(huart->Instance->CR3, USART_CR3_HDSEL); 00458 00459 /* Enable the Peripheral */ 00460 __HAL_UART_ENABLE(huart); 00461 00462 /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */ 00463 return (UART_CheckIdleState(huart)); 00464 } 00465 00466 00467 /** 00468 * @brief Initialize the LIN mode according to the specified 00469 * parameters in the UART_InitTypeDef and creates the associated handle . 00470 * @param huart UART handle. 00471 * @param BreakDetectLength Specifies the LIN break detection length. 00472 * This parameter can be one of the following values: 00473 * @arg @ref UART_LINBREAKDETECTLENGTH_10B 10-bit break detection 00474 * @arg @ref UART_LINBREAKDETECTLENGTH_11B 11-bit break detection 00475 * @retval HAL status 00476 */ 00477 HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength) 00478 { 00479 /* Check the UART handle allocation */ 00480 if (huart == NULL) 00481 { 00482 return HAL_ERROR; 00483 } 00484 00485 /* Check the LIN UART instance */ 00486 assert_param(IS_UART_LIN_INSTANCE(huart->Instance)); 00487 /* Check the Break detection length parameter */ 00488 assert_param(IS_UART_LIN_BREAK_DETECT_LENGTH(BreakDetectLength)); 00489 00490 /* LIN mode limited to 16-bit oversampling only */ 00491 if (huart->Init.OverSampling == UART_OVERSAMPLING_8) 00492 { 00493 return HAL_ERROR; 00494 } 00495 /* LIN mode limited to 8-bit data length */ 00496 if (huart->Init.WordLength != UART_WORDLENGTH_8B) 00497 { 00498 return HAL_ERROR; 00499 } 00500 00501 if (huart->gState == HAL_UART_STATE_RESET) 00502 { 00503 /* Allocate lock resource and initialize it */ 00504 huart->Lock = HAL_UNLOCKED; 00505 00506 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 00507 UART_InitCallbacksToDefault(huart); 00508 00509 if (huart->MspInitCallback == NULL) 00510 { 00511 huart->MspInitCallback = HAL_UART_MspInit; 00512 } 00513 00514 /* Init the low level hardware */ 00515 huart->MspInitCallback(huart); 00516 #else 00517 /* Init the low level hardware : GPIO, CLOCK */ 00518 HAL_UART_MspInit(huart); 00519 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ 00520 } 00521 00522 huart->gState = HAL_UART_STATE_BUSY; 00523 00524 /* Disable the Peripheral */ 00525 __HAL_UART_DISABLE(huart); 00526 00527 /* Set the UART Communication parameters */ 00528 if (UART_SetConfig(huart) == HAL_ERROR) 00529 { 00530 return HAL_ERROR; 00531 } 00532 00533 if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) 00534 { 00535 UART_AdvFeatureConfig(huart); 00536 } 00537 00538 /* In LIN mode, the following bits must be kept cleared: 00539 - LINEN and CLKEN bits in the USART_CR2 register, 00540 - SCEN and IREN bits in the USART_CR3 register.*/ 00541 CLEAR_BIT(huart->Instance->CR2, USART_CR2_CLKEN); 00542 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_HDSEL | USART_CR3_IREN | USART_CR3_SCEN)); 00543 00544 /* Enable the LIN mode by setting the LINEN bit in the CR2 register */ 00545 SET_BIT(huart->Instance->CR2, USART_CR2_LINEN); 00546 00547 /* Set the USART LIN Break detection length. */ 00548 MODIFY_REG(huart->Instance->CR2, USART_CR2_LBDL, BreakDetectLength); 00549 00550 /* Enable the Peripheral */ 00551 __HAL_UART_ENABLE(huart); 00552 00553 /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */ 00554 return (UART_CheckIdleState(huart)); 00555 } 00556 00557 00558 /** 00559 * @brief Initialize the multiprocessor mode according to the specified 00560 * parameters in the UART_InitTypeDef and initialize the associated handle. 00561 * @param huart UART handle. 00562 * @param Address UART node address (4-, 6-, 7- or 8-bit long). 00563 * @param WakeUpMethod Specifies the UART wakeup method. 00564 * This parameter can be one of the following values: 00565 * @arg @ref UART_WAKEUPMETHOD_IDLELINE WakeUp by an idle line detection 00566 * @arg @ref UART_WAKEUPMETHOD_ADDRESSMARK WakeUp by an address mark 00567 * @note If the user resorts to idle line detection wake up, the Address parameter 00568 * is useless and ignored by the initialization function. 00569 * @note If the user resorts to address mark wake up, the address length detection 00570 * is configured by default to 4 bits only. For the UART to be able to 00571 * manage 6-, 7- or 8-bit long addresses detection, the API 00572 * HAL_MultiProcessorEx_AddressLength_Set() must be called after 00573 * HAL_MultiProcessor_Init(). 00574 * @retval HAL status 00575 */ 00576 HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod) 00577 { 00578 /* Check the UART handle allocation */ 00579 if (huart == NULL) 00580 { 00581 return HAL_ERROR; 00582 } 00583 00584 /* Check the wake up method parameter */ 00585 assert_param(IS_UART_WAKEUPMETHOD(WakeUpMethod)); 00586 00587 if (huart->gState == HAL_UART_STATE_RESET) 00588 { 00589 /* Allocate lock resource and initialize it */ 00590 huart->Lock = HAL_UNLOCKED; 00591 00592 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 00593 UART_InitCallbacksToDefault(huart); 00594 00595 if (huart->MspInitCallback == NULL) 00596 { 00597 huart->MspInitCallback = HAL_UART_MspInit; 00598 } 00599 00600 /* Init the low level hardware */ 00601 huart->MspInitCallback(huart); 00602 #else 00603 /* Init the low level hardware : GPIO, CLOCK */ 00604 HAL_UART_MspInit(huart); 00605 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ 00606 } 00607 00608 huart->gState = HAL_UART_STATE_BUSY; 00609 00610 /* Disable the Peripheral */ 00611 __HAL_UART_DISABLE(huart); 00612 00613 /* Set the UART Communication parameters */ 00614 if (UART_SetConfig(huart) == HAL_ERROR) 00615 { 00616 return HAL_ERROR; 00617 } 00618 00619 if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) 00620 { 00621 UART_AdvFeatureConfig(huart); 00622 } 00623 00624 /* In multiprocessor mode, the following bits must be kept cleared: 00625 - LINEN and CLKEN bits in the USART_CR2 register, 00626 - SCEN, HDSEL and IREN bits in the USART_CR3 register. */ 00627 CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); 00628 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); 00629 00630 if (WakeUpMethod == UART_WAKEUPMETHOD_ADDRESSMARK) 00631 { 00632 /* If address mark wake up method is chosen, set the USART address node */ 00633 MODIFY_REG(huart->Instance->CR2, USART_CR2_ADD, ((uint32_t)Address << UART_CR2_ADDRESS_LSB_POS)); 00634 } 00635 00636 /* Set the wake up method by setting the WAKE bit in the CR1 register */ 00637 MODIFY_REG(huart->Instance->CR1, USART_CR1_WAKE, WakeUpMethod); 00638 00639 /* Enable the Peripheral */ 00640 __HAL_UART_ENABLE(huart); 00641 00642 /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */ 00643 return (UART_CheckIdleState(huart)); 00644 } 00645 00646 00647 /** 00648 * @brief DeInitialize the UART peripheral. 00649 * @param huart UART handle. 00650 * @retval HAL status 00651 */ 00652 HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart) 00653 { 00654 /* Check the UART handle allocation */ 00655 if (huart == NULL) 00656 { 00657 return HAL_ERROR; 00658 } 00659 00660 /* Check the parameters */ 00661 assert_param((IS_UART_INSTANCE(huart->Instance)) || (IS_LPUART_INSTANCE(huart->Instance))); 00662 00663 huart->gState = HAL_UART_STATE_BUSY; 00664 00665 /* Disable the Peripheral */ 00666 __HAL_UART_DISABLE(huart); 00667 00668 huart->Instance->CR1 = 0x0U; 00669 huart->Instance->CR2 = 0x0U; 00670 huart->Instance->CR3 = 0x0U; 00671 00672 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 00673 if (huart->MspDeInitCallback == NULL) 00674 { 00675 huart->MspDeInitCallback = HAL_UART_MspDeInit; 00676 } 00677 /* DeInit the low level hardware */ 00678 huart->MspDeInitCallback(huart); 00679 #else 00680 /* DeInit the low level hardware */ 00681 HAL_UART_MspDeInit(huart); 00682 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ 00683 00684 huart->ErrorCode = HAL_UART_ERROR_NONE; 00685 huart->gState = HAL_UART_STATE_RESET; 00686 huart->RxState = HAL_UART_STATE_RESET; 00687 00688 /* Process Unlock */ 00689 __HAL_UNLOCK(huart); 00690 00691 return HAL_OK; 00692 } 00693 00694 /** 00695 * @brief Initialize the UART MSP. 00696 * @param huart UART handle. 00697 * @retval None 00698 */ 00699 __weak void HAL_UART_MspInit(UART_HandleTypeDef *huart) 00700 { 00701 /* Prevent unused argument(s) compilation warning */ 00702 UNUSED(huart); 00703 00704 /* NOTE : This function should not be modified, when the callback is needed, 00705 the HAL_UART_MspInit can be implemented in the user file 00706 */ 00707 } 00708 00709 /** 00710 * @brief DeInitialize the UART MSP. 00711 * @param huart UART handle. 00712 * @retval None 00713 */ 00714 __weak void HAL_UART_MspDeInit(UART_HandleTypeDef *huart) 00715 { 00716 /* Prevent unused argument(s) compilation warning */ 00717 UNUSED(huart); 00718 00719 /* NOTE : This function should not be modified, when the callback is needed, 00720 the HAL_UART_MspDeInit can be implemented in the user file 00721 */ 00722 } 00723 00724 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 00725 /** 00726 * @brief Register a User UART Callback 00727 * To be used instead of the weak predefined callback 00728 * @param huart uart handle 00729 * @param CallbackID ID of the callback to be registered 00730 * This parameter can be one of the following values: 00731 * @arg @ref HAL_UART_TX_HALFCOMPLETE_CB_ID Tx Half Complete Callback ID 00732 * @arg @ref HAL_UART_TX_COMPLETE_CB_ID Tx Complete Callback ID 00733 * @arg @ref HAL_UART_RX_HALFCOMPLETE_CB_ID Rx Half Complete Callback ID 00734 * @arg @ref HAL_UART_RX_COMPLETE_CB_ID Rx Complete Callback ID 00735 * @arg @ref HAL_UART_ERROR_CB_ID Error Callback ID 00736 * @arg @ref HAL_UART_ABORT_COMPLETE_CB_ID Abort Complete Callback ID 00737 * @arg @ref HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID Abort Transmit Complete Callback ID 00738 * @arg @ref HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID Abort Receive Complete Callback ID 00739 * @arg @ref HAL_UART_WAKEUP_CB_ID Wakeup Callback ID 00740 * @arg @ref HAL_UART_RX_FIFO_FULL_CB_ID Rx Fifo Full Callback ID 00741 * @arg @ref HAL_UART_TX_FIFO_EMPTY_CB_ID Tx Fifo Empty Callback ID 00742 * @arg @ref HAL_UART_MSPINIT_CB_ID MspInit Callback ID 00743 * @arg @ref HAL_UART_MSPDEINIT_CB_ID MspDeInit Callback ID 00744 * @param pCallback pointer to the Callback function 00745 * @retval HAL status 00746 */ 00747 HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID, pUART_CallbackTypeDef pCallback) 00748 { 00749 HAL_StatusTypeDef status = HAL_OK; 00750 00751 if (pCallback == NULL) 00752 { 00753 /* Update the error code */ 00754 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK; 00755 00756 return HAL_ERROR; 00757 } 00758 /* Process locked */ 00759 __HAL_LOCK(huart); 00760 00761 if (huart->gState == HAL_UART_STATE_READY) 00762 { 00763 switch (CallbackID) 00764 { 00765 case HAL_UART_TX_HALFCOMPLETE_CB_ID : 00766 huart->TxHalfCpltCallback = pCallback; 00767 break; 00768 00769 case HAL_UART_TX_COMPLETE_CB_ID : 00770 huart->TxCpltCallback = pCallback; 00771 break; 00772 00773 case HAL_UART_RX_HALFCOMPLETE_CB_ID : 00774 huart->RxHalfCpltCallback = pCallback; 00775 break; 00776 00777 case HAL_UART_RX_COMPLETE_CB_ID : 00778 huart->RxCpltCallback = pCallback; 00779 break; 00780 00781 case HAL_UART_ERROR_CB_ID : 00782 huart->ErrorCallback = pCallback; 00783 break; 00784 00785 case HAL_UART_ABORT_COMPLETE_CB_ID : 00786 huart->AbortCpltCallback = pCallback; 00787 break; 00788 00789 case HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID : 00790 huart->AbortTransmitCpltCallback = pCallback; 00791 break; 00792 00793 case HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID : 00794 huart->AbortReceiveCpltCallback = pCallback; 00795 break; 00796 00797 case HAL_UART_WAKEUP_CB_ID : 00798 huart->WakeupCallback = pCallback; 00799 break; 00800 00801 #if defined(USART_CR1_FIFOEN) 00802 case HAL_UART_RX_FIFO_FULL_CB_ID : 00803 huart->RxFifoFullCallback = pCallback; 00804 break; 00805 00806 case HAL_UART_TX_FIFO_EMPTY_CB_ID : 00807 huart->TxFifoEmptyCallback = pCallback; 00808 break; 00809 #endif 00810 00811 case HAL_UART_MSPINIT_CB_ID : 00812 huart->MspInitCallback = pCallback; 00813 break; 00814 00815 case HAL_UART_MSPDEINIT_CB_ID : 00816 huart->MspDeInitCallback = pCallback; 00817 break; 00818 00819 default : 00820 /* Update the error code */ 00821 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK; 00822 00823 /* Return error status */ 00824 status = HAL_ERROR; 00825 break; 00826 } 00827 } 00828 else if (huart->gState == HAL_UART_STATE_RESET) 00829 { 00830 switch (CallbackID) 00831 { 00832 case HAL_UART_MSPINIT_CB_ID : 00833 huart->MspInitCallback = pCallback; 00834 break; 00835 00836 case HAL_UART_MSPDEINIT_CB_ID : 00837 huart->MspDeInitCallback = pCallback; 00838 break; 00839 00840 default : 00841 /* Update the error code */ 00842 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK; 00843 00844 /* Return error status */ 00845 status = HAL_ERROR; 00846 break; 00847 } 00848 } 00849 else 00850 { 00851 /* Update the error code */ 00852 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK; 00853 00854 /* Return error status */ 00855 status = HAL_ERROR; 00856 } 00857 00858 /* Release Lock */ 00859 __HAL_UNLOCK(huart); 00860 00861 return status; 00862 } 00863 00864 /** 00865 * @brief Unregister an UART Callback 00866 * UART callaback is redirected to the weak predefined callback 00867 * @param huart uart handle 00868 * @param CallbackID ID of the callback to be unregistered 00869 * This parameter can be one of the following values: 00870 * @arg @ref HAL_UART_TX_HALFCOMPLETE_CB_ID Tx Half Complete Callback ID 00871 * @arg @ref HAL_UART_TX_COMPLETE_CB_ID Tx Complete Callback ID 00872 * @arg @ref HAL_UART_RX_HALFCOMPLETE_CB_ID Rx Half Complete Callback ID 00873 * @arg @ref HAL_UART_RX_COMPLETE_CB_ID Rx Complete Callback ID 00874 * @arg @ref HAL_UART_ERROR_CB_ID Error Callback ID 00875 * @arg @ref HAL_UART_ABORT_COMPLETE_CB_ID Abort Complete Callback ID 00876 * @arg @ref HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID Abort Transmit Complete Callback ID 00877 * @arg @ref HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID Abort Receive Complete Callback ID 00878 * @arg @ref HAL_UART_WAKEUP_CB_ID Wakeup Callback ID 00879 * @arg @ref HAL_UART_RX_FIFO_FULL_CB_ID Rx Fifo Full Callback ID 00880 * @arg @ref HAL_UART_TX_FIFO_EMPTY_CB_ID Tx Fifo Empty Callback ID 00881 * @arg @ref HAL_UART_MSPINIT_CB_ID MspInit Callback ID 00882 * @arg @ref HAL_UART_MSPDEINIT_CB_ID MspDeInit Callback ID 00883 * @retval HAL status 00884 */ 00885 HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID) 00886 { 00887 HAL_StatusTypeDef status = HAL_OK; 00888 00889 /* Process locked */ 00890 __HAL_LOCK(huart); 00891 00892 if (HAL_UART_STATE_READY == huart->gState) 00893 { 00894 switch (CallbackID) 00895 { 00896 case HAL_UART_TX_HALFCOMPLETE_CB_ID : 00897 huart->TxHalfCpltCallback = HAL_UART_TxHalfCpltCallback; /* Legacy weak TxHalfCpltCallback */ 00898 break; 00899 00900 case HAL_UART_TX_COMPLETE_CB_ID : 00901 huart->TxCpltCallback = HAL_UART_TxCpltCallback; /* Legacy weak TxCpltCallback */ 00902 break; 00903 00904 case HAL_UART_RX_HALFCOMPLETE_CB_ID : 00905 huart->RxHalfCpltCallback = HAL_UART_RxHalfCpltCallback; /* Legacy weak RxHalfCpltCallback */ 00906 break; 00907 00908 case HAL_UART_RX_COMPLETE_CB_ID : 00909 huart->RxCpltCallback = HAL_UART_RxCpltCallback; /* Legacy weak RxCpltCallback */ 00910 break; 00911 00912 case HAL_UART_ERROR_CB_ID : 00913 huart->ErrorCallback = HAL_UART_ErrorCallback; /* Legacy weak ErrorCallback */ 00914 break; 00915 00916 case HAL_UART_ABORT_COMPLETE_CB_ID : 00917 huart->AbortCpltCallback = HAL_UART_AbortCpltCallback; /* Legacy weak AbortCpltCallback */ 00918 break; 00919 00920 case HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID : 00921 huart->AbortTransmitCpltCallback = HAL_UART_AbortTransmitCpltCallback; /* Legacy weak AbortTransmitCpltCallback */ 00922 break; 00923 00924 case HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID : 00925 huart->AbortReceiveCpltCallback = HAL_UART_AbortReceiveCpltCallback; /* Legacy weak AbortReceiveCpltCallback */ 00926 break; 00927 00928 case HAL_UART_WAKEUP_CB_ID : 00929 huart->WakeupCallback = HAL_UARTEx_WakeupCallback; /* Legacy weak WakeupCallback */ 00930 break; 00931 00932 #if defined(USART_CR1_FIFOEN) 00933 case HAL_UART_RX_FIFO_FULL_CB_ID : 00934 huart->RxFifoFullCallback = HAL_UARTEx_RxFifoFullCallback; /* Legacy weak RxFifoFullCallback */ 00935 break; 00936 00937 case HAL_UART_TX_FIFO_EMPTY_CB_ID : 00938 huart->TxFifoEmptyCallback = HAL_UARTEx_TxFifoEmptyCallback; /* Legacy weak TxFifoEmptyCallback */ 00939 break; 00940 #endif 00941 00942 case HAL_UART_MSPINIT_CB_ID : 00943 huart->MspInitCallback = HAL_UART_MspInit; /* Legacy weak MspInitCallback */ 00944 break; 00945 00946 case HAL_UART_MSPDEINIT_CB_ID : 00947 huart->MspDeInitCallback = HAL_UART_MspDeInit; /* Legacy weak MspDeInitCallback */ 00948 break; 00949 00950 default : 00951 /* Update the error code */ 00952 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK; 00953 00954 /* Return error status */ 00955 status = HAL_ERROR; 00956 break; 00957 } 00958 } 00959 else if (HAL_UART_STATE_RESET == huart->gState) 00960 { 00961 switch (CallbackID) 00962 { 00963 case HAL_UART_MSPINIT_CB_ID : 00964 huart->MspInitCallback = HAL_UART_MspInit; 00965 break; 00966 00967 case HAL_UART_MSPDEINIT_CB_ID : 00968 huart->MspDeInitCallback = HAL_UART_MspDeInit; 00969 break; 00970 00971 default : 00972 /* Update the error code */ 00973 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK; 00974 00975 /* Return error status */ 00976 status = HAL_ERROR; 00977 break; 00978 } 00979 } 00980 else 00981 { 00982 /* Update the error code */ 00983 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK; 00984 00985 /* Return error status */ 00986 status = HAL_ERROR; 00987 } 00988 00989 /* Release Lock */ 00990 __HAL_UNLOCK(huart); 00991 00992 return status; 00993 } 00994 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 00995 00996 /** 00997 * @} 00998 */ 00999 01000 /** @defgroup UART_Exported_Functions_Group2 IO operation functions 01001 * @brief UART Transmit/Receive functions 01002 * 01003 @verbatim 01004 =============================================================================== 01005 ##### IO operation functions ##### 01006 =============================================================================== 01007 This subsection provides a set of functions allowing to manage the UART asynchronous 01008 and Half duplex data transfers. 01009 01010 (#) There are two mode of transfer: 01011 (+) Blocking mode: The communication is performed in polling mode. 01012 The HAL status of all data processing is returned by the same function 01013 after finishing transfer. 01014 (+) Non-Blocking mode: The communication is performed using Interrupts 01015 or DMA, These API's return the HAL status. 01016 The end of the data processing will be indicated through the 01017 dedicated UART IRQ when using Interrupt mode or the DMA IRQ when 01018 using DMA mode. 01019 The HAL_UART_TxCpltCallback(), HAL_UART_RxCpltCallback() user callbacks 01020 will be executed respectively at the end of the transmit or Receive process 01021 The HAL_UART_ErrorCallback()user callback will be executed when a communication error is detected 01022 01023 (#) Blocking mode API's are : 01024 (+) HAL_UART_Transmit() 01025 (+) HAL_UART_Receive() 01026 01027 (#) Non-Blocking mode API's with Interrupt are : 01028 (+) HAL_UART_Transmit_IT() 01029 (+) HAL_UART_Receive_IT() 01030 (+) HAL_UART_IRQHandler() 01031 01032 (#) Non-Blocking mode API's with DMA are : 01033 (+) HAL_UART_Transmit_DMA() 01034 (+) HAL_UART_Receive_DMA() 01035 (+) HAL_UART_DMAPause() 01036 (+) HAL_UART_DMAResume() 01037 (+) HAL_UART_DMAStop() 01038 01039 (#) A set of Transfer Complete Callbacks are provided in Non_Blocking mode: 01040 (+) HAL_UART_TxHalfCpltCallback() 01041 (+) HAL_UART_TxCpltCallback() 01042 (+) HAL_UART_RxHalfCpltCallback() 01043 (+) HAL_UART_RxCpltCallback() 01044 (+) HAL_UART_ErrorCallback() 01045 01046 (#) Non-Blocking mode transfers could be aborted using Abort API's : 01047 (+) HAL_UART_Abort() 01048 (+) HAL_UART_AbortTransmit() 01049 (+) HAL_UART_AbortReceive() 01050 (+) HAL_UART_Abort_IT() 01051 (+) HAL_UART_AbortTransmit_IT() 01052 (+) HAL_UART_AbortReceive_IT() 01053 01054 (#) For Abort services based on interrupts (HAL_UART_Abortxxx_IT), a set of Abort Complete Callbacks are provided: 01055 (+) HAL_UART_AbortCpltCallback() 01056 (+) HAL_UART_AbortTransmitCpltCallback() 01057 (+) HAL_UART_AbortReceiveCpltCallback() 01058 01059 (#) In Non-Blocking mode transfers, possible errors are split into 2 categories. 01060 Errors are handled as follows : 01061 (+) Error is considered as Recoverable and non blocking : Transfer could go till end, but error severity is 01062 to be evaluated by user : this concerns Frame Error, Parity Error or Noise Error in Interrupt mode reception . 01063 Received character is then retrieved and stored in Rx buffer, Error code is set to allow user to identify error type, 01064 and HAL_UART_ErrorCallback() user callback is executed. Transfer is kept ongoing on UART side. 01065 If user wants to abort it, Abort services should be called by user. 01066 (+) Error is considered as Blocking : Transfer could not be completed properly and is aborted. 01067 This concerns Overrun Error In Interrupt mode reception and all errors in DMA mode. 01068 Error code is set to allow user to identify error type, and HAL_UART_ErrorCallback() user callback is executed. 01069 01070 -@- In the Half duplex communication, it is forbidden to run the transmit 01071 and receive process in parallel, the UART state HAL_UART_STATE_BUSY_TX_RX can't be useful. 01072 01073 @endverbatim 01074 * @{ 01075 */ 01076 01077 /** 01078 * @brief Send an amount of data in blocking mode. 01079 * @note When FIFO mode is enabled, writing a data in the TDR register adds one 01080 * data to the TXFIFO. Write operations to the TDR register are performed 01081 * when TXFNF flag is set. From hardware perspective, TXFNF flag and 01082 * TXE are mapped on the same bit-field. 01083 * @param huart UART handle. 01084 * @param pData Pointer to data buffer. 01085 * @param Size Amount of data to be sent. 01086 * @param Timeout Timeout duration. 01087 * @retval HAL status 01088 */ 01089 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout) 01090 { 01091 uint16_t *tmp; 01092 uint32_t tickstart = 0U; 01093 01094 /* Check that a Tx process is not already ongoing */ 01095 if (huart->gState == HAL_UART_STATE_READY) 01096 { 01097 if ((pData == NULL) || (Size == 0U)) 01098 { 01099 return HAL_ERROR; 01100 } 01101 01102 /* Process Locked */ 01103 __HAL_LOCK(huart); 01104 01105 huart->ErrorCode = HAL_UART_ERROR_NONE; 01106 huart->gState = HAL_UART_STATE_BUSY_TX; 01107 01108 /* Init tickstart for timeout managment*/ 01109 tickstart = HAL_GetTick(); 01110 01111 huart->TxXferSize = Size; 01112 huart->TxXferCount = Size; 01113 01114 while (huart->TxXferCount > 0U) 01115 { 01116 if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 01117 { 01118 return HAL_TIMEOUT; 01119 } 01120 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) 01121 { 01122 tmp = (uint16_t *) pData; 01123 huart->Instance->TDR = (*tmp & (uint16_t)0x01FFU); 01124 pData += 2U; 01125 } 01126 else 01127 { 01128 huart->Instance->TDR = (*pData++ & (uint8_t)0xFFU); 01129 } 01130 huart->TxXferCount--; 01131 } 01132 01133 if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK) 01134 { 01135 return HAL_TIMEOUT; 01136 } 01137 01138 /* At end of Tx process, restore huart->gState to Ready */ 01139 huart->gState = HAL_UART_STATE_READY; 01140 01141 /* Process Unlocked */ 01142 __HAL_UNLOCK(huart); 01143 01144 return HAL_OK; 01145 } 01146 else 01147 { 01148 return HAL_BUSY; 01149 } 01150 } 01151 01152 /** 01153 * @brief Receive an amount of data in blocking mode. 01154 * @note When FIFO mode is enabled, the RXFNE flag is set as long as the RXFIFO 01155 * is not empty. Read operations from the RDR register are performed when 01156 * RXFNE flag is set. From hardware perspective, RXFNE flag and 01157 * RXNE are mapped on the same bit-field. 01158 * @param huart UART handle. 01159 * @param pData Pointer to data buffer. 01160 * @param Size Amount of data to be received. 01161 * @param Timeout Timeout duration. 01162 * @retval HAL status 01163 */ 01164 HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout) 01165 { 01166 uint16_t *tmp; 01167 uint16_t uhMask; 01168 uint32_t tickstart = 0; 01169 01170 /* Check that a Rx process is not already ongoing */ 01171 if (huart->RxState == HAL_UART_STATE_READY) 01172 { 01173 if ((pData == NULL) || (Size == 0U)) 01174 { 01175 return HAL_ERROR; 01176 } 01177 01178 /* Process Locked */ 01179 __HAL_LOCK(huart); 01180 01181 huart->ErrorCode = HAL_UART_ERROR_NONE; 01182 huart->RxState = HAL_UART_STATE_BUSY_RX; 01183 01184 /* Init tickstart for timeout managment*/ 01185 tickstart = HAL_GetTick(); 01186 01187 huart->RxXferSize = Size; 01188 huart->RxXferCount = Size; 01189 01190 /* Computation of UART mask to apply to RDR register */ 01191 UART_MASK_COMPUTATION(huart); 01192 uhMask = huart->Mask; 01193 01194 /* as long as data have to be received */ 01195 while (huart->RxXferCount > 0U) 01196 { 01197 if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK) 01198 { 01199 return HAL_TIMEOUT; 01200 } 01201 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) 01202 { 01203 tmp = (uint16_t *) pData ; 01204 *tmp = (uint16_t)(huart->Instance->RDR & uhMask); 01205 pData += 2U; 01206 } 01207 else 01208 { 01209 *pData++ = (uint8_t)(huart->Instance->RDR & (uint8_t)uhMask); 01210 } 01211 huart->RxXferCount--; 01212 } 01213 01214 /* At end of Rx process, restore huart->RxState to Ready */ 01215 huart->RxState = HAL_UART_STATE_READY; 01216 01217 /* Process Unlocked */ 01218 __HAL_UNLOCK(huart); 01219 01220 return HAL_OK; 01221 } 01222 else 01223 { 01224 return HAL_BUSY; 01225 } 01226 } 01227 01228 /** 01229 * @brief Send an amount of data in interrupt mode. 01230 * @param huart UART handle. 01231 * @param pData Pointer to data buffer. 01232 * @param Size Amount of data to be sent. 01233 * @retval HAL status 01234 */ 01235 HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) 01236 { 01237 /* Check that a Tx process is not already ongoing */ 01238 if (huart->gState == HAL_UART_STATE_READY) 01239 { 01240 if ((pData == NULL) || (Size == 0U)) 01241 { 01242 return HAL_ERROR; 01243 } 01244 01245 /* Process Locked */ 01246 __HAL_LOCK(huart); 01247 01248 huart->pTxBuffPtr = pData; 01249 huart->TxXferSize = Size; 01250 huart->TxXferCount = Size; 01251 huart->TxISR = NULL; 01252 01253 huart->ErrorCode = HAL_UART_ERROR_NONE; 01254 huart->gState = HAL_UART_STATE_BUSY_TX; 01255 01256 #if defined(USART_CR1_FIFOEN) 01257 /* Configure Tx interrupt processing */ 01258 if (huart->FifoMode == UART_FIFOMODE_ENABLE) 01259 { 01260 /* Set the Tx ISR function pointer according to the data word length */ 01261 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) 01262 { 01263 huart->TxISR = UART_TxISR_16BIT_FIFOEN; 01264 } 01265 else 01266 { 01267 huart->TxISR = UART_TxISR_8BIT_FIFOEN; 01268 } 01269 01270 /* Process Unlocked */ 01271 __HAL_UNLOCK(huart); 01272 01273 /* Enable the TX FIFO threshold interrupt */ 01274 SET_BIT(huart->Instance->CR3, USART_CR3_TXFTIE); 01275 } 01276 else 01277 #endif 01278 { 01279 /* Set the Tx ISR function pointer according to the data word length */ 01280 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) 01281 { 01282 huart->TxISR = UART_TxISR_16BIT; 01283 } 01284 else 01285 { 01286 huart->TxISR = UART_TxISR_8BIT; 01287 } 01288 01289 /* Process Unlocked */ 01290 __HAL_UNLOCK(huart); 01291 01292 /* Enable the Transmit Data Register Empty interrupt */ 01293 #if defined(USART_CR1_FIFOEN) 01294 SET_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE); 01295 #else 01296 SET_BIT(huart->Instance->CR1, USART_CR1_TXEIE); 01297 #endif 01298 } 01299 01300 return HAL_OK; 01301 } 01302 else 01303 { 01304 return HAL_BUSY; 01305 } 01306 } 01307 01308 /** 01309 * @brief Receive an amount of data in interrupt mode. 01310 * @param huart UART handle. 01311 * @param pData Pointer to data buffer. 01312 * @param Size Amount of data to be received. 01313 * @retval HAL status 01314 */ 01315 HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) 01316 { 01317 /* Check that a Rx process is not already ongoing */ 01318 if (huart->RxState == HAL_UART_STATE_READY) 01319 { 01320 if ((pData == NULL) || (Size == 0U)) 01321 { 01322 return HAL_ERROR; 01323 } 01324 01325 /* Process Locked */ 01326 __HAL_LOCK(huart); 01327 01328 huart->pRxBuffPtr = pData; 01329 huart->RxXferSize = Size; 01330 huart->RxXferCount = Size; 01331 huart->RxISR = NULL; 01332 01333 /* Computation of UART mask to apply to RDR register */ 01334 UART_MASK_COMPUTATION(huart); 01335 01336 huart->ErrorCode = HAL_UART_ERROR_NONE; 01337 huart->RxState = HAL_UART_STATE_BUSY_RX; 01338 01339 /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */ 01340 SET_BIT(huart->Instance->CR3, USART_CR3_EIE); 01341 01342 #if defined(USART_CR1_FIFOEN) 01343 /* Configure Rx interrupt processing*/ 01344 if ((huart->FifoMode == UART_FIFOMODE_ENABLE) && (Size >= huart->NbRxDataToProcess)) 01345 { 01346 /* Set the Rx ISR function pointer according to the data word length */ 01347 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) 01348 { 01349 huart->RxISR = UART_RxISR_16BIT_FIFOEN; 01350 } 01351 else 01352 { 01353 huart->RxISR = UART_RxISR_8BIT_FIFOEN; 01354 } 01355 01356 /* Process Unlocked */ 01357 __HAL_UNLOCK(huart); 01358 01359 /* Enable the UART Parity Error interrupt and RX FIFO Threshold interrupt */ 01360 SET_BIT(huart->Instance->CR1, USART_CR1_PEIE); 01361 SET_BIT(huart->Instance->CR3, USART_CR3_RXFTIE); 01362 } 01363 else 01364 #endif 01365 { 01366 /* Set the Rx ISR function pointer according to the data word length */ 01367 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) 01368 { 01369 huart->RxISR = UART_RxISR_16BIT; 01370 } 01371 else 01372 { 01373 huart->RxISR = UART_RxISR_8BIT; 01374 } 01375 01376 /* Process Unlocked */ 01377 __HAL_UNLOCK(huart); 01378 01379 /* Enable the UART Parity Error interrupt and Data Register Not Empty interrupt */ 01380 #if defined(USART_CR1_FIFOEN) 01381 SET_BIT(huart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE); 01382 #else 01383 SET_BIT(huart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE); 01384 #endif 01385 } 01386 01387 return HAL_OK; 01388 } 01389 else 01390 { 01391 return HAL_BUSY; 01392 } 01393 } 01394 01395 /** 01396 * @brief Send an amount of data in DMA mode. 01397 * @param huart UART handle. 01398 * @param pData Pointer to data buffer. 01399 * @param Size Amount of data to be sent. 01400 * @retval HAL status 01401 */ 01402 HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) 01403 { 01404 /* Check that a Tx process is not already ongoing */ 01405 if (huart->gState == HAL_UART_STATE_READY) 01406 { 01407 if ((pData == NULL) || (Size == 0U)) 01408 { 01409 return HAL_ERROR; 01410 } 01411 01412 /* Process Locked */ 01413 __HAL_LOCK(huart); 01414 01415 huart->pTxBuffPtr = pData; 01416 huart->TxXferSize = Size; 01417 huart->TxXferCount = Size; 01418 01419 huart->ErrorCode = HAL_UART_ERROR_NONE; 01420 huart->gState = HAL_UART_STATE_BUSY_TX; 01421 01422 /* Set the UART DMA transfer complete callback */ 01423 huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt; 01424 01425 /* Set the UART DMA Half transfer complete callback */ 01426 huart->hdmatx->XferHalfCpltCallback = UART_DMATxHalfCplt; 01427 01428 /* Set the DMA error callback */ 01429 huart->hdmatx->XferErrorCallback = UART_DMAError; 01430 01431 /* Set the DMA abort callback */ 01432 huart->hdmatx->XferAbortCallback = NULL; 01433 01434 /* Enable the UART transmit DMA channel */ 01435 HAL_DMA_Start_IT(huart->hdmatx, (uint32_t)huart->pTxBuffPtr, (uint32_t)&huart->Instance->TDR, Size); 01436 01437 /* Clear the TC flag in the ICR register */ 01438 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_TCF); 01439 01440 /* Process Unlocked */ 01441 __HAL_UNLOCK(huart); 01442 01443 /* Enable the DMA transfer for transmit request by setting the DMAT bit 01444 in the UART CR3 register */ 01445 SET_BIT(huart->Instance->CR3, USART_CR3_DMAT); 01446 01447 return HAL_OK; 01448 } 01449 else 01450 { 01451 return HAL_BUSY; 01452 } 01453 } 01454 01455 /** 01456 * @brief Receive an amount of data in DMA mode. 01457 * @note When the UART parity is enabled (PCE = 1), the received data contain 01458 * the parity bit (MSB position). 01459 * @param huart UART handle. 01460 * @param pData Pointer to data buffer. 01461 * @param Size Amount of data to be received. 01462 * @retval HAL status 01463 */ 01464 HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) 01465 { 01466 /* Check that a Rx process is not already ongoing */ 01467 if (huart->RxState == HAL_UART_STATE_READY) 01468 { 01469 if ((pData == NULL) || (Size == 0U)) 01470 { 01471 return HAL_ERROR; 01472 } 01473 01474 /* Process Locked */ 01475 __HAL_LOCK(huart); 01476 01477 huart->pRxBuffPtr = pData; 01478 huart->RxXferSize = Size; 01479 01480 huart->ErrorCode = HAL_UART_ERROR_NONE; 01481 huart->RxState = HAL_UART_STATE_BUSY_RX; 01482 01483 /* Set the UART DMA transfer complete callback */ 01484 huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt; 01485 01486 /* Set the UART DMA Half transfer complete callback */ 01487 huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt; 01488 01489 /* Set the DMA error callback */ 01490 huart->hdmarx->XferErrorCallback = UART_DMAError; 01491 01492 /* Set the DMA abort callback */ 01493 huart->hdmarx->XferAbortCallback = NULL; 01494 01495 /* Enable the DMA channel */ 01496 HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->RDR, (uint32_t)huart->pRxBuffPtr, Size); 01497 01498 /* Process Unlocked */ 01499 __HAL_UNLOCK(huart); 01500 01501 /* Enable the UART Parity Error Interrupt */ 01502 SET_BIT(huart->Instance->CR1, USART_CR1_PEIE); 01503 01504 /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */ 01505 SET_BIT(huart->Instance->CR3, USART_CR3_EIE); 01506 01507 /* Enable the DMA transfer for the receiver request by setting the DMAR bit 01508 in the UART CR3 register */ 01509 SET_BIT(huart->Instance->CR3, USART_CR3_DMAR); 01510 01511 return HAL_OK; 01512 } 01513 else 01514 { 01515 return HAL_BUSY; 01516 } 01517 } 01518 01519 /** 01520 * @brief Pause the DMA Transfer. 01521 * @param huart UART handle. 01522 * @retval HAL status 01523 */ 01524 HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart) 01525 { 01526 /* Process Locked */ 01527 __HAL_LOCK(huart); 01528 01529 if ((huart->gState == HAL_UART_STATE_BUSY_TX) && 01530 (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))) 01531 { 01532 /* Disable the UART DMA Tx request */ 01533 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); 01534 } 01535 if ((huart->RxState == HAL_UART_STATE_BUSY_RX) && 01536 (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))) 01537 { 01538 /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */ 01539 CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); 01540 CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 01541 01542 /* Disable the UART DMA Rx request */ 01543 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 01544 } 01545 01546 /* Process Unlocked */ 01547 __HAL_UNLOCK(huart); 01548 01549 return HAL_OK; 01550 } 01551 01552 /** 01553 * @brief Resume the DMA Transfer. 01554 * @param huart UART handle. 01555 * @retval HAL status 01556 */ 01557 HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart) 01558 { 01559 /* Process Locked */ 01560 __HAL_LOCK(huart); 01561 01562 if (huart->gState == HAL_UART_STATE_BUSY_TX) 01563 { 01564 /* Enable the UART DMA Tx request */ 01565 SET_BIT(huart->Instance->CR3, USART_CR3_DMAT); 01566 } 01567 if (huart->RxState == HAL_UART_STATE_BUSY_RX) 01568 { 01569 /* Clear the Overrun flag before resuming the Rx transfer */ 01570 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF); 01571 01572 /* Reenable PE and ERR (Frame error, noise error, overrun error) interrupts */ 01573 SET_BIT(huart->Instance->CR1, USART_CR1_PEIE); 01574 SET_BIT(huart->Instance->CR3, USART_CR3_EIE); 01575 01576 /* Enable the UART DMA Rx request */ 01577 SET_BIT(huart->Instance->CR3, USART_CR3_DMAR); 01578 } 01579 01580 /* Process Unlocked */ 01581 __HAL_UNLOCK(huart); 01582 01583 return HAL_OK; 01584 } 01585 01586 /** 01587 * @brief Stop the DMA Transfer. 01588 * @param huart UART handle. 01589 * @retval HAL status 01590 */ 01591 HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart) 01592 { 01593 /* The Lock is not implemented on this API to allow the user application 01594 to call the HAL UART API under callbacks HAL_UART_TxCpltCallback() / HAL_UART_RxCpltCallback() / 01595 HAL_UART_TxHalfCpltCallback / HAL_UART_RxHalfCpltCallback: 01596 indeed, when HAL_DMA_Abort() API is called, the DMA TX/RX Transfer or Half Transfer complete 01597 interrupt is generated if the DMA transfer interruption occurs at the middle or at the end of 01598 the stream and the corresponding call back is executed. */ 01599 01600 /* Stop UART DMA Tx request if ongoing */ 01601 if ((huart->gState == HAL_UART_STATE_BUSY_TX) && 01602 (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))) 01603 { 01604 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); 01605 01606 /* Abort the UART DMA Tx channel */ 01607 if (huart->hdmatx != NULL) 01608 { 01609 HAL_DMA_Abort(huart->hdmatx); 01610 } 01611 01612 UART_EndTxTransfer(huart); 01613 } 01614 01615 /* Stop UART DMA Rx request if ongoing */ 01616 if ((huart->RxState == HAL_UART_STATE_BUSY_RX) && 01617 (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))) 01618 { 01619 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 01620 01621 /* Abort the UART DMA Rx channel */ 01622 if (huart->hdmarx != NULL) 01623 { 01624 HAL_DMA_Abort(huart->hdmarx); 01625 } 01626 01627 UART_EndRxTransfer(huart); 01628 } 01629 01630 return HAL_OK; 01631 } 01632 01633 /** 01634 * @brief Abort ongoing transfers (blocking mode). 01635 * @param huart UART handle. 01636 * @note This procedure could be used for aborting any ongoing transfer started in Interrupt or DMA mode. 01637 * This procedure performs following operations : 01638 * - Disable UART Interrupts (Tx and Rx) 01639 * - Disable the DMA transfer in the peripheral register (if enabled) 01640 * - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode) 01641 * - Set handle State to READY 01642 * @note This procedure is executed in blocking mode : when exiting function, Abort is considered as completed. 01643 * @retval HAL status 01644 */ 01645 HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart) 01646 { 01647 #if defined(USART_CR1_FIFOEN) 01648 /* Disable TXE, TC, RXNE, PE, RXFT, TXFT and ERR (Frame error, noise error, overrun error) interrupts */ 01649 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE | USART_CR1_TXEIE_TXFNFIE | USART_CR1_TCIE)); 01650 CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE | USART_CR3_RXFTIE | USART_CR3_TXFTIE); 01651 #else 01652 /* Disable TXEIE, TCIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ 01653 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE)); 01654 CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 01655 #endif 01656 01657 /* Disable the UART DMA Tx request if enabled */ 01658 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) 01659 { 01660 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); 01661 01662 /* Abort the UART DMA Tx channel : use blocking DMA Abort API (no callback) */ 01663 if (huart->hdmatx != NULL) 01664 { 01665 /* Set the UART DMA Abort callback to Null. 01666 No call back execution at end of DMA abort procedure */ 01667 huart->hdmatx->XferAbortCallback = NULL; 01668 01669 HAL_DMA_Abort(huart->hdmatx); 01670 } 01671 } 01672 01673 /* Disable the UART DMA Rx request if enabled */ 01674 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 01675 { 01676 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 01677 01678 /* Abort the UART DMA Rx channel : use blocking DMA Abort API (no callback) */ 01679 if (huart->hdmarx != NULL) 01680 { 01681 /* Set the UART DMA Abort callback to Null. 01682 No call back execution at end of DMA abort procedure */ 01683 huart->hdmarx->XferAbortCallback = NULL; 01684 01685 HAL_DMA_Abort(huart->hdmarx); 01686 } 01687 } 01688 01689 /* Reset Tx and Rx transfer counters */ 01690 huart->TxXferCount = 0U; 01691 huart->RxXferCount = 0U; 01692 01693 /* Clear the Error flags in the ICR register */ 01694 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF); 01695 01696 #if defined(USART_CR1_FIFOEN) 01697 /* Flush the whole TX FIFO (if needed) */ 01698 if (huart->FifoMode == UART_FIFOMODE_ENABLE) 01699 { 01700 __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST); 01701 } 01702 #endif 01703 01704 /* Discard the received data */ 01705 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); 01706 01707 /* Restore huart->gState and huart->RxState to Ready */ 01708 huart->gState = HAL_UART_STATE_READY; 01709 huart->RxState = HAL_UART_STATE_READY; 01710 01711 /* Reset Handle ErrorCode to No Error */ 01712 huart->ErrorCode = HAL_UART_ERROR_NONE; 01713 01714 return HAL_OK; 01715 } 01716 01717 /** 01718 * @brief Abort ongoing Transmit transfer (blocking mode). 01719 * @param huart UART handle. 01720 * @note This procedure could be used for aborting any ongoing Tx transfer started in Interrupt or DMA mode. 01721 * This procedure performs following operations : 01722 * - Disable UART Interrupts (Tx) 01723 * - Disable the DMA transfer in the peripheral register (if enabled) 01724 * - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode) 01725 * - Set handle State to READY 01726 * @note This procedure is executed in blocking mode : when exiting function, Abort is considered as completed. 01727 * @retval HAL status 01728 */ 01729 HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart) 01730 { 01731 #if defined(USART_CR1_FIFOEN) 01732 /* Disable TCIE, TXEIE and TXFTIE interrupts */ 01733 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TCIE | USART_CR1_TXEIE_TXFNFIE)); 01734 CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE); 01735 #else 01736 /* Disable TXEIE and TCIE interrupts */ 01737 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE)); 01738 #endif 01739 01740 /* Disable the UART DMA Tx request if enabled */ 01741 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) 01742 { 01743 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); 01744 01745 /* Abort the UART DMA Tx channel : use blocking DMA Abort API (no callback) */ 01746 if (huart->hdmatx != NULL) 01747 { 01748 /* Set the UART DMA Abort callback to Null. 01749 No call back execution at end of DMA abort procedure */ 01750 huart->hdmatx->XferAbortCallback = NULL; 01751 01752 HAL_DMA_Abort(huart->hdmatx); 01753 } 01754 } 01755 01756 /* Reset Tx transfer counter */ 01757 huart->TxXferCount = 0U; 01758 01759 #if defined(USART_CR1_FIFOEN) 01760 /* Flush the whole TX FIFO (if needed) */ 01761 if (huart->FifoMode == UART_FIFOMODE_ENABLE) 01762 { 01763 __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST); 01764 } 01765 #endif 01766 01767 /* Restore huart->gState to Ready */ 01768 huart->gState = HAL_UART_STATE_READY; 01769 01770 return HAL_OK; 01771 } 01772 01773 /** 01774 * @brief Abort ongoing Receive transfer (blocking mode). 01775 * @param huart UART handle. 01776 * @note This procedure could be used for aborting any ongoing Rx transfer started in Interrupt or DMA mode. 01777 * This procedure performs following operations : 01778 * - Disable UART Interrupts (Rx) 01779 * - Disable the DMA transfer in the peripheral register (if enabled) 01780 * - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode) 01781 * - Set handle State to READY 01782 * @note This procedure is executed in blocking mode : when exiting function, Abort is considered as completed. 01783 * @retval HAL status 01784 */ 01785 HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart) 01786 { 01787 #if defined(USART_CR1_FIFOEN) 01788 /* Disable PEIE, EIE, RXNEIE and RXFTIE interrupts */ 01789 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE)); 01790 CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE | USART_CR3_RXFTIE); 01791 #else 01792 /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ 01793 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); 01794 CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 01795 #endif 01796 01797 /* Disable the UART DMA Rx request if enabled */ 01798 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 01799 { 01800 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 01801 01802 /* Abort the UART DMA Rx channel : use blocking DMA Abort API (no callback) */ 01803 if (huart->hdmarx != NULL) 01804 { 01805 /* Set the UART DMA Abort callback to Null. 01806 No call back execution at end of DMA abort procedure */ 01807 huart->hdmarx->XferAbortCallback = NULL; 01808 01809 HAL_DMA_Abort(huart->hdmarx); 01810 } 01811 } 01812 01813 /* Reset Rx transfer counter */ 01814 huart->RxXferCount = 0U; 01815 01816 /* Clear the Error flags in the ICR register */ 01817 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF); 01818 01819 /* Discard the received data */ 01820 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); 01821 01822 /* Restore huart->RxState to Ready */ 01823 huart->RxState = HAL_UART_STATE_READY; 01824 01825 return HAL_OK; 01826 } 01827 01828 /** 01829 * @brief Abort ongoing transfers (Interrupt mode). 01830 * @param huart UART handle. 01831 * @note This procedure could be used for aborting any ongoing transfer started in Interrupt or DMA mode. 01832 * This procedure performs following operations : 01833 * - Disable UART Interrupts (Tx and Rx) 01834 * - Disable the DMA transfer in the peripheral register (if enabled) 01835 * - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode) 01836 * - Set handle State to READY 01837 * - At abort completion, call user abort complete callback 01838 * @note This procedure is executed in Interrupt mode, meaning that abort procedure could be 01839 * considered as completed only when user abort complete callback is executed (not when exiting function). 01840 * @retval HAL status 01841 */ 01842 HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart) 01843 { 01844 uint32_t abortcplt = 1U; 01845 01846 /* Disable interrupts */ 01847 #if defined(USART_CR1_FIFOEN) 01848 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_PEIE | USART_CR1_TCIE | USART_CR1_RXNEIE_RXFNEIE | USART_CR1_TXEIE_TXFNFIE)); 01849 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE | USART_CR3_TXFTIE)); 01850 #else 01851 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE)); 01852 CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 01853 #endif 01854 01855 /* If DMA Tx and/or DMA Rx Handles are associated to UART Handle, DMA Abort complete callbacks should be initialised 01856 before any call to DMA Abort functions */ 01857 /* DMA Tx Handle is valid */ 01858 if (huart->hdmatx != NULL) 01859 { 01860 /* Set DMA Abort Complete callback if UART DMA Tx request if enabled. 01861 Otherwise, set it to NULL */ 01862 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) 01863 { 01864 huart->hdmatx->XferAbortCallback = UART_DMATxAbortCallback; 01865 } 01866 else 01867 { 01868 huart->hdmatx->XferAbortCallback = NULL; 01869 } 01870 } 01871 /* DMA Rx Handle is valid */ 01872 if (huart->hdmarx != NULL) 01873 { 01874 /* Set DMA Abort Complete callback if UART DMA Rx request if enabled. 01875 Otherwise, set it to NULL */ 01876 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 01877 { 01878 huart->hdmarx->XferAbortCallback = UART_DMARxAbortCallback; 01879 } 01880 else 01881 { 01882 huart->hdmarx->XferAbortCallback = NULL; 01883 } 01884 } 01885 01886 /* Disable the UART DMA Tx request if enabled */ 01887 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) 01888 { 01889 /* Disable DMA Tx at UART level */ 01890 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); 01891 01892 /* Abort the UART DMA Tx channel : use non blocking DMA Abort API (callback) */ 01893 if (huart->hdmatx != NULL) 01894 { 01895 /* UART Tx DMA Abort callback has already been initialised : 01896 will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */ 01897 01898 /* Abort DMA TX */ 01899 if (HAL_DMA_Abort_IT(huart->hdmatx) != HAL_OK) 01900 { 01901 huart->hdmatx->XferAbortCallback = NULL; 01902 } 01903 else 01904 { 01905 abortcplt = 0U; 01906 } 01907 } 01908 } 01909 01910 /* Disable the UART DMA Rx request if enabled */ 01911 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 01912 { 01913 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 01914 01915 /* Abort the UART DMA Rx channel : use non blocking DMA Abort API (callback) */ 01916 if (huart->hdmarx != NULL) 01917 { 01918 /* UART Rx DMA Abort callback has already been initialised : 01919 will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */ 01920 01921 /* Abort DMA RX */ 01922 if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) 01923 { 01924 huart->hdmarx->XferAbortCallback = NULL; 01925 abortcplt = 1U; 01926 } 01927 else 01928 { 01929 abortcplt = 0U; 01930 } 01931 } 01932 } 01933 01934 /* if no DMA abort complete callback execution is required => call user Abort Complete callback */ 01935 if (abortcplt == 1U) 01936 { 01937 /* Reset Tx and Rx transfer counters */ 01938 huart->TxXferCount = 0U; 01939 huart->RxXferCount = 0U; 01940 01941 /* Clear ISR function pointers */ 01942 huart->RxISR = NULL; 01943 huart->TxISR = NULL; 01944 01945 /* Reset errorCode */ 01946 huart->ErrorCode = HAL_UART_ERROR_NONE; 01947 01948 /* Clear the Error flags in the ICR register */ 01949 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF); 01950 01951 #if defined(USART_CR1_FIFOEN) 01952 /* Flush the whole TX FIFO (if needed) */ 01953 if (huart->FifoMode == UART_FIFOMODE_ENABLE) 01954 { 01955 __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST); 01956 } 01957 #endif 01958 01959 /* Discard the received data */ 01960 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); 01961 01962 /* Restore huart->gState and huart->RxState to Ready */ 01963 huart->gState = HAL_UART_STATE_READY; 01964 huart->RxState = HAL_UART_STATE_READY; 01965 01966 /* As no DMA to be aborted, call directly user Abort complete callback */ 01967 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 01968 /* Call registered Abort complete callback */ 01969 huart->AbortCpltCallback(huart); 01970 #else 01971 /* Call legacy weak Abort complete callback */ 01972 HAL_UART_AbortCpltCallback(huart); 01973 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 01974 } 01975 01976 return HAL_OK; 01977 } 01978 01979 /** 01980 * @brief Abort ongoing Transmit transfer (Interrupt mode). 01981 * @param huart UART handle. 01982 * @note This procedure could be used for aborting any ongoing Tx transfer started in Interrupt or DMA mode. 01983 * This procedure performs following operations : 01984 * - Disable UART Interrupts (Tx) 01985 * - Disable the DMA transfer in the peripheral register (if enabled) 01986 * - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode) 01987 * - Set handle State to READY 01988 * - At abort completion, call user abort complete callback 01989 * @note This procedure is executed in Interrupt mode, meaning that abort procedure could be 01990 * considered as completed only when user abort complete callback is executed (not when exiting function). 01991 * @retval HAL status 01992 */ 01993 HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart) 01994 { 01995 /* Disable interrupts */ 01996 #if defined(USART_CR1_FIFOEN) 01997 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TCIE | USART_CR1_TXEIE_TXFNFIE)); 01998 CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE); 01999 #else 02000 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE)); 02001 #endif 02002 02003 /* Disable the UART DMA Tx request if enabled */ 02004 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) 02005 { 02006 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); 02007 02008 /* Abort the UART DMA Tx channel : use non blocking DMA Abort API (callback) */ 02009 if (huart->hdmatx != NULL) 02010 { 02011 /* Set the UART DMA Abort callback : 02012 will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */ 02013 huart->hdmatx->XferAbortCallback = UART_DMATxOnlyAbortCallback; 02014 02015 /* Abort DMA TX */ 02016 if (HAL_DMA_Abort_IT(huart->hdmatx) != HAL_OK) 02017 { 02018 /* Call Directly huart->hdmatx->XferAbortCallback function in case of error */ 02019 huart->hdmatx->XferAbortCallback(huart->hdmatx); 02020 } 02021 } 02022 else 02023 { 02024 /* Reset Tx transfer counter */ 02025 huart->TxXferCount = 0U; 02026 02027 /* Clear TxISR function pointers */ 02028 huart->TxISR = NULL; 02029 02030 /* Restore huart->gState to Ready */ 02031 huart->gState = HAL_UART_STATE_READY; 02032 02033 /* As no DMA to be aborted, call directly user Abort complete callback */ 02034 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 02035 /* Call registered Abort Transmit Complete Callback */ 02036 huart->AbortTransmitCpltCallback(huart); 02037 #else 02038 /* Call legacy weak Abort Transmit Complete Callback */ 02039 HAL_UART_AbortTransmitCpltCallback(huart); 02040 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 02041 } 02042 } 02043 else 02044 { 02045 /* Reset Tx transfer counter */ 02046 huart->TxXferCount = 0U; 02047 02048 /* Clear TxISR function pointers */ 02049 huart->TxISR = NULL; 02050 02051 #if defined(USART_CR1_FIFOEN) 02052 /* Flush the whole TX FIFO (if needed) */ 02053 if (huart->FifoMode == UART_FIFOMODE_ENABLE) 02054 { 02055 __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST); 02056 } 02057 #endif 02058 02059 /* Restore huart->gState to Ready */ 02060 huart->gState = HAL_UART_STATE_READY; 02061 02062 /* As no DMA to be aborted, call directly user Abort complete callback */ 02063 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 02064 /* Call registered Abort Transmit Complete Callback */ 02065 huart->AbortTransmitCpltCallback(huart); 02066 #else 02067 /* Call legacy weak Abort Transmit Complete Callback */ 02068 HAL_UART_AbortTransmitCpltCallback(huart); 02069 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 02070 } 02071 02072 return HAL_OK; 02073 } 02074 02075 /** 02076 * @brief Abort ongoing Receive transfer (Interrupt mode). 02077 * @param huart UART handle. 02078 * @note This procedure could be used for aborting any ongoing Rx transfer started in Interrupt or DMA mode. 02079 * This procedure performs following operations : 02080 * - Disable UART Interrupts (Rx) 02081 * - Disable the DMA transfer in the peripheral register (if enabled) 02082 * - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode) 02083 * - Set handle State to READY 02084 * - At abort completion, call user abort complete callback 02085 * @note This procedure is executed in Interrupt mode, meaning that abort procedure could be 02086 * considered as completed only when user abort complete callback is executed (not when exiting function). 02087 * @retval HAL status 02088 */ 02089 HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart) 02090 { 02091 /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ 02092 #if defined(USART_CR1_FIFOEN) 02093 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE)); 02094 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE)); 02095 #else 02096 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); 02097 CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 02098 #endif 02099 02100 /* Disable the UART DMA Rx request if enabled */ 02101 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 02102 { 02103 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 02104 02105 /* Abort the UART DMA Rx channel : use non blocking DMA Abort API (callback) */ 02106 if (huart->hdmarx != NULL) 02107 { 02108 /* Set the UART DMA Abort callback : 02109 will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */ 02110 huart->hdmarx->XferAbortCallback = UART_DMARxOnlyAbortCallback; 02111 02112 /* Abort DMA RX */ 02113 if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) 02114 { 02115 /* Call Directly huart->hdmarx->XferAbortCallback function in case of error */ 02116 huart->hdmarx->XferAbortCallback(huart->hdmarx); 02117 } 02118 } 02119 else 02120 { 02121 /* Reset Rx transfer counter */ 02122 huart->RxXferCount = 0U; 02123 02124 /* Clear RxISR function pointer */ 02125 huart->pRxBuffPtr = NULL; 02126 02127 /* Clear the Error flags in the ICR register */ 02128 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF); 02129 02130 /* Discard the received data */ 02131 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); 02132 02133 /* Restore huart->RxState to Ready */ 02134 huart->RxState = HAL_UART_STATE_READY; 02135 02136 /* As no DMA to be aborted, call directly user Abort complete callback */ 02137 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 02138 /* Call registered Abort Receive Complete Callback */ 02139 huart->AbortReceiveCpltCallback(huart); 02140 #else 02141 /* Call legacy weak Abort Receive Complete Callback */ 02142 HAL_UART_AbortReceiveCpltCallback(huart); 02143 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 02144 } 02145 } 02146 else 02147 { 02148 /* Reset Rx transfer counter */ 02149 huart->RxXferCount = 0U; 02150 02151 /* Clear RxISR function pointer */ 02152 huart->pRxBuffPtr = NULL; 02153 02154 /* Clear the Error flags in the ICR register */ 02155 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF); 02156 02157 /* Restore huart->RxState to Ready */ 02158 huart->RxState = HAL_UART_STATE_READY; 02159 02160 /* As no DMA to be aborted, call directly user Abort complete callback */ 02161 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 02162 /* Call registered Abort Receive Complete Callback */ 02163 huart->AbortReceiveCpltCallback(huart); 02164 #else 02165 /* Call legacy weak Abort Receive Complete Callback */ 02166 HAL_UART_AbortReceiveCpltCallback(huart); 02167 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 02168 } 02169 02170 return HAL_OK; 02171 } 02172 02173 /** 02174 * @brief Handle UART interrupt request. 02175 * @param huart UART handle. 02176 * @retval None 02177 */ 02178 void HAL_UART_IRQHandler(UART_HandleTypeDef *huart) 02179 { 02180 uint32_t isrflags = READ_REG(huart->Instance->ISR); 02181 uint32_t cr1its = READ_REG(huart->Instance->CR1); 02182 uint32_t cr3its = READ_REG(huart->Instance->CR3); 02183 uint32_t errorflags; 02184 02185 /* If no error occurs */ 02186 errorflags = (isrflags & (uint32_t)(USART_ISR_PE | USART_ISR_FE | USART_ISR_ORE | USART_ISR_NE)); 02187 if (errorflags == RESET) 02188 { 02189 /* UART in mode Receiver ---------------------------------------------------*/ 02190 #if defined(USART_CR1_FIFOEN) 02191 if (((isrflags & USART_ISR_RXNE_RXFNE) != RESET) 02192 && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != RESET) 02193 || ((cr3its & USART_CR3_RXFTIE) != RESET))) 02194 #else 02195 if (((isrflags & USART_ISR_RXNE) != RESET) 02196 && ((cr1its & USART_CR1_RXNEIE) != RESET)) 02197 #endif 02198 { 02199 if (huart->RxISR != NULL) 02200 { 02201 huart->RxISR(huart); 02202 } 02203 return; 02204 } 02205 } 02206 02207 /* If some errors occur */ 02208 #if defined(USART_CR1_FIFOEN) 02209 if ((errorflags != RESET) 02210 && ((((cr3its & (USART_CR3_RXFTIE | USART_CR3_EIE)) != RESET) 02211 || ((cr1its & (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE)) != RESET)))) 02212 #else 02213 if ((errorflags != RESET) 02214 && (((cr3its & USART_CR3_EIE) != RESET) 02215 || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET))) 02216 #endif 02217 { 02218 /* UART parity error interrupt occurred -------------------------------------*/ 02219 if (((isrflags & USART_ISR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET)) 02220 { 02221 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF); 02222 02223 huart->ErrorCode |= HAL_UART_ERROR_PE; 02224 } 02225 02226 /* UART frame error interrupt occurred --------------------------------------*/ 02227 if (((isrflags & USART_ISR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) 02228 { 02229 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF); 02230 02231 huart->ErrorCode |= HAL_UART_ERROR_FE; 02232 } 02233 02234 /* UART noise error interrupt occurred --------------------------------------*/ 02235 if (((isrflags & USART_ISR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) 02236 { 02237 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF); 02238 02239 huart->ErrorCode |= HAL_UART_ERROR_NE; 02240 } 02241 02242 /* UART Over-Run interrupt occurred -----------------------------------------*/ 02243 #if defined(USART_CR1_FIFOEN) 02244 if (((isrflags & USART_ISR_ORE) != RESET) 02245 && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != RESET) || 02246 ((cr3its & (USART_CR3_RXFTIE | USART_CR3_EIE)) != RESET))) 02247 #else 02248 if (((isrflags & USART_ISR_ORE) != RESET) 02249 && (((cr1its & USART_CR1_RXNEIE) != RESET) || 02250 ((cr3its & USART_CR3_EIE) != RESET))) 02251 #endif 02252 { 02253 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF); 02254 02255 huart->ErrorCode |= HAL_UART_ERROR_ORE; 02256 } 02257 02258 /* Call UART Error Call back function if need be --------------------------*/ 02259 if (huart->ErrorCode != HAL_UART_ERROR_NONE) 02260 { 02261 /* UART in mode Receiver ---------------------------------------------------*/ 02262 #if defined(USART_CR1_FIFOEN) 02263 if (((isrflags & USART_ISR_RXNE_RXFNE) != RESET) 02264 && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != RESET) 02265 || ((cr3its & USART_CR3_RXFTIE) != RESET))) 02266 #else 02267 if (((isrflags & USART_ISR_RXNE) != RESET) 02268 && ((cr1its & USART_CR1_RXNEIE) != RESET)) 02269 #endif 02270 { 02271 if (huart->RxISR != NULL) 02272 { 02273 huart->RxISR(huart); 02274 } 02275 } 02276 02277 /* If Overrun error occurs, or if any error occurs in DMA mode reception, 02278 consider error as blocking */ 02279 if (((huart->ErrorCode & HAL_UART_ERROR_ORE) != RESET) || 02280 (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))) 02281 { 02282 /* Blocking error : transfer is aborted 02283 Set the UART state ready to be able to start again the process, 02284 Disable Rx Interrupts, and disable Rx DMA request, if ongoing */ 02285 UART_EndRxTransfer(huart); 02286 02287 /* Disable the UART DMA Rx request if enabled */ 02288 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 02289 { 02290 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 02291 02292 /* Abort the UART DMA Rx channel */ 02293 if (huart->hdmarx != NULL) 02294 { 02295 /* Set the UART DMA Abort callback : 02296 will lead to call HAL_UART_ErrorCallback() at end of DMA abort procedure */ 02297 huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError; 02298 02299 /* Abort DMA RX */ 02300 if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) 02301 { 02302 /* Call Directly huart->hdmarx->XferAbortCallback function in case of error */ 02303 huart->hdmarx->XferAbortCallback(huart->hdmarx); 02304 } 02305 } 02306 else 02307 { 02308 /* Call user error callback */ 02309 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 02310 /*Call registered error callback*/ 02311 huart->ErrorCallback(huart); 02312 #else 02313 /*Call legacy weak error callback*/ 02314 HAL_UART_ErrorCallback(huart); 02315 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 02316 02317 } 02318 } 02319 else 02320 { 02321 /* Call user error callback */ 02322 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 02323 /*Call registered error callback*/ 02324 huart->ErrorCallback(huart); 02325 #else 02326 /*Call legacy weak error callback*/ 02327 HAL_UART_ErrorCallback(huart); 02328 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 02329 } 02330 } 02331 else 02332 { 02333 /* Non Blocking error : transfer could go on. 02334 Error is notified to user through user error callback */ 02335 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 02336 /*Call registered error callback*/ 02337 huart->ErrorCallback(huart); 02338 #else 02339 /*Call legacy weak error callback*/ 02340 HAL_UART_ErrorCallback(huart); 02341 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 02342 huart->ErrorCode = HAL_UART_ERROR_NONE; 02343 } 02344 } 02345 return; 02346 02347 } /* End if some error occurs */ 02348 02349 /* UART wakeup from Stop mode interrupt occurred ---------------------------*/ 02350 if (((isrflags & USART_ISR_WUF) != RESET) && ((cr3its & USART_CR3_WUFIE) != RESET)) 02351 { 02352 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_WUF); 02353 02354 /* UART Rx state is not reset as a reception process might be ongoing. 02355 If UART handle state fields need to be reset to READY, this could be done in Wakeup callback */ 02356 02357 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 02358 /* Call registered Wakeup Callback */ 02359 huart->WakeupCallback(huart); 02360 #else 02361 /* Call legacy weak Wakeup Callback */ 02362 HAL_UARTEx_WakeupCallback(huart); 02363 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 02364 return; 02365 } 02366 02367 /* UART in mode Transmitter ------------------------------------------------*/ 02368 #if defined(USART_CR1_FIFOEN) 02369 if (((isrflags & USART_ISR_TXE_TXFNF) != RESET) 02370 && (((cr1its & USART_CR1_TXEIE_TXFNFIE) != RESET) 02371 || ((cr3its & USART_CR3_TXFTIE) != RESET))) 02372 #else 02373 if (((isrflags & USART_ISR_TXE) != RESET) 02374 && ((cr1its & USART_CR1_TXEIE) != RESET)) 02375 #endif 02376 { 02377 if (huart->TxISR != NULL) 02378 { 02379 huart->TxISR(huart); 02380 } 02381 return; 02382 } 02383 02384 /* UART in mode Transmitter (transmission end) -----------------------------*/ 02385 if (((isrflags & USART_ISR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET)) 02386 { 02387 UART_EndTransmit_IT(huart); 02388 return; 02389 } 02390 02391 #if defined(USART_CR1_FIFOEN) 02392 /* UART TX Fifo Empty occurred ----------------------------------------------*/ 02393 if (((isrflags & USART_ISR_TXFE) != RESET) && ((cr1its & USART_CR1_TXFEIE) != RESET)) 02394 { 02395 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 02396 /* Call registered Tx Fifo Empty Callback */ 02397 huart->TxFifoEmptyCallback(huart); 02398 #else 02399 /* Call legacy weak Tx Fifo Empty Callback */ 02400 HAL_UARTEx_TxFifoEmptyCallback(huart); 02401 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 02402 return; 02403 } 02404 02405 /* UART RX Fifo Full occurred ----------------------------------------------*/ 02406 if (((isrflags & USART_ISR_RXFF) != RESET) && ((cr1its & USART_CR1_RXFFIE) != RESET)) 02407 { 02408 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 02409 /* Call registered Rx Fifo Full Callback */ 02410 huart->RxFifoFullCallback(huart); 02411 #else 02412 /* Call legacy weak Rx Fifo Full Callback */ 02413 HAL_UARTEx_RxFifoFullCallback(huart); 02414 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 02415 return; 02416 } 02417 #endif 02418 } 02419 02420 /** 02421 * @brief Tx Transfer completed callback. 02422 * @param huart UART handle. 02423 * @retval None 02424 */ 02425 __weak void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) 02426 { 02427 /* Prevent unused argument(s) compilation warning */ 02428 UNUSED(huart); 02429 02430 /* NOTE : This function should not be modified, when the callback is needed, 02431 the HAL_UART_TxCpltCallback can be implemented in the user file. 02432 */ 02433 } 02434 02435 /** 02436 * @brief Tx Half Transfer completed callback. 02437 * @param huart UART handle. 02438 * @retval None 02439 */ 02440 __weak void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart) 02441 { 02442 /* Prevent unused argument(s) compilation warning */ 02443 UNUSED(huart); 02444 02445 /* NOTE: This function should not be modified, when the callback is needed, 02446 the HAL_UART_TxHalfCpltCallback can be implemented in the user file. 02447 */ 02448 } 02449 02450 /** 02451 * @brief Rx Transfer completed callback. 02452 * @param huart UART handle. 02453 * @retval None 02454 */ 02455 __weak void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart) 02456 { 02457 /* Prevent unused argument(s) compilation warning */ 02458 UNUSED(huart); 02459 02460 /* NOTE : This function should not be modified, when the callback is needed, 02461 the HAL_UART_RxCpltCallback can be implemented in the user file. 02462 */ 02463 } 02464 02465 /** 02466 * @brief Rx Half Transfer completed callback. 02467 * @param huart UART handle. 02468 * @retval None 02469 */ 02470 __weak void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart) 02471 { 02472 /* Prevent unused argument(s) compilation warning */ 02473 UNUSED(huart); 02474 02475 /* NOTE: This function should not be modified, when the callback is needed, 02476 the HAL_UART_RxHalfCpltCallback can be implemented in the user file. 02477 */ 02478 } 02479 02480 /** 02481 * @brief UART error callback. 02482 * @param huart UART handle. 02483 * @retval None 02484 */ 02485 __weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart) 02486 { 02487 /* Prevent unused argument(s) compilation warning */ 02488 UNUSED(huart); 02489 02490 /* NOTE : This function should not be modified, when the callback is needed, 02491 the HAL_UART_ErrorCallback can be implemented in the user file. 02492 */ 02493 } 02494 02495 /** 02496 * @brief UART Abort Complete callback. 02497 * @param huart UART handle. 02498 * @retval None 02499 */ 02500 __weak void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart) 02501 { 02502 /* Prevent unused argument(s) compilation warning */ 02503 UNUSED(huart); 02504 02505 /* NOTE : This function should not be modified, when the callback is needed, 02506 the HAL_UART_AbortCpltCallback can be implemented in the user file. 02507 */ 02508 } 02509 02510 /** 02511 * @brief UART Abort Complete callback. 02512 * @param huart UART handle. 02513 * @retval None 02514 */ 02515 __weak void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart) 02516 { 02517 /* Prevent unused argument(s) compilation warning */ 02518 UNUSED(huart); 02519 02520 /* NOTE : This function should not be modified, when the callback is needed, 02521 the HAL_UART_AbortTransmitCpltCallback can be implemented in the user file. 02522 */ 02523 } 02524 02525 /** 02526 * @brief UART Abort Receive Complete callback. 02527 * @param huart UART handle. 02528 * @retval None 02529 */ 02530 __weak void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart) 02531 { 02532 /* Prevent unused argument(s) compilation warning */ 02533 UNUSED(huart); 02534 02535 /* NOTE : This function should not be modified, when the callback is needed, 02536 the HAL_UART_AbortReceiveCpltCallback can be implemented in the user file. 02537 */ 02538 } 02539 02540 /** 02541 * @} 02542 */ 02543 02544 /** @defgroup UART_Exported_Functions_Group3 Peripheral Control functions 02545 * @brief UART control functions 02546 * 02547 @verbatim 02548 =============================================================================== 02549 ##### Peripheral Control functions ##### 02550 =============================================================================== 02551 [..] 02552 This subsection provides a set of functions allowing to control the UART. 02553 (+) HAL_MultiProcessor_EnableMuteMode() API enables mute mode 02554 (+) HAL_MultiProcessor_DisableMuteMode() API disables mute mode 02555 (+) HAL_MultiProcessor_EnterMuteMode() API enters mute mode 02556 (+) HAL_MultiProcessor_EnableMuteMode() API enables mute mode 02557 (+) UART_SetConfig() API configures the UART peripheral 02558 (+) UART_AdvFeatureConfig() API optionally configures the UART advanced features 02559 (+) UART_CheckIdleState() API ensures that TEACK and/or REACK are set after initialization 02560 (+) UART_Wakeup_AddressConfig() API configures the wake-up from stop mode parameters 02561 (+) HAL_HalfDuplex_EnableTransmitter() API disables receiver and enables transmitter 02562 (+) HAL_HalfDuplex_EnableReceiver() API disables transmitter and enables receiver 02563 (+) HAL_LIN_SendBreak() API transmits the break characters 02564 @endverbatim 02565 * @{ 02566 */ 02567 02568 /** 02569 * @brief Enable UART in mute mode (does not mean UART enters mute mode; 02570 * to enter mute mode, HAL_MultiProcessor_EnterMuteMode() API must be called). 02571 * @param huart UART handle. 02572 * @retval HAL status 02573 */ 02574 HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart) 02575 { 02576 /* Process Locked */ 02577 __HAL_LOCK(huart); 02578 02579 huart->gState = HAL_UART_STATE_BUSY; 02580 02581 /* Enable USART mute mode by setting the MME bit in the CR1 register */ 02582 SET_BIT(huart->Instance->CR1, USART_CR1_MME); 02583 02584 huart->gState = HAL_UART_STATE_READY; 02585 02586 return (UART_CheckIdleState(huart)); 02587 } 02588 02589 /** 02590 * @brief Disable UART mute mode (does not mean the UART actually exits mute mode 02591 * as it may not have been in mute mode at this very moment). 02592 * @param huart UART handle. 02593 * @retval HAL status 02594 */ 02595 HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart) 02596 { 02597 /* Process Locked */ 02598 __HAL_LOCK(huart); 02599 02600 huart->gState = HAL_UART_STATE_BUSY; 02601 02602 /* Disable USART mute mode by clearing the MME bit in the CR1 register */ 02603 CLEAR_BIT(huart->Instance->CR1, USART_CR1_MME); 02604 02605 huart->gState = HAL_UART_STATE_READY; 02606 02607 return (UART_CheckIdleState(huart)); 02608 } 02609 02610 /** 02611 * @brief Enter UART mute mode (means UART actually enters mute mode). 02612 * @note To exit from mute mode, HAL_MultiProcessor_DisableMuteMode() API must be called. 02613 * @param huart UART handle. 02614 * @retval None 02615 */ 02616 void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart) 02617 { 02618 __HAL_UART_SEND_REQ(huart, UART_MUTE_MODE_REQUEST); 02619 } 02620 02621 /** 02622 * @brief Enable the UART transmitter and disable the UART receiver. 02623 * @param huart UART handle. 02624 * @retval HAL status 02625 */ 02626 HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart) 02627 { 02628 /* Process Locked */ 02629 __HAL_LOCK(huart); 02630 huart->gState = HAL_UART_STATE_BUSY; 02631 02632 /* Clear TE and RE bits */ 02633 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TE | USART_CR1_RE)); 02634 02635 /* Enable the USART's transmit interface by setting the TE bit in the USART CR1 register */ 02636 SET_BIT(huart->Instance->CR1, USART_CR1_TE); 02637 02638 huart->gState = HAL_UART_STATE_READY; 02639 02640 /* Process Unlocked */ 02641 __HAL_UNLOCK(huart); 02642 02643 return HAL_OK; 02644 } 02645 02646 /** 02647 * @brief Enable the UART receiver and disable the UART transmitter. 02648 * @param huart UART handle. 02649 * @retval HAL status. 02650 */ 02651 HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart) 02652 { 02653 /* Process Locked */ 02654 __HAL_LOCK(huart); 02655 huart->gState = HAL_UART_STATE_BUSY; 02656 02657 /* Clear TE and RE bits */ 02658 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TE | USART_CR1_RE)); 02659 02660 /* Enable the USART's receive interface by setting the RE bit in the USART CR1 register */ 02661 SET_BIT(huart->Instance->CR1, USART_CR1_RE); 02662 02663 huart->gState = HAL_UART_STATE_READY; 02664 02665 /* Process Unlocked */ 02666 __HAL_UNLOCK(huart); 02667 02668 return HAL_OK; 02669 } 02670 02671 02672 /** 02673 * @brief Transmit break characters. 02674 * @param huart UART handle. 02675 * @retval HAL status 02676 */ 02677 HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart) 02678 { 02679 /* Check the parameters */ 02680 assert_param(IS_UART_LIN_INSTANCE(huart->Instance)); 02681 02682 /* Process Locked */ 02683 __HAL_LOCK(huart); 02684 02685 huart->gState = HAL_UART_STATE_BUSY; 02686 02687 /* Send break characters */ 02688 SET_BIT(huart->Instance->RQR, UART_SENDBREAK_REQUEST); 02689 02690 huart->gState = HAL_UART_STATE_READY; 02691 02692 /* Process Unlocked */ 02693 __HAL_UNLOCK(huart); 02694 02695 return HAL_OK; 02696 } 02697 02698 /** 02699 * @} 02700 */ 02701 02702 /** @defgroup UART_Exported_Functions_Group4 Peripheral State and Error functions 02703 * @brief UART Peripheral State functions 02704 * 02705 @verbatim 02706 ============================================================================== 02707 ##### Peripheral State and Error functions ##### 02708 ============================================================================== 02709 [..] 02710 This subsection provides functions allowing to : 02711 (+) Return the UART handle state. 02712 (+) Return the UART handle error code 02713 02714 @endverbatim 02715 * @{ 02716 */ 02717 02718 /** 02719 * @brief Return the UART handle state. 02720 * @param huart Pointer to a UART_HandleTypeDef structure that contains 02721 * the configuration information for the specified UART. 02722 * @retval HAL state 02723 */ 02724 HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart) 02725 { 02726 uint32_t temp1 = 0x00U, temp2 = 0x00U; 02727 temp1 = huart->gState; 02728 temp2 = huart->RxState; 02729 02730 return (HAL_UART_StateTypeDef)(temp1 | temp2); 02731 } 02732 02733 /** 02734 * @brief Return the UART handle error code. 02735 * @param huart Pointer to a UART_HandleTypeDef structure that contains 02736 * the configuration information for the specified UART. 02737 * @retval UART Error Code 02738 */ 02739 uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart) 02740 { 02741 return huart->ErrorCode; 02742 } 02743 /** 02744 * @} 02745 */ 02746 02747 /** 02748 * @} 02749 */ 02750 02751 /** @defgroup UART_Private_Functions UART Private Functions 02752 * @{ 02753 */ 02754 02755 /** 02756 * @brief Initialize the callbacks to their default values. 02757 * @param huart UART handle. 02758 * @retval none 02759 */ 02760 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 02761 void UART_InitCallbacksToDefault(UART_HandleTypeDef *huart) 02762 { 02763 /* Init the UART Callback settings */ 02764 huart->TxHalfCpltCallback = HAL_UART_TxHalfCpltCallback; /* Legacy weak TxHalfCpltCallback */ 02765 huart->TxCpltCallback = HAL_UART_TxCpltCallback; /* Legacy weak TxCpltCallback */ 02766 huart->RxHalfCpltCallback = HAL_UART_RxHalfCpltCallback; /* Legacy weak RxHalfCpltCallback */ 02767 huart->RxCpltCallback = HAL_UART_RxCpltCallback; /* Legacy weak RxCpltCallback */ 02768 huart->ErrorCallback = HAL_UART_ErrorCallback; /* Legacy weak ErrorCallback */ 02769 huart->AbortCpltCallback = HAL_UART_AbortCpltCallback; /* Legacy weak AbortCpltCallback */ 02770 huart->AbortTransmitCpltCallback = HAL_UART_AbortTransmitCpltCallback; /* Legacy weak AbortTransmitCpltCallback */ 02771 huart->AbortReceiveCpltCallback = HAL_UART_AbortReceiveCpltCallback; /* Legacy weak AbortReceiveCpltCallback */ 02772 huart->WakeupCallback = HAL_UARTEx_WakeupCallback; /* Legacy weak WakeupCallback */ 02773 #if defined(USART_CR1_FIFOEN) 02774 huart->RxFifoFullCallback = HAL_UARTEx_RxFifoFullCallback; /* Legacy weak RxFifoFullCallback */ 02775 huart->TxFifoEmptyCallback = HAL_UARTEx_TxFifoEmptyCallback; /* Legacy weak TxFifoEmptyCallback */ 02776 #endif 02777 02778 } 02779 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 02780 02781 /** 02782 * @brief Configure the UART peripheral. 02783 * @param huart UART handle. 02784 * @retval HAL status 02785 */ 02786 HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart) 02787 { 02788 uint32_t tmpreg = 0x00000000U; 02789 UART_ClockSourceTypeDef clocksource = UART_CLOCKSOURCE_UNDEFINED; 02790 uint16_t brrtemp = 0x0000U; 02791 uint32_t usartdiv = 0x00000000U; 02792 HAL_StatusTypeDef ret = HAL_OK; 02793 uint32_t lpuart_ker_ck_pres = 0x00000000U; 02794 02795 /* Check the parameters */ 02796 assert_param(IS_UART_BAUDRATE(huart->Init.BaudRate)); 02797 assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength)); 02798 if (UART_INSTANCE_LOWPOWER(huart)) 02799 { 02800 assert_param(IS_LPUART_STOPBITS(huart->Init.StopBits)); 02801 } 02802 else 02803 { 02804 assert_param(IS_UART_STOPBITS(huart->Init.StopBits)); 02805 assert_param(IS_UART_ONE_BIT_SAMPLE(huart->Init.OneBitSampling)); 02806 } 02807 02808 assert_param(IS_UART_PARITY(huart->Init.Parity)); 02809 assert_param(IS_UART_MODE(huart->Init.Mode)); 02810 assert_param(IS_UART_HARDWARE_FLOW_CONTROL(huart->Init.HwFlowCtl)); 02811 assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling)); 02812 #if defined(USART_PRESC_PRESCALER) 02813 assert_param(IS_UART_PRESCALER(huart->Init.ClockPrescaler)); 02814 #endif 02815 02816 /*-------------------------- USART CR1 Configuration -----------------------*/ 02817 /* Clear M, PCE, PS, TE, RE and OVER8 bits and configure 02818 * the UART Word Length, Parity, Mode and oversampling: 02819 * set the M bits according to huart->Init.WordLength value 02820 * set PCE and PS bits according to huart->Init.Parity value 02821 * set TE and RE bits according to huart->Init.Mode value 02822 * set OVER8 bit according to huart->Init.OverSampling value */ 02823 tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling ; 02824 #if defined(USART_CR1_FIFOEN) 02825 tmpreg |= (uint32_t)huart->FifoMode; 02826 #endif 02827 MODIFY_REG(huart->Instance->CR1, USART_CR1_FIELDS, tmpreg); 02828 02829 /*-------------------------- USART CR2 Configuration -----------------------*/ 02830 /* Configure the UART Stop Bits: Set STOP[13:12] bits according 02831 * to huart->Init.StopBits value */ 02832 MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); 02833 02834 /*-------------------------- USART CR3 Configuration -----------------------*/ 02835 /* Configure 02836 * - UART HardWare Flow Control: set CTSE and RTSE bits according 02837 * to huart->Init.HwFlowCtl value 02838 * - one-bit sampling method versus three samples' majority rule according 02839 * to huart->Init.OneBitSampling (not applicable to LPUART) */ 02840 tmpreg = (uint32_t)huart->Init.HwFlowCtl; 02841 02842 if (!(UART_INSTANCE_LOWPOWER(huart))) 02843 { 02844 tmpreg |= huart->Init.OneBitSampling; 02845 } 02846 MODIFY_REG(huart->Instance->CR3, USART_CR3_FIELDS, tmpreg); 02847 02848 #if defined(USART_PRESC_PRESCALER) 02849 /*-------------------------- USART PRESC Configuration -----------------------*/ 02850 /* Configure 02851 * - UART Clock Prescaler : set PRESCALER according to huart->Init.ClockPrescaler value */ 02852 MODIFY_REG(huart->Instance->PRESC, USART_PRESC_PRESCALER, huart->Init.ClockPrescaler); 02853 #endif 02854 02855 /*-------------------------- USART BRR Configuration -----------------------*/ 02856 UART_GETCLOCKSOURCE(huart, clocksource); 02857 02858 /* Check LPUART instance */ 02859 if (UART_INSTANCE_LOWPOWER(huart)) 02860 { 02861 /* Retrieve frequency clock */ 02862 switch (clocksource) 02863 { 02864 case UART_CLOCKSOURCE_PCLK1: 02865 #if defined(USART_PRESC_PRESCALER) 02866 lpuart_ker_ck_pres = (HAL_RCC_GetPCLK1Freq() / UART_GET_DIV_FACTOR(huart->Init.ClockPrescaler)); 02867 #else 02868 lpuart_ker_ck_pres = HAL_RCC_GetPCLK1Freq(); 02869 #endif 02870 break; 02871 case UART_CLOCKSOURCE_HSI: 02872 #if defined(USART_PRESC_PRESCALER) 02873 lpuart_ker_ck_pres = ((uint32_t)HSI_VALUE / UART_GET_DIV_FACTOR(huart->Init.ClockPrescaler)); 02874 #else 02875 lpuart_ker_ck_pres = (uint32_t)HSI_VALUE; 02876 #endif 02877 break; 02878 case UART_CLOCKSOURCE_SYSCLK: 02879 #if defined(USART_PRESC_PRESCALER) 02880 lpuart_ker_ck_pres = (HAL_RCC_GetSysClockFreq() / UART_GET_DIV_FACTOR(huart->Init.ClockPrescaler)); 02881 #else 02882 lpuart_ker_ck_pres = HAL_RCC_GetSysClockFreq(); 02883 #endif 02884 break; 02885 case UART_CLOCKSOURCE_LSE: 02886 #if defined(USART_PRESC_PRESCALER) 02887 lpuart_ker_ck_pres = ((uint32_t)LSE_VALUE / UART_GET_DIV_FACTOR(huart->Init.ClockPrescaler)); 02888 #else 02889 lpuart_ker_ck_pres = (uint32_t)LSE_VALUE; 02890 #endif 02891 break; 02892 case UART_CLOCKSOURCE_UNDEFINED: 02893 default: 02894 ret = HAL_ERROR; 02895 break; 02896 } 02897 02898 /* if proper clock source reported */ 02899 if (lpuart_ker_ck_pres != 0U) 02900 { 02901 /* ensure that Frequency clock is in the range [3 * baudrate, 4096 * baudrate] */ 02902 if ((lpuart_ker_ck_pres < (3 * huart->Init.BaudRate)) || 02903 (lpuart_ker_ck_pres > (4096 * huart->Init.BaudRate))) 02904 { 02905 ret = HAL_ERROR; 02906 } 02907 else 02908 { 02909 switch (clocksource) 02910 { 02911 case UART_CLOCKSOURCE_PCLK1: 02912 #if defined(USART_PRESC_PRESCALER) 02913 usartdiv = (uint32_t)(UART_DIV_LPUART(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate, huart->Init.ClockPrescaler)); 02914 #else 02915 usartdiv = (uint32_t)(UART_DIV_LPUART(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate)); 02916 #endif 02917 break; 02918 case UART_CLOCKSOURCE_HSI: 02919 #if defined(USART_PRESC_PRESCALER) 02920 usartdiv = (uint32_t)(UART_DIV_LPUART(HSI_VALUE, huart->Init.BaudRate, huart->Init.ClockPrescaler)); 02921 #else 02922 usartdiv = (uint32_t)(UART_DIV_LPUART(HSI_VALUE, huart->Init.BaudRate)); 02923 #endif 02924 break; 02925 case UART_CLOCKSOURCE_SYSCLK: 02926 #if defined(USART_PRESC_PRESCALER) 02927 usartdiv = (uint32_t)(UART_DIV_LPUART(HAL_RCC_GetSysClockFreq(), huart->Init.BaudRate, huart->Init.ClockPrescaler)); 02928 #else 02929 usartdiv = (uint32_t)(UART_DIV_LPUART(HAL_RCC_GetSysClockFreq(), huart->Init.BaudRate)); 02930 #endif 02931 break; 02932 case UART_CLOCKSOURCE_LSE: 02933 #if defined(USART_PRESC_PRESCALER) 02934 usartdiv = (uint32_t)(UART_DIV_LPUART(LSE_VALUE, huart->Init.BaudRate, huart->Init.ClockPrescaler)); 02935 #else 02936 usartdiv = (uint32_t)(UART_DIV_LPUART(LSE_VALUE, huart->Init.BaudRate)); 02937 #endif 02938 break; 02939 case UART_CLOCKSOURCE_UNDEFINED: 02940 default: 02941 ret = HAL_ERROR; 02942 break; 02943 } 02944 02945 /* It is forbidden to write values lower than 0x300 in the LPUART_BRR register */ 02946 if ((usartdiv >= LPUART_BRR_MIN) && (usartdiv <= LPUART_BRR_MAX)) 02947 { 02948 huart->Instance->BRR = usartdiv; 02949 } 02950 else 02951 { 02952 ret = HAL_ERROR; 02953 } 02954 } /* if ( (tmpreg < (3 * huart->Init.BaudRate) ) || (tmpreg > (4096 * huart->Init.BaudRate) )) */ 02955 } /* if (tmpreg != 0) */ 02956 } 02957 /* Check UART Over Sampling to set Baud Rate Register */ 02958 else if (huart->Init.OverSampling == UART_OVERSAMPLING_8) 02959 { 02960 switch (clocksource) 02961 { 02962 case UART_CLOCKSOURCE_PCLK1: 02963 #if defined(USART_PRESC_PRESCALER) 02964 usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate, huart->Init.ClockPrescaler)); 02965 #else 02966 usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate)); 02967 #endif 02968 break; 02969 case UART_CLOCKSOURCE_PCLK2: 02970 #if defined(USART_PRESC_PRESCALER) 02971 usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate, huart->Init.ClockPrescaler)); 02972 #else 02973 usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate)); 02974 #endif 02975 break; 02976 case UART_CLOCKSOURCE_HSI: 02977 #if defined(USART_PRESC_PRESCALER) 02978 usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HSI_VALUE, huart->Init.BaudRate, huart->Init.ClockPrescaler)); 02979 #else 02980 usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HSI_VALUE, huart->Init.BaudRate)); 02981 #endif 02982 break; 02983 case UART_CLOCKSOURCE_SYSCLK: 02984 #if defined(USART_PRESC_PRESCALER) 02985 usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HAL_RCC_GetSysClockFreq(), huart->Init.BaudRate, huart->Init.ClockPrescaler)); 02986 #else 02987 usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HAL_RCC_GetSysClockFreq(), huart->Init.BaudRate)); 02988 #endif 02989 break; 02990 case UART_CLOCKSOURCE_LSE: 02991 #if defined(USART_PRESC_PRESCALER) 02992 usartdiv = (uint16_t)(UART_DIV_SAMPLING8(LSE_VALUE, huart->Init.BaudRate, huart->Init.ClockPrescaler)); 02993 #else 02994 usartdiv = (uint16_t)(UART_DIV_SAMPLING8(LSE_VALUE, huart->Init.BaudRate)); 02995 #endif 02996 break; 02997 case UART_CLOCKSOURCE_UNDEFINED: 02998 default: 02999 ret = HAL_ERROR; 03000 break; 03001 } 03002 03003 /* USARTDIV must be greater than or equal to 0d16 */ 03004 if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX)) 03005 { 03006 brrtemp = usartdiv & 0xFFF0U; 03007 brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U); 03008 huart->Instance->BRR = brrtemp; 03009 } 03010 else 03011 { 03012 ret = HAL_ERROR; 03013 } 03014 } 03015 else 03016 { 03017 switch (clocksource) 03018 { 03019 case UART_CLOCKSOURCE_PCLK1: 03020 #if defined(USART_PRESC_PRESCALER) 03021 usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate, huart->Init.ClockPrescaler)); 03022 #else 03023 usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate)); 03024 #endif 03025 break; 03026 case UART_CLOCKSOURCE_PCLK2: 03027 #if defined(USART_PRESC_PRESCALER) 03028 usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate, huart->Init.ClockPrescaler)); 03029 #else 03030 usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate)); 03031 #endif 03032 break; 03033 case UART_CLOCKSOURCE_HSI: 03034 #if defined(USART_PRESC_PRESCALER) 03035 usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HSI_VALUE, huart->Init.BaudRate, huart->Init.ClockPrescaler)); 03036 #else 03037 usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HSI_VALUE, huart->Init.BaudRate)); 03038 #endif 03039 break; 03040 case UART_CLOCKSOURCE_SYSCLK: 03041 #if defined(USART_PRESC_PRESCALER) 03042 usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HAL_RCC_GetSysClockFreq(), huart->Init.BaudRate, huart->Init.ClockPrescaler)); 03043 #else 03044 usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HAL_RCC_GetSysClockFreq(), huart->Init.BaudRate)); 03045 #endif 03046 break; 03047 case UART_CLOCKSOURCE_LSE: 03048 #if defined(USART_PRESC_PRESCALER) 03049 usartdiv = (uint16_t)(UART_DIV_SAMPLING16(LSE_VALUE, huart->Init.BaudRate, huart->Init.ClockPrescaler)); 03050 #else 03051 usartdiv = (uint16_t)(UART_DIV_SAMPLING16(LSE_VALUE, huart->Init.BaudRate)); 03052 #endif 03053 break; 03054 case UART_CLOCKSOURCE_UNDEFINED: 03055 default: 03056 ret = HAL_ERROR; 03057 break; 03058 } 03059 03060 /* USARTDIV must be greater than or equal to 0d16 */ 03061 if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX)) 03062 { 03063 huart->Instance->BRR = usartdiv; 03064 } 03065 else 03066 { 03067 ret = HAL_ERROR; 03068 } 03069 } 03070 03071 #if defined(USART_CR1_FIFOEN) 03072 /* Initialize the number of data to process during RX/TX ISR execution */ 03073 huart->NbTxDataToProcess = 1; 03074 huart->NbRxDataToProcess = 1; 03075 #endif 03076 03077 /* Clear ISR function pointers */ 03078 huart->RxISR = NULL; 03079 huart->TxISR = NULL; 03080 03081 return ret; 03082 } 03083 03084 /** 03085 * @brief Configure the UART peripheral advanced features. 03086 * @param huart UART handle. 03087 * @retval None 03088 */ 03089 void UART_AdvFeatureConfig(UART_HandleTypeDef *huart) 03090 { 03091 /* Check whether the set of advanced features to configure is properly set */ 03092 assert_param(IS_UART_ADVFEATURE_INIT(huart->AdvancedInit.AdvFeatureInit)); 03093 03094 /* if required, configure TX pin active level inversion */ 03095 if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_TXINVERT_INIT)) 03096 { 03097 assert_param(IS_UART_ADVFEATURE_TXINV(huart->AdvancedInit.TxPinLevelInvert)); 03098 MODIFY_REG(huart->Instance->CR2, USART_CR2_TXINV, huart->AdvancedInit.TxPinLevelInvert); 03099 } 03100 03101 /* if required, configure RX pin active level inversion */ 03102 if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXINVERT_INIT)) 03103 { 03104 assert_param(IS_UART_ADVFEATURE_RXINV(huart->AdvancedInit.RxPinLevelInvert)); 03105 MODIFY_REG(huart->Instance->CR2, USART_CR2_RXINV, huart->AdvancedInit.RxPinLevelInvert); 03106 } 03107 03108 /* if required, configure data inversion */ 03109 if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DATAINVERT_INIT)) 03110 { 03111 assert_param(IS_UART_ADVFEATURE_DATAINV(huart->AdvancedInit.DataInvert)); 03112 MODIFY_REG(huart->Instance->CR2, USART_CR2_DATAINV, huart->AdvancedInit.DataInvert); 03113 } 03114 03115 /* if required, configure RX/TX pins swap */ 03116 if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT)) 03117 { 03118 assert_param(IS_UART_ADVFEATURE_SWAP(huart->AdvancedInit.Swap)); 03119 MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap); 03120 } 03121 03122 /* if required, configure RX overrun detection disabling */ 03123 if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXOVERRUNDISABLE_INIT)) 03124 { 03125 assert_param(IS_UART_OVERRUN(huart->AdvancedInit.OverrunDisable)); 03126 MODIFY_REG(huart->Instance->CR3, USART_CR3_OVRDIS, huart->AdvancedInit.OverrunDisable); 03127 } 03128 03129 /* if required, configure DMA disabling on reception error */ 03130 if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DMADISABLEONERROR_INIT)) 03131 { 03132 assert_param(IS_UART_ADVFEATURE_DMAONRXERROR(huart->AdvancedInit.DMADisableonRxError)); 03133 MODIFY_REG(huart->Instance->CR3, USART_CR3_DDRE, huart->AdvancedInit.DMADisableonRxError); 03134 } 03135 03136 /* if required, configure auto Baud rate detection scheme */ 03137 if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_AUTOBAUDRATE_INIT)) 03138 { 03139 assert_param(IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(huart->Instance)); 03140 assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATE(huart->AdvancedInit.AutoBaudRateEnable)); 03141 MODIFY_REG(huart->Instance->CR2, USART_CR2_ABREN, huart->AdvancedInit.AutoBaudRateEnable); 03142 /* set auto Baudrate detection parameters if detection is enabled */ 03143 if (huart->AdvancedInit.AutoBaudRateEnable == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE) 03144 { 03145 assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(huart->AdvancedInit.AutoBaudRateMode)); 03146 MODIFY_REG(huart->Instance->CR2, USART_CR2_ABRMODE, huart->AdvancedInit.AutoBaudRateMode); 03147 } 03148 } 03149 03150 /* if required, configure MSB first on communication line */ 03151 if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_MSBFIRST_INIT)) 03152 { 03153 assert_param(IS_UART_ADVFEATURE_MSBFIRST(huart->AdvancedInit.MSBFirst)); 03154 MODIFY_REG(huart->Instance->CR2, USART_CR2_MSBFIRST, huart->AdvancedInit.MSBFirst); 03155 } 03156 } 03157 03158 /** 03159 * @brief Check the UART Idle State. 03160 * @param huart UART handle. 03161 * @retval HAL status 03162 */ 03163 HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart) 03164 { 03165 uint32_t tickstart = 0U; 03166 03167 /* Initialize the UART ErrorCode */ 03168 huart->ErrorCode = HAL_UART_ERROR_NONE; 03169 03170 /* Init tickstart for timeout managment*/ 03171 tickstart = HAL_GetTick(); 03172 03173 /* Check if the Transmitter is enabled */ 03174 if ((huart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE) 03175 { 03176 /* Wait until TEACK flag is set */ 03177 if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_TEACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK) 03178 { 03179 /* Timeout occurred */ 03180 return HAL_TIMEOUT; 03181 } 03182 } 03183 /* Check if the Receiver is enabled */ 03184 if ((huart->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE) 03185 { 03186 /* Wait until REACK flag is set */ 03187 if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_REACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK) 03188 { 03189 /* Timeout occurred */ 03190 return HAL_TIMEOUT; 03191 } 03192 } 03193 03194 /* Initialize the UART State */ 03195 huart->gState = HAL_UART_STATE_READY; 03196 huart->RxState = HAL_UART_STATE_READY; 03197 03198 /* Process Unlocked */ 03199 __HAL_UNLOCK(huart); 03200 03201 return HAL_OK; 03202 } 03203 03204 /** 03205 * @brief Handle UART Communication Timeout. 03206 * @param huart UART handle. 03207 * @param Flag Specifies the UART flag to check 03208 * @param Status Flag status (SET or RESET) 03209 * @param Tickstart Tick start value 03210 * @param Timeout Timeout duration 03211 * @retval HAL status 03212 */ 03213 HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout) 03214 { 03215 /* Wait until flag is set */ 03216 while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) 03217 { 03218 /* Check for the Timeout */ 03219 if (Timeout != HAL_MAX_DELAY) 03220 { 03221 if ((Timeout == 0U) || ((HAL_GetTick() - Tickstart) > Timeout)) 03222 { 03223 /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */ 03224 #if defined(USART_CR1_FIFOEN) 03225 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE | USART_CR1_TXEIE_TXFNFIE)); 03226 #else 03227 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE)); 03228 #endif 03229 CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 03230 03231 huart->gState = HAL_UART_STATE_READY; 03232 huart->RxState = HAL_UART_STATE_READY; 03233 03234 /* Process Unlocked */ 03235 __HAL_UNLOCK(huart); 03236 03237 return HAL_TIMEOUT; 03238 } 03239 } 03240 } 03241 return HAL_OK; 03242 } 03243 03244 03245 /** 03246 * @brief End ongoing Tx transfer on UART peripheral (following error detection or Transmit completion). 03247 * @param huart UART handle. 03248 * @retval None 03249 */ 03250 static void UART_EndTxTransfer(UART_HandleTypeDef *huart) 03251 { 03252 #if defined(USART_CR1_FIFOEN) 03253 /* Disable TXEIE, TCIE, TXFT interrupts */ 03254 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE_TXFNFIE | USART_CR1_TCIE)); 03255 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_TXFTIE)); 03256 #else 03257 /* Disable TXEIE and TCIE interrupts */ 03258 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE)); 03259 #endif 03260 03261 /* At end of Tx process, restore huart->gState to Ready */ 03262 huart->gState = HAL_UART_STATE_READY; 03263 } 03264 03265 03266 /** 03267 * @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception completion). 03268 * @param huart UART handle. 03269 * @retval None 03270 */ 03271 static void UART_EndRxTransfer(UART_HandleTypeDef *huart) 03272 { 03273 /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ 03274 #if defined(USART_CR1_FIFOEN) 03275 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE)); 03276 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE)); 03277 #else 03278 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); 03279 CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 03280 #endif 03281 03282 /* At end of Rx process, restore huart->RxState to Ready */ 03283 huart->RxState = HAL_UART_STATE_READY; 03284 03285 /* Reset RxIsr function pointer */ 03286 huart->RxISR = NULL; 03287 } 03288 03289 03290 /** 03291 * @brief DMA UART transmit process complete callback. 03292 * @param hdma DMA handle. 03293 * @retval None 03294 */ 03295 static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma) 03296 { 03297 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); 03298 03299 /* DMA Normal mode */ 03300 if (HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC)) 03301 { 03302 huart->TxXferCount = 0U; 03303 03304 /* Disable the DMA transfer for transmit request by resetting the DMAT bit 03305 in the UART CR3 register */ 03306 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); 03307 03308 /* Enable the UART Transmit Complete Interrupt */ 03309 SET_BIT(huart->Instance->CR1, USART_CR1_TCIE); 03310 } 03311 /* DMA Circular mode */ 03312 else 03313 { 03314 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 03315 /*Call registered Tx complete callback*/ 03316 huart->TxCpltCallback(huart); 03317 #else 03318 /*Call legacy weak Tx complete callback*/ 03319 HAL_UART_TxCpltCallback(huart); 03320 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 03321 } 03322 } 03323 03324 /** 03325 * @brief DMA UART transmit process half complete callback. 03326 * @param hdma DMA handle. 03327 * @retval None 03328 */ 03329 static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma) 03330 { 03331 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); 03332 03333 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 03334 /*Call registered Tx Half complete callback*/ 03335 huart->TxHalfCpltCallback(huart); 03336 #else 03337 /*Call legacy weak Tx Half complete callback*/ 03338 HAL_UART_TxHalfCpltCallback(huart); 03339 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 03340 } 03341 03342 /** 03343 * @brief DMA UART receive process complete callback. 03344 * @param hdma DMA handle. 03345 * @retval None 03346 */ 03347 static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma) 03348 { 03349 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); 03350 03351 /* DMA Normal mode */ 03352 if (HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC)) 03353 { 03354 huart->RxXferCount = 0U; 03355 03356 /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */ 03357 CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); 03358 CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 03359 03360 /* Disable the DMA transfer for the receiver request by resetting the DMAR bit 03361 in the UART CR3 register */ 03362 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 03363 03364 /* At end of Rx process, restore huart->RxState to Ready */ 03365 huart->RxState = HAL_UART_STATE_READY; 03366 } 03367 03368 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 03369 /*Call registered Rx complete callback*/ 03370 huart->RxCpltCallback(huart); 03371 #else 03372 /*Call legacy weak Rx complete callback*/ 03373 HAL_UART_RxCpltCallback(huart); 03374 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 03375 } 03376 03377 /** 03378 * @brief DMA UART receive process half complete callback. 03379 * @param hdma DMA handle. 03380 * @retval None 03381 */ 03382 static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma) 03383 { 03384 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); 03385 03386 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 03387 /*Call registered Rx Half complete callback*/ 03388 huart->RxHalfCpltCallback(huart); 03389 #else 03390 /*Call legacy weak Rx Half complete callback*/ 03391 HAL_UART_RxHalfCpltCallback(huart); 03392 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 03393 } 03394 03395 /** 03396 * @brief DMA UART communication error callback. 03397 * @param hdma DMA handle. 03398 * @retval None 03399 */ 03400 static void UART_DMAError(DMA_HandleTypeDef *hdma) 03401 { 03402 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); 03403 03404 /* Stop UART DMA Tx request if ongoing */ 03405 if ((huart->gState == HAL_UART_STATE_BUSY_TX) 03406 && (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))) 03407 { 03408 huart->TxXferCount = 0U; 03409 UART_EndTxTransfer(huart); 03410 } 03411 03412 /* Stop UART DMA Rx request if ongoing */ 03413 if ((huart->RxState == HAL_UART_STATE_BUSY_RX) 03414 && (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))) 03415 { 03416 huart->RxXferCount = 0U; 03417 UART_EndRxTransfer(huart); 03418 } 03419 03420 huart->ErrorCode |= HAL_UART_ERROR_DMA; 03421 03422 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 03423 /*Call registered error callback*/ 03424 huart->ErrorCallback(huart); 03425 #else 03426 /*Call legacy weak error callback*/ 03427 HAL_UART_ErrorCallback(huart); 03428 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 03429 } 03430 03431 /** 03432 * @brief DMA UART communication abort callback, when initiated by HAL services on Error 03433 * (To be called at end of DMA Abort procedure following error occurrence). 03434 * @param hdma DMA handle. 03435 * @retval None 03436 */ 03437 static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma) 03438 { 03439 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); 03440 huart->RxXferCount = 0U; 03441 huart->TxXferCount = 0U; 03442 03443 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 03444 /*Call registered error callback*/ 03445 huart->ErrorCallback(huart); 03446 #else 03447 /*Call legacy weak error callback*/ 03448 HAL_UART_ErrorCallback(huart); 03449 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 03450 } 03451 03452 /** 03453 * @brief DMA UART Tx communication abort callback, when initiated by user 03454 * (To be called at end of DMA Tx Abort procedure following user abort request). 03455 * @note When this callback is executed, User Abort complete call back is called only if no 03456 * Abort still ongoing for Rx DMA Handle. 03457 * @param hdma DMA handle. 03458 * @retval None 03459 */ 03460 static void UART_DMATxAbortCallback(DMA_HandleTypeDef *hdma) 03461 { 03462 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); 03463 03464 huart->hdmatx->XferAbortCallback = NULL; 03465 03466 /* Check if an Abort process is still ongoing */ 03467 if (huart->hdmarx != NULL) 03468 { 03469 if (huart->hdmarx->XferAbortCallback != NULL) 03470 { 03471 return; 03472 } 03473 } 03474 03475 /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */ 03476 huart->TxXferCount = 0U; 03477 huart->RxXferCount = 0U; 03478 03479 /* Reset errorCode */ 03480 huart->ErrorCode = HAL_UART_ERROR_NONE; 03481 03482 /* Clear the Error flags in the ICR register */ 03483 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF); 03484 03485 #if defined(USART_CR1_FIFOEN) 03486 /* Flush the whole TX FIFO (if needed) */ 03487 if (huart->FifoMode == UART_FIFOMODE_ENABLE) 03488 { 03489 __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST); 03490 } 03491 #endif 03492 03493 /* Restore huart->gState and huart->RxState to Ready */ 03494 huart->gState = HAL_UART_STATE_READY; 03495 huart->RxState = HAL_UART_STATE_READY; 03496 03497 /* Call user Abort complete callback */ 03498 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 03499 /* Call registered Abort complete callback */ 03500 huart->AbortCpltCallback(huart); 03501 #else 03502 /* Call legacy weak Abort complete callback */ 03503 HAL_UART_AbortCpltCallback(huart); 03504 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 03505 } 03506 03507 03508 /** 03509 * @brief DMA UART Rx communication abort callback, when initiated by user 03510 * (To be called at end of DMA Rx Abort procedure following user abort request). 03511 * @note When this callback is executed, User Abort complete call back is called only if no 03512 * Abort still ongoing for Tx DMA Handle. 03513 * @param hdma DMA handle. 03514 * @retval None 03515 */ 03516 static void UART_DMARxAbortCallback(DMA_HandleTypeDef *hdma) 03517 { 03518 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); 03519 03520 huart->hdmarx->XferAbortCallback = NULL; 03521 03522 /* Check if an Abort process is still ongoing */ 03523 if (huart->hdmatx != NULL) 03524 { 03525 if (huart->hdmatx->XferAbortCallback != NULL) 03526 { 03527 return; 03528 } 03529 } 03530 03531 /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */ 03532 huart->TxXferCount = 0U; 03533 huart->RxXferCount = 0U; 03534 03535 /* Reset errorCode */ 03536 huart->ErrorCode = HAL_UART_ERROR_NONE; 03537 03538 /* Clear the Error flags in the ICR register */ 03539 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF); 03540 03541 /* Discard the received data */ 03542 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); 03543 03544 /* Restore huart->gState and huart->RxState to Ready */ 03545 huart->gState = HAL_UART_STATE_READY; 03546 huart->RxState = HAL_UART_STATE_READY; 03547 03548 /* Call user Abort complete callback */ 03549 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 03550 /* Call registered Abort complete callback */ 03551 huart->AbortCpltCallback(huart); 03552 #else 03553 /* Call legacy weak Abort complete callback */ 03554 HAL_UART_AbortCpltCallback(huart); 03555 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 03556 } 03557 03558 03559 /** 03560 * @brief DMA UART Tx communication abort callback, when initiated by user by a call to 03561 * HAL_UART_AbortTransmit_IT API (Abort only Tx transfer) 03562 * (This callback is executed at end of DMA Tx Abort procedure following user abort request, 03563 * and leads to user Tx Abort Complete callback execution). 03564 * @param hdma DMA handle. 03565 * @retval None 03566 */ 03567 static void UART_DMATxOnlyAbortCallback(DMA_HandleTypeDef *hdma) 03568 { 03569 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); 03570 03571 huart->TxXferCount = 0U; 03572 03573 #if defined(USART_CR1_FIFOEN) 03574 /* Flush the whole TX FIFO (if needed) */ 03575 if (huart->FifoMode == UART_FIFOMODE_ENABLE) 03576 { 03577 __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST); 03578 } 03579 #endif 03580 03581 /* Restore huart->gState to Ready */ 03582 huart->gState = HAL_UART_STATE_READY; 03583 03584 /* Call user Abort complete callback */ 03585 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 03586 /* Call registered Abort Transmit Complete Callback */ 03587 huart->AbortTransmitCpltCallback(huart); 03588 #else 03589 /* Call legacy weak Abort Transmit Complete Callback */ 03590 HAL_UART_AbortTransmitCpltCallback(huart); 03591 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 03592 } 03593 03594 /** 03595 * @brief DMA UART Rx communication abort callback, when initiated by user by a call to 03596 * HAL_UART_AbortReceive_IT API (Abort only Rx transfer) 03597 * (This callback is executed at end of DMA Rx Abort procedure following user abort request, 03598 * and leads to user Rx Abort Complete callback execution). 03599 * @param hdma DMA handle. 03600 * @retval None 03601 */ 03602 static void UART_DMARxOnlyAbortCallback(DMA_HandleTypeDef *hdma) 03603 { 03604 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; 03605 03606 huart->RxXferCount = 0U; 03607 03608 /* Clear the Error flags in the ICR register */ 03609 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF); 03610 03611 /* Discard the received data */ 03612 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); 03613 03614 /* Restore huart->RxState to Ready */ 03615 huart->RxState = HAL_UART_STATE_READY; 03616 03617 /* Call user Abort complete callback */ 03618 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 03619 /* Call registered Abort Receive Complete Callback */ 03620 huart->AbortReceiveCpltCallback(huart); 03621 #else 03622 /* Call legacy weak Abort Receive Complete Callback */ 03623 HAL_UART_AbortReceiveCpltCallback(huart); 03624 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 03625 } 03626 03627 /** 03628 * @brief TX interrrupt handler for 7 or 8 bits data word length . 03629 * @note Function is called under interruption only, once 03630 * interruptions have been enabled by HAL_UART_Transmit_IT(). 03631 * @param huart UART handle. 03632 * @retval None 03633 */ 03634 static void UART_TxISR_8BIT(UART_HandleTypeDef *huart) 03635 { 03636 /* Check that a Tx process is ongoing */ 03637 if (huart->gState == HAL_UART_STATE_BUSY_TX) 03638 { 03639 if (huart->TxXferCount == 0) 03640 { 03641 /* Disable the UART Transmit Data Register Empty Interrupt */ 03642 #if defined(USART_CR1_FIFOEN) 03643 CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE); 03644 #else 03645 CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE); 03646 #endif 03647 03648 /* Enable the UART Transmit Complete Interrupt */ 03649 SET_BIT(huart->Instance->CR1, USART_CR1_TCIE); 03650 } 03651 else 03652 { 03653 huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0xFF); 03654 huart->TxXferCount--; 03655 } 03656 } 03657 } 03658 03659 /** 03660 * @brief TX interrrupt handler for 9 bits data word length. 03661 * @note Function is called under interruption only, once 03662 * interruptions have been enabled by HAL_UART_Transmit_IT(). 03663 * @param huart UART handle. 03664 * @retval None 03665 */ 03666 static void UART_TxISR_16BIT(UART_HandleTypeDef *huart) 03667 { 03668 uint16_t *tmp; 03669 03670 /* Check that a Tx process is ongoing */ 03671 if (huart->gState == HAL_UART_STATE_BUSY_TX) 03672 { 03673 if (huart->TxXferCount == 0) 03674 { 03675 /* Disable the UART Transmit Data Register Empty Interrupt */ 03676 #if defined(USART_CR1_FIFOEN) 03677 CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE); 03678 #else 03679 CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE); 03680 #endif 03681 03682 /* Enable the UART Transmit Complete Interrupt */ 03683 SET_BIT(huart->Instance->CR1, USART_CR1_TCIE); 03684 } 03685 else 03686 { 03687 tmp = (uint16_t *) huart->pTxBuffPtr; 03688 huart->Instance->TDR = (*tmp & (uint16_t)0x01FF); 03689 huart->pTxBuffPtr += 2; 03690 huart->TxXferCount--; 03691 } 03692 } 03693 } 03694 03695 #if defined(USART_CR1_FIFOEN) 03696 /** 03697 * @brief TX interrrupt handler for 7 or 8 bits data word length and FIFO mode is enabled. 03698 * @note Function is called under interruption only, once 03699 * interruptions have been enabled by HAL_UART_Transmit_IT(). 03700 * @param huart UART handle. 03701 * @retval None 03702 */ 03703 static void UART_TxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart) 03704 { 03705 uint8_t nb_tx_data; 03706 03707 /* Check that a Tx process is ongoing */ 03708 if (huart->gState == HAL_UART_STATE_BUSY_TX) 03709 { 03710 for (nb_tx_data = huart->NbTxDataToProcess ; nb_tx_data > 0 ; nb_tx_data--) 03711 { 03712 if (huart->TxXferCount == 0U) 03713 { 03714 /* Disable the TX FIFO threshold interrupt */ 03715 CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE); 03716 03717 /* Enable the UART Transmit Complete Interrupt */ 03718 SET_BIT(huart->Instance->CR1, USART_CR1_TCIE); 03719 03720 break; /* force exit loop */ 03721 } 03722 else if (READ_BIT(huart->Instance->ISR, USART_ISR_TXE_TXFNF) != RESET) 03723 { 03724 huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0xFF); 03725 huart->TxXferCount--; 03726 } 03727 } 03728 } 03729 } 03730 03731 /** 03732 * @brief TX interrrupt handler for 9 bits data word length and FIFO mode is enabled. 03733 * @note Function is called under interruption only, once 03734 * interruptions have been enabled by HAL_UART_Transmit_IT(). 03735 * @param huart UART handle. 03736 * @retval None 03737 */ 03738 static void UART_TxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart) 03739 { 03740 uint16_t *tmp; 03741 uint8_t nb_tx_data; 03742 03743 /* Check that a Tx process is ongoing */ 03744 if (huart->gState == HAL_UART_STATE_BUSY_TX) 03745 { 03746 for (nb_tx_data = huart->NbTxDataToProcess ; nb_tx_data > 0 ; nb_tx_data--) 03747 { 03748 if (huart->TxXferCount == 0U) 03749 { 03750 /* Disable the TX FIFO threshold interrupt */ 03751 CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE); 03752 03753 /* Enable the UART Transmit Complete Interrupt */ 03754 SET_BIT(huart->Instance->CR1, USART_CR1_TCIE); 03755 03756 break; /* force exit loop */ 03757 } 03758 else if (READ_BIT(huart->Instance->ISR, USART_ISR_TXE_TXFNF) != RESET) 03759 { 03760 tmp = (uint16_t *) huart->pTxBuffPtr; 03761 huart->Instance->TDR = (*tmp & (uint16_t)0x01FFU); 03762 huart->pTxBuffPtr += 2U; 03763 huart->TxXferCount--; 03764 } 03765 } 03766 } 03767 } 03768 #endif 03769 03770 /** 03771 * @brief Wrap up transmission in non-blocking mode. 03772 * @param huart pointer to a UART_HandleTypeDef structure that contains 03773 * the configuration information for the specified UART module. 03774 * @retval None 03775 */ 03776 static void UART_EndTransmit_IT(UART_HandleTypeDef *huart) 03777 { 03778 /* Disable the UART Transmit Complete Interrupt */ 03779 CLEAR_BIT(huart->Instance->CR1, USART_CR1_TCIE); 03780 03781 /* Tx process is ended, restore huart->gState to Ready */ 03782 huart->gState = HAL_UART_STATE_READY; 03783 03784 /* Cleat TxISR function pointer */ 03785 huart->TxISR = NULL; 03786 03787 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 03788 /*Call registered Tx complete callback*/ 03789 huart->TxCpltCallback(huart); 03790 #else 03791 /*Call legacy weak Tx complete callback*/ 03792 HAL_UART_TxCpltCallback(huart); 03793 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 03794 } 03795 03796 /** 03797 * @brief RX interrrupt handler for 7 or 8 bits data word length . 03798 * @param huart UART handle. 03799 * @retval None 03800 */ 03801 static void UART_RxISR_8BIT(UART_HandleTypeDef *huart) 03802 { 03803 uint16_t uhMask = huart->Mask; 03804 uint16_t uhdata; 03805 03806 /* Check that a Rx process is ongoing */ 03807 if (huart->RxState == HAL_UART_STATE_BUSY_RX) 03808 { 03809 uhdata = (uint16_t) READ_REG(huart->Instance->RDR); 03810 *huart->pRxBuffPtr++ = (uint8_t)(uhdata & (uint8_t)uhMask); 03811 03812 if (--huart->RxXferCount == 0) 03813 { 03814 /* Disable the UART Parity Error Interrupt and RXNE interrupts */ 03815 #if defined(USART_CR1_FIFOEN) 03816 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE)); 03817 #else 03818 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); 03819 #endif 03820 03821 /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */ 03822 CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 03823 03824 /* Rx process is completed, restore huart->RxState to Ready */ 03825 huart->RxState = HAL_UART_STATE_READY; 03826 03827 /* Clear RxISR function pointer */ 03828 huart->RxISR = NULL; 03829 03830 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 03831 /*Call registered Rx complete callback*/ 03832 huart->RxCpltCallback(huart); 03833 #else 03834 /*Call legacy weak Rx complete callback*/ 03835 HAL_UART_RxCpltCallback(huart); 03836 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 03837 } 03838 } 03839 else 03840 { 03841 /* Clear RXNE interrupt flag */ 03842 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); 03843 } 03844 } 03845 03846 /** 03847 * @brief RX interrrupt handler for 9 bits data word length . 03848 * @note Function is called under interruption only, once 03849 * interruptions have been enabled by HAL_UART_Receive_IT() 03850 * @param huart UART handle. 03851 * @retval None 03852 */ 03853 static void UART_RxISR_16BIT(UART_HandleTypeDef *huart) 03854 { 03855 uint16_t *tmp; 03856 uint16_t uhMask = huart->Mask; 03857 uint16_t uhdata; 03858 03859 /* Check that a Rx process is ongoing */ 03860 if (huart->RxState == HAL_UART_STATE_BUSY_RX) 03861 { 03862 uhdata = (uint16_t) READ_REG(huart->Instance->RDR); 03863 tmp = (uint16_t *) huart->pRxBuffPtr ; 03864 *tmp = (uint16_t)(uhdata & uhMask); 03865 huart->pRxBuffPtr += 2; 03866 03867 if (--huart->RxXferCount == 0) 03868 { 03869 /* Disable the UART Parity Error Interrupt and RXNE interrupt*/ 03870 #if defined(USART_CR1_FIFOEN) 03871 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE)); 03872 #else 03873 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); 03874 #endif 03875 03876 /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */ 03877 CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 03878 03879 /* Rx process is completed, restore huart->RxState to Ready */ 03880 huart->RxState = HAL_UART_STATE_READY; 03881 03882 /* Clear RxISR function pointer */ 03883 huart->RxISR = NULL; 03884 03885 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 03886 /*Call registered Rx complete callback*/ 03887 huart->RxCpltCallback(huart); 03888 #else 03889 /*Call legacy weak Rx complete callback*/ 03890 HAL_UART_RxCpltCallback(huart); 03891 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 03892 } 03893 } 03894 else 03895 { 03896 /* Clear RXNE interrupt flag */ 03897 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); 03898 } 03899 } 03900 03901 #if defined(USART_CR1_FIFOEN) 03902 /** 03903 * @brief RX interrrupt handler for 7 or 8 bits data word length and FIFO mode is enabled. 03904 * @note Function is called under interruption only, once 03905 * interruptions have been enabled by HAL_UART_Receive_IT() 03906 * @param huart UART handle. 03907 * @retval None 03908 */ 03909 static void UART_RxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart) 03910 { 03911 uint16_t uhMask = huart->Mask; 03912 uint16_t uhdata; 03913 uint8_t nb_rx_data; 03914 03915 /* Check that a Rx process is ongoing */ 03916 if (huart->RxState == HAL_UART_STATE_BUSY_RX) 03917 { 03918 for (nb_rx_data = huart->NbRxDataToProcess ; nb_rx_data > 0 ; nb_rx_data--) 03919 { 03920 uhdata = (uint16_t) READ_REG(huart->Instance->RDR); 03921 *huart->pRxBuffPtr++ = (uint8_t)(uhdata & (uint8_t)uhMask); 03922 huart->RxXferCount--; 03923 03924 if (huart->RxXferCount == 0U) 03925 { 03926 /* Disable the UART Parity Error Interrupt and RXFT interrupt*/ 03927 CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); 03928 03929 /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) and RX FIFO Threshold interrupt */ 03930 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE)); 03931 03932 /* Rx process is completed, restore huart->RxState to Ready */ 03933 huart->RxState = HAL_UART_STATE_READY; 03934 03935 /* Clear RxISR function pointer */ 03936 huart->RxISR = NULL; 03937 03938 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 03939 /*Call registered Rx complete callback*/ 03940 huart->RxCpltCallback(huart); 03941 #else 03942 /*Call legacy weak Rx complete callback*/ 03943 HAL_UART_RxCpltCallback(huart); 03944 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 03945 } 03946 } 03947 03948 /* When remaining number of bytes to receive is less than the RX FIFO 03949 threshold, next incoming frames are processed as if FIFO mode was 03950 disabled (i.e. one interrupt per received frame). 03951 */ 03952 if (((huart->RxXferCount != 0U)) && (huart->RxXferCount < huart->NbRxDataToProcess)) 03953 { 03954 /* Disable the UART RXFT interrupt*/ 03955 CLEAR_BIT(huart->Instance->CR3, USART_CR3_RXFTIE); 03956 03957 /* Update the RxISR function pointer */ 03958 huart->RxISR = UART_RxISR_8BIT; 03959 03960 /* Enable the UART Data Register Not Empty interrupt */ 03961 SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE); 03962 } 03963 } 03964 else 03965 { 03966 /* Clear RXNE interrupt flag */ 03967 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); 03968 } 03969 } 03970 03971 /** 03972 * @brief RX interrrupt handler for 9 bits data word length and FIFO mode is enabled. 03973 * @note Function is called under interruption only, once 03974 * interruptions have been enabled by HAL_UART_Receive_IT() 03975 * @param huart UART handle. 03976 * @retval None 03977 */ 03978 static void UART_RxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart) 03979 { 03980 uint16_t *tmp; 03981 uint16_t uhMask = huart->Mask; 03982 uint16_t uhdata; 03983 uint8_t nb_rx_data; 03984 03985 /* Check that a Rx process is ongoing */ 03986 if (huart->RxState == HAL_UART_STATE_BUSY_RX) 03987 { 03988 for (nb_rx_data = huart->NbRxDataToProcess ; nb_rx_data > 0 ; nb_rx_data--) 03989 { 03990 uhdata = (uint16_t) READ_REG(huart->Instance->RDR); 03991 tmp = (uint16_t *) huart->pRxBuffPtr ; 03992 *tmp = (uint16_t)(uhdata & uhMask); 03993 huart->pRxBuffPtr += 2; 03994 huart->RxXferCount--; 03995 03996 if (huart->RxXferCount == 0U) 03997 { 03998 /* Disable the UART Parity Error Interrupt and RXFT interrupt*/ 03999 CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); 04000 04001 /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) and RX FIFO Threshold interrupt */ 04002 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE)); 04003 04004 /* Rx process is completed, restore huart->RxState to Ready */ 04005 huart->RxState = HAL_UART_STATE_READY; 04006 04007 /* Clear RxISR function pointer */ 04008 huart->RxISR = NULL; 04009 04010 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 04011 /*Call registered Rx complete callback*/ 04012 huart->RxCpltCallback(huart); 04013 #else 04014 /*Call legacy weak Rx complete callback*/ 04015 HAL_UART_RxCpltCallback(huart); 04016 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 04017 } 04018 } 04019 04020 /* When remaining number of bytes to receive is less than the RX FIFO 04021 threshold, next incoming frames are processed as if FIFO mode was 04022 disabled (i.e. one interrupt per received frame). 04023 */ 04024 if (((huart->RxXferCount != 0U)) && (huart->RxXferCount < huart->NbRxDataToProcess)) 04025 { 04026 /* Disable the UART RXFT interrupt*/ 04027 CLEAR_BIT(huart->Instance->CR3, USART_CR3_RXFTIE); 04028 04029 /* Update the RxISR function pointer */ 04030 huart->RxISR = UART_RxISR_16BIT; 04031 04032 /* Enable the UART Data Register Not Empty interrupt */ 04033 SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE); 04034 } 04035 } 04036 else 04037 { 04038 /* Clear RXNE interrupt flag */ 04039 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); 04040 } 04041 } 04042 #endif 04043 04044 /** 04045 * @} 04046 */ 04047 04048 #endif /* HAL_UART_MODULE_ENABLED */ 04049 /** 04050 * @} 04051 */ 04052 04053 /** 04054 * @} 04055 */ 04056 04057 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/