STM32L486xx HAL User Manual
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32l4xx_hal_sai.h 00004 * @author MCD Application Team 00005 * @brief Header file of SAI HAL module. 00006 ****************************************************************************** 00007 * @attention 00008 * 00009 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> 00010 * 00011 * Redistribution and use in source and binary forms, with or without modification, 00012 * are permitted provided that the following conditions are met: 00013 * 1. Redistributions of source code must retain the above copyright notice, 00014 * this list of conditions and the following disclaimer. 00015 * 2. Redistributions in binary form must reproduce the above copyright notice, 00016 * this list of conditions and the following disclaimer in the documentation 00017 * and/or other materials provided with the distribution. 00018 * 3. Neither the name of STMicroelectronics nor the names of its contributors 00019 * may be used to endorse or promote products derived from this software 00020 * without specific prior written permission. 00021 * 00022 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 00023 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 00024 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 00025 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 00026 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 00027 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 00028 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00029 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 00030 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 00031 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00032 * 00033 ****************************************************************************** 00034 */ 00035 00036 /* Define to prevent recursive inclusion -------------------------------------*/ 00037 #ifndef STM32L4xx_HAL_SAI_H 00038 #define STM32L4xx_HAL_SAI_H 00039 00040 #ifdef __cplusplus 00041 extern "C" { 00042 #endif 00043 00044 /* Includes ------------------------------------------------------------------*/ 00045 #include "stm32l4xx_hal_def.h" 00046 00047 /** @addtogroup STM32L4xx_HAL_Driver 00048 * @{ 00049 */ 00050 00051 /** @addtogroup SAI 00052 * @{ 00053 */ 00054 00055 /* Exported types ------------------------------------------------------------*/ 00056 /** @defgroup SAI_Exported_Types SAI Exported Types 00057 * @{ 00058 */ 00059 00060 /** 00061 * @brief HAL State structures definition 00062 */ 00063 typedef enum 00064 { 00065 HAL_SAI_STATE_RESET = 0x00U, /*!< SAI not yet initialized or disabled */ 00066 HAL_SAI_STATE_READY = 0x01U, /*!< SAI initialized and ready for use */ 00067 HAL_SAI_STATE_BUSY = 0x02U, /*!< SAI internal process is ongoing */ 00068 HAL_SAI_STATE_BUSY_TX = 0x12U, /*!< Data transmission process is ongoing */ 00069 HAL_SAI_STATE_BUSY_RX = 0x22U, /*!< Data reception process is ongoing */ 00070 } HAL_SAI_StateTypeDef; 00071 00072 /** 00073 * @brief SAI Callback prototype 00074 */ 00075 typedef void (*SAIcallback)(void); 00076 00077 #if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 00078 /** @defgroup SAI_PDM_Structure_definition SAI PDM Structure definition 00079 * @brief SAI PDM Init structure definition 00080 * @{ 00081 */ 00082 typedef struct 00083 { 00084 FunctionalState Activation; /*!< Enable/disable PDM interface */ 00085 uint32_t MicPairsNbr; /*!< Specifies the number of microphone pairs used. 00086 This parameter must be a number between Min_Data = 1 and Max_Data = 3. */ 00087 uint32_t ClockEnable; /*!< Specifies which clock must be enabled. 00088 This parameter can be a values combination of @ref SAI_PDM_ClockEnable */ 00089 } SAI_PdmInitTypeDef; 00090 /** 00091 * @} 00092 */ 00093 #endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ 00094 00095 /** @defgroup SAI_Init_Structure_definition SAI Init Structure definition 00096 * @brief SAI Init Structure definition 00097 * @{ 00098 */ 00099 typedef struct 00100 { 00101 uint32_t AudioMode; /*!< Specifies the SAI Block audio Mode. 00102 This parameter can be a value of @ref SAI_Block_Mode */ 00103 00104 uint32_t Synchro; /*!< Specifies SAI Block synchronization 00105 This parameter can be a value of @ref SAI_Block_Synchronization */ 00106 00107 uint32_t SynchroExt; /*!< Specifies SAI external output synchronization, this setup is common 00108 for BlockA and BlockB 00109 This parameter can be a value of @ref SAI_Block_SyncExt 00110 @note If both audio blocks of same SAI are used, this parameter has 00111 to be set to the same value for each audio block */ 00112 00113 uint32_t OutputDrive; /*!< Specifies when SAI Block outputs are driven. 00114 This parameter can be a value of @ref SAI_Block_Output_Drive 00115 @note This value has to be set before enabling the audio block 00116 but after the audio block configuration. */ 00117 00118 uint32_t NoDivider; /*!< Specifies whether master clock will be divided or not. 00119 This parameter can be a value of @ref SAI_Block_NoDivider 00120 @note For STM32L4Rx/STM32L4Sx devices : 00121 If bit NOMCK in the SAI_xCR1 register is cleared, the frame length 00122 should be aligned to a number equal to a power of 2, from 8 to 256. 00123 If bit NOMCK in the SAI_xCR1 register is set, the frame length can 00124 take any of the values without constraint. There is no MCLK_x clock 00125 which can be output. 00126 For other devices : 00127 If bit NODIV in the SAI_xCR1 register is cleared, the frame length 00128 should be aligned to a number equal to a power of 2, from 8 to 256. 00129 If bit NODIV in the SAI_xCR1 register is set, the frame length can 00130 take any of the values without constraint since the input clock of 00131 the audio block should be equal to the bit clock. 00132 There is no MCLK_x clock which can be output. */ 00133 00134 uint32_t FIFOThreshold; /*!< Specifies SAI Block FIFO threshold. 00135 This parameter can be a value of @ref SAI_Block_Fifo_Threshold */ 00136 00137 uint32_t AudioFrequency; /*!< Specifies the audio frequency sampling. 00138 This parameter can be a value of @ref SAI_Audio_Frequency */ 00139 00140 uint32_t Mckdiv; /*!< Specifies the master clock divider, the parameter will be used if for 00141 AudioFrequency the user choice 00142 This parameter must be a number between Min_Data = 0 and Max_Data = 63 on STM32L4Rx/STM32L4Sx devices. 00143 This parameter must be a number between Min_Data = 0 and Max_Data = 15 on other devices. */ 00144 00145 #if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 00146 uint32_t MckOverSampling; /*!< Specifies the master clock oversampling. 00147 This parameter can be a value of @ref SAI_Block_Mck_OverSampling */ 00148 #endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ 00149 00150 uint32_t MonoStereoMode; /*!< Specifies if the mono or stereo mode is selected. 00151 This parameter can be a value of @ref SAI_Mono_Stereo_Mode */ 00152 00153 uint32_t CompandingMode; /*!< Specifies the companding mode type. 00154 This parameter can be a value of @ref SAI_Block_Companding_Mode */ 00155 00156 uint32_t TriState; /*!< Specifies the companding mode type. 00157 This parameter can be a value of @ref SAI_TRIState_Management */ 00158 00159 #if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 00160 SAI_PdmInitTypeDef PdmInit; /*!< Specifies the PDM configuration. */ 00161 #endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ 00162 00163 /* This part of the structure is automatically filled if your are using the high level initialisation 00164 function HAL_SAI_InitProtocol */ 00165 00166 uint32_t Protocol; /*!< Specifies the SAI Block protocol. 00167 This parameter can be a value of @ref SAI_Block_Protocol */ 00168 00169 uint32_t DataSize; /*!< Specifies the SAI Block data size. 00170 This parameter can be a value of @ref SAI_Block_Data_Size */ 00171 00172 uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit. 00173 This parameter can be a value of @ref SAI_Block_MSB_LSB_transmission */ 00174 00175 uint32_t ClockStrobing; /*!< Specifies the SAI Block clock strobing edge sensitivity. 00176 This parameter can be a value of @ref SAI_Block_Clock_Strobing */ 00177 } SAI_InitTypeDef; 00178 /** 00179 * @} 00180 */ 00181 00182 /** @defgroup SAI_Frame_Structure_definition SAI Frame Structure definition 00183 * @brief SAI Frame Init structure definition 00184 * @{ 00185 */ 00186 typedef struct 00187 { 00188 00189 uint32_t FrameLength; /*!< Specifies the Frame length, the number of SCK clocks for each audio frame. 00190 This parameter must be a number between Min_Data = 8 and Max_Data = 256. 00191 @note If master clock MCLK_x pin is declared as an output, the frame length 00192 should be aligned to a number equal to power of 2 in order to keep 00193 in an audio frame, an integer number of MCLK pulses by bit Clock. */ 00194 00195 uint32_t ActiveFrameLength; /*!< Specifies the Frame synchronization active level length. 00196 This Parameter specifies the length in number of bit clock (SCK + 1) 00197 of the active level of FS signal in audio frame. 00198 This parameter must be a number between Min_Data = 1 and Max_Data = 128 */ 00199 00200 uint32_t FSDefinition; /*!< Specifies the Frame synchronization definition. 00201 This parameter can be a value of @ref SAI_Block_FS_Definition */ 00202 00203 uint32_t FSPolarity; /*!< Specifies the Frame synchronization Polarity. 00204 This parameter can be a value of @ref SAI_Block_FS_Polarity */ 00205 00206 uint32_t FSOffset; /*!< Specifies the Frame synchronization Offset. 00207 This parameter can be a value of @ref SAI_Block_FS_Offset */ 00208 00209 } SAI_FrameInitTypeDef; 00210 /** 00211 * @} 00212 */ 00213 00214 /** @defgroup SAI_Slot_Structure_definition SAI Slot Structure definition 00215 * @brief SAI Block Slot Init Structure definition 00216 * @{ 00217 */ 00218 typedef struct 00219 { 00220 uint32_t FirstBitOffset; /*!< Specifies the position of first data transfer bit in the slot. 00221 This parameter must be a number between Min_Data = 0 and Max_Data = 24 */ 00222 00223 uint32_t SlotSize; /*!< Specifies the Slot Size. 00224 This parameter can be a value of @ref SAI_Block_Slot_Size */ 00225 00226 uint32_t SlotNumber; /*!< Specifies the number of slot in the audio frame. 00227 This parameter must be a number between Min_Data = 1 and Max_Data = 16 */ 00228 00229 uint32_t SlotActive; /*!< Specifies the slots in audio frame that will be activated. 00230 This parameter can be a value of @ref SAI_Block_Slot_Active */ 00231 } SAI_SlotInitTypeDef; 00232 /** 00233 * @} 00234 */ 00235 00236 /** @defgroup SAI_Handle_Structure_definition SAI Handle Structure definition 00237 * @brief SAI handle Structure definition 00238 * @{ 00239 */ 00240 typedef struct __SAI_HandleTypeDef 00241 { 00242 SAI_Block_TypeDef *Instance; /*!< SAI Blockx registers base address */ 00243 00244 SAI_InitTypeDef Init; /*!< SAI communication parameters */ 00245 00246 SAI_FrameInitTypeDef FrameInit; /*!< SAI Frame configuration parameters */ 00247 00248 SAI_SlotInitTypeDef SlotInit; /*!< SAI Slot configuration parameters */ 00249 00250 uint8_t *pBuffPtr; /*!< Pointer to SAI transfer Buffer */ 00251 00252 uint16_t XferSize; /*!< SAI transfer size */ 00253 00254 uint16_t XferCount; /*!< SAI transfer counter */ 00255 00256 DMA_HandleTypeDef *hdmatx; /*!< SAI Tx DMA handle parameters */ 00257 00258 DMA_HandleTypeDef *hdmarx; /*!< SAI Rx DMA handle parameters */ 00259 00260 SAIcallback mutecallback; /*!< SAI mute callback */ 00261 00262 void (*InterruptServiceRoutine)(struct __SAI_HandleTypeDef *hsai); /* function pointer for IRQ handler */ 00263 00264 HAL_LockTypeDef Lock; /*!< SAI locking object */ 00265 00266 __IO HAL_SAI_StateTypeDef State; /*!< SAI communication state */ 00267 00268 __IO uint32_t ErrorCode; /*!< SAI Error code */ 00269 00270 #if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) 00271 void (*RxCpltCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI receive complete callback */ 00272 void (*RxHalfCpltCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI receive half complete callback */ 00273 void (*TxCpltCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI transmit complete callback */ 00274 void (*TxHalfCpltCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI transmit half complete callback */ 00275 void (*ErrorCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI error callback */ 00276 void (*MspInitCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI MSP init callback */ 00277 void (*MspDeInitCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI MSP de-init callback */ 00278 #endif 00279 } SAI_HandleTypeDef; 00280 /** 00281 * @} 00282 */ 00283 00284 #if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) 00285 /** 00286 * @brief SAI callback ID enumeration definition 00287 */ 00288 typedef enum 00289 { 00290 HAL_SAI_RX_COMPLETE_CB_ID = 0x00U, /*!< SAI receive complete callback ID */ 00291 HAL_SAI_RX_HALFCOMPLETE_CB_ID = 0x01U, /*!< SAI receive half complete callback ID */ 00292 HAL_SAI_TX_COMPLETE_CB_ID = 0x02U, /*!< SAI transmit complete callback ID */ 00293 HAL_SAI_TX_HALFCOMPLETE_CB_ID = 0x03U, /*!< SAI transmit half complete callback ID */ 00294 HAL_SAI_ERROR_CB_ID = 0x04U, /*!< SAI error callback ID */ 00295 HAL_SAI_MSPINIT_CB_ID = 0x05U, /*!< SAI MSP init callback ID */ 00296 HAL_SAI_MSPDEINIT_CB_ID = 0x06U /*!< SAI MSP de-init callback ID */ 00297 } HAL_SAI_CallbackIDTypeDef; 00298 00299 /** 00300 * @brief SAI callback pointer definition 00301 */ 00302 typedef void (*pSAI_CallbackTypeDef)(SAI_HandleTypeDef *hsai); 00303 #endif 00304 00305 /** 00306 * @} 00307 */ 00308 00309 /* Exported constants --------------------------------------------------------*/ 00310 /** @defgroup SAI_Exported_Constants SAI Exported Constants 00311 * @{ 00312 */ 00313 00314 /** @defgroup SAI_Error_Code SAI Error Code 00315 * @{ 00316 */ 00317 #define HAL_SAI_ERROR_NONE 0x00000000U /*!< No error */ 00318 #define HAL_SAI_ERROR_OVR 0x00000001U /*!< Overrun Error */ 00319 #define HAL_SAI_ERROR_UDR 0x00000002U /*!< Underrun error */ 00320 #define HAL_SAI_ERROR_AFSDET 0x00000004U /*!< Anticipated Frame synchronisation detection */ 00321 #define HAL_SAI_ERROR_LFSDET 0x00000008U /*!< Late Frame synchronisation detection */ 00322 #define HAL_SAI_ERROR_CNREADY 0x00000010U /*!< codec not ready */ 00323 #define HAL_SAI_ERROR_WCKCFG 0x00000020U /*!< Wrong clock configuration */ 00324 #define HAL_SAI_ERROR_TIMEOUT 0x00000040U /*!< Timeout error */ 00325 #define HAL_SAI_ERROR_DMA 0x00000080U /*!< DMA error */ 00326 #if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) 00327 #define HAL_SAI_ERROR_INVALID_CALLBACK 0x00000100U /*!< Invalid callback error */ 00328 #endif 00329 /** 00330 * @} 00331 */ 00332 00333 /** @defgroup SAI_Block_SyncExt SAI External synchronisation 00334 * @{ 00335 */ 00336 #define SAI_SYNCEXT_DISABLE 0U 00337 #define SAI_SYNCEXT_OUTBLOCKA_ENABLE 1U 00338 #define SAI_SYNCEXT_OUTBLOCKB_ENABLE 2U 00339 /** 00340 * @} 00341 */ 00342 00343 /** @defgroup SAI_Protocol SAI Supported protocol 00344 * @{ 00345 */ 00346 #define SAI_I2S_STANDARD 0U 00347 #define SAI_I2S_MSBJUSTIFIED 1U 00348 #define SAI_I2S_LSBJUSTIFIED 2U 00349 #define SAI_PCM_LONG 3U 00350 #define SAI_PCM_SHORT 4U 00351 /** 00352 * @} 00353 */ 00354 00355 /** @defgroup SAI_Protocol_DataSize SAI protocol data size 00356 * @{ 00357 */ 00358 #define SAI_PROTOCOL_DATASIZE_16BIT 0U 00359 #define SAI_PROTOCOL_DATASIZE_16BITEXTENDED 1U 00360 #define SAI_PROTOCOL_DATASIZE_24BIT 2U 00361 #define SAI_PROTOCOL_DATASIZE_32BIT 3U 00362 /** 00363 * @} 00364 */ 00365 00366 /** @defgroup SAI_Audio_Frequency SAI Audio Frequency 00367 * @{ 00368 */ 00369 #define SAI_AUDIO_FREQUENCY_192K 192000U 00370 #define SAI_AUDIO_FREQUENCY_96K 96000U 00371 #define SAI_AUDIO_FREQUENCY_48K 48000U 00372 #define SAI_AUDIO_FREQUENCY_44K 44100U 00373 #define SAI_AUDIO_FREQUENCY_32K 32000U 00374 #define SAI_AUDIO_FREQUENCY_22K 22050U 00375 #define SAI_AUDIO_FREQUENCY_16K 16000U 00376 #define SAI_AUDIO_FREQUENCY_11K 11025U 00377 #define SAI_AUDIO_FREQUENCY_8K 8000U 00378 #define SAI_AUDIO_FREQUENCY_MCKDIV 0U 00379 /** 00380 * @} 00381 */ 00382 00383 #if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 00384 /** @defgroup SAI_Block_Mck_OverSampling SAI Block Master Clock OverSampling 00385 * @{ 00386 */ 00387 #define SAI_MCK_OVERSAMPLING_DISABLE 0x00000000U 00388 #define SAI_MCK_OVERSAMPLING_ENABLE SAI_xCR1_OSR 00389 /** 00390 * @} 00391 */ 00392 00393 /** @defgroup SAI_PDM_ClockEnable SAI PDM Clock Enable 00394 * @{ 00395 */ 00396 #define SAI_PDM_CLOCK1_ENABLE SAI_PDMCR_CKEN1 00397 #define SAI_PDM_CLOCK2_ENABLE SAI_PDMCR_CKEN2 00398 /** 00399 * @} 00400 */ 00401 #endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ 00402 00403 /** @defgroup SAI_Block_Mode SAI Block Mode 00404 * @{ 00405 */ 00406 #define SAI_MODEMASTER_TX 0x00000000U 00407 #define SAI_MODEMASTER_RX SAI_xCR1_MODE_0 00408 #define SAI_MODESLAVE_TX SAI_xCR1_MODE_1 00409 #define SAI_MODESLAVE_RX (SAI_xCR1_MODE_1 | SAI_xCR1_MODE_0) 00410 00411 /** 00412 * @} 00413 */ 00414 00415 /** @defgroup SAI_Block_Protocol SAI Block Protocol 00416 * @{ 00417 */ 00418 #define SAI_FREE_PROTOCOL 0x00000000U 00419 #define SAI_SPDIF_PROTOCOL SAI_xCR1_PRTCFG_0 00420 #define SAI_AC97_PROTOCOL SAI_xCR1_PRTCFG_1 00421 /** 00422 * @} 00423 */ 00424 00425 /** @defgroup SAI_Block_Data_Size SAI Block Data Size 00426 * @{ 00427 */ 00428 #define SAI_DATASIZE_8 SAI_xCR1_DS_1 00429 #define SAI_DATASIZE_10 (SAI_xCR1_DS_1 | SAI_xCR1_DS_0) 00430 #define SAI_DATASIZE_16 SAI_xCR1_DS_2 00431 #define SAI_DATASIZE_20 (SAI_xCR1_DS_2 | SAI_xCR1_DS_0) 00432 #define SAI_DATASIZE_24 (SAI_xCR1_DS_2 | SAI_xCR1_DS_1) 00433 #define SAI_DATASIZE_32 (SAI_xCR1_DS_2 | SAI_xCR1_DS_1 | SAI_xCR1_DS_0) 00434 /** 00435 * @} 00436 */ 00437 00438 /** @defgroup SAI_Block_MSB_LSB_transmission SAI Block MSB LSB transmission 00439 * @{ 00440 */ 00441 #define SAI_FIRSTBIT_MSB 0x00000000U 00442 #define SAI_FIRSTBIT_LSB SAI_xCR1_LSBFIRST 00443 /** 00444 * @} 00445 */ 00446 00447 /** @defgroup SAI_Block_Clock_Strobing SAI Block Clock Strobing 00448 * @{ 00449 */ 00450 #define SAI_CLOCKSTROBING_FALLINGEDGE 0U 00451 #define SAI_CLOCKSTROBING_RISINGEDGE 1U 00452 /** 00453 * @} 00454 */ 00455 00456 /** @defgroup SAI_Block_Synchronization SAI Block Synchronization 00457 * @{ 00458 */ 00459 #define SAI_ASYNCHRONOUS 0U /*!< Asynchronous */ 00460 #define SAI_SYNCHRONOUS 1U /*!< Synchronous with other block of same SAI */ 00461 #define SAI_SYNCHRONOUS_EXT_SAI1 2U /*!< Synchronous with other SAI, SAI1 */ 00462 #define SAI_SYNCHRONOUS_EXT_SAI2 3U /*!< Synchronous with other SAI, SAI2 */ 00463 /** 00464 * @} 00465 */ 00466 00467 /** @defgroup SAI_Block_Output_Drive SAI Block Output Drive 00468 * @{ 00469 */ 00470 #define SAI_OUTPUTDRIVE_DISABLE 0x00000000U 00471 #define SAI_OUTPUTDRIVE_ENABLE SAI_xCR1_OUTDRIV 00472 /** 00473 * @} 00474 */ 00475 00476 /** @defgroup SAI_Block_NoDivider SAI Block NoDivider 00477 * @{ 00478 */ 00479 #define SAI_MASTERDIVIDER_ENABLE 0x00000000U 00480 #if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 00481 #define SAI_MASTERDIVIDER_DISABLE SAI_xCR1_NOMCK 00482 #else 00483 #define SAI_MASTERDIVIDER_DISABLE SAI_xCR1_NODIV 00484 #endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ 00485 /** 00486 * @} 00487 */ 00488 00489 /** @defgroup SAI_Block_FS_Definition SAI Block FS Definition 00490 * @{ 00491 */ 00492 #define SAI_FS_STARTFRAME 0x00000000U 00493 #define SAI_FS_CHANNEL_IDENTIFICATION SAI_xFRCR_FSDEF 00494 /** 00495 * @} 00496 */ 00497 00498 /** @defgroup SAI_Block_FS_Polarity SAI Block FS Polarity 00499 * @{ 00500 */ 00501 #define SAI_FS_ACTIVE_LOW 0x00000000U 00502 #define SAI_FS_ACTIVE_HIGH SAI_xFRCR_FSPOL 00503 /** 00504 * @} 00505 */ 00506 00507 /** @defgroup SAI_Block_FS_Offset SAI Block FS Offset 00508 * @{ 00509 */ 00510 #define SAI_FS_FIRSTBIT 0x00000000U 00511 #define SAI_FS_BEFOREFIRSTBIT SAI_xFRCR_FSOFF 00512 /** 00513 * @} 00514 */ 00515 00516 /** @defgroup SAI_Block_Slot_Size SAI Block Slot Size 00517 * @{ 00518 */ 00519 #define SAI_SLOTSIZE_DATASIZE 0x00000000U 00520 #define SAI_SLOTSIZE_16B SAI_xSLOTR_SLOTSZ_0 00521 #define SAI_SLOTSIZE_32B SAI_xSLOTR_SLOTSZ_1 00522 /** 00523 * @} 00524 */ 00525 00526 /** @defgroup SAI_Block_Slot_Active SAI Block Slot Active 00527 * @{ 00528 */ 00529 #define SAI_SLOT_NOTACTIVE 0x00000000U 00530 #define SAI_SLOTACTIVE_0 0x00000001U 00531 #define SAI_SLOTACTIVE_1 0x00000002U 00532 #define SAI_SLOTACTIVE_2 0x00000004U 00533 #define SAI_SLOTACTIVE_3 0x00000008U 00534 #define SAI_SLOTACTIVE_4 0x00000010U 00535 #define SAI_SLOTACTIVE_5 0x00000020U 00536 #define SAI_SLOTACTIVE_6 0x00000040U 00537 #define SAI_SLOTACTIVE_7 0x00000080U 00538 #define SAI_SLOTACTIVE_8 0x00000100U 00539 #define SAI_SLOTACTIVE_9 0x00000200U 00540 #define SAI_SLOTACTIVE_10 0x00000400U 00541 #define SAI_SLOTACTIVE_11 0x00000800U 00542 #define SAI_SLOTACTIVE_12 0x00001000U 00543 #define SAI_SLOTACTIVE_13 0x00002000U 00544 #define SAI_SLOTACTIVE_14 0x00004000U 00545 #define SAI_SLOTACTIVE_15 0x00008000U 00546 #define SAI_SLOTACTIVE_ALL 0x0000FFFFU 00547 /** 00548 * @} 00549 */ 00550 00551 /** @defgroup SAI_Mono_Stereo_Mode SAI Mono Stereo Mode 00552 * @{ 00553 */ 00554 #define SAI_STEREOMODE 0x00000000U 00555 #define SAI_MONOMODE SAI_xCR1_MONO 00556 /** 00557 * @} 00558 */ 00559 00560 /** @defgroup SAI_TRIState_Management SAI TRIState Management 00561 * @{ 00562 */ 00563 #define SAI_OUTPUT_NOTRELEASED 0x00000000U 00564 #define SAI_OUTPUT_RELEASED SAI_xCR2_TRIS 00565 /** 00566 * @} 00567 */ 00568 00569 /** @defgroup SAI_Block_Fifo_Threshold SAI Block Fifo Threshold 00570 * @{ 00571 */ 00572 #define SAI_FIFOTHRESHOLD_EMPTY 0x00000000U 00573 #define SAI_FIFOTHRESHOLD_1QF SAI_xCR2_FTH_0 00574 #define SAI_FIFOTHRESHOLD_HF SAI_xCR2_FTH_1 00575 #define SAI_FIFOTHRESHOLD_3QF (SAI_xCR2_FTH_1 | SAI_xCR2_FTH_0) 00576 #define SAI_FIFOTHRESHOLD_FULL SAI_xCR2_FTH_2 00577 /** 00578 * @} 00579 */ 00580 00581 /** @defgroup SAI_Block_Companding_Mode SAI Block Companding Mode 00582 * @{ 00583 */ 00584 #define SAI_NOCOMPANDING 0x00000000U 00585 #define SAI_ULAW_1CPL_COMPANDING SAI_xCR2_COMP_1 00586 #define SAI_ALAW_1CPL_COMPANDING (SAI_xCR2_COMP_1 | SAI_xCR2_COMP_0) 00587 #define SAI_ULAW_2CPL_COMPANDING (SAI_xCR2_COMP_1 | SAI_xCR2_CPL) 00588 #define SAI_ALAW_2CPL_COMPANDING (SAI_xCR2_COMP_1 | SAI_xCR2_COMP_0 | SAI_xCR2_CPL) 00589 /** 00590 * @} 00591 */ 00592 00593 /** @defgroup SAI_Block_Mute_Value SAI Block Mute Value 00594 * @{ 00595 */ 00596 #define SAI_ZERO_VALUE 0x00000000U 00597 #define SAI_LAST_SENT_VALUE SAI_xCR2_MUTEVAL 00598 /** 00599 * @} 00600 */ 00601 00602 /** @defgroup SAI_Block_Interrupts_Definition SAI Block Interrupts Definition 00603 * @{ 00604 */ 00605 #define SAI_IT_OVRUDR SAI_xIMR_OVRUDRIE 00606 #define SAI_IT_MUTEDET SAI_xIMR_MUTEDETIE 00607 #define SAI_IT_WCKCFG SAI_xIMR_WCKCFGIE 00608 #define SAI_IT_FREQ SAI_xIMR_FREQIE 00609 #define SAI_IT_CNRDY SAI_xIMR_CNRDYIE 00610 #define SAI_IT_AFSDET SAI_xIMR_AFSDETIE 00611 #define SAI_IT_LFSDET SAI_xIMR_LFSDETIE 00612 /** 00613 * @} 00614 */ 00615 00616 /** @defgroup SAI_Block_Flags_Definition SAI Block Flags Definition 00617 * @{ 00618 */ 00619 #define SAI_FLAG_OVRUDR SAI_xSR_OVRUDR 00620 #define SAI_FLAG_MUTEDET SAI_xSR_MUTEDET 00621 #define SAI_FLAG_WCKCFG SAI_xSR_WCKCFG 00622 #define SAI_FLAG_FREQ SAI_xSR_FREQ 00623 #define SAI_FLAG_CNRDY SAI_xSR_CNRDY 00624 #define SAI_FLAG_AFSDET SAI_xSR_AFSDET 00625 #define SAI_FLAG_LFSDET SAI_xSR_LFSDET 00626 /** 00627 * @} 00628 */ 00629 00630 /** @defgroup SAI_Block_Fifo_Status_Level SAI Block Fifo Status Level 00631 * @{ 00632 */ 00633 #define SAI_FIFOSTATUS_EMPTY 0x00000000U 00634 #define SAI_FIFOSTATUS_LESS1QUARTERFULL 0x00010000U 00635 #define SAI_FIFOSTATUS_1QUARTERFULL 0x00020000U 00636 #define SAI_FIFOSTATUS_HALFFULL 0x00030000U 00637 #define SAI_FIFOSTATUS_3QUARTERFULL 0x00040000U 00638 #define SAI_FIFOSTATUS_FULL 0x00050000U 00639 /** 00640 * @} 00641 */ 00642 00643 /** 00644 * @} 00645 */ 00646 00647 /* Exported macro ------------------------------------------------------------*/ 00648 /** @defgroup SAI_Exported_Macros SAI Exported Macros 00649 * @brief macros to handle interrupts and specific configurations 00650 * @{ 00651 */ 00652 00653 /** @brief Reset SAI handle state. 00654 * @param __HANDLE__ specifies the SAI Handle. 00655 * @retval None 00656 */ 00657 #if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) 00658 #define __HAL_SAI_RESET_HANDLE_STATE(__HANDLE__) do{ \ 00659 (__HANDLE__)->State = HAL_SAI_STATE_RESET; \ 00660 (__HANDLE__)->MspInitCallback = NULL; \ 00661 (__HANDLE__)->MspDeInitCallback = NULL; \ 00662 } while(0) 00663 #else 00664 #define __HAL_SAI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SAI_STATE_RESET) 00665 #endif 00666 00667 /** @brief Enable the specified SAI interrupts. 00668 * @param __HANDLE__ specifies the SAI Handle. 00669 * @param __INTERRUPT__ specifies the interrupt source to enable or disable. 00670 * This parameter can be one of the following values: 00671 * @arg SAI_IT_OVRUDR: Overrun underrun interrupt enable 00672 * @arg SAI_IT_MUTEDET: Mute detection interrupt enable 00673 * @arg SAI_IT_WCKCFG: Wrong Clock Configuration interrupt enable 00674 * @arg SAI_IT_FREQ: FIFO request interrupt enable 00675 * @arg SAI_IT_CNRDY: Codec not ready interrupt enable 00676 * @arg SAI_IT_AFSDET: Anticipated frame synchronization detection interrupt enable 00677 * @arg SAI_IT_LFSDET: Late frame synchronization detection interrupt enable 00678 * @retval None 00679 */ 00680 #define __HAL_SAI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR |= (__INTERRUPT__)) 00681 00682 /** @brief Disable the specified SAI interrupts. 00683 * @param __HANDLE__ specifies the SAI Handle. 00684 * @param __INTERRUPT__ specifies the interrupt source to enable or disable. 00685 * This parameter can be one of the following values: 00686 * @arg SAI_IT_OVRUDR: Overrun underrun interrupt enable 00687 * @arg SAI_IT_MUTEDET: Mute detection interrupt enable 00688 * @arg SAI_IT_WCKCFG: Wrong Clock Configuration interrupt enable 00689 * @arg SAI_IT_FREQ: FIFO request interrupt enable 00690 * @arg SAI_IT_CNRDY: Codec not ready interrupt enable 00691 * @arg SAI_IT_AFSDET: Anticipated frame synchronization detection interrupt enable 00692 * @arg SAI_IT_LFSDET: Late frame synchronization detection interrupt enable 00693 * @retval None 00694 */ 00695 #define __HAL_SAI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR &= (~(__INTERRUPT__))) 00696 00697 /** @brief Check whether the specified SAI interrupt source is enabled or not. 00698 * @param __HANDLE__ specifies the SAI Handle. 00699 * @param __INTERRUPT__ specifies the SAI interrupt source to check. 00700 * This parameter can be one of the following values: 00701 * @arg SAI_IT_OVRUDR: Overrun underrun interrupt enable 00702 * @arg SAI_IT_MUTEDET: Mute detection interrupt enable 00703 * @arg SAI_IT_WCKCFG: Wrong Clock Configuration interrupt enable 00704 * @arg SAI_IT_FREQ: FIFO request interrupt enable 00705 * @arg SAI_IT_CNRDY: Codec not ready interrupt enable 00706 * @arg SAI_IT_AFSDET: Anticipated frame synchronization detection interrupt enable 00707 * @arg SAI_IT_LFSDET: Late frame synchronization detection interrupt enable 00708 * @retval The new state of __INTERRUPT__ (TRUE or FALSE). 00709 */ 00710 #define __HAL_SAI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IMR & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 00711 00712 /** @brief Check whether the specified SAI flag is set or not. 00713 * @param __HANDLE__ specifies the SAI Handle. 00714 * @param __FLAG__ specifies the flag to check. 00715 * This parameter can be one of the following values: 00716 * @arg SAI_FLAG_OVRUDR: Overrun underrun flag. 00717 * @arg SAI_FLAG_MUTEDET: Mute detection flag. 00718 * @arg SAI_FLAG_WCKCFG: Wrong Clock Configuration flag. 00719 * @arg SAI_FLAG_FREQ: FIFO request flag. 00720 * @arg SAI_FLAG_CNRDY: Codec not ready flag. 00721 * @arg SAI_FLAG_AFSDET: Anticipated frame synchronization detection flag. 00722 * @arg SAI_FLAG_LFSDET: Late frame synchronization detection flag. 00723 * @retval The new state of __FLAG__ (TRUE or FALSE). 00724 */ 00725 #define __HAL_SAI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) 00726 00727 /** @brief Clear the specified SAI pending flag. 00728 * @param __HANDLE__ specifies the SAI Handle. 00729 * @param __FLAG__ specifies the flag to check. 00730 * This parameter can be any combination of the following values: 00731 * @arg SAI_FLAG_OVRUDR: Clear Overrun underrun 00732 * @arg SAI_FLAG_MUTEDET: Clear Mute detection 00733 * @arg SAI_FLAG_WCKCFG: Clear Wrong Clock Configuration 00734 * @arg SAI_FLAG_FREQ: Clear FIFO request 00735 * @arg SAI_FLAG_CNRDY: Clear Codec not ready 00736 * @arg SAI_FLAG_AFSDET: Clear Anticipated frame synchronization detection 00737 * @arg SAI_FLAG_LFSDET: Clear Late frame synchronization detection 00738 * 00739 * @retval None 00740 */ 00741 #define __HAL_SAI_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->CLRFR = (__FLAG__)) 00742 00743 /** @brief Enable SAI. 00744 * @param __HANDLE__ specifies the SAI Handle. 00745 * @retval None 00746 */ 00747 #define __HAL_SAI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SAI_xCR1_SAIEN) 00748 00749 /** @brief Disable SAI. 00750 * @param __HANDLE__ specifies the SAI Handle. 00751 * @retval None 00752 */ 00753 #define __HAL_SAI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~SAI_xCR1_SAIEN) 00754 00755 /** 00756 * @} 00757 */ 00758 00759 #if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 00760 /* Include SAI HAL Extension module */ 00761 #include "stm32l4xx_hal_sai_ex.h" 00762 #endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ 00763 00764 /* Exported functions --------------------------------------------------------*/ 00765 /** @addtogroup SAI_Exported_Functions 00766 * @{ 00767 */ 00768 00769 /* Initialization/de-initialization functions ********************************/ 00770 /** @addtogroup SAI_Exported_Functions_Group1 00771 * @{ 00772 */ 00773 HAL_StatusTypeDef HAL_SAI_InitProtocol(SAI_HandleTypeDef *hsai, uint32_t protocol, uint32_t datasize, uint32_t nbslot); 00774 HAL_StatusTypeDef HAL_SAI_Init(SAI_HandleTypeDef *hsai); 00775 HAL_StatusTypeDef HAL_SAI_DeInit(SAI_HandleTypeDef *hsai); 00776 void HAL_SAI_MspInit(SAI_HandleTypeDef *hsai); 00777 void HAL_SAI_MspDeInit(SAI_HandleTypeDef *hsai); 00778 00779 #if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) 00780 /* SAI callbacks register/unregister functions ********************************/ 00781 HAL_StatusTypeDef HAL_SAI_RegisterCallback(SAI_HandleTypeDef *hsai, 00782 HAL_SAI_CallbackIDTypeDef CallbackID, 00783 pSAI_CallbackTypeDef pCallback); 00784 HAL_StatusTypeDef HAL_SAI_UnRegisterCallback(SAI_HandleTypeDef *hsai, 00785 HAL_SAI_CallbackIDTypeDef CallbackID); 00786 #endif 00787 /** 00788 * @} 00789 */ 00790 00791 /* I/O operation functions ***************************************************/ 00792 /** @addtogroup SAI_Exported_Functions_Group2 00793 * @{ 00794 */ 00795 /* Blocking mode: Polling */ 00796 HAL_StatusTypeDef HAL_SAI_Transmit(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size, uint32_t Timeout); 00797 HAL_StatusTypeDef HAL_SAI_Receive(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size, uint32_t Timeout); 00798 00799 /* Non-Blocking mode: Interrupt */ 00800 HAL_StatusTypeDef HAL_SAI_Transmit_IT(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size); 00801 HAL_StatusTypeDef HAL_SAI_Receive_IT(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size); 00802 00803 /* Non-Blocking mode: DMA */ 00804 HAL_StatusTypeDef HAL_SAI_Transmit_DMA(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size); 00805 HAL_StatusTypeDef HAL_SAI_Receive_DMA(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size); 00806 HAL_StatusTypeDef HAL_SAI_DMAPause(SAI_HandleTypeDef *hsai); 00807 HAL_StatusTypeDef HAL_SAI_DMAResume(SAI_HandleTypeDef *hsai); 00808 HAL_StatusTypeDef HAL_SAI_DMAStop(SAI_HandleTypeDef *hsai); 00809 00810 /* Abort function */ 00811 HAL_StatusTypeDef HAL_SAI_Abort(SAI_HandleTypeDef *hsai); 00812 00813 /* Mute management */ 00814 HAL_StatusTypeDef HAL_SAI_EnableTxMuteMode(SAI_HandleTypeDef *hsai, uint16_t val); 00815 HAL_StatusTypeDef HAL_SAI_DisableTxMuteMode(SAI_HandleTypeDef *hsai); 00816 HAL_StatusTypeDef HAL_SAI_EnableRxMuteMode(SAI_HandleTypeDef *hsai, SAIcallback callback, uint16_t counter); 00817 HAL_StatusTypeDef HAL_SAI_DisableRxMuteMode(SAI_HandleTypeDef *hsai); 00818 00819 /* SAI IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */ 00820 void HAL_SAI_IRQHandler(SAI_HandleTypeDef *hsai); 00821 void HAL_SAI_TxHalfCpltCallback(SAI_HandleTypeDef *hsai); 00822 void HAL_SAI_TxCpltCallback(SAI_HandleTypeDef *hsai); 00823 void HAL_SAI_RxHalfCpltCallback(SAI_HandleTypeDef *hsai); 00824 void HAL_SAI_RxCpltCallback(SAI_HandleTypeDef *hsai); 00825 void HAL_SAI_ErrorCallback(SAI_HandleTypeDef *hsai); 00826 /** 00827 * @} 00828 */ 00829 00830 /** @addtogroup SAI_Exported_Functions_Group3 00831 * @{ 00832 */ 00833 /* Peripheral State functions ************************************************/ 00834 HAL_SAI_StateTypeDef HAL_SAI_GetState(SAI_HandleTypeDef *hsai); 00835 uint32_t HAL_SAI_GetError(SAI_HandleTypeDef *hsai); 00836 /** 00837 * @} 00838 */ 00839 00840 /** 00841 * @} 00842 */ 00843 00844 /* Private macros ------------------------------------------------------------*/ 00845 /** @addtogroup SAI_Private_Macros 00846 * @{ 00847 */ 00848 #define IS_SAI_BLOCK_SYNCEXT(STATE) (((STATE) == SAI_SYNCEXT_DISABLE) ||\ 00849 ((STATE) == SAI_SYNCEXT_OUTBLOCKA_ENABLE) ||\ 00850 ((STATE) == SAI_SYNCEXT_OUTBLOCKB_ENABLE)) 00851 00852 #define IS_SAI_SUPPORTED_PROTOCOL(PROTOCOL) (((PROTOCOL) == SAI_I2S_STANDARD) ||\ 00853 ((PROTOCOL) == SAI_I2S_MSBJUSTIFIED) ||\ 00854 ((PROTOCOL) == SAI_I2S_LSBJUSTIFIED) ||\ 00855 ((PROTOCOL) == SAI_PCM_LONG) ||\ 00856 ((PROTOCOL) == SAI_PCM_SHORT)) 00857 00858 #define IS_SAI_PROTOCOL_DATASIZE(DATASIZE) (((DATASIZE) == SAI_PROTOCOL_DATASIZE_16BIT) ||\ 00859 ((DATASIZE) == SAI_PROTOCOL_DATASIZE_16BITEXTENDED) ||\ 00860 ((DATASIZE) == SAI_PROTOCOL_DATASIZE_24BIT) ||\ 00861 ((DATASIZE) == SAI_PROTOCOL_DATASIZE_32BIT)) 00862 00863 #define IS_SAI_AUDIO_FREQUENCY(AUDIO) (((AUDIO) == SAI_AUDIO_FREQUENCY_192K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_96K) || \ 00864 ((AUDIO) == SAI_AUDIO_FREQUENCY_48K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_44K) || \ 00865 ((AUDIO) == SAI_AUDIO_FREQUENCY_32K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_22K) || \ 00866 ((AUDIO) == SAI_AUDIO_FREQUENCY_16K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_11K) || \ 00867 ((AUDIO) == SAI_AUDIO_FREQUENCY_8K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_MCKDIV)) 00868 00869 #if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 00870 #define IS_SAI_BLOCK_MCK_OVERSAMPLING(VALUE) (((VALUE) == SAI_MCK_OVERSAMPLING_DISABLE) || \ 00871 ((VALUE) == SAI_MCK_OVERSAMPLING_ENABLE)) 00872 00873 #define IS_SAI_PDM_MIC_PAIRS_NUMBER(VALUE) ((1U <= (VALUE)) && ((VALUE) <= 3U)) 00874 00875 #define IS_SAI_PDM_CLOCK_ENABLE(CLOCK) (((CLOCK) != 0U) && \ 00876 (((CLOCK) & ~(SAI_PDM_CLOCK1_ENABLE | SAI_PDM_CLOCK2_ENABLE)) == 0U)) 00877 #endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ 00878 00879 #define IS_SAI_BLOCK_MODE(MODE) (((MODE) == SAI_MODEMASTER_TX) || \ 00880 ((MODE) == SAI_MODEMASTER_RX) || \ 00881 ((MODE) == SAI_MODESLAVE_TX) || \ 00882 ((MODE) == SAI_MODESLAVE_RX)) 00883 00884 #define IS_SAI_BLOCK_PROTOCOL(PROTOCOL) (((PROTOCOL) == SAI_FREE_PROTOCOL) || \ 00885 ((PROTOCOL) == SAI_AC97_PROTOCOL) || \ 00886 ((PROTOCOL) == SAI_SPDIF_PROTOCOL)) 00887 00888 #define IS_SAI_BLOCK_DATASIZE(DATASIZE) (((DATASIZE) == SAI_DATASIZE_8) || \ 00889 ((DATASIZE) == SAI_DATASIZE_10) || \ 00890 ((DATASIZE) == SAI_DATASIZE_16) || \ 00891 ((DATASIZE) == SAI_DATASIZE_20) || \ 00892 ((DATASIZE) == SAI_DATASIZE_24) || \ 00893 ((DATASIZE) == SAI_DATASIZE_32)) 00894 00895 #define IS_SAI_BLOCK_FIRST_BIT(BIT) (((BIT) == SAI_FIRSTBIT_MSB) || \ 00896 ((BIT) == SAI_FIRSTBIT_LSB)) 00897 00898 #define IS_SAI_BLOCK_CLOCK_STROBING(CLOCK) (((CLOCK) == SAI_CLOCKSTROBING_FALLINGEDGE) || \ 00899 ((CLOCK) == SAI_CLOCKSTROBING_RISINGEDGE)) 00900 00901 #define IS_SAI_BLOCK_SYNCHRO(SYNCHRO) (((SYNCHRO) == SAI_ASYNCHRONOUS) || \ 00902 ((SYNCHRO) == SAI_SYNCHRONOUS) || \ 00903 ((SYNCHRO) == SAI_SYNCHRONOUS_EXT_SAI1) || \ 00904 ((SYNCHRO) == SAI_SYNCHRONOUS_EXT_SAI2)) 00905 00906 #define IS_SAI_BLOCK_OUTPUT_DRIVE(DRIVE) (((DRIVE) == SAI_OUTPUTDRIVE_DISABLE) || \ 00907 ((DRIVE) == SAI_OUTPUTDRIVE_ENABLE)) 00908 00909 #define IS_SAI_BLOCK_NODIVIDER(NODIVIDER) (((NODIVIDER) == SAI_MASTERDIVIDER_ENABLE) || \ 00910 ((NODIVIDER) == SAI_MASTERDIVIDER_DISABLE)) 00911 00912 #define IS_SAI_BLOCK_MUTE_COUNTER(COUNTER) ((COUNTER) <= 63U) 00913 00914 #define IS_SAI_BLOCK_MUTE_VALUE(VALUE) (((VALUE) == SAI_ZERO_VALUE) || \ 00915 ((VALUE) == SAI_LAST_SENT_VALUE)) 00916 00917 #define IS_SAI_BLOCK_COMPANDING_MODE(MODE) (((MODE) == SAI_NOCOMPANDING) || \ 00918 ((MODE) == SAI_ULAW_1CPL_COMPANDING) || \ 00919 ((MODE) == SAI_ALAW_1CPL_COMPANDING) || \ 00920 ((MODE) == SAI_ULAW_2CPL_COMPANDING) || \ 00921 ((MODE) == SAI_ALAW_2CPL_COMPANDING)) 00922 00923 #define IS_SAI_BLOCK_FIFO_THRESHOLD(THRESHOLD) (((THRESHOLD) == SAI_FIFOTHRESHOLD_EMPTY) || \ 00924 ((THRESHOLD) == SAI_FIFOTHRESHOLD_1QF) || \ 00925 ((THRESHOLD) == SAI_FIFOTHRESHOLD_HF) || \ 00926 ((THRESHOLD) == SAI_FIFOTHRESHOLD_3QF) || \ 00927 ((THRESHOLD) == SAI_FIFOTHRESHOLD_FULL)) 00928 00929 #define IS_SAI_BLOCK_TRISTATE_MANAGEMENT(STATE) (((STATE) == SAI_OUTPUT_NOTRELEASED) ||\ 00930 ((STATE) == SAI_OUTPUT_RELEASED)) 00931 00932 #define IS_SAI_MONO_STEREO_MODE(MODE) (((MODE) == SAI_MONOMODE) ||\ 00933 ((MODE) == SAI_STEREOMODE)) 00934 00935 #define IS_SAI_SLOT_ACTIVE(ACTIVE) ((ACTIVE) <= SAI_SLOTACTIVE_ALL) 00936 00937 #define IS_SAI_BLOCK_SLOT_NUMBER(NUMBER) ((1U <= (NUMBER)) && ((NUMBER) <= 16U)) 00938 00939 #define IS_SAI_BLOCK_SLOT_SIZE(SIZE) (((SIZE) == SAI_SLOTSIZE_DATASIZE) || \ 00940 ((SIZE) == SAI_SLOTSIZE_16B) || \ 00941 ((SIZE) == SAI_SLOTSIZE_32B)) 00942 00943 #define IS_SAI_BLOCK_FIRSTBIT_OFFSET(OFFSET) ((OFFSET) <= 24U) 00944 00945 #define IS_SAI_BLOCK_FS_OFFSET(OFFSET) (((OFFSET) == SAI_FS_FIRSTBIT) || \ 00946 ((OFFSET) == SAI_FS_BEFOREFIRSTBIT)) 00947 00948 #define IS_SAI_BLOCK_FS_POLARITY(POLARITY) (((POLARITY) == SAI_FS_ACTIVE_LOW) || \ 00949 ((POLARITY) == SAI_FS_ACTIVE_HIGH)) 00950 00951 #define IS_SAI_BLOCK_FS_DEFINITION(DEFINITION) (((DEFINITION) == SAI_FS_STARTFRAME) || \ 00952 ((DEFINITION) == SAI_FS_CHANNEL_IDENTIFICATION)) 00953 00954 #define IS_SAI_BLOCK_MASTER_DIVIDER(DIVIDER) ((DIVIDER) <= 15) 00955 00956 #define IS_SAI_BLOCK_FRAME_LENGTH(LENGTH) ((8U <= (LENGTH)) && ((LENGTH) <= 256U)) 00957 00958 #define IS_SAI_BLOCK_ACTIVE_FRAME(LENGTH) ((1U <= (LENGTH)) && ((LENGTH) <= 128U)) 00959 00960 /** 00961 * @} 00962 */ 00963 00964 /* Private functions ---------------------------------------------------------*/ 00965 /** @defgroup SAI_Private_Functions SAI Private Functions 00966 * @{ 00967 */ 00968 00969 /** 00970 * @} 00971 */ 00972 00973 /** 00974 * @} 00975 */ 00976 00977 /** 00978 * @} 00979 */ 00980 00981 #ifdef __cplusplus 00982 } 00983 #endif 00984 00985 #endif /* STM32L4xx_HAL_SAI_H */ 00986 00987 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/