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STM32L486xx HAL User Manual
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32l4xx_hal_pcd.h 00004 * @author MCD Application Team 00005 * @brief Header file of PCD HAL module. 00006 ****************************************************************************** 00007 * @attention 00008 * 00009 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> 00010 * 00011 * Redistribution and use in source and binary forms, with or without modification, 00012 * are permitted provided that the following conditions are met: 00013 * 1. Redistributions of source code must retain the above copyright notice, 00014 * this list of conditions and the following disclaimer. 00015 * 2. Redistributions in binary form must reproduce the above copyright notice, 00016 * this list of conditions and the following disclaimer in the documentation 00017 * and/or other materials provided with the distribution. 00018 * 3. Neither the name of STMicroelectronics nor the names of its contributors 00019 * may be used to endorse or promote products derived from this software 00020 * without specific prior written permission. 00021 * 00022 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 00023 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 00024 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 00025 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 00026 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 00027 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 00028 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00029 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 00030 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 00031 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00032 * 00033 ****************************************************************************** 00034 */ 00035 00036 /* Define to prevent recursive inclusion -------------------------------------*/ 00037 #ifndef __STM32L4xx_HAL_PCD_H 00038 #define __STM32L4xx_HAL_PCD_H 00039 00040 #ifdef __cplusplus 00041 extern "C" { 00042 #endif 00043 00044 /* Includes ------------------------------------------------------------------*/ 00045 #include "stm32l4xx_ll_usb.h" 00046 00047 #if defined (USB) || defined (USB_OTG_FS) || defined (USB_OTG_HS) 00048 00049 /** @addtogroup STM32L4xx_HAL_Driver 00050 * @{ 00051 */ 00052 00053 /** @addtogroup PCD 00054 * @{ 00055 */ 00056 00057 /* Exported types ------------------------------------------------------------*/ 00058 /** @defgroup PCD_Exported_Types PCD Exported Types 00059 * @{ 00060 */ 00061 00062 /** 00063 * @brief PCD State structure definition 00064 */ 00065 typedef enum 00066 { 00067 HAL_PCD_STATE_RESET = 0x00, 00068 HAL_PCD_STATE_READY = 0x01, 00069 HAL_PCD_STATE_ERROR = 0x02, 00070 HAL_PCD_STATE_BUSY = 0x03, 00071 HAL_PCD_STATE_TIMEOUT = 0x04 00072 } PCD_StateTypeDef; 00073 00074 /* Device LPM suspend state */ 00075 typedef enum 00076 { 00077 LPM_L0 = 0x00, /* on */ 00078 LPM_L1 = 0x01, /* LPM L1 sleep */ 00079 LPM_L2 = 0x02, /* suspend */ 00080 LPM_L3 = 0x03, /* off */ 00081 } PCD_LPM_StateTypeDef; 00082 00083 typedef enum 00084 { 00085 PCD_LPM_L0_ACTIVE = 0x00, /* on */ 00086 PCD_LPM_L1_ACTIVE = 0x01, /* LPM L1 sleep */ 00087 } PCD_LPM_MsgTypeDef; 00088 00089 typedef enum 00090 { 00091 PCD_BCD_ERROR = 0xFF, 00092 PCD_BCD_CONTACT_DETECTION = 0xFE, 00093 PCD_BCD_STD_DOWNSTREAM_PORT = 0xFD, 00094 PCD_BCD_CHARGING_DOWNSTREAM_PORT = 0xFC, 00095 PCD_BCD_DEDICATED_CHARGING_PORT = 0xFB, 00096 PCD_BCD_DISCOVERY_COMPLETED = 0x00, 00097 00098 } PCD_BCD_MsgTypeDef; 00099 00100 #if defined (USB) 00101 /** 00102 * @brief PCD double buffered endpoint direction 00103 */ 00104 typedef enum 00105 { 00106 PCD_EP_DBUF_OUT, 00107 PCD_EP_DBUF_IN, 00108 PCD_EP_DBUF_ERR, 00109 } PCD_EP_DBUF_DIR; 00110 00111 /** 00112 * @brief PCD endpoint buffer number 00113 */ 00114 typedef enum 00115 { 00116 PCD_EP_NOBUF, 00117 PCD_EP_BUF0, 00118 PCD_EP_BUF1 00119 } PCD_EP_BUF_NUM; 00120 #endif /* USB */ 00121 00122 #if defined (USB_OTG_FS) || defined (USB_OTG_HS) 00123 typedef USB_OTG_GlobalTypeDef PCD_TypeDef; 00124 typedef USB_OTG_CfgTypeDef PCD_InitTypeDef; 00125 typedef USB_OTG_EPTypeDef PCD_EPTypeDef; 00126 #endif /* USB_OTG_FS || USB_OTG_HS */ 00127 00128 #if defined (USB) 00129 typedef USB_TypeDef PCD_TypeDef; 00130 typedef USB_CfgTypeDef PCD_InitTypeDef; 00131 typedef USB_EPTypeDef PCD_EPTypeDef; 00132 #endif /* USB */ 00133 00134 /** 00135 * @brief PCD Handle Structure definition 00136 */ 00137 typedef struct __PCD_HandleTypeDef 00138 { 00139 PCD_TypeDef *Instance; /*!< Register base address */ 00140 PCD_InitTypeDef Init; /*!< PCD required parameters */ 00141 __IO uint8_t USB_Address; /*!< USB Address */ 00142 PCD_EPTypeDef IN_ep[16]; /*!< IN endpoint parameters */ 00143 PCD_EPTypeDef OUT_ep[16]; /*!< OUT endpoint parameters */ 00144 HAL_LockTypeDef Lock; /*!< PCD peripheral status */ 00145 __IO PCD_StateTypeDef State; /*!< PCD communication state */ 00146 __IO uint32_t ErrorCode; /*!< PCD Error code */ 00147 uint32_t Setup[12]; /*!< Setup packet buffer */ 00148 PCD_LPM_StateTypeDef LPM_State; /*!< LPM State */ 00149 uint32_t BESL; 00150 00151 00152 uint32_t lpm_active; /*!< Enable or disable the Link Power Management . 00153 This parameter can be set to ENABLE or DISABLE */ 00154 00155 uint32_t battery_charging_active; /*!< Enable or disable Battery charging. 00156 This parameter can be set to ENABLE or DISABLE */ 00157 void *pData; /*!< Pointer to upper stack Handler */ 00158 00159 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) 00160 void (* SOFCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD SOF callback */ 00161 void (* SetupStageCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Setup Stage callback */ 00162 void (* ResetCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Reset callback */ 00163 void (* SuspendCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Suspend callback */ 00164 void (* ResumeCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Resume callback */ 00165 void (* ConnectCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Connect callback */ 00166 void (* DisconnectCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Disconnect callback */ 00167 00168 void (* DataOutStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD Data OUT Stage callback */ 00169 void (* DataInStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD Data IN Stage callback */ 00170 void (* ISOOUTIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD ISO OUT Incomplete callback */ 00171 void (* ISOINIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD ISO IN Incomplete callback */ 00172 void (* BCDCallback)(struct __PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg); /*!< USB OTG PCD BCD callback */ 00173 void (* LPMCallback)(struct __PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg); /*!< USB OTG PCD LPM callback */ 00174 00175 void (* MspInitCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Msp Init callback */ 00176 void (* MspDeInitCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Msp DeInit callback */ 00177 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ 00178 } PCD_HandleTypeDef; 00179 00180 /** 00181 * @} 00182 */ 00183 00184 /* Include PCD HAL Extended module */ 00185 #include "stm32l4xx_hal_pcd_ex.h" 00186 00187 /* Exported constants --------------------------------------------------------*/ 00188 /** @defgroup PCD_Exported_Constants PCD Exported Constants 00189 * @{ 00190 */ 00191 00192 /** @defgroup PCD_Speed PCD Speed 00193 * @{ 00194 */ 00195 #if defined (USB_OTG_HS) 00196 #define PCD_SPEED_HIGH 0U 00197 #define PCD_SPEED_HIGH_IN_FULL 1U 00198 #endif 00199 #define PCD_SPEED_FULL 2U 00200 /** 00201 * @} 00202 */ 00203 00204 /** @defgroup PCD_PHY_Module PCD PHY Module 00205 * @{ 00206 */ 00207 #define PCD_PHY_ULPI 1U 00208 #define PCD_PHY_EMBEDDED 2U 00209 #define PCD_PHY_UTMI 3U 00210 /** 00211 * @} 00212 */ 00213 00214 /** @defgroup PCD_Turnaround_Timeout Turnaround Timeout Value 00215 * @{ 00216 */ 00217 #ifndef USBD_FS_TRDT_VALUE 00218 #define USBD_FS_TRDT_VALUE 5U 00219 #endif /* USBD_HS_TRDT_VALUE */ 00220 /** 00221 * @} 00222 */ 00223 00224 /** @defgroup PCD_Error_Code_definition PCD Error Code definition 00225 * @brief PCD Error Code definition 00226 * @{ 00227 */ 00228 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) 00229 #define HAL_PCD_ERROR_INVALID_CALLBACK (0x00000010U) /*!< Invalid Callback error */ 00230 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ 00231 00232 /** 00233 * @} 00234 */ 00235 00236 /** 00237 * @} 00238 */ 00239 00240 /* Exported macros -----------------------------------------------------------*/ 00241 /** @defgroup PCD_Exported_Macros PCD Exported Macros 00242 * @brief macros to handle interrupts and specific clock configurations 00243 * @{ 00244 */ 00245 #if defined (USB_OTG_FS) || defined (USB_OTG_HS) 00246 #define __HAL_PCD_ENABLE(__HANDLE__) (void)USB_EnableGlobalInt ((__HANDLE__)->Instance) 00247 #define __HAL_PCD_DISABLE(__HANDLE__) (void)USB_DisableGlobalInt ((__HANDLE__)->Instance) 00248 00249 #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__)) 00250 #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->GINTSTS) &= (__INTERRUPT__)) 00251 #define __HAL_PCD_IS_INVALID_INTERRUPT(__HANDLE__) (USB_ReadInterrupts((__HANDLE__)->Instance) == 0U) 00252 00253 00254 #define __HAL_PCD_UNGATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) &= \ 00255 ~(USB_OTG_PCGCCTL_STOPCLK) 00256 00257 #define __HAL_PCD_GATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) |= USB_OTG_PCGCCTL_STOPCLK 00258 00259 #define __HAL_PCD_IS_PHY_SUSPENDED(__HANDLE__) ((*(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE)) & 0x10U) 00260 00261 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR1 |= USB_OTG_FS_WAKEUP_EXTI_LINE 00262 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR1 &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE) 00263 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_GET_FLAG() EXTI->PR1 & (USB_OTG_FS_WAKEUP_EXTI_LINE) 00264 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR1 = USB_OTG_FS_WAKEUP_EXTI_LINE 00265 00266 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_EDGE() \ 00267 do { \ 00268 EXTI->FTSR1 &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE); \ 00269 EXTI->RTSR1 |= USB_OTG_FS_WAKEUP_EXTI_LINE; \ 00270 } while(0U) 00271 #endif /* USB_OTG_FS || USB_OTG_HS */ 00272 00273 #if defined (USB) 00274 #define __HAL_PCD_ENABLE(__HANDLE__) (void)USB_EnableGlobalInt ((__HANDLE__)->Instance) 00275 #define __HAL_PCD_DISABLE(__HANDLE__) (void)USB_DisableGlobalInt ((__HANDLE__)->Instance) 00276 #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__)) 00277 #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->ISTR) &= ~(__INTERRUPT__)) 00278 00279 #define __HAL_USB_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR1 |= USB_WAKEUP_EXTI_LINE 00280 #define __HAL_USB_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR1 &= ~(USB_WAKEUP_EXTI_LINE) 00281 #define __HAL_USB_WAKEUP_EXTI_GET_FLAG() EXTI->PR1 & (USB_WAKEUP_EXTI_LINE) 00282 #define __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR1 = USB_WAKEUP_EXTI_LINE 00283 00284 #define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE() \ 00285 do { \ 00286 EXTI->FTSR1 &= ~(USB_WAKEUP_EXTI_LINE); \ 00287 EXTI->RTSR1 |= USB_WAKEUP_EXTI_LINE; \ 00288 } while(0U) 00289 00290 #endif /* USB */ 00291 00292 /** 00293 * @} 00294 */ 00295 00296 /* Exported functions --------------------------------------------------------*/ 00297 /** @addtogroup PCD_Exported_Functions PCD Exported Functions 00298 * @{ 00299 */ 00300 00301 /* Initialization/de-initialization functions ********************************/ 00302 /** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions 00303 * @{ 00304 */ 00305 HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd); 00306 HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd); 00307 void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd); 00308 void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd); 00309 00310 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) 00311 /** @defgroup HAL_PCD_Callback_ID_enumeration_definition HAL USB OTG PCD Callback ID enumeration definition 00312 * @brief HAL USB OTG PCD Callback ID enumeration definition 00313 * @{ 00314 */ 00315 typedef enum 00316 { 00317 HAL_PCD_SOF_CB_ID = 0x01, /*!< USB PCD SOF callback ID */ 00318 HAL_PCD_SETUPSTAGE_CB_ID = 0x02, /*!< USB PCD Setup Stage callback ID */ 00319 HAL_PCD_RESET_CB_ID = 0x03, /*!< USB PCD Reset callback ID */ 00320 HAL_PCD_SUSPEND_CB_ID = 0x04, /*!< USB PCD Suspend callback ID */ 00321 HAL_PCD_RESUME_CB_ID = 0x05, /*!< USB PCD Resume callback ID */ 00322 HAL_PCD_CONNECT_CB_ID = 0x06, /*!< USB PCD Connect callback ID */ 00323 HAL_PCD_DISCONNECT_CB_ID = 0x07, /*!< USB PCD Disconnect callback ID */ 00324 00325 HAL_PCD_MSPINIT_CB_ID = 0x08, /*!< USB PCD MspInit callback ID */ 00326 HAL_PCD_MSPDEINIT_CB_ID = 0x09 /*!< USB PCD MspDeInit callback ID */ 00327 00328 } HAL_PCD_CallbackIDTypeDef; 00329 /** 00330 * @} 00331 */ 00332 00333 /** @defgroup HAL_PCD_Callback_pointer_definition HAL USB OTG PCD Callback pointer definition 00334 * @brief HAL USB OTG PCD Callback pointer definition 00335 * @{ 00336 */ 00337 00338 typedef void (*pPCD_CallbackTypeDef)(PCD_HandleTypeDef *hpcd); /*!< pointer to a common USB OTG PCD callback function */ 00339 typedef void (*pPCD_DataOutStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD Data OUT Stage callback */ 00340 typedef void (*pPCD_DataInStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD Data IN Stage callback */ 00341 typedef void (*pPCD_IsoOutIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD ISO OUT Incomplete callback */ 00342 typedef void (*pPCD_IsoInIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD ISO IN Incomplete callback */ 00343 typedef void (*pPCD_LpmCallbackTypeDef)(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg); /*!< pointer to USB OTG PCD LPM callback */ 00344 typedef void (*pPCD_BcdCallbackTypeDef)(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg); /*!< pointer to USB OTG PCD BCD callback */ 00345 00346 /** 00347 * @} 00348 */ 00349 00350 HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID, pPCD_CallbackTypeDef pCallback); 00351 HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID); 00352 00353 HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd, pPCD_DataOutStageCallbackTypeDef pCallback); 00354 HAL_StatusTypeDef HAL_PCD_UnRegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd); 00355 00356 HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd, pPCD_DataInStageCallbackTypeDef pCallback); 00357 HAL_StatusTypeDef HAL_PCD_UnRegisterDataInStageCallback(PCD_HandleTypeDef *hpcd); 00358 00359 HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd, pPCD_IsoOutIncpltCallbackTypeDef pCallback); 00360 HAL_StatusTypeDef HAL_PCD_UnRegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd); 00361 00362 HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd, pPCD_IsoInIncpltCallbackTypeDef pCallback); 00363 HAL_StatusTypeDef HAL_PCD_UnRegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd); 00364 00365 HAL_StatusTypeDef HAL_PCD_RegisterBcdCallback(PCD_HandleTypeDef *hpcd, pPCD_BcdCallbackTypeDef pCallback); 00366 HAL_StatusTypeDef HAL_PCD_UnRegisterBcdCallback(PCD_HandleTypeDef *hpcd); 00367 00368 HAL_StatusTypeDef HAL_PCD_RegisterLpmCallback(PCD_HandleTypeDef *hpcd, pPCD_LpmCallbackTypeDef pCallback); 00369 HAL_StatusTypeDef HAL_PCD_UnRegisterLpmCallback(PCD_HandleTypeDef *hpcd); 00370 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ 00371 /** 00372 * @} 00373 */ 00374 00375 /* I/O operation functions ***************************************************/ 00376 /* Non-Blocking mode: Interrupt */ 00377 /** @addtogroup PCD_Exported_Functions_Group2 Input and Output operation functions 00378 * @{ 00379 */ 00380 HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd); 00381 HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd); 00382 void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd); 00383 00384 void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd); 00385 void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd); 00386 void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd); 00387 void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd); 00388 void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd); 00389 void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd); 00390 void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd); 00391 00392 void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); 00393 void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); 00394 void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); 00395 void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); 00396 /** 00397 * @} 00398 */ 00399 00400 /* Peripheral Control functions **********************************************/ 00401 /** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions 00402 * @{ 00403 */ 00404 HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd); 00405 HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd); 00406 HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address); 00407 HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type); 00408 HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); 00409 HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); 00410 HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); 00411 uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); 00412 HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); 00413 HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); 00414 HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); 00415 HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd); 00416 HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd); 00417 /** 00418 * @} 00419 */ 00420 00421 /* Peripheral State functions ************************************************/ 00422 /** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions 00423 * @{ 00424 */ 00425 PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd); 00426 /** 00427 * @} 00428 */ 00429 00430 /** 00431 * @} 00432 */ 00433 00434 /* Private constants ---------------------------------------------------------*/ 00435 /** @defgroup PCD_Private_Constants PCD Private Constants 00436 * @{ 00437 */ 00438 /** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt 00439 * @{ 00440 */ 00441 #if defined (USB_OTG_FS) || defined (USB_OTG_HS) 00442 #define USB_OTG_FS_WAKEUP_EXTI_RISING_EDGE 0x08U 00443 #define USB_OTG_FS_WAKEUP_EXTI_FALLING_EDGE 0x0CU 00444 #define USB_OTG_FS_WAKEUP_EXTI_RISING_FALLING_EDGE 0x10U 00445 00446 #ifndef LL_EXTI_LINE_18 00447 #define LL_EXTI_LINE_18 0x00040000U 00448 #endif 00449 00450 #ifndef LL_EXTI_LINE_20 00451 #define LL_EXTI_LINE_20 0x00100000U 00452 #endif 00453 00454 #define USB_OTG_FS_WAKEUP_EXTI_LINE LL_EXTI_LINE_18 /*!< External interrupt line 17 Connected to the USB EXTI Line */ 00455 #endif /* USB_OTG_FS || USB_OTG_HS */ 00456 00457 #if defined (USB) 00458 #ifndef LL_EXTI_LINE_18 00459 #define LL_EXTI_LINE_18 0x00040000U 00460 #endif 00461 00462 #define USB_WAKEUP_EXTI_LINE LL_EXTI_LINE_18 /*!< External interrupt line 17Connected to the USB EXTI Line */ 00463 #endif /* USB */ 00464 00465 /** 00466 * @} 00467 */ 00468 00469 #if defined (USB) 00470 /** @defgroup PCD_EP0_MPS PCD EP0 MPS 00471 * @{ 00472 */ 00473 #define PCD_EP0MPS_64 DEP0CTL_MPS_64 00474 #define PCD_EP0MPS_32 DEP0CTL_MPS_32 00475 #define PCD_EP0MPS_16 DEP0CTL_MPS_16 00476 #define PCD_EP0MPS_08 DEP0CTL_MPS_8 00477 /** 00478 * @} 00479 */ 00480 00481 /** @defgroup PCD_ENDP PCD ENDP 00482 * @{ 00483 */ 00484 #define PCD_ENDP0 0U 00485 #define PCD_ENDP1 1U 00486 #define PCD_ENDP2 2U 00487 #define PCD_ENDP3 3U 00488 #define PCD_ENDP4 4U 00489 #define PCD_ENDP5 5U 00490 #define PCD_ENDP6 6U 00491 #define PCD_ENDP7 7U 00492 /** 00493 * @} 00494 */ 00495 00496 /** @defgroup PCD_ENDP_Kind PCD Endpoint Kind 00497 * @{ 00498 */ 00499 #define PCD_SNG_BUF 0U 00500 #define PCD_DBL_BUF 1U 00501 /** 00502 * @} 00503 */ 00504 #endif /* USB */ 00505 /** 00506 * @} 00507 */ 00508 00509 /* Private macros ------------------------------------------------------------*/ 00510 /** @defgroup PCD_Private_Macros PCD Private Macros 00511 * @{ 00512 */ 00513 #if defined (USB) 00514 /* SetENDPOINT */ 00515 #define PCD_SET_ENDPOINT(USBx, bEpNum, wRegValue) (*(&(USBx)->EP0R + ((bEpNum) * 2U)) = (uint16_t)(wRegValue)) 00516 00517 /* GetENDPOINT */ 00518 #define PCD_GET_ENDPOINT(USBx, bEpNum) (*(&(USBx)->EP0R + ((bEpNum) * 2U))) 00519 00520 /* ENDPOINT transfer */ 00521 #define USB_EP0StartXfer USB_EPStartXfer 00522 00523 /** 00524 * @brief sets the type in the endpoint register(bits EP_TYPE[1:0]) 00525 * @param USBx USB peripheral instance register address. 00526 * @param bEpNum Endpoint Number. 00527 * @param wType Endpoint Type. 00528 * @retval None 00529 */ 00530 #define PCD_SET_EPTYPE(USBx, bEpNum, wType) (PCD_SET_ENDPOINT((USBx), (bEpNum), \ 00531 ((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_MASK) | (wType)))) 00532 00533 /** 00534 * @brief gets the type in the endpoint register(bits EP_TYPE[1:0]) 00535 * @param USBx USB peripheral instance register address. 00536 * @param bEpNum Endpoint Number. 00537 * @retval Endpoint Type 00538 */ 00539 #define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_FIELD) 00540 00541 /** 00542 * @brief free buffer used from the application realizing it to the line 00543 * toggles bit SW_BUF in the double buffered endpoint register 00544 * @param USBx USB device. 00545 * @param bEpNum, bDir 00546 * @retval None 00547 */ 00548 #define PCD_FreeUserBuffer(USBx, bEpNum, bDir) do { \ 00549 if ((bDir) == 0U) \ 00550 { \ 00551 /* OUT double buffered endpoint */ \ 00552 PCD_TX_DTOG((USBx), (bEpNum)); \ 00553 } \ 00554 else if ((bDir) == 1U) \ 00555 { \ 00556 /* IN double buffered endpoint */ \ 00557 PCD_RX_DTOG((USBx), (bEpNum)); \ 00558 } \ 00559 } while(0) 00560 00561 /** 00562 * @brief gets direction of the double buffered endpoint 00563 * @param USBx USB peripheral instance register address. 00564 * @param bEpNum Endpoint Number. 00565 * @retval EP_DBUF_OUT, EP_DBUF_IN, 00566 * EP_DBUF_ERR if the endpoint counter not yet programmed. 00567 */ 00568 #define PCD_GET_DB_DIR(USBx, bEpNum) do { \ 00569 if ((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum)) & 0xFC00U) != 0U) \ 00570 { \ 00571 return(PCD_EP_DBUF_OUT); \ 00572 } \ 00573 else if (((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x03FFU) != 0U) \ 00574 { \ 00575 return(PCD_EP_DBUF_IN); \ 00576 } \ 00577 else \ 00578 { \ 00579 return(PCD_EP_DBUF_ERR); \ 00580 } \ 00581 } while(0) 00582 00583 /** 00584 * @brief sets the status for tx transfer (bits STAT_TX[1:0]). 00585 * @param USBx USB peripheral instance register address. 00586 * @param bEpNum Endpoint Number. 00587 * @param wState new state 00588 * @retval None 00589 */ 00590 #define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) do { \ 00591 register uint16_t _wRegVal; \ 00592 \ 00593 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK; \ 00594 /* toggle first bit ? */ \ 00595 if ((USB_EPTX_DTOG1 & (wState))!= 0U) \ 00596 { \ 00597 _wRegVal ^= USB_EPTX_DTOG1; \ 00598 } \ 00599 /* toggle second bit ? */ \ 00600 if ((USB_EPTX_DTOG2 & (wState))!= 0U) \ 00601 { \ 00602 _wRegVal ^= USB_EPTX_DTOG2; \ 00603 } \ 00604 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ 00605 } while(0) /* PCD_SET_EP_TX_STATUS */ 00606 00607 /** 00608 * @brief sets the status for rx transfer (bits STAT_TX[1:0]) 00609 * @param USBx USB peripheral instance register address. 00610 * @param bEpNum Endpoint Number. 00611 * @param wState new state 00612 * @retval None 00613 */ 00614 #define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) do { \ 00615 register uint16_t _wRegVal; \ 00616 \ 00617 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK; \ 00618 /* toggle first bit ? */ \ 00619 if ((USB_EPRX_DTOG1 & (wState))!= 0U) \ 00620 { \ 00621 _wRegVal ^= USB_EPRX_DTOG1; \ 00622 } \ 00623 /* toggle second bit ? */ \ 00624 if ((USB_EPRX_DTOG2 & (wState))!= 0U) \ 00625 { \ 00626 _wRegVal ^= USB_EPRX_DTOG2; \ 00627 } \ 00628 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ 00629 } while(0) /* PCD_SET_EP_RX_STATUS */ 00630 00631 /** 00632 * @brief sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0]) 00633 * @param USBx USB peripheral instance register address. 00634 * @param bEpNum Endpoint Number. 00635 * @param wStaterx new state. 00636 * @param wStatetx new state. 00637 * @retval None 00638 */ 00639 #define PCD_SET_EP_TXRX_STATUS(USBx, bEpNum, wStaterx, wStatetx) do { \ 00640 register uint16_t _wRegVal; \ 00641 \ 00642 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK | USB_EPTX_STAT); \ 00643 /* toggle first bit ? */ \ 00644 if ((USB_EPRX_DTOG1 & (wStaterx))!= 0U) \ 00645 { \ 00646 _wRegVal ^= USB_EPRX_DTOG1; \ 00647 } \ 00648 /* toggle second bit ? */ \ 00649 if ((USB_EPRX_DTOG2 & (wStaterx))!= 0U) \ 00650 { \ 00651 _wRegVal ^= USB_EPRX_DTOG2; \ 00652 } \ 00653 /* toggle first bit ? */ \ 00654 if ((USB_EPTX_DTOG1 & (wStatetx))!= 0U) \ 00655 { \ 00656 _wRegVal ^= USB_EPTX_DTOG1; \ 00657 } \ 00658 /* toggle second bit ? */ \ 00659 if ((USB_EPTX_DTOG2 & (wStatetx))!= 0U) \ 00660 { \ 00661 _wRegVal ^= USB_EPTX_DTOG2; \ 00662 } \ 00663 \ 00664 PCD_SET_ENDPOINT((USBx), (bEpNum), _wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX); \ 00665 } while(0) /* PCD_SET_EP_TXRX_STATUS */ 00666 00667 /** 00668 * @brief gets the status for tx/rx transfer (bits STAT_TX[1:0] 00669 * /STAT_RX[1:0]) 00670 * @param USBx USB peripheral instance register address. 00671 * @param bEpNum Endpoint Number. 00672 * @retval status 00673 */ 00674 #define PCD_GET_EP_TX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_STAT) 00675 #define PCD_GET_EP_RX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_STAT) 00676 00677 /** 00678 * @brief sets directly the VALID tx/rx-status into the endpoint register 00679 * @param USBx USB peripheral instance register address. 00680 * @param bEpNum Endpoint Number. 00681 * @retval None 00682 */ 00683 #define PCD_SET_EP_TX_VALID(USBx, bEpNum) (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID)) 00684 #define PCD_SET_EP_RX_VALID(USBx, bEpNum) (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID)) 00685 00686 /** 00687 * @brief checks stall condition in an endpoint. 00688 * @param USBx USB peripheral instance register address. 00689 * @param bEpNum Endpoint Number. 00690 * @retval TRUE = endpoint in stall condition. 00691 */ 00692 #define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) \ 00693 == USB_EP_TX_STALL) 00694 #define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) \ 00695 == USB_EP_RX_STALL) 00696 00697 /** 00698 * @brief set & clear EP_KIND bit. 00699 * @param USBx USB peripheral instance register address. 00700 * @param bEpNum Endpoint Number. 00701 * @retval None 00702 */ 00703 #define PCD_SET_EP_KIND(USBx, bEpNum) do { \ 00704 register uint16_t _wRegVal; \ 00705 \ 00706 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \ 00707 \ 00708 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_KIND)); \ 00709 } while(0) /* PCD_SET_EP_KIND */ 00710 00711 #define PCD_CLEAR_EP_KIND(USBx, bEpNum) do { \ 00712 register uint16_t _wRegVal; \ 00713 \ 00714 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK; \ 00715 \ 00716 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ 00717 } while(0) /* PCD_CLEAR_EP_KIND */ 00718 00719 /** 00720 * @brief Sets/clears directly STATUS_OUT bit in the endpoint register. 00721 * @param USBx USB peripheral instance register address. 00722 * @param bEpNum Endpoint Number. 00723 * @retval None 00724 */ 00725 #define PCD_SET_OUT_STATUS(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum)) 00726 #define PCD_CLEAR_OUT_STATUS(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum)) 00727 00728 /** 00729 * @brief Sets/clears directly EP_KIND bit in the endpoint register. 00730 * @param USBx USB peripheral instance register address. 00731 * @param bEpNum Endpoint Number. 00732 * @retval None 00733 */ 00734 #define PCD_SET_EP_DBUF(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum)) 00735 #define PCD_CLEAR_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum)) 00736 00737 /** 00738 * @brief Clears bit CTR_RX / CTR_TX in the endpoint register. 00739 * @param USBx USB peripheral instance register address. 00740 * @param bEpNum Endpoint Number. 00741 * @retval None 00742 */ 00743 #define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) do { \ 00744 register uint16_t _wRegVal; \ 00745 \ 00746 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0x7FFFU & USB_EPREG_MASK); \ 00747 \ 00748 PCD_SET_ENDPOINT((USBx), (bEpNum), _wRegVal); \ 00749 } while(0) /* PCD_CLEAR_RX_EP_CTR */ 00750 00751 #define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) do { \ 00752 register uint16_t _wRegVal; \ 00753 \ 00754 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0xFF7FU & USB_EPREG_MASK); \ 00755 \ 00756 PCD_SET_ENDPOINT((USBx), (bEpNum), _wRegVal); \ 00757 } while(0) /* PCD_CLEAR_TX_EP_CTR */ 00758 00759 /** 00760 * @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register. 00761 * @param USBx USB peripheral instance register address. 00762 * @param bEpNum Endpoint Number. 00763 * @retval None 00764 */ 00765 #define PCD_RX_DTOG(USBx, bEpNum) do { \ 00766 register uint16_t _wEPVal; \ 00767 \ 00768 _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \ 00769 \ 00770 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_RX)); \ 00771 } while(0) /* PCD_RX_DTOG */ 00772 00773 #define PCD_TX_DTOG(USBx, bEpNum) do { \ 00774 register uint16_t _wEPVal; \ 00775 \ 00776 _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \ 00777 \ 00778 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_TX)); \ 00779 } while(0) /* PCD_TX_DTOG */ 00780 /** 00781 * @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register. 00782 * @param USBx USB peripheral instance register address. 00783 * @param bEpNum Endpoint Number. 00784 * @retval None 00785 */ 00786 #define PCD_CLEAR_RX_DTOG(USBx, bEpNum) do { \ 00787 register uint16_t _wRegVal; \ 00788 \ 00789 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \ 00790 \ 00791 if ((_wRegVal & USB_EP_DTOG_RX) != 0U)\ 00792 { \ 00793 PCD_RX_DTOG((USBx), (bEpNum)); \ 00794 } \ 00795 } while(0) /* PCD_CLEAR_RX_DTOG */ 00796 00797 #define PCD_CLEAR_TX_DTOG(USBx, bEpNum) do { \ 00798 register uint16_t _wRegVal; \ 00799 \ 00800 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \ 00801 \ 00802 if ((_wRegVal & USB_EP_DTOG_TX) != 0U)\ 00803 { \ 00804 PCD_TX_DTOG((USBx), (bEpNum)); \ 00805 } \ 00806 } while(0) /* PCD_CLEAR_TX_DTOG */ 00807 00808 /** 00809 * @brief Sets address in an endpoint register. 00810 * @param USBx USB peripheral instance register address. 00811 * @param bEpNum Endpoint Number. 00812 * @param bAddr Address. 00813 * @retval None 00814 */ 00815 #define PCD_SET_EP_ADDRESS(USBx, bEpNum, bAddr) do { \ 00816 register uint16_t _wRegVal; \ 00817 \ 00818 _wRegVal = (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) | (bAddr); \ 00819 \ 00820 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ 00821 } while(0) /* PCD_SET_EP_ADDRESS */ 00822 00823 /** 00824 * @brief Gets address in an endpoint register. 00825 * @param USBx USB peripheral instance register address. 00826 * @param bEpNum Endpoint Number. 00827 * @retval None 00828 */ 00829 #define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD)) 00830 00831 #define PCD_EP_TX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE + ((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U))) 00832 #define PCD_EP_RX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE + ((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U))) 00833 00834 /** 00835 * @brief sets address of the tx/rx buffer. 00836 * @param USBx USB peripheral instance register address. 00837 * @param bEpNum Endpoint Number. 00838 * @param wAddr address to be set (must be word aligned). 00839 * @retval None 00840 */ 00841 #define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum, wAddr) do { \ 00842 register uint16_t *_wRegVal; \ 00843 register uint32_t _wRegBase = (uint32_t)USBx; \ 00844 \ 00845 _wRegBase += (uint32_t)(USBx)->BTABLE; \ 00846 _wRegVal = (uint16_t *)(_wRegBase + 0x400U + (((uint32_t)(bEpNum) * 8U) * PMA_ACCESS)); \ 00847 *_wRegVal = ((wAddr) >> 1) << 1; \ 00848 } while(0) /* PCD_SET_EP_TX_ADDRESS */ 00849 00850 #define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum, wAddr) do { \ 00851 register uint16_t *_wRegVal; \ 00852 register uint32_t _wRegBase = (uint32_t)USBx; \ 00853 \ 00854 _wRegBase += (uint32_t)(USBx)->BTABLE; \ 00855 _wRegVal = (uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 4U) * PMA_ACCESS)); \ 00856 *_wRegVal = ((wAddr) >> 1) << 1; \ 00857 } while(0) /* PCD_SET_EP_RX_ADDRESS */ 00858 00859 /** 00860 * @brief Gets address of the tx/rx buffer. 00861 * @param USBx USB peripheral instance register address. 00862 * @param bEpNum Endpoint Number. 00863 * @retval address of the buffer. 00864 */ 00865 #define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum))) 00866 #define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum))) 00867 00868 /** 00869 * @brief Sets counter of rx buffer with no. of blocks. 00870 * @param pdwReg Register pointer 00871 * @param wCount Counter. 00872 * @param wNBlocks no. of Blocks. 00873 * @retval None 00874 */ 00875 #define PCD_CALC_BLK32(pdwReg, wCount, wNBlocks) do { \ 00876 (wNBlocks) = (wCount) >> 5; \ 00877 *(pdwReg) = (uint16_t)(((wNBlocks) << 10) | (0x1U << 15)); \ 00878 } while(0) /* PCD_CALC_BLK32 */ 00879 00880 #define PCD_CALC_BLK2(pdwReg, wCount, wNBlocks) do { \ 00881 (wNBlocks) = (wCount) >> 1; \ 00882 if (((wCount) & 0x1U) != 0U) \ 00883 { \ 00884 (wNBlocks)++; \ 00885 } \ 00886 *(pdwReg) = (uint16_t)((wNBlocks) << 10); \ 00887 } while(0) /* PCD_CALC_BLK2 */ 00888 00889 #define PCD_SET_EP_CNT_RX_REG(pdwReg, wCount) do { \ 00890 uint32_t wNBlocks; \ 00891 if ((wCount) == 0U) \ 00892 { \ 00893 *(pdwReg) &= (uint16_t)~(0x73U << 10); \ 00894 *(pdwReg) |= (0x1U << 15); \ 00895 } \ 00896 else if((wCount) < 62U) \ 00897 { \ 00898 PCD_CALC_BLK2((pdwReg), (wCount), wNBlocks); \ 00899 } \ 00900 else \ 00901 { \ 00902 PCD_CALC_BLK32((pdwReg),(wCount), wNBlocks); \ 00903 } \ 00904 } while(0) /* PCD_SET_EP_CNT_RX_REG */ 00905 00906 #define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum, wCount) do { \ 00907 register uint32_t _wRegBase = (uint32_t)(USBx); \ 00908 uint16_t *pdwReg; \ 00909 \ 00910 _wRegBase += (uint32_t)(USBx)->BTABLE; \ 00911 pdwReg = (uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \ 00912 PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount)); \ 00913 } while(0) 00914 00915 /** 00916 * @brief sets counter for the tx/rx buffer. 00917 * @param USBx USB peripheral instance register address. 00918 * @param bEpNum Endpoint Number. 00919 * @param wCount Counter value. 00920 * @retval None 00921 */ 00922 #define PCD_SET_EP_TX_CNT(USBx, bEpNum, wCount) do { \ 00923 register uint32_t _wRegBase = (uint32_t)(USBx); \ 00924 uint16_t *_wRegVal; \ 00925 \ 00926 _wRegBase += (uint32_t)(USBx)->BTABLE; \ 00927 _wRegVal = (uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \ 00928 *_wRegVal = (uint16_t)(wCount); \ 00929 } while(0) 00930 00931 #define PCD_SET_EP_RX_CNT(USBx, bEpNum, wCount) do { \ 00932 register uint32_t _wRegBase = (uint32_t)(USBx); \ 00933 uint16_t *_wRegVal; \ 00934 \ 00935 _wRegBase += (uint32_t)(USBx)->BTABLE; \ 00936 _wRegVal = (uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \ 00937 PCD_SET_EP_CNT_RX_REG(_wRegVal, (wCount)); \ 00938 } while(0) 00939 00940 /** 00941 * @brief gets counter of the tx buffer. 00942 * @param USBx USB peripheral instance register address. 00943 * @param bEpNum Endpoint Number. 00944 * @retval Counter value 00945 */ 00946 #define PCD_GET_EP_TX_CNT(USBx, bEpNum) ((uint32_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ffU) 00947 #define PCD_GET_EP_RX_CNT(USBx, bEpNum) ((uint32_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ffU) 00948 00949 /** 00950 * @brief Sets buffer 0/1 address in a double buffer endpoint. 00951 * @param USBx USB peripheral instance register address. 00952 * @param bEpNum Endpoint Number. 00953 * @param wBuf0Addr buffer 0 address. 00954 * @retval Counter value 00955 */ 00956 #define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum, wBuf0Addr) do { \ 00957 PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr)); \ 00958 } while(0) /* PCD_SET_EP_DBUF0_ADDR */ 00959 #define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum, wBuf1Addr) do { \ 00960 PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr)); \ 00961 } while(0) /* PCD_SET_EP_DBUF1_ADDR */ 00962 00963 /** 00964 * @brief Sets addresses in a double buffer endpoint. 00965 * @param USBx USB peripheral instance register address. 00966 * @param bEpNum Endpoint Number. 00967 * @param wBuf0Addr: buffer 0 address. 00968 * @param wBuf1Addr = buffer 1 address. 00969 * @retval None 00970 */ 00971 #define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum, wBuf0Addr, wBuf1Addr) do { \ 00972 PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr)); \ 00973 PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr)); \ 00974 } while(0) /* PCD_SET_EP_DBUF_ADDR */ 00975 00976 /** 00977 * @brief Gets buffer 0/1 address of a double buffer endpoint. 00978 * @param USBx USB peripheral instance register address. 00979 * @param bEpNum Endpoint Number. 00980 * @retval None 00981 */ 00982 #define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum) (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum))) 00983 #define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum) (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum))) 00984 00985 /** 00986 * @brief Gets buffer 0/1 address of a double buffer endpoint. 00987 * @param USBx USB peripheral instance register address. 00988 * @param bEpNum Endpoint Number. 00989 * @param bDir endpoint dir EP_DBUF_OUT = OUT 00990 * EP_DBUF_IN = IN 00991 * @param wCount: Counter value 00992 * @retval None 00993 */ 00994 #define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) do { \ 00995 if ((bDir) == 0U) \ 00996 /* OUT endpoint */ \ 00997 { \ 00998 PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum), (wCount)); \ 00999 } \ 01000 else \ 01001 { \ 01002 if ((bDir) == 1U) \ 01003 { \ 01004 /* IN endpoint */ \ 01005 PCD_SET_EP_TX_CNT((USBx), (bEpNum), (wCount)); \ 01006 } \ 01007 } \ 01008 } while(0) /* SetEPDblBuf0Count*/ 01009 01010 #define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) do { \ 01011 register uint32_t _wBase = (uint32_t)(USBx); \ 01012 uint16_t *_wEPRegVal; \ 01013 \ 01014 if ((bDir) == 0U) \ 01015 { \ 01016 /* OUT endpoint */ \ 01017 PCD_SET_EP_RX_CNT((USBx), (bEpNum), (wCount)); \ 01018 } \ 01019 else \ 01020 { \ 01021 if ((bDir) == 1U) \ 01022 { \ 01023 /* IN endpoint */ \ 01024 _wBase += (uint32_t)(USBx)->BTABLE; \ 01025 _wEPRegVal = (uint16_t *)(_wBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \ 01026 *_wEPRegVal = (uint16_t)(wCount); \ 01027 } \ 01028 } \ 01029 } while(0) /* SetEPDblBuf1Count */ 01030 01031 #define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) do { \ 01032 PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \ 01033 PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \ 01034 } while(0) /* PCD_SET_EP_DBUF_CNT */ 01035 01036 /** 01037 * @brief Gets buffer 0/1 rx/tx counter for double buffering. 01038 * @param USBx USB peripheral instance register address. 01039 * @param bEpNum Endpoint Number. 01040 * @retval None 01041 */ 01042 #define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum) (PCD_GET_EP_TX_CNT((USBx), (bEpNum))) 01043 #define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum) (PCD_GET_EP_RX_CNT((USBx), (bEpNum))) 01044 01045 #endif /* USB */ 01046 01047 /** 01048 * @} 01049 */ 01050 01051 /** 01052 * @} 01053 */ 01054 01055 /** 01056 * @} 01057 */ 01058 01059 #endif /* defined (USB) || defined (USB_OTG_FS) || defined (USB_OTG_HS) */ 01060 01061 #ifdef __cplusplus 01062 } 01063 #endif 01064 01065 #endif /* __STM32L4xx_HAL_PCD_H */ 01066 01067 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
1.7.6.1