STM32L486xx HAL User Manual
stm32l4xx_hal_nor.h
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00001 /**
00002   ******************************************************************************
00003   * @file    stm32l4xx_hal_nor.h
00004   * @author  MCD Application Team
00005   * @brief   Header file of NOR HAL module.
00006   ******************************************************************************
00007   * @attention
00008   *
00009   * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
00010   *
00011   * Redistribution and use in source and binary forms, with or without modification,
00012   * are permitted provided that the following conditions are met:
00013   *   1. Redistributions of source code must retain the above copyright notice,
00014   *      this list of conditions and the following disclaimer.
00015   *   2. Redistributions in binary form must reproduce the above copyright notice,
00016   *      this list of conditions and the following disclaimer in the documentation
00017   *      and/or other materials provided with the distribution.
00018   *   3. Neither the name of STMicroelectronics nor the names of its contributors
00019   *      may be used to endorse or promote products derived from this software
00020   *      without specific prior written permission.
00021   *
00022   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
00023   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00024   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
00025   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
00026   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00027   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
00028   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
00029   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00030   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
00031   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00032   *
00033   ******************************************************************************
00034   */
00035 
00036 /* Define to prevent recursive inclusion -------------------------------------*/
00037 #ifndef __STM32L4xx_HAL_NOR_H
00038 #define __STM32L4xx_HAL_NOR_H
00039 
00040 #ifdef __cplusplus
00041  extern "C" {
00042 #endif
00043 
00044 #if defined(FMC_BANK1)
00045 
00046 /* Includes ------------------------------------------------------------------*/
00047 #include "stm32l4xx_ll_fmc.h"
00048 
00049 
00050 /** @addtogroup STM32L4xx_HAL_Driver
00051   * @{
00052   */
00053 
00054 /** @addtogroup NOR
00055   * @{
00056   */
00057 
00058 /* Exported typedef ----------------------------------------------------------*/
00059 /** @defgroup NOR_Exported_Types NOR Exported Types
00060   * @{
00061   */
00062 
00063 /**
00064   * @brief  HAL SRAM State structures definition
00065   */
00066 typedef enum
00067 {
00068   HAL_NOR_STATE_RESET             = 0x00U,  /*!< NOR not yet initialized or disabled  */
00069   HAL_NOR_STATE_READY             = 0x01U,  /*!< NOR initialized and ready for use    */
00070   HAL_NOR_STATE_BUSY              = 0x02U,  /*!< NOR internal processing is ongoing   */
00071   HAL_NOR_STATE_ERROR             = 0x03U,  /*!< NOR error state                      */
00072   HAL_NOR_STATE_PROTECTED         = 0x04U   /*!< NOR NORSRAM device write protected   */
00073 }HAL_NOR_StateTypeDef;
00074 
00075 /**
00076   * @brief  FMC NOR Status typedef
00077   */
00078 typedef enum
00079 {
00080   HAL_NOR_STATUS_SUCCESS  = 0U,
00081   HAL_NOR_STATUS_ONGOING,
00082   HAL_NOR_STATUS_ERROR,
00083   HAL_NOR_STATUS_TIMEOUT
00084 }HAL_NOR_StatusTypeDef;
00085 
00086 /**
00087   * @brief  FMC NOR ID typedef
00088   */
00089 typedef struct
00090 {
00091   uint16_t Manufacturer_Code;  /*!< Defines the device's manufacturer code used to identify the memory       */
00092 
00093   uint16_t Device_Code1;
00094 
00095   uint16_t Device_Code2;
00096 
00097   uint16_t Device_Code3;       /*!< Defines the device's codes used to identify the memory.
00098                                     These codes can be accessed by performing read operations with specific
00099                                     control signals and addresses set.They can also be accessed by issuing
00100                                     an Auto Select command.                                                   */
00101 }NOR_IDTypeDef;
00102 
00103 /**
00104   * @brief  FMC NOR CFI typedef
00105   */
00106 typedef struct
00107 {
00108   /*!< Defines the information stored in the memory's Common flash interface
00109        which contains a description of various electrical and timing parameters,
00110        density information and functions supported by the memory                   */
00111 
00112   uint16_t CFI_1;
00113 
00114   uint16_t CFI_2;
00115 
00116   uint16_t CFI_3;
00117 
00118   uint16_t CFI_4;
00119 }NOR_CFITypeDef;
00120 
00121 /**
00122   * @brief  NOR handle Structure definition
00123   */
00124 typedef struct
00125 {
00126   FMC_NORSRAM_TypeDef           *Instance;    /*!< Register base address                        */
00127 
00128   FMC_NORSRAM_EXTENDED_TypeDef  *Extended;    /*!< Extended mode register base address          */
00129 
00130   FMC_NORSRAM_InitTypeDef       Init;         /*!< NOR device control configuration parameters  */
00131 
00132   HAL_LockTypeDef               Lock;         /*!< NOR locking object                           */
00133 
00134   __IO HAL_NOR_StateTypeDef     State;        /*!< NOR device access state                      */
00135 }NOR_HandleTypeDef;
00136 /**
00137   * @}
00138   */
00139 
00140 /* Exported constants --------------------------------------------------------*/
00141 /* Exported macro ------------------------------------------------------------*/
00142 /** @defgroup NOR_Exported_Macros NOR Exported Macros
00143   * @{
00144   */
00145 /** @brief Reset NOR handle state
00146   * @param  __HANDLE__ specifies the NOR handle.
00147   * @retval None
00148   */
00149 #define __HAL_NOR_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NOR_STATE_RESET)
00150 /**
00151   * @}
00152   */
00153 
00154 /* Exported functions --------------------------------------------------------*/
00155 /** @addtogroup NOR_Exported_Functions NOR Exported Functions
00156   * @{
00157   */
00158 
00159 /** @addtogroup NOR_Exported_Functions_Group1 Initialization and de-initialization functions
00160   * @{
00161   */
00162 
00163 /* Initialization/de-initialization functions  ********************************/
00164 HAL_StatusTypeDef HAL_NOR_Init(NOR_HandleTypeDef *hnor, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming);
00165 HAL_StatusTypeDef HAL_NOR_DeInit(NOR_HandleTypeDef *hnor);
00166 void HAL_NOR_MspInit(NOR_HandleTypeDef *hnor);
00167 void HAL_NOR_MspDeInit(NOR_HandleTypeDef *hnor);
00168 void HAL_NOR_MspWait(NOR_HandleTypeDef *hnor, uint32_t Timeout);
00169 /**
00170   * @}
00171   */
00172 
00173 /** @addtogroup NOR_Exported_Functions_Group2 Input and Output functions
00174   * @{
00175   */
00176 
00177 /* I/O operation functions  ***************************************************/
00178 HAL_StatusTypeDef HAL_NOR_Read_ID(NOR_HandleTypeDef *hnor, NOR_IDTypeDef *pNOR_ID);
00179 HAL_StatusTypeDef HAL_NOR_ReturnToReadMode(NOR_HandleTypeDef *hnor);
00180 HAL_StatusTypeDef HAL_NOR_Read(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData);
00181 HAL_StatusTypeDef HAL_NOR_Program(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData);
00182 
00183 HAL_StatusTypeDef HAL_NOR_ReadBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize);
00184 HAL_StatusTypeDef HAL_NOR_ProgramBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize);
00185 
00186 HAL_StatusTypeDef HAL_NOR_Erase_Block(NOR_HandleTypeDef *hnor, uint32_t BlockAddress, uint32_t Address);
00187 HAL_StatusTypeDef HAL_NOR_Erase_Chip(NOR_HandleTypeDef *hnor, uint32_t Address);
00188 HAL_StatusTypeDef HAL_NOR_Read_CFI(NOR_HandleTypeDef *hnor, NOR_CFITypeDef *pNOR_CFI);
00189 /**
00190   * @}
00191   */
00192 
00193 /** @addtogroup NOR_Exported_Functions_Group3 NOR Control functions
00194   * @{
00195   */
00196 
00197 /* NOR Control functions  *****************************************************/
00198 HAL_StatusTypeDef HAL_NOR_WriteOperation_Enable(NOR_HandleTypeDef *hnor);
00199 HAL_StatusTypeDef HAL_NOR_WriteOperation_Disable(NOR_HandleTypeDef *hnor);
00200 /**
00201   * @}
00202   */
00203 
00204 /** @addtogroup NOR_Exported_Functions_Group4 NOR State functions
00205   * @{
00206   */
00207 
00208 /* NOR State functions ********************************************************/
00209 HAL_NOR_StateTypeDef HAL_NOR_GetState(NOR_HandleTypeDef *hnor);
00210 HAL_NOR_StatusTypeDef HAL_NOR_GetStatus(NOR_HandleTypeDef *hnor, uint32_t Address, uint32_t Timeout);
00211 /**
00212   * @}
00213   */
00214 
00215 /**
00216   * @}
00217   */
00218 
00219 /* Private types -------------------------------------------------------------*/
00220 /* Private variables ---------------------------------------------------------*/
00221 /* Private constants ---------------------------------------------------------*/
00222 /** @defgroup NOR_Private_Constants NOR Private Constants
00223   * @{
00224   */
00225 /* NOR device IDs addresses */
00226 #define MC_ADDRESS               ((uint16_t)0x0000U)
00227 #define DEVICE_CODE1_ADDR        ((uint16_t)0x0001U)
00228 #define DEVICE_CODE2_ADDR        ((uint16_t)0x000EU)
00229 #define DEVICE_CODE3_ADDR        ((uint16_t)0x000FU)
00230 
00231 /* NOR CFI IDs addresses */
00232 #define CFI1_ADDRESS             ((uint16_t)0x61U)
00233 #define CFI2_ADDRESS             ((uint16_t)0x62U)
00234 #define CFI3_ADDRESS             ((uint16_t)0x63U)
00235 #define CFI4_ADDRESS             ((uint16_t)0x64U)
00236 
00237 /* NOR operation wait timeout */
00238 #define NOR_TMEOUT               ((uint16_t)0xFFFFU)
00239 
00240 /* NOR memory data width */
00241 #define NOR_MEMORY_8B            ((uint8_t)0x0U)
00242 #define NOR_MEMORY_16B           ((uint8_t)0x1U)
00243 
00244 /* NOR memory device read/write start address */
00245 #define NOR_MEMORY_ADRESS1       ((uint32_t)0x60000000U)
00246 #define NOR_MEMORY_ADRESS2       ((uint32_t)0x64000000U)
00247 #define NOR_MEMORY_ADRESS3       ((uint32_t)0x68000000U)
00248 #define NOR_MEMORY_ADRESS4       ((uint32_t)0x6C000000U)
00249 /**
00250   * @}
00251   */
00252 
00253 /* Private macros ------------------------------------------------------------*/
00254 /** @defgroup NOR_Private_Macros NOR Private Macros
00255   * @{
00256   */
00257 /**
00258   * @brief  NOR memory address shifting.
00259   * @param  __NOR_ADDRESS NOR base address
00260   * @param  __NOR_MEMORY_WIDTH_ NOR memory width
00261   * @param  __ADDRESS__ NOR memory address
00262   * @retval NOR shifted address value
00263   */
00264 #define NOR_ADDR_SHIFT(__NOR_ADDRESS, __NOR_MEMORY_WIDTH_, __ADDRESS__)         \
00265               ((uint32_t)(((__NOR_MEMORY_WIDTH_) == NOR_MEMORY_16B)?            \
00266               ((uint32_t)((__NOR_ADDRESS) + (2 * (__ADDRESS__)))):              \
00267               ((uint32_t)((__NOR_ADDRESS) + (__ADDRESS__)))))
00268 
00269 /**
00270   * @brief  NOR memory write data to specified address.
00271   * @param  __ADDRESS__ NOR memory address
00272   * @param  __DATA__ Data to write
00273   * @retval None
00274   */
00275 #define NOR_WRITE(__ADDRESS__, __DATA__)   do{                                                             \
00276                                                (*(__IO uint16_t *)((uint32_t)(__ADDRESS__)) = (__DATA__)); \
00277                                                __DSB();                                                    \
00278                                              } while(0)
00279 
00280 /**
00281   * @}
00282   */
00283 
00284 /**
00285   * @}
00286   */
00287 
00288 /**
00289   * @}
00290   */
00291 
00292 #endif /* FMC_BANK1 */
00293 
00294 #ifdef __cplusplus
00295 }
00296 #endif
00297 
00298 #endif /* __STM32L4xx_HAL_NOR_H */
00299 
00300 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/