STM32L486xx HAL User Manual
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32l4xx_hal_dfsdm.c 00004 * @author MCD Application Team 00005 * @brief This file provides firmware functions to manage the following 00006 * functionalities of the Digital Filter for Sigma-Delta Modulators 00007 * (DFSDM) peripherals: 00008 * + Initialization and configuration of channels and filters 00009 * + Regular channels configuration 00010 * + Injected channels configuration 00011 * + Regular/Injected Channels DMA Configuration 00012 * + Interrupts and flags management 00013 * + Analog watchdog feature 00014 * + Short-circuit detector feature 00015 * + Extremes detector feature 00016 * + Clock absence detector feature 00017 * + Break generation on analog watchdog or short-circuit event 00018 * 00019 @verbatim 00020 ============================================================================== 00021 ##### How to use this driver ##### 00022 ============================================================================== 00023 [..] 00024 *** Channel initialization *** 00025 ============================== 00026 [..] 00027 (#) User has first to initialize channels (before filters initialization). 00028 (#) As prerequisite, fill in the HAL_DFSDM_ChannelMspInit() : 00029 (++) Enable DFSDMz clock interface with __HAL_RCC_DFSDMz_CLK_ENABLE(). 00030 (++) Enable the clocks for the DFSDMz GPIOS with __HAL_RCC_GPIOx_CLK_ENABLE(). 00031 (++) Configure these DFSDMz pins in alternate mode using HAL_GPIO_Init(). 00032 (++) If interrupt mode is used, enable and configure DFSDMz_FLT0 global 00033 interrupt with HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ(). 00034 (#) Configure the output clock, input, serial interface, analog watchdog, 00035 offset and data right bit shift parameters for this channel using the 00036 HAL_DFSDM_ChannelInit() function. 00037 00038 *** Channel clock absence detector *** 00039 ====================================== 00040 [..] 00041 (#) Start clock absence detector using HAL_DFSDM_ChannelCkabStart() or 00042 HAL_DFSDM_ChannelCkabStart_IT(). 00043 (#) In polling mode, use HAL_DFSDM_ChannelPollForCkab() to detect the clock 00044 absence. 00045 (#) In interrupt mode, HAL_DFSDM_ChannelCkabCallback() will be called if 00046 clock absence is detected. 00047 (#) Stop clock absence detector using HAL_DFSDM_ChannelCkabStop() or 00048 HAL_DFSDM_ChannelCkabStop_IT(). 00049 (#) Please note that the same mode (polling or interrupt) has to be used 00050 for all channels because the channels are sharing the same interrupt. 00051 (#) Please note also that in interrupt mode, if clock absence detector is 00052 stopped for one channel, interrupt will be disabled for all channels. 00053 00054 *** Channel short circuit detector *** 00055 ====================================== 00056 [..] 00057 (#) Start short circuit detector using HAL_DFSDM_ChannelScdStart() or 00058 or HAL_DFSDM_ChannelScdStart_IT(). 00059 (#) In polling mode, use HAL_DFSDM_ChannelPollForScd() to detect short 00060 circuit. 00061 (#) In interrupt mode, HAL_DFSDM_ChannelScdCallback() will be called if 00062 short circuit is detected. 00063 (#) Stop short circuit detector using HAL_DFSDM_ChannelScdStop() or 00064 or HAL_DFSDM_ChannelScdStop_IT(). 00065 (#) Please note that the same mode (polling or interrupt) has to be used 00066 for all channels because the channels are sharing the same interrupt. 00067 (#) Please note also that in interrupt mode, if short circuit detector is 00068 stopped for one channel, interrupt will be disabled for all channels. 00069 00070 *** Channel analog watchdog value *** 00071 ===================================== 00072 [..] 00073 (#) Get analog watchdog filter value of a channel using 00074 HAL_DFSDM_ChannelGetAwdValue(). 00075 00076 *** Channel offset value *** 00077 ===================================== 00078 [..] 00079 (#) Modify offset value of a channel using HAL_DFSDM_ChannelModifyOffset(). 00080 00081 *** Filter initialization *** 00082 ============================= 00083 [..] 00084 (#) After channel initialization, user has to init filters. 00085 (#) As prerequisite, fill in the HAL_DFSDM_FilterMspInit() : 00086 (++) If interrupt mode is used , enable and configure DFSDMz_FLTx global 00087 interrupt with HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ(). 00088 Please note that DFSDMz_FLT0 global interrupt could be already 00089 enabled if interrupt is used for channel. 00090 (++) If DMA mode is used, configure DMA with HAL_DMA_Init() and link it 00091 with DFSDMz filter handle using __HAL_LINKDMA(). 00092 (#) Configure the regular conversion, injected conversion and filter 00093 parameters for this filter using the HAL_DFSDM_FilterInit() function. 00094 00095 *** Filter regular channel conversion *** 00096 ========================================= 00097 [..] 00098 (#) Select regular channel and enable/disable continuous mode using 00099 HAL_DFSDM_FilterConfigRegChannel(). 00100 (#) Start regular conversion using HAL_DFSDM_FilterRegularStart(), 00101 HAL_DFSDM_FilterRegularStart_IT(), HAL_DFSDM_FilterRegularStart_DMA() or 00102 HAL_DFSDM_FilterRegularMsbStart_DMA(). 00103 (#) In polling mode, use HAL_DFSDM_FilterPollForRegConversion() to detect 00104 the end of regular conversion. 00105 (#) In interrupt mode, HAL_DFSDM_FilterRegConvCpltCallback() will be called 00106 at the end of regular conversion. 00107 (#) Get value of regular conversion and corresponding channel using 00108 HAL_DFSDM_FilterGetRegularValue(). 00109 (#) In DMA mode, HAL_DFSDM_FilterRegConvHalfCpltCallback() and 00110 HAL_DFSDM_FilterRegConvCpltCallback() will be called respectively at the 00111 half transfer and at the transfer complete. Please note that 00112 HAL_DFSDM_FilterRegConvHalfCpltCallback() will be called only in DMA 00113 circular mode. 00114 (#) Stop regular conversion using HAL_DFSDM_FilterRegularStop(), 00115 HAL_DFSDM_FilterRegularStop_IT() or HAL_DFSDM_FilterRegularStop_DMA(). 00116 00117 *** Filter injected channels conversion *** 00118 =========================================== 00119 [..] 00120 (#) Select injected channels using HAL_DFSDM_FilterConfigInjChannel(). 00121 (#) Start injected conversion using HAL_DFSDM_FilterInjectedStart(), 00122 HAL_DFSDM_FilterInjectedStart_IT(), HAL_DFSDM_FilterInjectedStart_DMA() or 00123 HAL_DFSDM_FilterInjectedMsbStart_DMA(). 00124 (#) In polling mode, use HAL_DFSDM_FilterPollForInjConversion() to detect 00125 the end of injected conversion. 00126 (#) In interrupt mode, HAL_DFSDM_FilterInjConvCpltCallback() will be called 00127 at the end of injected conversion. 00128 (#) Get value of injected conversion and corresponding channel using 00129 HAL_DFSDM_FilterGetInjectedValue(). 00130 (#) In DMA mode, HAL_DFSDM_FilterInjConvHalfCpltCallback() and 00131 HAL_DFSDM_FilterInjConvCpltCallback() will be called respectively at the 00132 half transfer and at the transfer complete. Please note that 00133 HAL_DFSDM_FilterInjConvCpltCallback() will be called only in DMA 00134 circular mode. 00135 (#) Stop injected conversion using HAL_DFSDM_FilterInjectedStop(), 00136 HAL_DFSDM_FilterInjectedStop_IT() or HAL_DFSDM_FilterInjectedStop_DMA(). 00137 00138 *** Filter analog watchdog *** 00139 ============================== 00140 [..] 00141 (#) Start filter analog watchdog using HAL_DFSDM_FilterAwdStart_IT(). 00142 (#) HAL_DFSDM_FilterAwdCallback() will be called if analog watchdog occurs. 00143 (#) Stop filter analog watchdog using HAL_DFSDM_FilterAwdStop_IT(). 00144 00145 *** Filter extreme detector *** 00146 =============================== 00147 [..] 00148 (#) Start filter extreme detector using HAL_DFSDM_FilterExdStart(). 00149 (#) Get extreme detector maximum value using HAL_DFSDM_FilterGetExdMaxValue(). 00150 (#) Get extreme detector minimum value using HAL_DFSDM_FilterGetExdMinValue(). 00151 (#) Start filter extreme detector using HAL_DFSDM_FilterExdStop(). 00152 00153 *** Filter conversion time *** 00154 ============================== 00155 [..] 00156 (#) Get conversion time value using HAL_DFSDM_FilterGetConvTimeValue(). 00157 00158 *** Callback registration *** 00159 ============================= 00160 00161 The compilation define USE_HAL_DFSDM_REGISTER_CALLBACKS when set to 1 00162 allows the user to configure dynamically the driver callbacks. 00163 Use functions @ref HAL_DFSDM_Channel_RegisterCallback(), 00164 @ref HAL_DFSDM_Filter_RegisterCallback() or 00165 @ref HAL_DFSDM_Filter_RegisterAwdCallback() to register a user callback. 00166 00167 Function @ref HAL_DFSDM_Channel_RegisterCallback() allows to register 00168 following callbacks: 00169 (+) CkabCallback : DFSDM channel clock absence detection callback. 00170 (+) ScdCallback : DFSDM channel short circuit detection callback. 00171 (+) MspInitCallback : DFSDM channel MSP init callback. 00172 (+) MspDeInitCallback : DFSDM channel MSP de-init callback. 00173 This function takes as parameters the HAL peripheral handle, the Callback ID 00174 and a pointer to the user callback function. 00175 00176 Function @ref HAL_DFSDM_Filter_RegisterCallback() allows to register 00177 following callbacks: 00178 (+) RegConvCpltCallback : DFSDM filter regular conversion complete callback. 00179 (+) RegConvHalfCpltCallback : DFSDM filter half regular conversion complete callback. 00180 (+) InjConvCpltCallback : DFSDM filter injected conversion complete callback. 00181 (+) InjConvHalfCpltCallback : DFSDM filter half injected conversion complete callback. 00182 (+) ErrorCallback : DFSDM filter error callback. 00183 (+) MspInitCallback : DFSDM filter MSP init callback. 00184 (+) MspDeInitCallback : DFSDM filter MSP de-init callback. 00185 This function takes as parameters the HAL peripheral handle, the Callback ID 00186 and a pointer to the user callback function. 00187 00188 For specific DFSDM filter analog watchdog callback use dedicated register callback: 00189 @ref HAL_DFSDM_Filter_RegisterAwdCallback(). 00190 00191 Use functions @ref HAL_DFSDM_Channel_UnRegisterCallback() or 00192 @ref HAL_DFSDM_Filter_UnRegisterCallback() to reset a callback to the default 00193 weak function. 00194 00195 @ref HAL_DFSDM_Channel_UnRegisterCallback() takes as parameters the HAL peripheral handle, 00196 and the Callback ID. 00197 This function allows to reset following callbacks: 00198 (+) CkabCallback : DFSDM channel clock absence detection callback. 00199 (+) ScdCallback : DFSDM channel short circuit detection callback. 00200 (+) MspInitCallback : DFSDM channel MSP init callback. 00201 (+) MspDeInitCallback : DFSDM channel MSP de-init callback. 00202 00203 @ref HAL_DFSDM_Filter_UnRegisterCallback() takes as parameters the HAL peripheral handle, 00204 and the Callback ID. 00205 This function allows to reset following callbacks: 00206 (+) RegConvCpltCallback : DFSDM filter regular conversion complete callback. 00207 (+) RegConvHalfCpltCallback : DFSDM filter half regular conversion complete callback. 00208 (+) InjConvCpltCallback : DFSDM filter injected conversion complete callback. 00209 (+) InjConvHalfCpltCallback : DFSDM filter half injected conversion complete callback. 00210 (+) ErrorCallback : DFSDM filter error callback. 00211 (+) MspInitCallback : DFSDM filter MSP init callback. 00212 (+) MspDeInitCallback : DFSDM filter MSP de-init callback. 00213 00214 For specific DFSDM filter analog watchdog callback use dedicated unregister callback: 00215 @ref HAL_DFSDM_Filter_UnRegisterAwdCallback(). 00216 00217 By default, after the call of init function and if the state is RESET 00218 all callbacks are reset to the corresponding legacy weak functions: 00219 examples @ref HAL_DFSDM_ChannelScdCallback(), @ref HAL_DFSDM_FilterErrorCallback(). 00220 Exception done for MspInit and MspDeInit callbacks that are respectively 00221 reset to the legacy weak functions in the init and de-init only when these 00222 callbacks are null (not registered beforehand). 00223 If not, MspInit or MspDeInit are not null, the init and de-init keep and use 00224 the user MspInit/MspDeInit callbacks (registered beforehand) 00225 00226 Callbacks can be registered/unregistered in READY state only. 00227 Exception done for MspInit/MspDeInit callbacks that can be registered/unregistered 00228 in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used 00229 during the init/de-init. 00230 In that case first register the MspInit/MspDeInit user callbacks using 00231 @ref HAL_DFSDM_Channel_RegisterCallback() or 00232 @ref HAL_DFSDM_Filter_RegisterCallback() before calling init or de-init function. 00233 00234 When The compilation define USE_HAL_DFSDM_REGISTER_CALLBACKS is set to 0 or 00235 not defined, the callback registering feature is not available 00236 and weak callbacks are used. 00237 00238 @endverbatim 00239 ****************************************************************************** 00240 * @attention 00241 * 00242 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> 00243 * 00244 * Redistribution and use in source and binary forms, with or without modification, 00245 * are permitted provided that the following conditions are met: 00246 * 1. Redistributions of source code must retain the above copyright notice, 00247 * this list of conditions and the following disclaimer. 00248 * 2. Redistributions in binary form must reproduce the above copyright notice, 00249 * this list of conditions and the following disclaimer in the documentation 00250 * and/or other materials provided with the distribution. 00251 * 3. Neither the name of STMicroelectronics nor the names of its contributors 00252 * may be used to endorse or promote products derived from this software 00253 * without specific prior written permission. 00254 * 00255 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 00256 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 00257 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 00258 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 00259 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 00260 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 00261 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00262 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 00263 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 00264 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00265 * 00266 ****************************************************************************** 00267 */ 00268 00269 /* Includes ------------------------------------------------------------------*/ 00270 #include "stm32l4xx_hal.h" 00271 00272 /** @addtogroup STM32L4xx_HAL_Driver 00273 * @{ 00274 */ 00275 #ifdef HAL_DFSDM_MODULE_ENABLED 00276 00277 #if defined(STM32L451xx) || defined(STM32L452xx) || defined(STM32L462xx) || \ 00278 defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || \ 00279 defined(STM32L496xx) || defined(STM32L4A6xx) || \ 00280 defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 00281 00282 /** @defgroup DFSDM DFSDM 00283 * @brief DFSDM HAL driver module 00284 * @{ 00285 */ 00286 00287 /* Private typedef -----------------------------------------------------------*/ 00288 /* Private define ------------------------------------------------------------*/ 00289 /** @defgroup DFSDM_Private_Define DFSDM Private Define 00290 * @{ 00291 */ 00292 #define DFSDM_FLTCR1_MSB_RCH_OFFSET 8 00293 #define DFSDM_MSB_MASK 0xFFFF0000U 00294 #define DFSDM_LSB_MASK 0x0000FFFFU 00295 #define DFSDM_CKAB_TIMEOUT 5000U 00296 #if defined(STM32L451xx) || defined(STM32L452xx) || defined(STM32L462xx) 00297 #define DFSDM1_CHANNEL_NUMBER 4U 00298 #else /* STM32L451xx || STM32L452xx || STM32L462xx */ 00299 #define DFSDM1_CHANNEL_NUMBER 8U 00300 #endif /* STM32L451xx || STM32L452xx || STM32L462xx */ 00301 /** 00302 * @} 00303 */ 00304 00305 /* Private macro -------------------------------------------------------------*/ 00306 /* Private variables ---------------------------------------------------------*/ 00307 /** @defgroup DFSDM_Private_Variables DFSDM Private Variables 00308 * @{ 00309 */ 00310 static __IO uint32_t v_dfsdm1ChannelCounter = 0; 00311 static DFSDM_Channel_HandleTypeDef *a_dfsdm1ChannelHandle[DFSDM1_CHANNEL_NUMBER] = {NULL}; 00312 /** 00313 * @} 00314 */ 00315 00316 /* Private function prototypes -----------------------------------------------*/ 00317 /** @defgroup DFSDM_Private_Functions DFSDM Private Functions 00318 * @{ 00319 */ 00320 static uint32_t DFSDM_GetInjChannelsNbr(uint32_t Channels); 00321 static uint32_t DFSDM_GetChannelFromInstance(const DFSDM_Channel_TypeDef *Instance); 00322 static void DFSDM_RegConvStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter); 00323 static void DFSDM_RegConvStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter); 00324 static void DFSDM_InjConvStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter); 00325 static void DFSDM_InjConvStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter); 00326 static void DFSDM_DMARegularHalfConvCplt(DMA_HandleTypeDef *hdma); 00327 static void DFSDM_DMARegularConvCplt(DMA_HandleTypeDef *hdma); 00328 static void DFSDM_DMAInjectedHalfConvCplt(DMA_HandleTypeDef *hdma); 00329 static void DFSDM_DMAInjectedConvCplt(DMA_HandleTypeDef *hdma); 00330 static void DFSDM_DMAError(DMA_HandleTypeDef *hdma); 00331 /** 00332 * @} 00333 */ 00334 00335 /* Exported functions --------------------------------------------------------*/ 00336 /** @defgroup DFSDM_Exported_Functions DFSDM Exported Functions 00337 * @{ 00338 */ 00339 00340 /** @defgroup DFSDM_Exported_Functions_Group1_Channel Channel initialization and de-initialization functions 00341 * @brief Channel initialization and de-initialization functions 00342 * 00343 @verbatim 00344 ============================================================================== 00345 ##### Channel initialization and de-initialization functions ##### 00346 ============================================================================== 00347 [..] This section provides functions allowing to: 00348 (+) Initialize the DFSDM channel. 00349 (+) De-initialize the DFSDM channel. 00350 @endverbatim 00351 * @{ 00352 */ 00353 00354 /** 00355 * @brief Initialize the DFSDM channel according to the specified parameters 00356 * in the DFSDM_ChannelInitTypeDef structure and initialize the associated handle. 00357 * @param hdfsdm_channel DFSDM channel handle. 00358 * @retval HAL status. 00359 */ 00360 HAL_StatusTypeDef HAL_DFSDM_ChannelInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel) 00361 { 00362 /* Check DFSDM Channel handle */ 00363 if (hdfsdm_channel == NULL) 00364 { 00365 return HAL_ERROR; 00366 } 00367 00368 /* Check parameters */ 00369 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance)); 00370 assert_param(IS_FUNCTIONAL_STATE(hdfsdm_channel->Init.OutputClock.Activation)); 00371 assert_param(IS_DFSDM_CHANNEL_INPUT(hdfsdm_channel->Init.Input.Multiplexer)); 00372 assert_param(IS_DFSDM_CHANNEL_DATA_PACKING(hdfsdm_channel->Init.Input.DataPacking)); 00373 assert_param(IS_DFSDM_CHANNEL_INPUT_PINS(hdfsdm_channel->Init.Input.Pins)); 00374 assert_param(IS_DFSDM_CHANNEL_SERIAL_INTERFACE_TYPE(hdfsdm_channel->Init.SerialInterface.Type)); 00375 assert_param(IS_DFSDM_CHANNEL_SPI_CLOCK(hdfsdm_channel->Init.SerialInterface.SpiClock)); 00376 assert_param(IS_DFSDM_CHANNEL_FILTER_ORDER(hdfsdm_channel->Init.Awd.FilterOrder)); 00377 assert_param(IS_DFSDM_CHANNEL_FILTER_OVS_RATIO(hdfsdm_channel->Init.Awd.Oversampling)); 00378 assert_param(IS_DFSDM_CHANNEL_OFFSET(hdfsdm_channel->Init.Offset)); 00379 assert_param(IS_DFSDM_CHANNEL_RIGHT_BIT_SHIFT(hdfsdm_channel->Init.RightBitShift)); 00380 00381 /* Check that channel has not been already initialized */ 00382 if (a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] != NULL) 00383 { 00384 return HAL_ERROR; 00385 } 00386 00387 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1) 00388 /* Reset callback pointers to the weak predefined callbacks */ 00389 hdfsdm_channel->CkabCallback = HAL_DFSDM_ChannelCkabCallback; 00390 hdfsdm_channel->ScdCallback = HAL_DFSDM_ChannelScdCallback; 00391 00392 /* Call MSP init function */ 00393 if (hdfsdm_channel->MspInitCallback == NULL) 00394 { 00395 hdfsdm_channel->MspInitCallback = HAL_DFSDM_ChannelMspInit; 00396 } 00397 hdfsdm_channel->MspInitCallback(hdfsdm_channel); 00398 #else 00399 /* Call MSP init function */ 00400 HAL_DFSDM_ChannelMspInit(hdfsdm_channel); 00401 #endif 00402 00403 /* Update the channel counter */ 00404 v_dfsdm1ChannelCounter++; 00405 00406 /* Configure output serial clock and enable global DFSDM interface only for first channel */ 00407 if (v_dfsdm1ChannelCounter == 1U) 00408 { 00409 assert_param(IS_DFSDM_CHANNEL_OUTPUT_CLOCK(hdfsdm_channel->Init.OutputClock.Selection)); 00410 /* Set the output serial clock source */ 00411 DFSDM1_Channel0->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKOUTSRC); 00412 DFSDM1_Channel0->CHCFGR1 |= hdfsdm_channel->Init.OutputClock.Selection; 00413 00414 /* Reset clock divider */ 00415 DFSDM1_Channel0->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKOUTDIV); 00416 if (hdfsdm_channel->Init.OutputClock.Activation == ENABLE) 00417 { 00418 assert_param(IS_DFSDM_CHANNEL_OUTPUT_CLOCK_DIVIDER(hdfsdm_channel->Init.OutputClock.Divider)); 00419 /* Set the output clock divider */ 00420 DFSDM1_Channel0->CHCFGR1 |= (uint32_t)((hdfsdm_channel->Init.OutputClock.Divider - 1U) << 00421 DFSDM_CHCFGR1_CKOUTDIV_Pos); 00422 } 00423 00424 /* enable the DFSDM global interface */ 00425 DFSDM1_Channel0->CHCFGR1 |= DFSDM_CHCFGR1_DFSDMEN; 00426 } 00427 00428 /* Set channel input parameters */ 00429 hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_DATPACK | DFSDM_CHCFGR1_DATMPX | 00430 DFSDM_CHCFGR1_CHINSEL); 00431 hdfsdm_channel->Instance->CHCFGR1 |= (hdfsdm_channel->Init.Input.Multiplexer | 00432 hdfsdm_channel->Init.Input.DataPacking | 00433 hdfsdm_channel->Init.Input.Pins); 00434 00435 /* Set serial interface parameters */ 00436 hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SITP | DFSDM_CHCFGR1_SPICKSEL); 00437 hdfsdm_channel->Instance->CHCFGR1 |= (hdfsdm_channel->Init.SerialInterface.Type | 00438 hdfsdm_channel->Init.SerialInterface.SpiClock); 00439 00440 /* Set analog watchdog parameters */ 00441 hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_AWFORD | DFSDM_CHAWSCDR_AWFOSR); 00442 hdfsdm_channel->Instance->CHAWSCDR |= (hdfsdm_channel->Init.Awd.FilterOrder | 00443 ((hdfsdm_channel->Init.Awd.Oversampling - 1U) << DFSDM_CHAWSCDR_AWFOSR_Pos)); 00444 00445 /* Set channel offset and right bit shift */ 00446 hdfsdm_channel->Instance->CHCFGR2 &= ~(DFSDM_CHCFGR2_OFFSET | DFSDM_CHCFGR2_DTRBS); 00447 hdfsdm_channel->Instance->CHCFGR2 |= (((uint32_t) hdfsdm_channel->Init.Offset << DFSDM_CHCFGR2_OFFSET_Pos) | 00448 (hdfsdm_channel->Init.RightBitShift << DFSDM_CHCFGR2_DTRBS_Pos)); 00449 00450 /* Enable DFSDM channel */ 00451 hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_CHEN; 00452 00453 /* Set DFSDM Channel to ready state */ 00454 hdfsdm_channel->State = HAL_DFSDM_CHANNEL_STATE_READY; 00455 00456 /* Store channel handle in DFSDM channel handle table */ 00457 a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] = hdfsdm_channel; 00458 00459 return HAL_OK; 00460 } 00461 00462 /** 00463 * @brief De-initialize the DFSDM channel. 00464 * @param hdfsdm_channel DFSDM channel handle. 00465 * @retval HAL status. 00466 */ 00467 HAL_StatusTypeDef HAL_DFSDM_ChannelDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel) 00468 { 00469 /* Check DFSDM Channel handle */ 00470 if (hdfsdm_channel == NULL) 00471 { 00472 return HAL_ERROR; 00473 } 00474 00475 /* Check parameters */ 00476 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance)); 00477 00478 /* Check that channel has not been already deinitialized */ 00479 if (a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] == NULL) 00480 { 00481 return HAL_ERROR; 00482 } 00483 00484 /* Disable the DFSDM channel */ 00485 hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CHEN); 00486 00487 /* Update the channel counter */ 00488 v_dfsdm1ChannelCounter--; 00489 00490 /* Disable global DFSDM at deinit of last channel */ 00491 if (v_dfsdm1ChannelCounter == 0U) 00492 { 00493 DFSDM1_Channel0->CHCFGR1 &= ~(DFSDM_CHCFGR1_DFSDMEN); 00494 } 00495 00496 /* Call MSP deinit function */ 00497 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1) 00498 if (hdfsdm_channel->MspDeInitCallback == NULL) 00499 { 00500 hdfsdm_channel->MspDeInitCallback = HAL_DFSDM_ChannelMspDeInit; 00501 } 00502 hdfsdm_channel->MspDeInitCallback(hdfsdm_channel); 00503 #else 00504 HAL_DFSDM_ChannelMspDeInit(hdfsdm_channel); 00505 #endif 00506 00507 /* Set DFSDM Channel in reset state */ 00508 hdfsdm_channel->State = HAL_DFSDM_CHANNEL_STATE_RESET; 00509 00510 /* Reset channel handle in DFSDM channel handle table */ 00511 a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] = (DFSDM_Channel_HandleTypeDef *) NULL; 00512 00513 return HAL_OK; 00514 } 00515 00516 /** 00517 * @brief Initialize the DFSDM channel MSP. 00518 * @param hdfsdm_channel DFSDM channel handle. 00519 * @retval None 00520 */ 00521 __weak void HAL_DFSDM_ChannelMspInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel) 00522 { 00523 /* Prevent unused argument(s) compilation warning */ 00524 UNUSED(hdfsdm_channel); 00525 00526 /* NOTE : This function should not be modified, when the function is needed, 00527 the HAL_DFSDM_ChannelMspInit could be implemented in the user file. 00528 */ 00529 } 00530 00531 /** 00532 * @brief De-initialize the DFSDM channel MSP. 00533 * @param hdfsdm_channel DFSDM channel handle. 00534 * @retval None 00535 */ 00536 __weak void HAL_DFSDM_ChannelMspDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel) 00537 { 00538 /* Prevent unused argument(s) compilation warning */ 00539 UNUSED(hdfsdm_channel); 00540 00541 /* NOTE : This function should not be modified, when the function is needed, 00542 the HAL_DFSDM_ChannelMspDeInit could be implemented in the user file. 00543 */ 00544 } 00545 00546 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1) 00547 /** 00548 * @brief Register a user DFSDM channel callback 00549 * to be used instead of the weak predefined callback. 00550 * @param hdfsdm_channel DFSDM channel handle. 00551 * @param CallbackID ID of the callback to be registered. 00552 * This parameter can be one of the following values: 00553 * @arg @ref HAL_DFSDM_CHANNEL_CKAB_CB_ID clock absence detection callback ID. 00554 * @arg @ref HAL_DFSDM_CHANNEL_SCD_CB_ID short circuit detection callback ID. 00555 * @arg @ref HAL_DFSDM_CHANNEL_MSPINIT_CB_ID MSP init callback ID. 00556 * @arg @ref HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID MSP de-init callback ID. 00557 * @param pCallback pointer to the callback function. 00558 * @retval HAL status. 00559 */ 00560 HAL_StatusTypeDef HAL_DFSDM_Channel_RegisterCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, 00561 HAL_DFSDM_Channel_CallbackIDTypeDef CallbackID, 00562 pDFSDM_Channel_CallbackTypeDef pCallback) 00563 { 00564 HAL_StatusTypeDef status = HAL_OK; 00565 00566 if (pCallback == NULL) 00567 { 00568 /* update return status */ 00569 status = HAL_ERROR; 00570 } 00571 else 00572 { 00573 if (HAL_DFSDM_CHANNEL_STATE_READY == hdfsdm_channel->State) 00574 { 00575 switch (CallbackID) 00576 { 00577 case HAL_DFSDM_CHANNEL_CKAB_CB_ID : 00578 hdfsdm_channel->CkabCallback = pCallback; 00579 break; 00580 case HAL_DFSDM_CHANNEL_SCD_CB_ID : 00581 hdfsdm_channel->ScdCallback = pCallback; 00582 break; 00583 case HAL_DFSDM_CHANNEL_MSPINIT_CB_ID : 00584 hdfsdm_channel->MspInitCallback = pCallback; 00585 break; 00586 case HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID : 00587 hdfsdm_channel->MspDeInitCallback = pCallback; 00588 break; 00589 default : 00590 /* update return status */ 00591 status = HAL_ERROR; 00592 break; 00593 } 00594 } 00595 else if (HAL_DFSDM_CHANNEL_STATE_RESET == hdfsdm_channel->State) 00596 { 00597 switch (CallbackID) 00598 { 00599 case HAL_DFSDM_CHANNEL_MSPINIT_CB_ID : 00600 hdfsdm_channel->MspInitCallback = pCallback; 00601 break; 00602 case HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID : 00603 hdfsdm_channel->MspDeInitCallback = pCallback; 00604 break; 00605 default : 00606 /* update return status */ 00607 status = HAL_ERROR; 00608 break; 00609 } 00610 } 00611 else 00612 { 00613 /* update return status */ 00614 status = HAL_ERROR; 00615 } 00616 } 00617 return status; 00618 } 00619 00620 /** 00621 * @brief Unregister a user DFSDM channel callback. 00622 * DFSDM channel callback is redirected to the weak predefined callback. 00623 * @param hdfsdm_channel DFSDM channel handle. 00624 * @param CallbackID ID of the callback to be unregistered. 00625 * This parameter can be one of the following values: 00626 * @arg @ref HAL_DFSDM_CHANNEL_CKAB_CB_ID clock absence detection callback ID. 00627 * @arg @ref HAL_DFSDM_CHANNEL_SCD_CB_ID short circuit detection callback ID. 00628 * @arg @ref HAL_DFSDM_CHANNEL_MSPINIT_CB_ID MSP init callback ID. 00629 * @arg @ref HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID MSP de-init callback ID. 00630 * @retval HAL status. 00631 */ 00632 HAL_StatusTypeDef HAL_DFSDM_Channel_UnRegisterCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, 00633 HAL_DFSDM_Channel_CallbackIDTypeDef CallbackID) 00634 { 00635 HAL_StatusTypeDef status = HAL_OK; 00636 00637 if (HAL_DFSDM_CHANNEL_STATE_READY == hdfsdm_channel->State) 00638 { 00639 switch (CallbackID) 00640 { 00641 case HAL_DFSDM_CHANNEL_CKAB_CB_ID : 00642 hdfsdm_channel->CkabCallback = HAL_DFSDM_ChannelCkabCallback; 00643 break; 00644 case HAL_DFSDM_CHANNEL_SCD_CB_ID : 00645 hdfsdm_channel->ScdCallback = HAL_DFSDM_ChannelScdCallback; 00646 break; 00647 case HAL_DFSDM_CHANNEL_MSPINIT_CB_ID : 00648 hdfsdm_channel->MspInitCallback = HAL_DFSDM_ChannelMspInit; 00649 break; 00650 case HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID : 00651 hdfsdm_channel->MspDeInitCallback = HAL_DFSDM_ChannelMspDeInit; 00652 break; 00653 default : 00654 /* update return status */ 00655 status = HAL_ERROR; 00656 break; 00657 } 00658 } 00659 else if (HAL_DFSDM_CHANNEL_STATE_RESET == hdfsdm_channel->State) 00660 { 00661 switch (CallbackID) 00662 { 00663 case HAL_DFSDM_CHANNEL_MSPINIT_CB_ID : 00664 hdfsdm_channel->MspInitCallback = HAL_DFSDM_ChannelMspInit; 00665 break; 00666 case HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID : 00667 hdfsdm_channel->MspDeInitCallback = HAL_DFSDM_ChannelMspDeInit; 00668 break; 00669 default : 00670 /* update return status */ 00671 status = HAL_ERROR; 00672 break; 00673 } 00674 } 00675 else 00676 { 00677 /* update return status */ 00678 status = HAL_ERROR; 00679 } 00680 return status; 00681 } 00682 #endif /* USE_HAL_DFSDM_REGISTER_CALLBACKS */ 00683 00684 /** 00685 * @} 00686 */ 00687 00688 /** @defgroup DFSDM_Exported_Functions_Group2_Channel Channel operation functions 00689 * @brief Channel operation functions 00690 * 00691 @verbatim 00692 ============================================================================== 00693 ##### Channel operation functions ##### 00694 ============================================================================== 00695 [..] This section provides functions allowing to: 00696 (+) Manage clock absence detector feature. 00697 (+) Manage short circuit detector feature. 00698 (+) Get analog watchdog value. 00699 (+) Modify offset value. 00700 @endverbatim 00701 * @{ 00702 */ 00703 00704 /** 00705 * @brief This function allows to start clock absence detection in polling mode. 00706 * @note Same mode has to be used for all channels. 00707 * @note If clock is not available on this channel during 5 seconds, 00708 * clock absence detection will not be activated and function 00709 * will return HAL_TIMEOUT error. 00710 * @param hdfsdm_channel DFSDM channel handle. 00711 * @retval HAL status 00712 */ 00713 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel) 00714 { 00715 HAL_StatusTypeDef status = HAL_OK; 00716 uint32_t channel; 00717 uint32_t tickstart; 00718 00719 /* Check parameters */ 00720 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance)); 00721 00722 /* Check DFSDM channel state */ 00723 if (hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY) 00724 { 00725 /* Return error status */ 00726 status = HAL_ERROR; 00727 } 00728 else 00729 { 00730 /* Get channel number from channel instance */ 00731 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance); 00732 00733 /* Get timeout */ 00734 tickstart = HAL_GetTick(); 00735 00736 /* Clear clock absence flag */ 00737 while ((((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_Pos + channel)) & 1U) != 0U) 00738 { 00739 DFSDM1_Filter0->FLTICR = (1UL << (DFSDM_FLTICR_CLRCKABF_Pos + channel)); 00740 00741 /* Check the Timeout */ 00742 if ((HAL_GetTick() - tickstart) > DFSDM_CKAB_TIMEOUT) 00743 { 00744 /* Set timeout status */ 00745 status = HAL_TIMEOUT; 00746 break; 00747 } 00748 } 00749 00750 if (status == HAL_OK) 00751 { 00752 /* Start clock absence detection */ 00753 hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_CKABEN; 00754 } 00755 } 00756 /* Return function status */ 00757 return status; 00758 } 00759 00760 /** 00761 * @brief This function allows to poll for the clock absence detection. 00762 * @param hdfsdm_channel DFSDM channel handle. 00763 * @param Timeout Timeout value in milliseconds. 00764 * @retval HAL status 00765 */ 00766 HAL_StatusTypeDef HAL_DFSDM_ChannelPollForCkab(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, 00767 uint32_t Timeout) 00768 { 00769 uint32_t tickstart; 00770 uint32_t channel; 00771 00772 /* Check parameters */ 00773 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance)); 00774 00775 /* Check DFSDM channel state */ 00776 if (hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY) 00777 { 00778 /* Return error status */ 00779 return HAL_ERROR; 00780 } 00781 else 00782 { 00783 /* Get channel number from channel instance */ 00784 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance); 00785 00786 /* Get timeout */ 00787 tickstart = HAL_GetTick(); 00788 00789 /* Wait clock absence detection */ 00790 while ((((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_Pos + channel)) & 1U) == 0U) 00791 { 00792 /* Check the Timeout */ 00793 if (Timeout != HAL_MAX_DELAY) 00794 { 00795 if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U)) 00796 { 00797 /* Return timeout status */ 00798 return HAL_TIMEOUT; 00799 } 00800 } 00801 } 00802 00803 /* Clear clock absence detection flag */ 00804 DFSDM1_Filter0->FLTICR = (1UL << (DFSDM_FLTICR_CLRCKABF_Pos + channel)); 00805 00806 /* Return function status */ 00807 return HAL_OK; 00808 } 00809 } 00810 00811 /** 00812 * @brief This function allows to stop clock absence detection in polling mode. 00813 * @param hdfsdm_channel DFSDM channel handle. 00814 * @retval HAL status 00815 */ 00816 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel) 00817 { 00818 HAL_StatusTypeDef status = HAL_OK; 00819 uint32_t channel; 00820 00821 /* Check parameters */ 00822 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance)); 00823 00824 /* Check DFSDM channel state */ 00825 if (hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY) 00826 { 00827 /* Return error status */ 00828 status = HAL_ERROR; 00829 } 00830 else 00831 { 00832 /* Stop clock absence detection */ 00833 hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKABEN); 00834 00835 /* Clear clock absence flag */ 00836 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance); 00837 DFSDM1_Filter0->FLTICR = (1UL << (DFSDM_FLTICR_CLRCKABF_Pos + channel)); 00838 } 00839 /* Return function status */ 00840 return status; 00841 } 00842 00843 /** 00844 * @brief This function allows to start clock absence detection in interrupt mode. 00845 * @note Same mode has to be used for all channels. 00846 * @note If clock is not available on this channel during 5 seconds, 00847 * clock absence detection will not be activated and function 00848 * will return HAL_TIMEOUT error. 00849 * @param hdfsdm_channel DFSDM channel handle. 00850 * @retval HAL status 00851 */ 00852 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel) 00853 { 00854 HAL_StatusTypeDef status = HAL_OK; 00855 uint32_t channel; 00856 uint32_t tickstart; 00857 00858 /* Check parameters */ 00859 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance)); 00860 00861 /* Check DFSDM channel state */ 00862 if (hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY) 00863 { 00864 /* Return error status */ 00865 status = HAL_ERROR; 00866 } 00867 else 00868 { 00869 /* Get channel number from channel instance */ 00870 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance); 00871 00872 /* Get timeout */ 00873 tickstart = HAL_GetTick(); 00874 00875 /* Clear clock absence flag */ 00876 while ((((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_Pos + channel)) & 1U) != 0U) 00877 { 00878 DFSDM1_Filter0->FLTICR = (1UL << (DFSDM_FLTICR_CLRCKABF_Pos + channel)); 00879 00880 /* Check the Timeout */ 00881 if ((HAL_GetTick() - tickstart) > DFSDM_CKAB_TIMEOUT) 00882 { 00883 /* Set timeout status */ 00884 status = HAL_TIMEOUT; 00885 break; 00886 } 00887 } 00888 00889 if (status == HAL_OK) 00890 { 00891 /* Activate clock absence detection interrupt */ 00892 DFSDM1_Filter0->FLTCR2 |= DFSDM_FLTCR2_CKABIE; 00893 00894 /* Start clock absence detection */ 00895 hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_CKABEN; 00896 } 00897 } 00898 /* Return function status */ 00899 return status; 00900 } 00901 00902 /** 00903 * @brief Clock absence detection callback. 00904 * @param hdfsdm_channel DFSDM channel handle. 00905 * @retval None 00906 */ 00907 __weak void HAL_DFSDM_ChannelCkabCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel) 00908 { 00909 /* Prevent unused argument(s) compilation warning */ 00910 UNUSED(hdfsdm_channel); 00911 00912 /* NOTE : This function should not be modified, when the callback is needed, 00913 the HAL_DFSDM_ChannelCkabCallback could be implemented in the user file 00914 */ 00915 } 00916 00917 /** 00918 * @brief This function allows to stop clock absence detection in interrupt mode. 00919 * @note Interrupt will be disabled for all channels 00920 * @param hdfsdm_channel DFSDM channel handle. 00921 * @retval HAL status 00922 */ 00923 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel) 00924 { 00925 HAL_StatusTypeDef status = HAL_OK; 00926 uint32_t channel; 00927 00928 /* Check parameters */ 00929 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance)); 00930 00931 /* Check DFSDM channel state */ 00932 if (hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY) 00933 { 00934 /* Return error status */ 00935 status = HAL_ERROR; 00936 } 00937 else 00938 { 00939 /* Stop clock absence detection */ 00940 hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKABEN); 00941 00942 /* Clear clock absence flag */ 00943 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance); 00944 DFSDM1_Filter0->FLTICR = (1UL << (DFSDM_FLTICR_CLRCKABF_Pos + channel)); 00945 00946 /* Disable clock absence detection interrupt */ 00947 DFSDM1_Filter0->FLTCR2 &= ~(DFSDM_FLTCR2_CKABIE); 00948 } 00949 /* Return function status */ 00950 return status; 00951 } 00952 00953 /** 00954 * @brief This function allows to start short circuit detection in polling mode. 00955 * @note Same mode has to be used for all channels 00956 * @param hdfsdm_channel DFSDM channel handle. 00957 * @param Threshold Short circuit detector threshold. 00958 * This parameter must be a number between Min_Data = 0 and Max_Data = 255. 00959 * @param BreakSignal Break signals assigned to short circuit event. 00960 * This parameter can be a values combination of @ref DFSDM_BreakSignals. 00961 * @retval HAL status 00962 */ 00963 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, 00964 uint32_t Threshold, 00965 uint32_t BreakSignal) 00966 { 00967 HAL_StatusTypeDef status = HAL_OK; 00968 00969 /* Check parameters */ 00970 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance)); 00971 assert_param(IS_DFSDM_CHANNEL_SCD_THRESHOLD(Threshold)); 00972 assert_param(IS_DFSDM_BREAK_SIGNALS(BreakSignal)); 00973 00974 /* Check DFSDM channel state */ 00975 if (hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY) 00976 { 00977 /* Return error status */ 00978 status = HAL_ERROR; 00979 } 00980 else 00981 { 00982 /* Configure threshold and break signals */ 00983 hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_BKSCD | DFSDM_CHAWSCDR_SCDT); 00984 hdfsdm_channel->Instance->CHAWSCDR |= ((BreakSignal << DFSDM_CHAWSCDR_BKSCD_Pos) | \ 00985 Threshold); 00986 00987 /* Start short circuit detection */ 00988 hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_SCDEN; 00989 } 00990 /* Return function status */ 00991 return status; 00992 } 00993 00994 /** 00995 * @brief This function allows to poll for the short circuit detection. 00996 * @param hdfsdm_channel DFSDM channel handle. 00997 * @param Timeout Timeout value in milliseconds. 00998 * @retval HAL status 00999 */ 01000 HAL_StatusTypeDef HAL_DFSDM_ChannelPollForScd(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, 01001 uint32_t Timeout) 01002 { 01003 uint32_t tickstart; 01004 uint32_t channel; 01005 01006 /* Check parameters */ 01007 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance)); 01008 01009 /* Check DFSDM channel state */ 01010 if (hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY) 01011 { 01012 /* Return error status */ 01013 return HAL_ERROR; 01014 } 01015 else 01016 { 01017 /* Get channel number from channel instance */ 01018 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance); 01019 01020 /* Get timeout */ 01021 tickstart = HAL_GetTick(); 01022 01023 /* Wait short circuit detection */ 01024 while (((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_SCDF) >> (DFSDM_FLTISR_SCDF_Pos + channel)) == 0U) 01025 { 01026 /* Check the Timeout */ 01027 if (Timeout != HAL_MAX_DELAY) 01028 { 01029 if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U)) 01030 { 01031 /* Return timeout status */ 01032 return HAL_TIMEOUT; 01033 } 01034 } 01035 } 01036 01037 /* Clear short circuit detection flag */ 01038 DFSDM1_Filter0->FLTICR = (1UL << (DFSDM_FLTICR_CLRSCDF_Pos + channel)); 01039 01040 /* Return function status */ 01041 return HAL_OK; 01042 } 01043 } 01044 01045 /** 01046 * @brief This function allows to stop short circuit detection in polling mode. 01047 * @param hdfsdm_channel DFSDM channel handle. 01048 * @retval HAL status 01049 */ 01050 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel) 01051 { 01052 HAL_StatusTypeDef status = HAL_OK; 01053 uint32_t channel; 01054 01055 /* Check parameters */ 01056 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance)); 01057 01058 /* Check DFSDM channel state */ 01059 if (hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY) 01060 { 01061 /* Return error status */ 01062 status = HAL_ERROR; 01063 } 01064 else 01065 { 01066 /* Stop short circuit detection */ 01067 hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SCDEN); 01068 01069 /* Clear short circuit detection flag */ 01070 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance); 01071 DFSDM1_Filter0->FLTICR = (1UL << (DFSDM_FLTICR_CLRSCDF_Pos + channel)); 01072 } 01073 /* Return function status */ 01074 return status; 01075 } 01076 01077 /** 01078 * @brief This function allows to start short circuit detection in interrupt mode. 01079 * @note Same mode has to be used for all channels 01080 * @param hdfsdm_channel DFSDM channel handle. 01081 * @param Threshold Short circuit detector threshold. 01082 * This parameter must be a number between Min_Data = 0 and Max_Data = 255. 01083 * @param BreakSignal Break signals assigned to short circuit event. 01084 * This parameter can be a values combination of @ref DFSDM_BreakSignals. 01085 * @retval HAL status 01086 */ 01087 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, 01088 uint32_t Threshold, 01089 uint32_t BreakSignal) 01090 { 01091 HAL_StatusTypeDef status = HAL_OK; 01092 01093 /* Check parameters */ 01094 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance)); 01095 assert_param(IS_DFSDM_CHANNEL_SCD_THRESHOLD(Threshold)); 01096 assert_param(IS_DFSDM_BREAK_SIGNALS(BreakSignal)); 01097 01098 /* Check DFSDM channel state */ 01099 if (hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY) 01100 { 01101 /* Return error status */ 01102 status = HAL_ERROR; 01103 } 01104 else 01105 { 01106 /* Activate short circuit detection interrupt */ 01107 DFSDM1_Filter0->FLTCR2 |= DFSDM_FLTCR2_SCDIE; 01108 01109 /* Configure threshold and break signals */ 01110 hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_BKSCD | DFSDM_CHAWSCDR_SCDT); 01111 hdfsdm_channel->Instance->CHAWSCDR |= ((BreakSignal << DFSDM_CHAWSCDR_BKSCD_Pos) | \ 01112 Threshold); 01113 01114 /* Start short circuit detection */ 01115 hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_SCDEN; 01116 } 01117 /* Return function status */ 01118 return status; 01119 } 01120 01121 /** 01122 * @brief Short circuit detection callback. 01123 * @param hdfsdm_channel DFSDM channel handle. 01124 * @retval None 01125 */ 01126 __weak void HAL_DFSDM_ChannelScdCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel) 01127 { 01128 /* Prevent unused argument(s) compilation warning */ 01129 UNUSED(hdfsdm_channel); 01130 01131 /* NOTE : This function should not be modified, when the callback is needed, 01132 the HAL_DFSDM_ChannelScdCallback could be implemented in the user file 01133 */ 01134 } 01135 01136 /** 01137 * @brief This function allows to stop short circuit detection in interrupt mode. 01138 * @note Interrupt will be disabled for all channels 01139 * @param hdfsdm_channel DFSDM channel handle. 01140 * @retval HAL status 01141 */ 01142 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel) 01143 { 01144 HAL_StatusTypeDef status = HAL_OK; 01145 uint32_t channel; 01146 01147 /* Check parameters */ 01148 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance)); 01149 01150 /* Check DFSDM channel state */ 01151 if (hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY) 01152 { 01153 /* Return error status */ 01154 status = HAL_ERROR; 01155 } 01156 else 01157 { 01158 /* Stop short circuit detection */ 01159 hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SCDEN); 01160 01161 /* Clear short circuit detection flag */ 01162 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance); 01163 DFSDM1_Filter0->FLTICR = (1UL << (DFSDM_FLTICR_CLRSCDF_Pos + channel)); 01164 01165 /* Disable short circuit detection interrupt */ 01166 DFSDM1_Filter0->FLTCR2 &= ~(DFSDM_FLTCR2_SCDIE); 01167 } 01168 /* Return function status */ 01169 return status; 01170 } 01171 01172 /** 01173 * @brief This function allows to get channel analog watchdog value. 01174 * @param hdfsdm_channel DFSDM channel handle. 01175 * @retval Channel analog watchdog value. 01176 */ 01177 int16_t HAL_DFSDM_ChannelGetAwdValue(DFSDM_Channel_HandleTypeDef *hdfsdm_channel) 01178 { 01179 return (int16_t) hdfsdm_channel->Instance->CHWDATAR; 01180 } 01181 01182 /** 01183 * @brief This function allows to modify channel offset value. 01184 * @param hdfsdm_channel DFSDM channel handle. 01185 * @param Offset DFSDM channel offset. 01186 * This parameter must be a number between Min_Data = -8388608 and Max_Data = 8388607. 01187 * @retval HAL status. 01188 */ 01189 HAL_StatusTypeDef HAL_DFSDM_ChannelModifyOffset(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, 01190 int32_t Offset) 01191 { 01192 HAL_StatusTypeDef status = HAL_OK; 01193 01194 /* Check parameters */ 01195 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance)); 01196 assert_param(IS_DFSDM_CHANNEL_OFFSET(Offset)); 01197 01198 /* Check DFSDM channel state */ 01199 if (hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY) 01200 { 01201 /* Return error status */ 01202 status = HAL_ERROR; 01203 } 01204 else 01205 { 01206 /* Modify channel offset */ 01207 hdfsdm_channel->Instance->CHCFGR2 &= ~(DFSDM_CHCFGR2_OFFSET); 01208 hdfsdm_channel->Instance->CHCFGR2 |= ((uint32_t) Offset << DFSDM_CHCFGR2_OFFSET_Pos); 01209 } 01210 /* Return function status */ 01211 return status; 01212 } 01213 01214 /** 01215 * @} 01216 */ 01217 01218 /** @defgroup DFSDM_Exported_Functions_Group3_Channel Channel state function 01219 * @brief Channel state function 01220 * 01221 @verbatim 01222 ============================================================================== 01223 ##### Channel state function ##### 01224 ============================================================================== 01225 [..] This section provides function allowing to: 01226 (+) Get channel handle state. 01227 @endverbatim 01228 * @{ 01229 */ 01230 01231 /** 01232 * @brief This function allows to get the current DFSDM channel handle state. 01233 * @param hdfsdm_channel DFSDM channel handle. 01234 * @retval DFSDM channel state. 01235 */ 01236 HAL_DFSDM_Channel_StateTypeDef HAL_DFSDM_ChannelGetState(DFSDM_Channel_HandleTypeDef *hdfsdm_channel) 01237 { 01238 /* Return DFSDM channel handle state */ 01239 return hdfsdm_channel->State; 01240 } 01241 01242 /** 01243 * @} 01244 */ 01245 01246 /** @defgroup DFSDM_Exported_Functions_Group1_Filter Filter initialization and de-initialization functions 01247 * @brief Filter initialization and de-initialization functions 01248 * 01249 @verbatim 01250 ============================================================================== 01251 ##### Filter initialization and de-initialization functions ##### 01252 ============================================================================== 01253 [..] This section provides functions allowing to: 01254 (+) Initialize the DFSDM filter. 01255 (+) De-initialize the DFSDM filter. 01256 @endverbatim 01257 * @{ 01258 */ 01259 01260 /** 01261 * @brief Initialize the DFSDM filter according to the specified parameters 01262 * in the DFSDM_FilterInitTypeDef structure and initialize the associated handle. 01263 * @param hdfsdm_filter DFSDM filter handle. 01264 * @retval HAL status. 01265 */ 01266 HAL_StatusTypeDef HAL_DFSDM_FilterInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 01267 { 01268 /* Check DFSDM Channel handle */ 01269 if (hdfsdm_filter == NULL) 01270 { 01271 return HAL_ERROR; 01272 } 01273 01274 /* Check parameters */ 01275 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance)); 01276 assert_param(IS_DFSDM_FILTER_REG_TRIGGER(hdfsdm_filter->Init.RegularParam.Trigger)); 01277 assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.RegularParam.FastMode)); 01278 assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.RegularParam.DmaMode)); 01279 assert_param(IS_DFSDM_FILTER_INJ_TRIGGER(hdfsdm_filter->Init.InjectedParam.Trigger)); 01280 assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.InjectedParam.ScanMode)); 01281 assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.InjectedParam.DmaMode)); 01282 assert_param(IS_DFSDM_FILTER_SINC_ORDER(hdfsdm_filter->Init.FilterParam.SincOrder)); 01283 assert_param(IS_DFSDM_FILTER_OVS_RATIO(hdfsdm_filter->Init.FilterParam.Oversampling)); 01284 assert_param(IS_DFSDM_FILTER_INTEGRATOR_OVS_RATIO(hdfsdm_filter->Init.FilterParam.IntOversampling)); 01285 01286 /* Check parameters compatibility */ 01287 if ((hdfsdm_filter->Instance == DFSDM1_Filter0) && 01288 ((hdfsdm_filter->Init.RegularParam.Trigger == DFSDM_FILTER_SYNC_TRIGGER) || 01289 (hdfsdm_filter->Init.InjectedParam.Trigger == DFSDM_FILTER_SYNC_TRIGGER))) 01290 { 01291 return HAL_ERROR; 01292 } 01293 01294 /* Initialize DFSDM filter variables with default values */ 01295 hdfsdm_filter->RegularContMode = DFSDM_CONTINUOUS_CONV_OFF; 01296 hdfsdm_filter->InjectedChannelsNbr = 1; 01297 hdfsdm_filter->InjConvRemaining = 1; 01298 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_NONE; 01299 01300 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1) 01301 /* Reset callback pointers to the weak predefined callbacks */ 01302 hdfsdm_filter->AwdCallback = HAL_DFSDM_FilterAwdCallback; 01303 hdfsdm_filter->RegConvCpltCallback = HAL_DFSDM_FilterRegConvCpltCallback; 01304 hdfsdm_filter->RegConvHalfCpltCallback = HAL_DFSDM_FilterRegConvHalfCpltCallback; 01305 hdfsdm_filter->InjConvCpltCallback = HAL_DFSDM_FilterInjConvCpltCallback; 01306 hdfsdm_filter->InjConvHalfCpltCallback = HAL_DFSDM_FilterInjConvHalfCpltCallback; 01307 hdfsdm_filter->ErrorCallback = HAL_DFSDM_FilterErrorCallback; 01308 01309 /* Call MSP init function */ 01310 if (hdfsdm_filter->MspInitCallback == NULL) 01311 { 01312 hdfsdm_filter->MspInitCallback = HAL_DFSDM_FilterMspInit; 01313 } 01314 hdfsdm_filter->MspInitCallback(hdfsdm_filter); 01315 #else 01316 /* Call MSP init function */ 01317 HAL_DFSDM_FilterMspInit(hdfsdm_filter); 01318 #endif 01319 01320 /* Set regular parameters */ 01321 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RSYNC); 01322 if (hdfsdm_filter->Init.RegularParam.FastMode == ENABLE) 01323 { 01324 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_FAST; 01325 } 01326 else 01327 { 01328 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_FAST); 01329 } 01330 01331 if (hdfsdm_filter->Init.RegularParam.DmaMode == ENABLE) 01332 { 01333 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RDMAEN; 01334 } 01335 else 01336 { 01337 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RDMAEN); 01338 } 01339 01340 /* Set injected parameters */ 01341 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSYNC | DFSDM_FLTCR1_JEXTEN | DFSDM_FLTCR1_JEXTSEL); 01342 if (hdfsdm_filter->Init.InjectedParam.Trigger == DFSDM_FILTER_EXT_TRIGGER) 01343 { 01344 assert_param(IS_DFSDM_FILTER_EXT_TRIG(hdfsdm_filter->Init.InjectedParam.ExtTrigger)); 01345 assert_param(IS_DFSDM_FILTER_EXT_TRIG_EDGE(hdfsdm_filter->Init.InjectedParam.ExtTriggerEdge)); 01346 hdfsdm_filter->Instance->FLTCR1 |= (hdfsdm_filter->Init.InjectedParam.ExtTrigger); 01347 } 01348 01349 if (hdfsdm_filter->Init.InjectedParam.ScanMode == ENABLE) 01350 { 01351 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSCAN; 01352 } 01353 else 01354 { 01355 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSCAN); 01356 } 01357 01358 if (hdfsdm_filter->Init.InjectedParam.DmaMode == ENABLE) 01359 { 01360 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JDMAEN; 01361 } 01362 else 01363 { 01364 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JDMAEN); 01365 } 01366 01367 /* Set filter parameters */ 01368 hdfsdm_filter->Instance->FLTFCR &= ~(DFSDM_FLTFCR_FORD | DFSDM_FLTFCR_FOSR | DFSDM_FLTFCR_IOSR); 01369 hdfsdm_filter->Instance->FLTFCR |= (hdfsdm_filter->Init.FilterParam.SincOrder | 01370 ((hdfsdm_filter->Init.FilterParam.Oversampling - 1U) << DFSDM_FLTFCR_FOSR_Pos) | 01371 (hdfsdm_filter->Init.FilterParam.IntOversampling - 1U)); 01372 01373 /* Store regular and injected triggers and injected scan mode*/ 01374 hdfsdm_filter->RegularTrigger = hdfsdm_filter->Init.RegularParam.Trigger; 01375 hdfsdm_filter->InjectedTrigger = hdfsdm_filter->Init.InjectedParam.Trigger; 01376 hdfsdm_filter->ExtTriggerEdge = hdfsdm_filter->Init.InjectedParam.ExtTriggerEdge; 01377 hdfsdm_filter->InjectedScanMode = hdfsdm_filter->Init.InjectedParam.ScanMode; 01378 01379 /* Enable DFSDM filter */ 01380 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN; 01381 01382 /* Set DFSDM filter to ready state */ 01383 hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_READY; 01384 01385 return HAL_OK; 01386 } 01387 01388 /** 01389 * @brief De-initializes the DFSDM filter. 01390 * @param hdfsdm_filter DFSDM filter handle. 01391 * @retval HAL status. 01392 */ 01393 HAL_StatusTypeDef HAL_DFSDM_FilterDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 01394 { 01395 /* Check DFSDM filter handle */ 01396 if (hdfsdm_filter == NULL) 01397 { 01398 return HAL_ERROR; 01399 } 01400 01401 /* Check parameters */ 01402 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance)); 01403 01404 /* Disable the DFSDM filter */ 01405 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN); 01406 01407 /* Call MSP deinit function */ 01408 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1) 01409 if (hdfsdm_filter->MspDeInitCallback == NULL) 01410 { 01411 hdfsdm_filter->MspDeInitCallback = HAL_DFSDM_FilterMspDeInit; 01412 } 01413 hdfsdm_filter->MspDeInitCallback(hdfsdm_filter); 01414 #else 01415 HAL_DFSDM_FilterMspDeInit(hdfsdm_filter); 01416 #endif 01417 01418 /* Set DFSDM filter in reset state */ 01419 hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_RESET; 01420 01421 return HAL_OK; 01422 } 01423 01424 /** 01425 * @brief Initializes the DFSDM filter MSP. 01426 * @param hdfsdm_filter DFSDM filter handle. 01427 * @retval None 01428 */ 01429 __weak void HAL_DFSDM_FilterMspInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 01430 { 01431 /* Prevent unused argument(s) compilation warning */ 01432 UNUSED(hdfsdm_filter); 01433 01434 /* NOTE : This function should not be modified, when the function is needed, 01435 the HAL_DFSDM_FilterMspInit could be implemented in the user file. 01436 */ 01437 } 01438 01439 /** 01440 * @brief De-initializes the DFSDM filter MSP. 01441 * @param hdfsdm_filter DFSDM filter handle. 01442 * @retval None 01443 */ 01444 __weak void HAL_DFSDM_FilterMspDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 01445 { 01446 /* Prevent unused argument(s) compilation warning */ 01447 UNUSED(hdfsdm_filter); 01448 01449 /* NOTE : This function should not be modified, when the function is needed, 01450 the HAL_DFSDM_FilterMspDeInit could be implemented in the user file. 01451 */ 01452 } 01453 01454 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1) 01455 /** 01456 * @brief Register a user DFSDM filter callback 01457 * to be used instead of the weak predefined callback. 01458 * @param hdfsdm_filter DFSDM filter handle. 01459 * @param CallbackID ID of the callback to be registered. 01460 * This parameter can be one of the following values: 01461 * @arg @ref HAL_DFSDM_FILTER_REGCONV_COMPLETE_CB_ID regular conversion complete callback ID. 01462 * @arg @ref HAL_DFSDM_FILTER_REGCONV_HALFCOMPLETE_CB_ID half regular conversion complete callback ID. 01463 * @arg @ref HAL_DFSDM_FILTER_INJCONV_COMPLETE_CB_ID injected conversion complete callback ID. 01464 * @arg @ref HAL_DFSDM_FILTER_INJCONV_HALFCOMPLETE_CB_ID half injected conversion complete callback ID. 01465 * @arg @ref HAL_DFSDM_FILTER_ERROR_CB_ID error callback ID. 01466 * @arg @ref HAL_DFSDM_FILTER_MSPINIT_CB_ID MSP init callback ID. 01467 * @arg @ref HAL_DFSDM_FILTER_MSPDEINIT_CB_ID MSP de-init callback ID. 01468 * @param pCallback pointer to the callback function. 01469 * @retval HAL status. 01470 */ 01471 HAL_StatusTypeDef HAL_DFSDM_Filter_RegisterCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, 01472 HAL_DFSDM_Filter_CallbackIDTypeDef CallbackID, 01473 pDFSDM_Filter_CallbackTypeDef pCallback) 01474 { 01475 HAL_StatusTypeDef status = HAL_OK; 01476 01477 if (pCallback == NULL) 01478 { 01479 /* update the error code */ 01480 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK; 01481 /* update return status */ 01482 status = HAL_ERROR; 01483 } 01484 else 01485 { 01486 if (HAL_DFSDM_FILTER_STATE_READY == hdfsdm_filter->State) 01487 { 01488 switch (CallbackID) 01489 { 01490 case HAL_DFSDM_FILTER_REGCONV_COMPLETE_CB_ID : 01491 hdfsdm_filter->RegConvCpltCallback = pCallback; 01492 break; 01493 case HAL_DFSDM_FILTER_REGCONV_HALFCOMPLETE_CB_ID : 01494 hdfsdm_filter->RegConvHalfCpltCallback = pCallback; 01495 break; 01496 case HAL_DFSDM_FILTER_INJCONV_COMPLETE_CB_ID : 01497 hdfsdm_filter->InjConvCpltCallback = pCallback; 01498 break; 01499 case HAL_DFSDM_FILTER_INJCONV_HALFCOMPLETE_CB_ID : 01500 hdfsdm_filter->InjConvHalfCpltCallback = pCallback; 01501 break; 01502 case HAL_DFSDM_FILTER_ERROR_CB_ID : 01503 hdfsdm_filter->ErrorCallback = pCallback; 01504 break; 01505 case HAL_DFSDM_FILTER_MSPINIT_CB_ID : 01506 hdfsdm_filter->MspInitCallback = pCallback; 01507 break; 01508 case HAL_DFSDM_FILTER_MSPDEINIT_CB_ID : 01509 hdfsdm_filter->MspDeInitCallback = pCallback; 01510 break; 01511 default : 01512 /* update the error code */ 01513 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK; 01514 /* update return status */ 01515 status = HAL_ERROR; 01516 break; 01517 } 01518 } 01519 else if (HAL_DFSDM_FILTER_STATE_RESET == hdfsdm_filter->State) 01520 { 01521 switch (CallbackID) 01522 { 01523 case HAL_DFSDM_FILTER_MSPINIT_CB_ID : 01524 hdfsdm_filter->MspInitCallback = pCallback; 01525 break; 01526 case HAL_DFSDM_FILTER_MSPDEINIT_CB_ID : 01527 hdfsdm_filter->MspDeInitCallback = pCallback; 01528 break; 01529 default : 01530 /* update the error code */ 01531 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK; 01532 /* update return status */ 01533 status = HAL_ERROR; 01534 break; 01535 } 01536 } 01537 else 01538 { 01539 /* update the error code */ 01540 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK; 01541 /* update return status */ 01542 status = HAL_ERROR; 01543 } 01544 } 01545 return status; 01546 } 01547 01548 /** 01549 * @brief Unregister a user DFSDM filter callback. 01550 * DFSDM filter callback is redirected to the weak predefined callback. 01551 * @param hdfsdm_filter DFSDM filter handle. 01552 * @param CallbackID ID of the callback to be unregistered. 01553 * This parameter can be one of the following values: 01554 * @arg @ref HAL_DFSDM_FILTER_REGCONV_COMPLETE_CB_ID regular conversion complete callback ID. 01555 * @arg @ref HAL_DFSDM_FILTER_REGCONV_HALFCOMPLETE_CB_ID half regular conversion complete callback ID. 01556 * @arg @ref HAL_DFSDM_FILTER_INJCONV_COMPLETE_CB_ID injected conversion complete callback ID. 01557 * @arg @ref HAL_DFSDM_FILTER_INJCONV_HALFCOMPLETE_CB_ID half injected conversion complete callback ID. 01558 * @arg @ref HAL_DFSDM_FILTER_ERROR_CB_ID error callback ID. 01559 * @arg @ref HAL_DFSDM_FILTER_MSPINIT_CB_ID MSP init callback ID. 01560 * @arg @ref HAL_DFSDM_FILTER_MSPDEINIT_CB_ID MSP de-init callback ID. 01561 * @retval HAL status. 01562 */ 01563 HAL_StatusTypeDef HAL_DFSDM_Filter_UnRegisterCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, 01564 HAL_DFSDM_Filter_CallbackIDTypeDef CallbackID) 01565 { 01566 HAL_StatusTypeDef status = HAL_OK; 01567 01568 if (HAL_DFSDM_FILTER_STATE_READY == hdfsdm_filter->State) 01569 { 01570 switch (CallbackID) 01571 { 01572 case HAL_DFSDM_FILTER_REGCONV_COMPLETE_CB_ID : 01573 hdfsdm_filter->RegConvCpltCallback = HAL_DFSDM_FilterRegConvCpltCallback; 01574 break; 01575 case HAL_DFSDM_FILTER_REGCONV_HALFCOMPLETE_CB_ID : 01576 hdfsdm_filter->RegConvHalfCpltCallback = HAL_DFSDM_FilterRegConvHalfCpltCallback; 01577 break; 01578 case HAL_DFSDM_FILTER_INJCONV_COMPLETE_CB_ID : 01579 hdfsdm_filter->InjConvCpltCallback = HAL_DFSDM_FilterInjConvCpltCallback; 01580 break; 01581 case HAL_DFSDM_FILTER_INJCONV_HALFCOMPLETE_CB_ID : 01582 hdfsdm_filter->InjConvHalfCpltCallback = HAL_DFSDM_FilterInjConvHalfCpltCallback; 01583 break; 01584 case HAL_DFSDM_FILTER_ERROR_CB_ID : 01585 hdfsdm_filter->ErrorCallback = HAL_DFSDM_FilterErrorCallback; 01586 break; 01587 case HAL_DFSDM_FILTER_MSPINIT_CB_ID : 01588 hdfsdm_filter->MspInitCallback = HAL_DFSDM_FilterMspInit; 01589 break; 01590 case HAL_DFSDM_FILTER_MSPDEINIT_CB_ID : 01591 hdfsdm_filter->MspDeInitCallback = HAL_DFSDM_FilterMspDeInit; 01592 break; 01593 default : 01594 /* update the error code */ 01595 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK; 01596 /* update return status */ 01597 status = HAL_ERROR; 01598 break; 01599 } 01600 } 01601 else if (HAL_DFSDM_FILTER_STATE_RESET == hdfsdm_filter->State) 01602 { 01603 switch (CallbackID) 01604 { 01605 case HAL_DFSDM_FILTER_MSPINIT_CB_ID : 01606 hdfsdm_filter->MspInitCallback = HAL_DFSDM_FilterMspInit; 01607 break; 01608 case HAL_DFSDM_FILTER_MSPDEINIT_CB_ID : 01609 hdfsdm_filter->MspDeInitCallback = HAL_DFSDM_FilterMspDeInit; 01610 break; 01611 default : 01612 /* update the error code */ 01613 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK; 01614 /* update return status */ 01615 status = HAL_ERROR; 01616 break; 01617 } 01618 } 01619 else 01620 { 01621 /* update the error code */ 01622 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK; 01623 /* update return status */ 01624 status = HAL_ERROR; 01625 } 01626 return status; 01627 } 01628 01629 /** 01630 * @brief Register a user DFSDM filter analog watchdog callback 01631 * to be used instead of the weak predefined callback. 01632 * @param hdfsdm_filter DFSDM filter handle. 01633 * @param pCallback pointer to the DFSDM filter analog watchdog callback function. 01634 * @retval HAL status. 01635 */ 01636 HAL_StatusTypeDef HAL_DFSDM_Filter_RegisterAwdCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, 01637 pDFSDM_Filter_AwdCallbackTypeDef pCallback) 01638 { 01639 HAL_StatusTypeDef status = HAL_OK; 01640 01641 if (pCallback == NULL) 01642 { 01643 /* update the error code */ 01644 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK; 01645 /* update return status */ 01646 status = HAL_ERROR; 01647 } 01648 else 01649 { 01650 if (HAL_DFSDM_FILTER_STATE_READY == hdfsdm_filter->State) 01651 { 01652 hdfsdm_filter->AwdCallback = pCallback; 01653 } 01654 else 01655 { 01656 /* update the error code */ 01657 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK; 01658 /* update return status */ 01659 status = HAL_ERROR; 01660 } 01661 } 01662 return status; 01663 } 01664 01665 /** 01666 * @brief Unregister a user DFSDM filter analog watchdog callback. 01667 * DFSDM filter AWD callback is redirected to the weak predefined callback. 01668 * @param hdfsdm_filter DFSDM filter handle. 01669 * @retval HAL status. 01670 */ 01671 HAL_StatusTypeDef HAL_DFSDM_Filter_UnRegisterAwdCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 01672 { 01673 HAL_StatusTypeDef status = HAL_OK; 01674 01675 if (HAL_DFSDM_FILTER_STATE_READY == hdfsdm_filter->State) 01676 { 01677 hdfsdm_filter->AwdCallback = HAL_DFSDM_FilterAwdCallback; 01678 } 01679 else 01680 { 01681 /* update the error code */ 01682 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK; 01683 /* update return status */ 01684 status = HAL_ERROR; 01685 } 01686 return status; 01687 } 01688 #endif /* USE_HAL_DFSDM_REGISTER_CALLBACKS */ 01689 01690 /** 01691 * @} 01692 */ 01693 01694 /** @defgroup DFSDM_Exported_Functions_Group2_Filter Filter control functions 01695 * @brief Filter control functions 01696 * 01697 @verbatim 01698 ============================================================================== 01699 ##### Filter control functions ##### 01700 ============================================================================== 01701 [..] This section provides functions allowing to: 01702 (+) Select channel and enable/disable continuous mode for regular conversion. 01703 (+) Select channels for injected conversion. 01704 @endverbatim 01705 * @{ 01706 */ 01707 01708 /** 01709 * @brief This function allows to select channel and to enable/disable 01710 * continuous mode for regular conversion. 01711 * @param hdfsdm_filter DFSDM filter handle. 01712 * @param Channel Channel for regular conversion. 01713 * This parameter can be a value of @ref DFSDM_Channel_Selection. 01714 * @param ContinuousMode Enable/disable continuous mode for regular conversion. 01715 * This parameter can be a value of @ref DFSDM_ContinuousMode. 01716 * @retval HAL status 01717 */ 01718 HAL_StatusTypeDef HAL_DFSDM_FilterConfigRegChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, 01719 uint32_t Channel, 01720 uint32_t ContinuousMode) 01721 { 01722 HAL_StatusTypeDef status = HAL_OK; 01723 01724 /* Check parameters */ 01725 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance)); 01726 assert_param(IS_DFSDM_REGULAR_CHANNEL(Channel)); 01727 assert_param(IS_DFSDM_CONTINUOUS_MODE(ContinuousMode)); 01728 01729 /* Check DFSDM filter state */ 01730 if ((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_RESET) && 01731 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_ERROR)) 01732 { 01733 /* Configure channel and continuous mode for regular conversion */ 01734 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RCH | DFSDM_FLTCR1_RCONT); 01735 if (ContinuousMode == DFSDM_CONTINUOUS_CONV_ON) 01736 { 01737 hdfsdm_filter->Instance->FLTCR1 |= (uint32_t)(((Channel & DFSDM_MSB_MASK) << DFSDM_FLTCR1_MSB_RCH_OFFSET) | 01738 DFSDM_FLTCR1_RCONT); 01739 } 01740 else 01741 { 01742 hdfsdm_filter->Instance->FLTCR1 |= (uint32_t)((Channel & DFSDM_MSB_MASK) << DFSDM_FLTCR1_MSB_RCH_OFFSET); 01743 } 01744 /* Store continuous mode information */ 01745 hdfsdm_filter->RegularContMode = ContinuousMode; 01746 } 01747 else 01748 { 01749 status = HAL_ERROR; 01750 } 01751 01752 /* Return function status */ 01753 return status; 01754 } 01755 01756 /** 01757 * @brief This function allows to select channels for injected conversion. 01758 * @param hdfsdm_filter DFSDM filter handle. 01759 * @param Channel Channels for injected conversion. 01760 * This parameter can be a values combination of @ref DFSDM_Channel_Selection. 01761 * @retval HAL status 01762 */ 01763 HAL_StatusTypeDef HAL_DFSDM_FilterConfigInjChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, 01764 uint32_t Channel) 01765 { 01766 HAL_StatusTypeDef status = HAL_OK; 01767 01768 /* Check parameters */ 01769 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance)); 01770 assert_param(IS_DFSDM_INJECTED_CHANNEL(Channel)); 01771 01772 /* Check DFSDM filter state */ 01773 if ((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_RESET) && 01774 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_ERROR)) 01775 { 01776 /* Configure channel for injected conversion */ 01777 hdfsdm_filter->Instance->FLTJCHGR = (uint32_t)(Channel & DFSDM_LSB_MASK); 01778 /* Store number of injected channels */ 01779 hdfsdm_filter->InjectedChannelsNbr = DFSDM_GetInjChannelsNbr(Channel); 01780 /* Update number of injected channels remaining */ 01781 hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \ 01782 hdfsdm_filter->InjectedChannelsNbr : 1U; 01783 } 01784 else 01785 { 01786 status = HAL_ERROR; 01787 } 01788 /* Return function status */ 01789 return status; 01790 } 01791 01792 /** 01793 * @} 01794 */ 01795 01796 /** @defgroup DFSDM_Exported_Functions_Group3_Filter Filter operation functions 01797 * @brief Filter operation functions 01798 * 01799 @verbatim 01800 ============================================================================== 01801 ##### Filter operation functions ##### 01802 ============================================================================== 01803 [..] This section provides functions allowing to: 01804 (+) Start conversion of regular/injected channel. 01805 (+) Poll for the end of regular/injected conversion. 01806 (+) Stop conversion of regular/injected channel. 01807 (+) Start conversion of regular/injected channel and enable interrupt. 01808 (+) Call the callback functions at the end of regular/injected conversions. 01809 (+) Stop conversion of regular/injected channel and disable interrupt. 01810 (+) Start conversion of regular/injected channel and enable DMA transfer. 01811 (+) Stop conversion of regular/injected channel and disable DMA transfer. 01812 (+) Start analog watchdog and enable interrupt. 01813 (+) Call the callback function when analog watchdog occurs. 01814 (+) Stop analog watchdog and disable interrupt. 01815 (+) Start extreme detector. 01816 (+) Stop extreme detector. 01817 (+) Get result of regular channel conversion. 01818 (+) Get result of injected channel conversion. 01819 (+) Get extreme detector maximum and minimum values. 01820 (+) Get conversion time. 01821 (+) Handle DFSDM interrupt request. 01822 @endverbatim 01823 * @{ 01824 */ 01825 01826 /** 01827 * @brief This function allows to start regular conversion in polling mode. 01828 * @note This function should be called only when DFSDM filter instance is 01829 * in idle state or if injected conversion is ongoing. 01830 * @param hdfsdm_filter DFSDM filter handle. 01831 * @retval HAL status 01832 */ 01833 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 01834 { 01835 HAL_StatusTypeDef status = HAL_OK; 01836 01837 /* Check parameters */ 01838 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance)); 01839 01840 /* Check DFSDM filter state */ 01841 if ((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \ 01842 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ)) 01843 { 01844 /* Start regular conversion */ 01845 DFSDM_RegConvStart(hdfsdm_filter); 01846 } 01847 else 01848 { 01849 status = HAL_ERROR; 01850 } 01851 /* Return function status */ 01852 return status; 01853 } 01854 01855 /** 01856 * @brief This function allows to poll for the end of regular conversion. 01857 * @note This function should be called only if regular conversion is ongoing. 01858 * @param hdfsdm_filter DFSDM filter handle. 01859 * @param Timeout Timeout value in milliseconds. 01860 * @retval HAL status 01861 */ 01862 HAL_StatusTypeDef HAL_DFSDM_FilterPollForRegConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, 01863 uint32_t Timeout) 01864 { 01865 uint32_t tickstart; 01866 01867 /* Check parameters */ 01868 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance)); 01869 01870 /* Check DFSDM filter state */ 01871 if ((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \ 01872 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ)) 01873 { 01874 /* Return error status */ 01875 return HAL_ERROR; 01876 } 01877 else 01878 { 01879 /* Get timeout */ 01880 tickstart = HAL_GetTick(); 01881 01882 /* Wait end of regular conversion */ 01883 while ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_REOCF) != DFSDM_FLTISR_REOCF) 01884 { 01885 /* Check the Timeout */ 01886 if (Timeout != HAL_MAX_DELAY) 01887 { 01888 if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U)) 01889 { 01890 /* Return timeout status */ 01891 return HAL_TIMEOUT; 01892 } 01893 } 01894 } 01895 /* Check if overrun occurs */ 01896 if ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_ROVRF) == DFSDM_FLTISR_ROVRF) 01897 { 01898 /* Update error code and call error callback */ 01899 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_REGULAR_OVERRUN; 01900 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1) 01901 hdfsdm_filter->ErrorCallback(hdfsdm_filter); 01902 #else 01903 HAL_DFSDM_FilterErrorCallback(hdfsdm_filter); 01904 #endif 01905 01906 /* Clear regular overrun flag */ 01907 hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRROVRF; 01908 } 01909 /* Update DFSDM filter state only if not continuous conversion and SW trigger */ 01910 if ((hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \ 01911 (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER)) 01912 { 01913 hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \ 01914 HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ; 01915 } 01916 /* Return function status */ 01917 return HAL_OK; 01918 } 01919 } 01920 01921 /** 01922 * @brief This function allows to stop regular conversion in polling mode. 01923 * @note This function should be called only if regular conversion is ongoing. 01924 * @param hdfsdm_filter DFSDM filter handle. 01925 * @retval HAL status 01926 */ 01927 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 01928 { 01929 HAL_StatusTypeDef status = HAL_OK; 01930 01931 /* Check parameters */ 01932 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance)); 01933 01934 /* Check DFSDM filter state */ 01935 if ((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \ 01936 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ)) 01937 { 01938 /* Return error status */ 01939 status = HAL_ERROR; 01940 } 01941 else 01942 { 01943 /* Stop regular conversion */ 01944 DFSDM_RegConvStop(hdfsdm_filter); 01945 } 01946 /* Return function status */ 01947 return status; 01948 } 01949 01950 /** 01951 * @brief This function allows to start regular conversion in interrupt mode. 01952 * @note This function should be called only when DFSDM filter instance is 01953 * in idle state or if injected conversion is ongoing. 01954 * @param hdfsdm_filter DFSDM filter handle. 01955 * @retval HAL status 01956 */ 01957 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 01958 { 01959 HAL_StatusTypeDef status = HAL_OK; 01960 01961 /* Check parameters */ 01962 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance)); 01963 01964 /* Check DFSDM filter state */ 01965 if ((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \ 01966 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ)) 01967 { 01968 /* Enable interrupts for regular conversions */ 01969 hdfsdm_filter->Instance->FLTCR2 |= (DFSDM_FLTCR2_REOCIE | DFSDM_FLTCR2_ROVRIE); 01970 01971 /* Start regular conversion */ 01972 DFSDM_RegConvStart(hdfsdm_filter); 01973 } 01974 else 01975 { 01976 status = HAL_ERROR; 01977 } 01978 /* Return function status */ 01979 return status; 01980 } 01981 01982 /** 01983 * @brief This function allows to stop regular conversion in interrupt mode. 01984 * @note This function should be called only if regular conversion is ongoing. 01985 * @param hdfsdm_filter DFSDM filter handle. 01986 * @retval HAL status 01987 */ 01988 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 01989 { 01990 HAL_StatusTypeDef status = HAL_OK; 01991 01992 /* Check parameters */ 01993 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance)); 01994 01995 /* Check DFSDM filter state */ 01996 if ((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \ 01997 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ)) 01998 { 01999 /* Return error status */ 02000 status = HAL_ERROR; 02001 } 02002 else 02003 { 02004 /* Disable interrupts for regular conversions */ 02005 hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_REOCIE | DFSDM_FLTCR2_ROVRIE); 02006 02007 /* Stop regular conversion */ 02008 DFSDM_RegConvStop(hdfsdm_filter); 02009 } 02010 /* Return function status */ 02011 return status; 02012 } 02013 02014 /** 02015 * @brief This function allows to start regular conversion in DMA mode. 02016 * @note This function should be called only when DFSDM filter instance is 02017 * in idle state or if injected conversion is ongoing. 02018 * Please note that data on buffer will contain signed regular conversion 02019 * value on 24 most significant bits and corresponding channel on 3 least 02020 * significant bits. 02021 * @param hdfsdm_filter DFSDM filter handle. 02022 * @param pData The destination buffer address. 02023 * @param Length The length of data to be transferred from DFSDM filter to memory. 02024 * @retval HAL status 02025 */ 02026 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, 02027 int32_t *pData, 02028 uint32_t Length) 02029 { 02030 HAL_StatusTypeDef status = HAL_OK; 02031 02032 /* Check parameters */ 02033 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance)); 02034 02035 /* Check destination address and length */ 02036 if ((pData == NULL) || (Length == 0U)) 02037 { 02038 status = HAL_ERROR; 02039 } 02040 /* Check that DMA is enabled for regular conversion */ 02041 else if ((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_RDMAEN) != DFSDM_FLTCR1_RDMAEN) 02042 { 02043 status = HAL_ERROR; 02044 } 02045 /* Check parameters compatibility */ 02046 else if ((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \ 02047 (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \ 02048 (hdfsdm_filter->hdmaReg->Init.Mode == DMA_NORMAL) && \ 02049 (Length != 1U)) 02050 { 02051 status = HAL_ERROR; 02052 } 02053 else if ((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \ 02054 (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \ 02055 (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR)) 02056 { 02057 status = HAL_ERROR; 02058 } 02059 /* Check DFSDM filter state */ 02060 else if ((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \ 02061 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ)) 02062 { 02063 /* Set callbacks on DMA handler */ 02064 hdfsdm_filter->hdmaReg->XferCpltCallback = DFSDM_DMARegularConvCplt; 02065 hdfsdm_filter->hdmaReg->XferErrorCallback = DFSDM_DMAError; 02066 hdfsdm_filter->hdmaReg->XferHalfCpltCallback = (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR) ? \ 02067 DFSDM_DMARegularHalfConvCplt : NULL; 02068 02069 /* Start DMA in interrupt mode */ 02070 if (HAL_DMA_Start_IT(hdfsdm_filter->hdmaReg, (uint32_t)&hdfsdm_filter->Instance->FLTRDATAR, \ 02071 (uint32_t) pData, Length) != HAL_OK) 02072 { 02073 /* Set DFSDM filter in error state */ 02074 hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR; 02075 status = HAL_ERROR; 02076 } 02077 else 02078 { 02079 /* Start regular conversion */ 02080 DFSDM_RegConvStart(hdfsdm_filter); 02081 } 02082 } 02083 else 02084 { 02085 status = HAL_ERROR; 02086 } 02087 /* Return function status */ 02088 return status; 02089 } 02090 02091 /** 02092 * @brief This function allows to start regular conversion in DMA mode and to get 02093 * only the 16 most significant bits of conversion. 02094 * @note This function should be called only when DFSDM filter instance is 02095 * in idle state or if injected conversion is ongoing. 02096 * Please note that data on buffer will contain signed 16 most significant 02097 * bits of regular conversion. 02098 * @param hdfsdm_filter DFSDM filter handle. 02099 * @param pData The destination buffer address. 02100 * @param Length The length of data to be transferred from DFSDM filter to memory. 02101 * @retval HAL status 02102 */ 02103 HAL_StatusTypeDef HAL_DFSDM_FilterRegularMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, 02104 int16_t *pData, 02105 uint32_t Length) 02106 { 02107 HAL_StatusTypeDef status = HAL_OK; 02108 02109 /* Check parameters */ 02110 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance)); 02111 02112 /* Check destination address and length */ 02113 if ((pData == NULL) || (Length == 0U)) 02114 { 02115 status = HAL_ERROR; 02116 } 02117 /* Check that DMA is enabled for regular conversion */ 02118 else if ((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_RDMAEN) != DFSDM_FLTCR1_RDMAEN) 02119 { 02120 status = HAL_ERROR; 02121 } 02122 /* Check parameters compatibility */ 02123 else if ((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \ 02124 (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \ 02125 (hdfsdm_filter->hdmaReg->Init.Mode == DMA_NORMAL) && \ 02126 (Length != 1U)) 02127 { 02128 status = HAL_ERROR; 02129 } 02130 else if ((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \ 02131 (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \ 02132 (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR)) 02133 { 02134 status = HAL_ERROR; 02135 } 02136 /* Check DFSDM filter state */ 02137 else if ((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \ 02138 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ)) 02139 { 02140 /* Set callbacks on DMA handler */ 02141 hdfsdm_filter->hdmaReg->XferCpltCallback = DFSDM_DMARegularConvCplt; 02142 hdfsdm_filter->hdmaReg->XferErrorCallback = DFSDM_DMAError; 02143 hdfsdm_filter->hdmaReg->XferHalfCpltCallback = (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR) ? \ 02144 DFSDM_DMARegularHalfConvCplt : NULL; 02145 02146 /* Start DMA in interrupt mode */ 02147 if (HAL_DMA_Start_IT(hdfsdm_filter->hdmaReg, (uint32_t)(&hdfsdm_filter->Instance->FLTRDATAR) + 2U, \ 02148 (uint32_t) pData, Length) != HAL_OK) 02149 { 02150 /* Set DFSDM filter in error state */ 02151 hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR; 02152 status = HAL_ERROR; 02153 } 02154 else 02155 { 02156 /* Start regular conversion */ 02157 DFSDM_RegConvStart(hdfsdm_filter); 02158 } 02159 } 02160 else 02161 { 02162 status = HAL_ERROR; 02163 } 02164 /* Return function status */ 02165 return status; 02166 } 02167 02168 /** 02169 * @brief This function allows to stop regular conversion in DMA mode. 02170 * @note This function should be called only if regular conversion is ongoing. 02171 * @param hdfsdm_filter DFSDM filter handle. 02172 * @retval HAL status 02173 */ 02174 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 02175 { 02176 HAL_StatusTypeDef status = HAL_OK; 02177 02178 /* Check parameters */ 02179 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance)); 02180 02181 /* Check DFSDM filter state */ 02182 if ((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \ 02183 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ)) 02184 { 02185 /* Return error status */ 02186 status = HAL_ERROR; 02187 } 02188 else 02189 { 02190 /* Stop current DMA transfer */ 02191 if (HAL_DMA_Abort(hdfsdm_filter->hdmaReg) != HAL_OK) 02192 { 02193 /* Set DFSDM filter in error state */ 02194 hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR; 02195 status = HAL_ERROR; 02196 } 02197 else 02198 { 02199 /* Stop regular conversion */ 02200 DFSDM_RegConvStop(hdfsdm_filter); 02201 } 02202 } 02203 /* Return function status */ 02204 return status; 02205 } 02206 02207 /** 02208 * @brief This function allows to get regular conversion value. 02209 * @param hdfsdm_filter DFSDM filter handle. 02210 * @param Channel Corresponding channel of regular conversion. 02211 * @retval Regular conversion value 02212 */ 02213 int32_t HAL_DFSDM_FilterGetRegularValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, 02214 uint32_t *Channel) 02215 { 02216 uint32_t reg; 02217 int32_t value; 02218 02219 /* Check parameters */ 02220 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance)); 02221 assert_param(Channel != (void *)0); 02222 02223 /* Get value of data register for regular channel */ 02224 reg = hdfsdm_filter->Instance->FLTRDATAR; 02225 02226 /* Extract channel and regular conversion value */ 02227 *Channel = (reg & DFSDM_FLTRDATAR_RDATACH); 02228 /* Regular conversion value is a signed value located on 24 MSB of register */ 02229 /* So after applying a mask on these bits we have to perform a division by 256 (2 raised to the power of 8) */ 02230 reg &= DFSDM_FLTRDATAR_RDATA; 02231 value = ((int32_t)reg) / 256; 02232 02233 /* return regular conversion value */ 02234 return value; 02235 } 02236 02237 /** 02238 * @brief This function allows to start injected conversion in polling mode. 02239 * @note This function should be called only when DFSDM filter instance is 02240 * in idle state or if regular conversion is ongoing. 02241 * @param hdfsdm_filter DFSDM filter handle. 02242 * @retval HAL status 02243 */ 02244 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 02245 { 02246 HAL_StatusTypeDef status = HAL_OK; 02247 02248 /* Check parameters */ 02249 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance)); 02250 02251 /* Check DFSDM filter state */ 02252 if ((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \ 02253 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG)) 02254 { 02255 /* Start injected conversion */ 02256 DFSDM_InjConvStart(hdfsdm_filter); 02257 } 02258 else 02259 { 02260 status = HAL_ERROR; 02261 } 02262 /* Return function status */ 02263 return status; 02264 } 02265 02266 /** 02267 * @brief This function allows to poll for the end of injected conversion. 02268 * @note This function should be called only if injected conversion is ongoing. 02269 * @param hdfsdm_filter DFSDM filter handle. 02270 * @param Timeout Timeout value in milliseconds. 02271 * @retval HAL status 02272 */ 02273 HAL_StatusTypeDef HAL_DFSDM_FilterPollForInjConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, 02274 uint32_t Timeout) 02275 { 02276 uint32_t tickstart; 02277 02278 /* Check parameters */ 02279 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance)); 02280 02281 /* Check DFSDM filter state */ 02282 if ((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \ 02283 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ)) 02284 { 02285 /* Return error status */ 02286 return HAL_ERROR; 02287 } 02288 else 02289 { 02290 /* Get timeout */ 02291 tickstart = HAL_GetTick(); 02292 02293 /* Wait end of injected conversions */ 02294 while ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JEOCF) != DFSDM_FLTISR_JEOCF) 02295 { 02296 /* Check the Timeout */ 02297 if (Timeout != HAL_MAX_DELAY) 02298 { 02299 if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U)) 02300 { 02301 /* Return timeout status */ 02302 return HAL_TIMEOUT; 02303 } 02304 } 02305 } 02306 /* Check if overrun occurs */ 02307 if ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JOVRF) == DFSDM_FLTISR_JOVRF) 02308 { 02309 /* Update error code and call error callback */ 02310 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INJECTED_OVERRUN; 02311 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1) 02312 hdfsdm_filter->ErrorCallback(hdfsdm_filter); 02313 #else 02314 HAL_DFSDM_FilterErrorCallback(hdfsdm_filter); 02315 #endif 02316 02317 /* Clear injected overrun flag */ 02318 hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRJOVRF; 02319 } 02320 02321 /* Update remaining injected conversions */ 02322 hdfsdm_filter->InjConvRemaining--; 02323 if (hdfsdm_filter->InjConvRemaining == 0U) 02324 { 02325 /* Update DFSDM filter state only if trigger is software */ 02326 if (hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) 02327 { 02328 hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \ 02329 HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG; 02330 } 02331 02332 /* end of injected sequence, reset the value */ 02333 hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \ 02334 hdfsdm_filter->InjectedChannelsNbr : 1U; 02335 } 02336 02337 /* Return function status */ 02338 return HAL_OK; 02339 } 02340 } 02341 02342 /** 02343 * @brief This function allows to stop injected conversion in polling mode. 02344 * @note This function should be called only if injected conversion is ongoing. 02345 * @param hdfsdm_filter DFSDM filter handle. 02346 * @retval HAL status 02347 */ 02348 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 02349 { 02350 HAL_StatusTypeDef status = HAL_OK; 02351 02352 /* Check parameters */ 02353 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance)); 02354 02355 /* Check DFSDM filter state */ 02356 if ((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \ 02357 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ)) 02358 { 02359 /* Return error status */ 02360 status = HAL_ERROR; 02361 } 02362 else 02363 { 02364 /* Stop injected conversion */ 02365 DFSDM_InjConvStop(hdfsdm_filter); 02366 } 02367 /* Return function status */ 02368 return status; 02369 } 02370 02371 /** 02372 * @brief This function allows to start injected conversion in interrupt mode. 02373 * @note This function should be called only when DFSDM filter instance is 02374 * in idle state or if regular conversion is ongoing. 02375 * @param hdfsdm_filter DFSDM filter handle. 02376 * @retval HAL status 02377 */ 02378 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 02379 { 02380 HAL_StatusTypeDef status = HAL_OK; 02381 02382 /* Check parameters */ 02383 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance)); 02384 02385 /* Check DFSDM filter state */ 02386 if ((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \ 02387 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG)) 02388 { 02389 /* Enable interrupts for injected conversions */ 02390 hdfsdm_filter->Instance->FLTCR2 |= (DFSDM_FLTCR2_JEOCIE | DFSDM_FLTCR2_JOVRIE); 02391 02392 /* Start injected conversion */ 02393 DFSDM_InjConvStart(hdfsdm_filter); 02394 } 02395 else 02396 { 02397 status = HAL_ERROR; 02398 } 02399 /* Return function status */ 02400 return status; 02401 } 02402 02403 /** 02404 * @brief This function allows to stop injected conversion in interrupt mode. 02405 * @note This function should be called only if injected conversion is ongoing. 02406 * @param hdfsdm_filter DFSDM filter handle. 02407 * @retval HAL status 02408 */ 02409 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 02410 { 02411 HAL_StatusTypeDef status = HAL_OK; 02412 02413 /* Check parameters */ 02414 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance)); 02415 02416 /* Check DFSDM filter state */ 02417 if ((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \ 02418 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ)) 02419 { 02420 /* Return error status */ 02421 status = HAL_ERROR; 02422 } 02423 else 02424 { 02425 /* Disable interrupts for injected conversions */ 02426 hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_JEOCIE | DFSDM_FLTCR2_JOVRIE); 02427 02428 /* Stop injected conversion */ 02429 DFSDM_InjConvStop(hdfsdm_filter); 02430 } 02431 /* Return function status */ 02432 return status; 02433 } 02434 02435 /** 02436 * @brief This function allows to start injected conversion in DMA mode. 02437 * @note This function should be called only when DFSDM filter instance is 02438 * in idle state or if regular conversion is ongoing. 02439 * Please note that data on buffer will contain signed injected conversion 02440 * value on 24 most significant bits and corresponding channel on 3 least 02441 * significant bits. 02442 * @param hdfsdm_filter DFSDM filter handle. 02443 * @param pData The destination buffer address. 02444 * @param Length The length of data to be transferred from DFSDM filter to memory. 02445 * @retval HAL status 02446 */ 02447 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, 02448 int32_t *pData, 02449 uint32_t Length) 02450 { 02451 HAL_StatusTypeDef status = HAL_OK; 02452 02453 /* Check parameters */ 02454 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance)); 02455 02456 /* Check destination address and length */ 02457 if ((pData == NULL) || (Length == 0U)) 02458 { 02459 status = HAL_ERROR; 02460 } 02461 /* Check that DMA is enabled for injected conversion */ 02462 else if ((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_JDMAEN) != DFSDM_FLTCR1_JDMAEN) 02463 { 02464 status = HAL_ERROR; 02465 } 02466 /* Check parameters compatibility */ 02467 else if ((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \ 02468 (hdfsdm_filter->hdmaInj->Init.Mode == DMA_NORMAL) && \ 02469 (Length > hdfsdm_filter->InjConvRemaining)) 02470 { 02471 status = HAL_ERROR; 02472 } 02473 else if ((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \ 02474 (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR)) 02475 { 02476 status = HAL_ERROR; 02477 } 02478 /* Check DFSDM filter state */ 02479 else if ((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \ 02480 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG)) 02481 { 02482 /* Set callbacks on DMA handler */ 02483 hdfsdm_filter->hdmaInj->XferCpltCallback = DFSDM_DMAInjectedConvCplt; 02484 hdfsdm_filter->hdmaInj->XferErrorCallback = DFSDM_DMAError; 02485 hdfsdm_filter->hdmaInj->XferHalfCpltCallback = (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR) ? \ 02486 DFSDM_DMAInjectedHalfConvCplt : NULL; 02487 02488 /* Start DMA in interrupt mode */ 02489 if (HAL_DMA_Start_IT(hdfsdm_filter->hdmaInj, (uint32_t)&hdfsdm_filter->Instance->FLTJDATAR, \ 02490 (uint32_t) pData, Length) != HAL_OK) 02491 { 02492 /* Set DFSDM filter in error state */ 02493 hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR; 02494 status = HAL_ERROR; 02495 } 02496 else 02497 { 02498 /* Start injected conversion */ 02499 DFSDM_InjConvStart(hdfsdm_filter); 02500 } 02501 } 02502 else 02503 { 02504 status = HAL_ERROR; 02505 } 02506 /* Return function status */ 02507 return status; 02508 } 02509 02510 /** 02511 * @brief This function allows to start injected conversion in DMA mode and to get 02512 * only the 16 most significant bits of conversion. 02513 * @note This function should be called only when DFSDM filter instance is 02514 * in idle state or if regular conversion is ongoing. 02515 * Please note that data on buffer will contain signed 16 most significant 02516 * bits of injected conversion. 02517 * @param hdfsdm_filter DFSDM filter handle. 02518 * @param pData The destination buffer address. 02519 * @param Length The length of data to be transferred from DFSDM filter to memory. 02520 * @retval HAL status 02521 */ 02522 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, 02523 int16_t *pData, 02524 uint32_t Length) 02525 { 02526 HAL_StatusTypeDef status = HAL_OK; 02527 02528 /* Check parameters */ 02529 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance)); 02530 02531 /* Check destination address and length */ 02532 if ((pData == NULL) || (Length == 0U)) 02533 { 02534 status = HAL_ERROR; 02535 } 02536 /* Check that DMA is enabled for injected conversion */ 02537 else if ((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_JDMAEN) != DFSDM_FLTCR1_JDMAEN) 02538 { 02539 status = HAL_ERROR; 02540 } 02541 /* Check parameters compatibility */ 02542 else if ((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \ 02543 (hdfsdm_filter->hdmaInj->Init.Mode == DMA_NORMAL) && \ 02544 (Length > hdfsdm_filter->InjConvRemaining)) 02545 { 02546 status = HAL_ERROR; 02547 } 02548 else if ((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \ 02549 (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR)) 02550 { 02551 status = HAL_ERROR; 02552 } 02553 /* Check DFSDM filter state */ 02554 else if ((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \ 02555 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG)) 02556 { 02557 /* Set callbacks on DMA handler */ 02558 hdfsdm_filter->hdmaInj->XferCpltCallback = DFSDM_DMAInjectedConvCplt; 02559 hdfsdm_filter->hdmaInj->XferErrorCallback = DFSDM_DMAError; 02560 hdfsdm_filter->hdmaInj->XferHalfCpltCallback = (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR) ? \ 02561 DFSDM_DMAInjectedHalfConvCplt : NULL; 02562 02563 /* Start DMA in interrupt mode */ 02564 if (HAL_DMA_Start_IT(hdfsdm_filter->hdmaInj, (uint32_t)(&hdfsdm_filter->Instance->FLTJDATAR) + 2U, \ 02565 (uint32_t) pData, Length) != HAL_OK) 02566 { 02567 /* Set DFSDM filter in error state */ 02568 hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR; 02569 status = HAL_ERROR; 02570 } 02571 else 02572 { 02573 /* Start injected conversion */ 02574 DFSDM_InjConvStart(hdfsdm_filter); 02575 } 02576 } 02577 else 02578 { 02579 status = HAL_ERROR; 02580 } 02581 /* Return function status */ 02582 return status; 02583 } 02584 02585 /** 02586 * @brief This function allows to stop injected conversion in DMA mode. 02587 * @note This function should be called only if injected conversion is ongoing. 02588 * @param hdfsdm_filter DFSDM filter handle. 02589 * @retval HAL status 02590 */ 02591 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 02592 { 02593 HAL_StatusTypeDef status = HAL_OK; 02594 02595 /* Check parameters */ 02596 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance)); 02597 02598 /* Check DFSDM filter state */ 02599 if ((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \ 02600 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ)) 02601 { 02602 /* Return error status */ 02603 status = HAL_ERROR; 02604 } 02605 else 02606 { 02607 /* Stop current DMA transfer */ 02608 if (HAL_DMA_Abort(hdfsdm_filter->hdmaInj) != HAL_OK) 02609 { 02610 /* Set DFSDM filter in error state */ 02611 hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR; 02612 status = HAL_ERROR; 02613 } 02614 else 02615 { 02616 /* Stop regular conversion */ 02617 DFSDM_InjConvStop(hdfsdm_filter); 02618 } 02619 } 02620 /* Return function status */ 02621 return status; 02622 } 02623 02624 /** 02625 * @brief This function allows to get injected conversion value. 02626 * @param hdfsdm_filter DFSDM filter handle. 02627 * @param Channel Corresponding channel of injected conversion. 02628 * @retval Injected conversion value 02629 */ 02630 int32_t HAL_DFSDM_FilterGetInjectedValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, 02631 uint32_t *Channel) 02632 { 02633 uint32_t reg; 02634 int32_t value; 02635 02636 /* Check parameters */ 02637 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance)); 02638 assert_param(Channel != (void *)0); 02639 02640 /* Get value of data register for injected channel */ 02641 reg = hdfsdm_filter->Instance->FLTJDATAR; 02642 02643 /* Extract channel and injected conversion value */ 02644 *Channel = (reg & DFSDM_FLTJDATAR_JDATACH); 02645 /* Injected conversion value is a signed value located on 24 MSB of register */ 02646 /* So after applying a mask on these bits we have to perform a division by 256 (2 raised to the power of 8) */ 02647 reg &= DFSDM_FLTJDATAR_JDATA; 02648 value = ((int32_t)reg) / 256; 02649 02650 /* return regular conversion value */ 02651 return value; 02652 } 02653 02654 /** 02655 * @brief This function allows to start filter analog watchdog in interrupt mode. 02656 * @param hdfsdm_filter DFSDM filter handle. 02657 * @param awdParam DFSDM filter analog watchdog parameters. 02658 * @retval HAL status 02659 */ 02660 HAL_StatusTypeDef HAL_DFSDM_FilterAwdStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, 02661 DFSDM_Filter_AwdParamTypeDef *awdParam) 02662 { 02663 HAL_StatusTypeDef status = HAL_OK; 02664 02665 /* Check parameters */ 02666 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance)); 02667 assert_param(IS_DFSDM_FILTER_AWD_DATA_SOURCE(awdParam->DataSource)); 02668 assert_param(IS_DFSDM_INJECTED_CHANNEL(awdParam->Channel)); 02669 assert_param(IS_DFSDM_FILTER_AWD_THRESHOLD(awdParam->HighThreshold)); 02670 assert_param(IS_DFSDM_FILTER_AWD_THRESHOLD(awdParam->LowThreshold)); 02671 assert_param(IS_DFSDM_BREAK_SIGNALS(awdParam->HighBreakSignal)); 02672 assert_param(IS_DFSDM_BREAK_SIGNALS(awdParam->LowBreakSignal)); 02673 02674 /* Check DFSDM filter state */ 02675 if ((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \ 02676 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR)) 02677 { 02678 /* Return error status */ 02679 status = HAL_ERROR; 02680 } 02681 else 02682 { 02683 /* Set analog watchdog data source */ 02684 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_AWFSEL); 02685 hdfsdm_filter->Instance->FLTCR1 |= awdParam->DataSource; 02686 02687 /* Set thresholds and break signals */ 02688 hdfsdm_filter->Instance->FLTAWHTR &= ~(DFSDM_FLTAWHTR_AWHT | DFSDM_FLTAWHTR_BKAWH); 02689 hdfsdm_filter->Instance->FLTAWHTR |= (((uint32_t) awdParam->HighThreshold << DFSDM_FLTAWHTR_AWHT_Pos) | \ 02690 awdParam->HighBreakSignal); 02691 hdfsdm_filter->Instance->FLTAWLTR &= ~(DFSDM_FLTAWLTR_AWLT | DFSDM_FLTAWLTR_BKAWL); 02692 hdfsdm_filter->Instance->FLTAWLTR |= (((uint32_t) awdParam->LowThreshold << DFSDM_FLTAWLTR_AWLT_Pos) | \ 02693 awdParam->LowBreakSignal); 02694 02695 /* Set channels and interrupt for analog watchdog */ 02696 hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_AWDCH); 02697 hdfsdm_filter->Instance->FLTCR2 |= (((awdParam->Channel & DFSDM_LSB_MASK) << DFSDM_FLTCR2_AWDCH_Pos) | \ 02698 DFSDM_FLTCR2_AWDIE); 02699 } 02700 /* Return function status */ 02701 return status; 02702 } 02703 02704 /** 02705 * @brief This function allows to stop filter analog watchdog in interrupt mode. 02706 * @param hdfsdm_filter DFSDM filter handle. 02707 * @retval HAL status 02708 */ 02709 HAL_StatusTypeDef HAL_DFSDM_FilterAwdStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 02710 { 02711 HAL_StatusTypeDef status = HAL_OK; 02712 02713 /* Check parameters */ 02714 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance)); 02715 02716 /* Check DFSDM filter state */ 02717 if ((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \ 02718 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR)) 02719 { 02720 /* Return error status */ 02721 status = HAL_ERROR; 02722 } 02723 else 02724 { 02725 /* Reset channels for analog watchdog and deactivate interrupt */ 02726 hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_AWDCH | DFSDM_FLTCR2_AWDIE); 02727 02728 /* Clear all analog watchdog flags */ 02729 hdfsdm_filter->Instance->FLTAWCFR = (DFSDM_FLTAWCFR_CLRAWHTF | DFSDM_FLTAWCFR_CLRAWLTF); 02730 02731 /* Reset thresholds and break signals */ 02732 hdfsdm_filter->Instance->FLTAWHTR &= ~(DFSDM_FLTAWHTR_AWHT | DFSDM_FLTAWHTR_BKAWH); 02733 hdfsdm_filter->Instance->FLTAWLTR &= ~(DFSDM_FLTAWLTR_AWLT | DFSDM_FLTAWLTR_BKAWL); 02734 02735 /* Reset analog watchdog data source */ 02736 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_AWFSEL); 02737 } 02738 /* Return function status */ 02739 return status; 02740 } 02741 02742 /** 02743 * @brief This function allows to start extreme detector feature. 02744 * @param hdfsdm_filter DFSDM filter handle. 02745 * @param Channel Channels where extreme detector is enabled. 02746 * This parameter can be a values combination of @ref DFSDM_Channel_Selection. 02747 * @retval HAL status 02748 */ 02749 HAL_StatusTypeDef HAL_DFSDM_FilterExdStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, 02750 uint32_t Channel) 02751 { 02752 HAL_StatusTypeDef status = HAL_OK; 02753 02754 /* Check parameters */ 02755 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance)); 02756 assert_param(IS_DFSDM_INJECTED_CHANNEL(Channel)); 02757 02758 /* Check DFSDM filter state */ 02759 if ((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \ 02760 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR)) 02761 { 02762 /* Return error status */ 02763 status = HAL_ERROR; 02764 } 02765 else 02766 { 02767 /* Set channels for extreme detector */ 02768 hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_EXCH); 02769 hdfsdm_filter->Instance->FLTCR2 |= ((Channel & DFSDM_LSB_MASK) << DFSDM_FLTCR2_EXCH_Pos); 02770 } 02771 /* Return function status */ 02772 return status; 02773 } 02774 02775 /** 02776 * @brief This function allows to stop extreme detector feature. 02777 * @param hdfsdm_filter DFSDM filter handle. 02778 * @retval HAL status 02779 */ 02780 HAL_StatusTypeDef HAL_DFSDM_FilterExdStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 02781 { 02782 HAL_StatusTypeDef status = HAL_OK; 02783 __IO uint32_t reg1; 02784 __IO uint32_t reg2; 02785 02786 /* Check parameters */ 02787 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance)); 02788 02789 /* Check DFSDM filter state */ 02790 if ((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \ 02791 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR)) 02792 { 02793 /* Return error status */ 02794 status = HAL_ERROR; 02795 } 02796 else 02797 { 02798 /* Reset channels for extreme detector */ 02799 hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_EXCH); 02800 02801 /* Clear extreme detector values */ 02802 reg1 = hdfsdm_filter->Instance->FLTEXMAX; 02803 reg2 = hdfsdm_filter->Instance->FLTEXMIN; 02804 UNUSED(reg1); /* To avoid GCC warning */ 02805 UNUSED(reg2); /* To avoid GCC warning */ 02806 } 02807 /* Return function status */ 02808 return status; 02809 } 02810 02811 /** 02812 * @brief This function allows to get extreme detector maximum value. 02813 * @param hdfsdm_filter DFSDM filter handle. 02814 * @param Channel Corresponding channel. 02815 * @retval Extreme detector maximum value 02816 * This value is between Min_Data = -8388608 and Max_Data = 8388607. 02817 */ 02818 int32_t HAL_DFSDM_FilterGetExdMaxValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, 02819 uint32_t *Channel) 02820 { 02821 uint32_t reg; 02822 int32_t value; 02823 02824 /* Check parameters */ 02825 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance)); 02826 assert_param(Channel != (void *)0); 02827 02828 /* Get value of extreme detector maximum register */ 02829 reg = hdfsdm_filter->Instance->FLTEXMAX; 02830 02831 /* Extract channel and extreme detector maximum value */ 02832 *Channel = (reg & DFSDM_FLTEXMAX_EXMAXCH); 02833 /* Extreme detector maximum value is a signed value located on 24 MSB of register */ 02834 /* So after applying a mask on these bits we have to perform a division by 256 (2 raised to the power of 8) */ 02835 reg &= DFSDM_FLTEXMAX_EXMAX; 02836 value = ((int32_t)reg) / 256; 02837 02838 /* return extreme detector maximum value */ 02839 return value; 02840 } 02841 02842 /** 02843 * @brief This function allows to get extreme detector minimum value. 02844 * @param hdfsdm_filter DFSDM filter handle. 02845 * @param Channel Corresponding channel. 02846 * @retval Extreme detector minimum value 02847 * This value is between Min_Data = -8388608 and Max_Data = 8388607. 02848 */ 02849 int32_t HAL_DFSDM_FilterGetExdMinValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, 02850 uint32_t *Channel) 02851 { 02852 uint32_t reg; 02853 int32_t value; 02854 02855 /* Check parameters */ 02856 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance)); 02857 assert_param(Channel != (void *)0); 02858 02859 /* Get value of extreme detector minimum register */ 02860 reg = hdfsdm_filter->Instance->FLTEXMIN; 02861 02862 /* Extract channel and extreme detector minimum value */ 02863 *Channel = (reg & DFSDM_FLTEXMIN_EXMINCH); 02864 /* Extreme detector minimum value is a signed value located on 24 MSB of register */ 02865 /* So after applying a mask on these bits we have to perform a division by 256 (2 raised to the power of 8) */ 02866 reg &= DFSDM_FLTEXMIN_EXMIN; 02867 value = ((int32_t)reg) / 256; 02868 02869 /* return extreme detector minimum value */ 02870 return value; 02871 } 02872 02873 /** 02874 * @brief This function allows to get conversion time value. 02875 * @param hdfsdm_filter DFSDM filter handle. 02876 * @retval Conversion time value 02877 * @note To get time in second, this value has to be divided by DFSDM clock frequency. 02878 */ 02879 uint32_t HAL_DFSDM_FilterGetConvTimeValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 02880 { 02881 uint32_t reg; 02882 uint32_t value; 02883 02884 /* Check parameters */ 02885 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance)); 02886 02887 /* Get value of conversion timer register */ 02888 reg = hdfsdm_filter->Instance->FLTCNVTIMR; 02889 02890 /* Extract conversion time value */ 02891 value = ((reg & DFSDM_FLTCNVTIMR_CNVCNT) >> DFSDM_FLTCNVTIMR_CNVCNT_Pos); 02892 02893 /* return extreme detector minimum value */ 02894 return value; 02895 } 02896 02897 /** 02898 * @brief This function handles the DFSDM interrupts. 02899 * @param hdfsdm_filter DFSDM filter handle. 02900 * @retval None 02901 */ 02902 void HAL_DFSDM_IRQHandler(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 02903 { 02904 /* Get FTLISR and FLTCR2 register values */ 02905 const uint32_t temp_fltisr = hdfsdm_filter->Instance->FLTISR; 02906 const uint32_t temp_fltcr2 = hdfsdm_filter->Instance->FLTCR2; 02907 02908 /* Check if overrun occurs during regular conversion */ 02909 if (((temp_fltisr & DFSDM_FLTISR_ROVRF) != 0U) && \ 02910 ((temp_fltcr2 & DFSDM_FLTCR2_ROVRIE) != 0U)) 02911 { 02912 /* Clear regular overrun flag */ 02913 hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRROVRF; 02914 02915 /* Update error code */ 02916 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_REGULAR_OVERRUN; 02917 02918 /* Call error callback */ 02919 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1) 02920 hdfsdm_filter->ErrorCallback(hdfsdm_filter); 02921 #else 02922 HAL_DFSDM_FilterErrorCallback(hdfsdm_filter); 02923 #endif 02924 } 02925 /* Check if overrun occurs during injected conversion */ 02926 else if (((temp_fltisr & DFSDM_FLTISR_JOVRF) != 0U) && \ 02927 ((temp_fltcr2 & DFSDM_FLTCR2_JOVRIE) != 0U)) 02928 { 02929 /* Clear injected overrun flag */ 02930 hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRJOVRF; 02931 02932 /* Update error code */ 02933 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INJECTED_OVERRUN; 02934 02935 /* Call error callback */ 02936 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1) 02937 hdfsdm_filter->ErrorCallback(hdfsdm_filter); 02938 #else 02939 HAL_DFSDM_FilterErrorCallback(hdfsdm_filter); 02940 #endif 02941 } 02942 /* Check if end of regular conversion */ 02943 else if (((temp_fltisr & DFSDM_FLTISR_REOCF) != 0U) && \ 02944 ((temp_fltcr2 & DFSDM_FLTCR2_REOCIE) != 0U)) 02945 { 02946 /* Call regular conversion complete callback */ 02947 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1) 02948 hdfsdm_filter->RegConvCpltCallback(hdfsdm_filter); 02949 #else 02950 HAL_DFSDM_FilterRegConvCpltCallback(hdfsdm_filter); 02951 #endif 02952 02953 /* End of conversion if mode is not continuous and software trigger */ 02954 if ((hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \ 02955 (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER)) 02956 { 02957 /* Disable interrupts for regular conversions */ 02958 hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_REOCIE); 02959 02960 /* Update DFSDM filter state */ 02961 hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \ 02962 HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ; 02963 } 02964 } 02965 /* Check if end of injected conversion */ 02966 else if (((temp_fltisr & DFSDM_FLTISR_JEOCF) != 0U) && \ 02967 ((temp_fltcr2 & DFSDM_FLTCR2_JEOCIE) != 0U)) 02968 { 02969 /* Call injected conversion complete callback */ 02970 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1) 02971 hdfsdm_filter->InjConvCpltCallback(hdfsdm_filter); 02972 #else 02973 HAL_DFSDM_FilterInjConvCpltCallback(hdfsdm_filter); 02974 #endif 02975 02976 /* Update remaining injected conversions */ 02977 hdfsdm_filter->InjConvRemaining--; 02978 if (hdfsdm_filter->InjConvRemaining == 0U) 02979 { 02980 /* End of conversion if trigger is software */ 02981 if (hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) 02982 { 02983 /* Disable interrupts for injected conversions */ 02984 hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_JEOCIE); 02985 02986 /* Update DFSDM filter state */ 02987 hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \ 02988 HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG; 02989 } 02990 /* end of injected sequence, reset the value */ 02991 hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \ 02992 hdfsdm_filter->InjectedChannelsNbr : 1U; 02993 } 02994 } 02995 /* Check if analog watchdog occurs */ 02996 else if (((temp_fltisr & DFSDM_FLTISR_AWDF) != 0U) && \ 02997 ((temp_fltcr2 & DFSDM_FLTCR2_AWDIE) != 0U)) 02998 { 02999 uint32_t reg; 03000 uint32_t threshold; 03001 uint32_t channel = 0; 03002 03003 /* Get channel and threshold */ 03004 reg = hdfsdm_filter->Instance->FLTAWSR; 03005 threshold = ((reg & DFSDM_FLTAWSR_AWLTF) != 0U) ? DFSDM_AWD_LOW_THRESHOLD : DFSDM_AWD_HIGH_THRESHOLD; 03006 if (threshold == DFSDM_AWD_HIGH_THRESHOLD) 03007 { 03008 reg = reg >> DFSDM_FLTAWSR_AWHTF_Pos; 03009 } 03010 while (((reg & 1U) == 0U) && (channel < (DFSDM1_CHANNEL_NUMBER - 1U))) 03011 { 03012 channel++; 03013 reg = reg >> 1; 03014 } 03015 /* Clear analog watchdog flag */ 03016 hdfsdm_filter->Instance->FLTAWCFR = (threshold == DFSDM_AWD_HIGH_THRESHOLD) ? \ 03017 (1UL << (DFSDM_FLTAWSR_AWHTF_Pos + channel)) : \ 03018 (1UL << channel); 03019 03020 /* Call analog watchdog callback */ 03021 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1) 03022 hdfsdm_filter->AwdCallback(hdfsdm_filter, channel, threshold); 03023 #else 03024 HAL_DFSDM_FilterAwdCallback(hdfsdm_filter, channel, threshold); 03025 #endif 03026 } 03027 /* Check if clock absence occurs */ 03028 else if ((hdfsdm_filter->Instance == DFSDM1_Filter0) && \ 03029 ((temp_fltisr & DFSDM_FLTISR_CKABF) != 0U) && \ 03030 ((temp_fltcr2 & DFSDM_FLTCR2_CKABIE) != 0U)) 03031 { 03032 uint32_t reg; 03033 uint32_t channel = 0; 03034 03035 reg = ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_CKABF) >> DFSDM_FLTISR_CKABF_Pos); 03036 03037 while (channel < DFSDM1_CHANNEL_NUMBER) 03038 { 03039 /* Check if flag is set and corresponding channel is enabled */ 03040 if (((reg & 1U) != 0U) && (a_dfsdm1ChannelHandle[channel] != NULL)) 03041 { 03042 /* Check clock absence has been enabled for this channel */ 03043 if ((a_dfsdm1ChannelHandle[channel]->Instance->CHCFGR1 & DFSDM_CHCFGR1_CKABEN) != 0U) 03044 { 03045 /* Clear clock absence flag */ 03046 hdfsdm_filter->Instance->FLTICR = (1UL << (DFSDM_FLTICR_CLRCKABF_Pos + channel)); 03047 03048 /* Call clock absence callback */ 03049 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1) 03050 a_dfsdm1ChannelHandle[channel]->CkabCallback(a_dfsdm1ChannelHandle[channel]); 03051 #else 03052 HAL_DFSDM_ChannelCkabCallback(a_dfsdm1ChannelHandle[channel]); 03053 #endif 03054 } 03055 } 03056 channel++; 03057 reg = reg >> 1; 03058 } 03059 } 03060 /* Check if short circuit detection occurs */ 03061 else if ((hdfsdm_filter->Instance == DFSDM1_Filter0) && \ 03062 ((temp_fltisr & DFSDM_FLTISR_SCDF) != 0U) && \ 03063 ((temp_fltcr2 & DFSDM_FLTCR2_SCDIE) != 0U)) 03064 { 03065 uint32_t reg; 03066 uint32_t channel = 0; 03067 03068 /* Get channel */ 03069 reg = ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_SCDF) >> DFSDM_FLTISR_SCDF_Pos); 03070 while (((reg & 1U) == 0U) && (channel < (DFSDM1_CHANNEL_NUMBER - 1U))) 03071 { 03072 channel++; 03073 reg = reg >> 1; 03074 } 03075 03076 /* Clear short circuit detection flag */ 03077 hdfsdm_filter->Instance->FLTICR = (1UL << (DFSDM_FLTICR_CLRSCDF_Pos + channel)); 03078 03079 /* Call short circuit detection callback */ 03080 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1) 03081 a_dfsdm1ChannelHandle[channel]->ScdCallback(a_dfsdm1ChannelHandle[channel]); 03082 #else 03083 HAL_DFSDM_ChannelScdCallback(a_dfsdm1ChannelHandle[channel]); 03084 #endif 03085 } 03086 } 03087 03088 /** 03089 * @brief Regular conversion complete callback. 03090 * @note In interrupt mode, user has to read conversion value in this function 03091 * using HAL_DFSDM_FilterGetRegularValue. 03092 * @param hdfsdm_filter DFSDM filter handle. 03093 * @retval None 03094 */ 03095 __weak void HAL_DFSDM_FilterRegConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 03096 { 03097 /* Prevent unused argument(s) compilation warning */ 03098 UNUSED(hdfsdm_filter); 03099 03100 /* NOTE : This function should not be modified, when the callback is needed, 03101 the HAL_DFSDM_FilterRegConvCpltCallback could be implemented in the user file. 03102 */ 03103 } 03104 03105 /** 03106 * @brief Half regular conversion complete callback. 03107 * @param hdfsdm_filter DFSDM filter handle. 03108 * @retval None 03109 */ 03110 __weak void HAL_DFSDM_FilterRegConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 03111 { 03112 /* Prevent unused argument(s) compilation warning */ 03113 UNUSED(hdfsdm_filter); 03114 03115 /* NOTE : This function should not be modified, when the callback is needed, 03116 the HAL_DFSDM_FilterRegConvHalfCpltCallback could be implemented in the user file. 03117 */ 03118 } 03119 03120 /** 03121 * @brief Injected conversion complete callback. 03122 * @note In interrupt mode, user has to read conversion value in this function 03123 * using HAL_DFSDM_FilterGetInjectedValue. 03124 * @param hdfsdm_filter DFSDM filter handle. 03125 * @retval None 03126 */ 03127 __weak void HAL_DFSDM_FilterInjConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 03128 { 03129 /* Prevent unused argument(s) compilation warning */ 03130 UNUSED(hdfsdm_filter); 03131 03132 /* NOTE : This function should not be modified, when the callback is needed, 03133 the HAL_DFSDM_FilterInjConvCpltCallback could be implemented in the user file. 03134 */ 03135 } 03136 03137 /** 03138 * @brief Half injected conversion complete callback. 03139 * @param hdfsdm_filter DFSDM filter handle. 03140 * @retval None 03141 */ 03142 __weak void HAL_DFSDM_FilterInjConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 03143 { 03144 /* Prevent unused argument(s) compilation warning */ 03145 UNUSED(hdfsdm_filter); 03146 03147 /* NOTE : This function should not be modified, when the callback is needed, 03148 the HAL_DFSDM_FilterInjConvHalfCpltCallback could be implemented in the user file. 03149 */ 03150 } 03151 03152 /** 03153 * @brief Filter analog watchdog callback. 03154 * @param hdfsdm_filter DFSDM filter handle. 03155 * @param Channel Corresponding channel. 03156 * @param Threshold Low or high threshold has been reached. 03157 * @retval None 03158 */ 03159 __weak void HAL_DFSDM_FilterAwdCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, 03160 uint32_t Channel, uint32_t Threshold) 03161 { 03162 /* Prevent unused argument(s) compilation warning */ 03163 UNUSED(hdfsdm_filter); 03164 UNUSED(Channel); 03165 UNUSED(Threshold); 03166 03167 /* NOTE : This function should not be modified, when the callback is needed, 03168 the HAL_DFSDM_FilterAwdCallback could be implemented in the user file. 03169 */ 03170 } 03171 03172 /** 03173 * @brief Error callback. 03174 * @param hdfsdm_filter DFSDM filter handle. 03175 * @retval None 03176 */ 03177 __weak void HAL_DFSDM_FilterErrorCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 03178 { 03179 /* Prevent unused argument(s) compilation warning */ 03180 UNUSED(hdfsdm_filter); 03181 03182 /* NOTE : This function should not be modified, when the callback is needed, 03183 the HAL_DFSDM_FilterErrorCallback could be implemented in the user file. 03184 */ 03185 } 03186 03187 /** 03188 * @} 03189 */ 03190 03191 /** @defgroup DFSDM_Exported_Functions_Group4_Filter Filter state functions 03192 * @brief Filter state functions 03193 * 03194 @verbatim 03195 ============================================================================== 03196 ##### Filter state functions ##### 03197 ============================================================================== 03198 [..] This section provides functions allowing to: 03199 (+) Get the DFSDM filter state. 03200 (+) Get the DFSDM filter error. 03201 @endverbatim 03202 * @{ 03203 */ 03204 03205 /** 03206 * @brief This function allows to get the current DFSDM filter handle state. 03207 * @param hdfsdm_filter DFSDM filter handle. 03208 * @retval DFSDM filter state. 03209 */ 03210 HAL_DFSDM_Filter_StateTypeDef HAL_DFSDM_FilterGetState(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 03211 { 03212 /* Return DFSDM filter handle state */ 03213 return hdfsdm_filter->State; 03214 } 03215 03216 /** 03217 * @brief This function allows to get the current DFSDM filter error. 03218 * @param hdfsdm_filter DFSDM filter handle. 03219 * @retval DFSDM filter error code. 03220 */ 03221 uint32_t HAL_DFSDM_FilterGetError(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 03222 { 03223 return hdfsdm_filter->ErrorCode; 03224 } 03225 03226 /** 03227 * @} 03228 */ 03229 03230 /** 03231 * @} 03232 */ 03233 /* End of exported functions -------------------------------------------------*/ 03234 03235 /* Private functions ---------------------------------------------------------*/ 03236 /** @addtogroup DFSDM_Private_Functions DFSDM Private Functions 03237 * @{ 03238 */ 03239 03240 /** 03241 * @brief DMA half transfer complete callback for regular conversion. 03242 * @param hdma DMA handle. 03243 * @retval None 03244 */ 03245 static void DFSDM_DMARegularHalfConvCplt(DMA_HandleTypeDef *hdma) 03246 { 03247 /* Get DFSDM filter handle */ 03248 DFSDM_Filter_HandleTypeDef *hdfsdm_filter = (DFSDM_Filter_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; 03249 03250 /* Call regular half conversion complete callback */ 03251 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1) 03252 hdfsdm_filter->RegConvHalfCpltCallback(hdfsdm_filter); 03253 #else 03254 HAL_DFSDM_FilterRegConvHalfCpltCallback(hdfsdm_filter); 03255 #endif 03256 } 03257 03258 /** 03259 * @brief DMA transfer complete callback for regular conversion. 03260 * @param hdma DMA handle. 03261 * @retval None 03262 */ 03263 static void DFSDM_DMARegularConvCplt(DMA_HandleTypeDef *hdma) 03264 { 03265 /* Get DFSDM filter handle */ 03266 DFSDM_Filter_HandleTypeDef *hdfsdm_filter = (DFSDM_Filter_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; 03267 03268 /* Call regular conversion complete callback */ 03269 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1) 03270 hdfsdm_filter->RegConvCpltCallback(hdfsdm_filter); 03271 #else 03272 HAL_DFSDM_FilterRegConvCpltCallback(hdfsdm_filter); 03273 #endif 03274 } 03275 03276 /** 03277 * @brief DMA half transfer complete callback for injected conversion. 03278 * @param hdma DMA handle. 03279 * @retval None 03280 */ 03281 static void DFSDM_DMAInjectedHalfConvCplt(DMA_HandleTypeDef *hdma) 03282 { 03283 /* Get DFSDM filter handle */ 03284 DFSDM_Filter_HandleTypeDef *hdfsdm_filter = (DFSDM_Filter_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; 03285 03286 /* Call injected half conversion complete callback */ 03287 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1) 03288 hdfsdm_filter->InjConvHalfCpltCallback(hdfsdm_filter); 03289 #else 03290 HAL_DFSDM_FilterInjConvHalfCpltCallback(hdfsdm_filter); 03291 #endif 03292 } 03293 03294 /** 03295 * @brief DMA transfer complete callback for injected conversion. 03296 * @param hdma DMA handle. 03297 * @retval None 03298 */ 03299 static void DFSDM_DMAInjectedConvCplt(DMA_HandleTypeDef *hdma) 03300 { 03301 /* Get DFSDM filter handle */ 03302 DFSDM_Filter_HandleTypeDef *hdfsdm_filter = (DFSDM_Filter_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; 03303 03304 /* Call injected conversion complete callback */ 03305 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1) 03306 hdfsdm_filter->InjConvCpltCallback(hdfsdm_filter); 03307 #else 03308 HAL_DFSDM_FilterInjConvCpltCallback(hdfsdm_filter); 03309 #endif 03310 } 03311 03312 /** 03313 * @brief DMA error callback. 03314 * @param hdma DMA handle. 03315 * @retval None 03316 */ 03317 static void DFSDM_DMAError(DMA_HandleTypeDef *hdma) 03318 { 03319 /* Get DFSDM filter handle */ 03320 DFSDM_Filter_HandleTypeDef *hdfsdm_filter = (DFSDM_Filter_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; 03321 03322 /* Update error code */ 03323 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_DMA; 03324 03325 /* Call error callback */ 03326 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1) 03327 hdfsdm_filter->ErrorCallback(hdfsdm_filter); 03328 #else 03329 HAL_DFSDM_FilterErrorCallback(hdfsdm_filter); 03330 #endif 03331 } 03332 03333 /** 03334 * @brief This function allows to get the number of injected channels. 03335 * @param Channels bitfield of injected channels. 03336 * @retval Number of injected channels. 03337 */ 03338 static uint32_t DFSDM_GetInjChannelsNbr(uint32_t Channels) 03339 { 03340 uint32_t nbChannels = 0; 03341 uint32_t tmp; 03342 03343 /* Get the number of channels from bitfield */ 03344 tmp = (uint32_t)(Channels & DFSDM_LSB_MASK); 03345 while (tmp != 0U) 03346 { 03347 if ((tmp & 1U) != 0U) 03348 { 03349 nbChannels++; 03350 } 03351 tmp = (uint32_t)(tmp >> 1); 03352 } 03353 return nbChannels; 03354 } 03355 03356 /** 03357 * @brief This function allows to get the channel number from channel instance. 03358 * @param Instance DFSDM channel instance. 03359 * @retval Channel number. 03360 */ 03361 static uint32_t DFSDM_GetChannelFromInstance(const DFSDM_Channel_TypeDef *Instance) 03362 { 03363 uint32_t channel; 03364 03365 /* Get channel from instance */ 03366 if (Instance == DFSDM1_Channel0) 03367 { 03368 channel = 0; 03369 } 03370 else if (Instance == DFSDM1_Channel1) 03371 { 03372 channel = 1; 03373 } 03374 else if (Instance == DFSDM1_Channel2) 03375 { 03376 channel = 2; 03377 } 03378 else if (Instance == DFSDM1_Channel3) 03379 { 03380 channel = 3; 03381 } 03382 #if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || \ 03383 defined(STM32L496xx) || defined(STM32L4A6xx) || \ 03384 defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 03385 else if (Instance == DFSDM1_Channel4) 03386 { 03387 channel = 4; 03388 } 03389 else if (Instance == DFSDM1_Channel5) 03390 { 03391 channel = 5; 03392 } 03393 else if (Instance == DFSDM1_Channel6) 03394 { 03395 channel = 6; 03396 } 03397 else if (Instance == DFSDM1_Channel7) 03398 { 03399 channel = 7; 03400 } 03401 #endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || STM32L496xx || STM32L4A6xx || STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ 03402 else 03403 { 03404 channel = 0; 03405 } 03406 03407 return channel; 03408 } 03409 03410 /** 03411 * @brief This function allows to really start regular conversion. 03412 * @param hdfsdm_filter DFSDM filter handle. 03413 * @retval None 03414 */ 03415 static void DFSDM_RegConvStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 03416 { 03417 /* Check regular trigger */ 03418 if (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) 03419 { 03420 /* Software start of regular conversion */ 03421 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSWSTART; 03422 } 03423 else /* synchronous trigger */ 03424 { 03425 /* Disable DFSDM filter */ 03426 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN); 03427 03428 /* Set RSYNC bit in DFSDM_FLTCR1 register */ 03429 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSYNC; 03430 03431 /* Enable DFSDM filter */ 03432 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN; 03433 03434 /* If injected conversion was in progress, restart it */ 03435 if (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) 03436 { 03437 if (hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) 03438 { 03439 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSWSTART; 03440 } 03441 /* Update remaining injected conversions */ 03442 hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \ 03443 hdfsdm_filter->InjectedChannelsNbr : 1U; 03444 } 03445 } 03446 /* Update DFSDM filter state */ 03447 hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) ? \ 03448 HAL_DFSDM_FILTER_STATE_REG : HAL_DFSDM_FILTER_STATE_REG_INJ; 03449 } 03450 03451 /** 03452 * @brief This function allows to really stop regular conversion. 03453 * @param hdfsdm_filter DFSDM filter handle. 03454 * @retval None 03455 */ 03456 static void DFSDM_RegConvStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 03457 { 03458 /* Disable DFSDM filter */ 03459 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN); 03460 03461 /* If regular trigger was synchronous, reset RSYNC bit in DFSDM_FLTCR1 register */ 03462 if (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SYNC_TRIGGER) 03463 { 03464 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RSYNC); 03465 } 03466 03467 /* Enable DFSDM filter */ 03468 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN; 03469 03470 /* If injected conversion was in progress, restart it */ 03471 if (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG_INJ) 03472 { 03473 if (hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) 03474 { 03475 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSWSTART; 03476 } 03477 /* Update remaining injected conversions */ 03478 hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \ 03479 hdfsdm_filter->InjectedChannelsNbr : 1U; 03480 } 03481 03482 /* Update DFSDM filter state */ 03483 hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \ 03484 HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ; 03485 } 03486 03487 /** 03488 * @brief This function allows to really start injected conversion. 03489 * @param hdfsdm_filter DFSDM filter handle. 03490 * @retval None 03491 */ 03492 static void DFSDM_InjConvStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 03493 { 03494 /* Check injected trigger */ 03495 if (hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) 03496 { 03497 /* Software start of injected conversion */ 03498 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSWSTART; 03499 } 03500 else /* external or synchronous trigger */ 03501 { 03502 /* Disable DFSDM filter */ 03503 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN); 03504 03505 if (hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SYNC_TRIGGER) 03506 { 03507 /* Set JSYNC bit in DFSDM_FLTCR1 register */ 03508 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSYNC; 03509 } 03510 else /* external trigger */ 03511 { 03512 /* Set JEXTEN[1:0] bits in DFSDM_FLTCR1 register */ 03513 hdfsdm_filter->Instance->FLTCR1 |= hdfsdm_filter->ExtTriggerEdge; 03514 } 03515 03516 /* Enable DFSDM filter */ 03517 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN; 03518 03519 /* If regular conversion was in progress, restart it */ 03520 if ((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) && \ 03521 (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER)) 03522 { 03523 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSWSTART; 03524 } 03525 } 03526 /* Update DFSDM filter state */ 03527 hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) ? \ 03528 HAL_DFSDM_FILTER_STATE_INJ : HAL_DFSDM_FILTER_STATE_REG_INJ; 03529 } 03530 03531 /** 03532 * @brief This function allows to really stop injected conversion. 03533 * @param hdfsdm_filter DFSDM filter handle. 03534 * @retval None 03535 */ 03536 static void DFSDM_InjConvStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter) 03537 { 03538 /* Disable DFSDM filter */ 03539 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN); 03540 03541 /* If injected trigger was synchronous, reset JSYNC bit in DFSDM_FLTCR1 register */ 03542 if (hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SYNC_TRIGGER) 03543 { 03544 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSYNC); 03545 } 03546 else if (hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_EXT_TRIGGER) 03547 { 03548 /* Reset JEXTEN[1:0] bits in DFSDM_FLTCR1 register */ 03549 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JEXTEN); 03550 } 03551 else 03552 { 03553 /* Nothing to do */ 03554 } 03555 03556 /* Enable DFSDM filter */ 03557 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN; 03558 03559 /* If regular conversion was in progress, restart it */ 03560 if ((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG_INJ) && \ 03561 (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER)) 03562 { 03563 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSWSTART; 03564 } 03565 03566 /* Update remaining injected conversions */ 03567 hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \ 03568 hdfsdm_filter->InjectedChannelsNbr : 1U; 03569 03570 /* Update DFSDM filter state */ 03571 hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \ 03572 HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG; 03573 } 03574 03575 /** 03576 * @} 03577 */ 03578 /* End of private functions --------------------------------------------------*/ 03579 03580 /** 03581 * @} 03582 */ 03583 03584 #endif /* STM32L451xx || STM32L452xx || STM32L462xx || STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || STM32L496xx || STM32L4A6xx || STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ 03585 03586 #endif /* HAL_DFSDM_MODULE_ENABLED */ 03587 03588 /** 03589 * @} 03590 */ 03591 03592 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/