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STM32L486xx HAL User Manual
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32l4xx_hal_dac.h 00004 * @author MCD Application Team 00005 * @brief Header file of DAC HAL module. 00006 ****************************************************************************** 00007 * @attention 00008 * 00009 * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> 00010 * 00011 * Redistribution and use in source and binary forms, with or without modification, 00012 * are permitted provided that the following conditions are met: 00013 * 1. Redistributions of source code must retain the above copyright notice, 00014 * this list of conditions and the following disclaimer. 00015 * 2. Redistributions in binary form must reproduce the above copyright notice, 00016 * this list of conditions and the following disclaimer in the documentation 00017 * and/or other materials provided with the distribution. 00018 * 3. Neither the name of STMicroelectronics nor the names of its contributors 00019 * may be used to endorse or promote products derived from this software 00020 * without specific prior written permission. 00021 * 00022 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 00023 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 00024 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 00025 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 00026 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 00027 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 00028 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00029 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 00030 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 00031 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00032 * 00033 ****************************************************************************** 00034 */ 00035 00036 /* Define to prevent recursive inclusion -------------------------------------*/ 00037 #ifndef __STM32L4xx_HAL_DAC_H 00038 #define __STM32L4xx_HAL_DAC_H 00039 00040 #ifdef __cplusplus 00041 extern "C" { 00042 #endif 00043 00044 00045 /* Includes ------------------------------------------------------------------*/ 00046 #include "stm32l4xx_hal_def.h" 00047 00048 /** @addtogroup STM32L4xx_HAL_Driver 00049 * @{ 00050 */ 00051 00052 /** @addtogroup DAC 00053 * @{ 00054 */ 00055 00056 /* Exported types ------------------------------------------------------------*/ 00057 00058 /** @defgroup DAC_Exported_Types DAC Exported Types 00059 * @{ 00060 */ 00061 00062 /** 00063 * @brief HAL State structures definition 00064 */ 00065 typedef enum 00066 { 00067 HAL_DAC_STATE_RESET = 0x00, /*!< DAC not yet initialized or disabled */ 00068 HAL_DAC_STATE_READY = 0x01, /*!< DAC initialized and ready for use */ 00069 HAL_DAC_STATE_BUSY = 0x02, /*!< DAC internal processing is ongoing */ 00070 HAL_DAC_STATE_TIMEOUT = 0x03, /*!< DAC timeout state */ 00071 HAL_DAC_STATE_ERROR = 0x04 /*!< DAC error state */ 00072 00073 }HAL_DAC_StateTypeDef; 00074 00075 /** 00076 * @brief DAC handle Structure definition 00077 */ 00078 typedef struct __DAC_HandleTypeDef 00079 { 00080 DAC_TypeDef *Instance; /*!< Register base address */ 00081 00082 __IO HAL_DAC_StateTypeDef State; /*!< DAC communication state */ 00083 00084 HAL_LockTypeDef Lock; /*!< DAC locking object */ 00085 00086 DMA_HandleTypeDef *DMA_Handle1; /*!< Pointer DMA handler for channel 1 */ 00087 00088 DMA_HandleTypeDef *DMA_Handle2; /*!< Pointer DMA handler for channel 2 */ 00089 00090 __IO uint32_t ErrorCode; /*!< DAC Error code */ 00091 00092 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 00093 void (* ConvCpltCallbackCh1) (struct __DAC_HandleTypeDef *hdac); 00094 void (* ConvHalfCpltCallbackCh1) (struct __DAC_HandleTypeDef *hdac); 00095 void (* ErrorCallbackCh1) (struct __DAC_HandleTypeDef *hdac); 00096 void (* DMAUnderrunCallbackCh1) (struct __DAC_HandleTypeDef *hdac); 00097 void (* ConvCpltCallbackCh2) (struct __DAC_HandleTypeDef* hdac); 00098 void (* ConvHalfCpltCallbackCh2) (struct __DAC_HandleTypeDef* hdac); 00099 void (* ErrorCallbackCh2) (struct __DAC_HandleTypeDef* hdac); 00100 void (* DMAUnderrunCallbackCh2) (struct __DAC_HandleTypeDef* hdac); 00101 00102 void (* MspInitCallback) (struct __DAC_HandleTypeDef *hdac); 00103 void (* MspDeInitCallback ) (struct __DAC_HandleTypeDef *hdac); 00104 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 00105 00106 }DAC_HandleTypeDef; 00107 00108 /** 00109 * @brief DAC Configuration sample and hold Channel structure definition 00110 */ 00111 typedef struct 00112 { 00113 uint32_t DAC_SampleTime ; /*!< Specifies the Sample time for the selected channel. 00114 This parameter applies when DAC_SampleAndHold is DAC_SAMPLEANDHOLD_ENABLE. 00115 This parameter must be a number between Min_Data = 0 and Max_Data = 1023 */ 00116 00117 uint32_t DAC_HoldTime ; /*!< Specifies the hold time for the selected channel 00118 This parameter applies when DAC_SampleAndHold is DAC_SAMPLEANDHOLD_ENABLE. 00119 This parameter must be a number between Min_Data = 0 and Max_Data = 1023 */ 00120 00121 uint32_t DAC_RefreshTime ; /*!< Specifies the refresh time for the selected channel 00122 This parameter applies when DAC_SampleAndHold is DAC_SAMPLEANDHOLD_ENABLE. 00123 This parameter must be a number between Min_Data = 0 and Max_Data = 255 */ 00124 } 00125 DAC_SampleAndHoldConfTypeDef; 00126 00127 /** 00128 * @brief DAC Configuration regular Channel structure definition 00129 */ 00130 typedef struct 00131 { 00132 #if defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined(STM32L4S9xx) 00133 uint32_t DAC_HighFrequency; /*!< Specifies the frequency interface mode 00134 This parameter can be a value of @ref DAC_HighFrequency */ 00135 #endif /* STM32L4R5xx STM32L4R7xx STM32L4R9xx STM32L4S5xx STM32L4S7xx STM32L4S9xx */ 00136 00137 uint32_t DAC_SampleAndHold; /*!< Specifies whether the DAC mode. 00138 This parameter can be a value of @ref DAC_SampleAndHold */ 00139 00140 uint32_t DAC_Trigger; /*!< Specifies the external trigger for the selected DAC channel. 00141 This parameter can be a value of @ref DAC_trigger_selection */ 00142 00143 uint32_t DAC_OutputBuffer; /*!< Specifies whether the DAC channel output buffer is enabled or disabled. 00144 This parameter can be a value of @ref DAC_output_buffer */ 00145 00146 uint32_t DAC_ConnectOnChipPeripheral ; /*!< Specifies whether the DAC output is connected or not to on chip peripheral . 00147 This parameter can be a value of @ref DAC_ConnectOnChipPeripheral */ 00148 00149 uint32_t DAC_UserTrimming; /*!< Specifies the trimming mode 00150 This parameter must be a value of @ref DAC_UserTrimming 00151 DAC_UserTrimming is either factory or user trimming */ 00152 00153 uint32_t DAC_TrimmingValue; /*!< Specifies the offset trimming value 00154 i.e. when DAC_SampleAndHold is DAC_TRIMMING_USER. 00155 This parameter must be a number between Min_Data = 1 and Max_Data = 31 */ 00156 00157 DAC_SampleAndHoldConfTypeDef DAC_SampleAndHoldConfig; /*!< Sample and Hold settings */ 00158 00159 }DAC_ChannelConfTypeDef; 00160 00161 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 00162 /** 00163 * @brief HAL DAC Callback ID enumeration definition 00164 */ 00165 typedef enum 00166 { 00167 HAL_DAC_CH1_COMPLETE_CB_ID = 0x00U, /*!< DAC CH1 Complete Callback ID */ 00168 HAL_DAC_CH1_HALF_COMPLETE_CB_ID = 0x01U, /*!< DAC CH1 half Complete Callback ID */ 00169 HAL_DAC_CH1_ERROR_ID = 0x02U, /*!< DAC CH1 error Callback ID */ 00170 HAL_DAC_CH1_UNDERRUN_CB_ID = 0x03U, /*!< DAC CH1 underrun Callback ID */ 00171 HAL_DAC_CH2_COMPLETE_CB_ID = 0x04U, /*!< DAC CH2 Complete Callback ID */ 00172 HAL_DAC_CH2_HALF_COMPLETE_CB_ID = 0x05U, /*!< DAC CH2 half Complete Callback ID */ 00173 HAL_DAC_CH2_ERROR_ID = 0x06U, /*!< DAC CH2 error Callback ID */ 00174 HAL_DAC_CH2_UNDERRUN_CB_ID = 0x07U, /*!< DAC CH2 underrun Callback ID */ 00175 HAL_DAC_MSP_INIT_CB_ID = 0x08U, /*!< DAC MspInit Callback ID */ 00176 HAL_DAC_MSP_DEINIT_CB_ID = 0x09U, /*!< DAC MspDeInit Callback ID */ 00177 HAL_DAC_ALL_CB_ID = 0x0AU /*!< DAC All ID */ 00178 }HAL_DAC_CallbackIDTypeDef; 00179 00180 /** 00181 * @brief HAL DAC Callback pointer definition 00182 */ 00183 typedef void (*pDAC_CallbackTypeDef)(DAC_HandleTypeDef *hdac); 00184 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 00185 00186 /** 00187 * @} 00188 */ 00189 00190 /* Exported constants --------------------------------------------------------*/ 00191 00192 /** @defgroup DAC_Exported_Constants DAC Exported Constants 00193 * @{ 00194 */ 00195 00196 /** @defgroup DAC_Error_Code DAC Error Code 00197 * @{ 00198 */ 00199 #define HAL_DAC_ERROR_NONE 0x00U /*!< No error */ 00200 #define HAL_DAC_ERROR_DMAUNDERRUNCH1 0x01U /*!< DAC channel1 DMA underrun error */ 00201 #define HAL_DAC_ERROR_DMAUNDERRUNCH2 0x02U /*!< DAC channel2 DMA underrun error */ 00202 #define HAL_DAC_ERROR_DMA 0x04U /*!< DMA error */ 00203 #define HAL_DAC_ERROR_TIMEOUT 0x08U /*!< Timeout error */ 00204 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 00205 #define HAL_DAC_ERROR_INVALID_CALLBACK 0x10U /*!< Invalid callback error */ 00206 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 00207 00208 /** 00209 * @} 00210 */ 00211 00212 /** @defgroup DAC_trigger_selection DAC trigger selection 00213 * @{ 00214 */ 00215 00216 #if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) 00217 #define DAC_TRIGGER_NONE ((uint32_t)0x00000000) /*!< Conversion is automatic once the DAC_DHRxxxx register 00218 has been loaded, and not by external trigger */ 00219 #define DAC_TRIGGER_T2_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TEN1)) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */ 00220 #define DAC_TRIGGER_T6_TRGO ((uint32_t)DAC_CR_TEN1) /*!< TIM6 TRGO selected as external conversion trigger for DAC channel */ 00221 #define DAC_TRIGGER_T7_TRGO ((uint32_t)(DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */ 00222 #define DAC_TRIGGER_EXT_IT9 ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */ 00223 #define DAC_TRIGGER_SOFTWARE ((uint32_t)(DAC_CR_TSEL1 | DAC_CR_TEN1)) /*!< Conversion started by software trigger for DAC channel */ 00224 #endif /* STM32L431xx STM32L432xx STM32L433xx STM32L442xx STM32L443xx */ 00225 00226 #if defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) 00227 #define DAC_TRIGGER_NONE ((uint32_t)0x00000000) /*!< Conversion is automatic once the DAC_DHRxxxx register 00228 has been loaded, and not by external trigger */ 00229 #define DAC_TRIGGER_T2_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TEN1)) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */ 00230 #define DAC_TRIGGER_T6_TRGO ((uint32_t)DAC_CR_TEN1) /*!< TIM6 TRGO selected as external conversion trigger for DAC channel */ 00231 #define DAC_TRIGGER_EXT_IT9 ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */ 00232 #define DAC_TRIGGER_SOFTWARE ((uint32_t)(DAC_CR_TSEL1 | DAC_CR_TEN1)) /*!< Conversion started by software trigger for DAC channel */ 00233 #endif /* STM32L451xx STM32L452xx STM32L462xx */ 00234 00235 #if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || defined (STM32L496xx) || defined (STM32L4A6xx) 00236 #define DAC_TRIGGER_NONE ((uint32_t)0x00000000) /*!< Conversion is automatic once the DAC_DHRxxxx register 00237 has been loaded, and not by external trigger */ 00238 #define DAC_TRIGGER_T2_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TEN1)) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */ 00239 #define DAC_TRIGGER_T4_TRGO ((uint32_t)(DAC_CR_TSEL1_2 |DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM4 TRGO selected as external conversion trigger for DAC channel */ 00240 #define DAC_TRIGGER_T5_TRGO ((uint32_t)(DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM5 TRGO selected as external conversion trigger for DAC channel */ 00241 #define DAC_TRIGGER_T6_TRGO ((uint32_t)DAC_CR_TEN1) /*!< TIM6 TRGO selected as external conversion trigger for DAC channel */ 00242 #define DAC_TRIGGER_T7_TRGO ((uint32_t)(DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */ 00243 #define DAC_TRIGGER_T8_TRGO ((uint32_t)(DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM8 TRGO selected as external conversion trigger for DAC channel */ 00244 #define DAC_TRIGGER_EXT_IT9 ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */ 00245 #define DAC_TRIGGER_SOFTWARE ((uint32_t)(DAC_CR_TSEL1 | DAC_CR_TEN1)) /*!< Conversion started by software trigger for DAC channel */ 00246 #endif /* STM32L471xx STM32L475xx STM32L476xx STM32L485xx STM32L486xx STM32L496xx STM32L4A6xx*/ 00247 00248 00249 #if defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined(STM32L4S9xx) 00250 #define DAC_TRIGGER_NONE ((uint32_t)0x00000000) /*!< Conversion is automatic once the DAC_DHRxxxx register 00251 has been loaded, and not by external trigger */ 00252 #define DAC_TRIGGER_T1_TRGO ((uint32_t) (DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM1 TRGO selected as external conversion trigger for DAC channel */ 00253 #define DAC_TRIGGER_T2_TRGO ((uint32_t) (DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */ 00254 #define DAC_TRIGGER_T4_TRGO ((uint32_t) (DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM1 TRGO selected as external conversion trigger for DAC channel */ 00255 #define DAC_TRIGGER_T5_TRGO ((uint32_t) (DAC_CR_TSEL1_2 | DAC_CR_TEN1)) /*!< TIM5 TRGO selected as external conversion trigger for DAC channel */ 00256 #define DAC_TRIGGER_T6_TRGO ((uint32_t) (DAC_CR_TSEL1_2 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM6 TRGO selected as external conversion trigger for DAC channel */ 00257 #define DAC_TRIGGER_T7_TRGO ((uint32_t) (DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */ 00258 #define DAC_TRIGGER_T8_TRGO ((uint32_t) (DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM8 TRGO selected as external conversion trigger for DAC channel */ 00259 #define DAC_TRIGGER_T15_TRGO ((uint32_t) (DAC_CR_TSEL1_3 | DAC_CR_TEN1)) /*!< TIM15 TRGO selected as external conversion trigger for DAC channel */ 00260 #define DAC_TRIGGER_LPTIM1_OUT ((uint32_t) (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< LPTIM1 OUT TRGO selected as external conversion trigger for DAC channel */ 00261 #define DAC_TRIGGER_LPTIM2_OUT ((uint32_t) (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_2 | DAC_CR_TEN1)) /*!< LPTIM2 OUT TRGO selected as external conversion trigger for DAC channel */ 00262 #define DAC_TRIGGER_EXT_IT9 ((uint32_t) (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_2 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */ 00263 #define DAC_TRIGGER_SOFTWARE ((uint32_t) (DAC_CR_TEN1)) /*!< Conversion started by software trigger for DAC channel */ 00264 00265 #endif /* STM32L4R5xx STM32L4R7xx STM32L4R9xx STM32L4S5xx STM32L4S7xx STM32L4S9xx */ 00266 00267 00268 /** 00269 * @} 00270 */ 00271 00272 /** @defgroup DAC_output_buffer DAC output buffer 00273 * @{ 00274 */ 00275 #define DAC_OUTPUTBUFFER_ENABLE ((uint32_t)0x00000000) 00276 #define DAC_OUTPUTBUFFER_DISABLE ((uint32_t)DAC_MCR_MODE1_1) 00277 00278 /** 00279 * @} 00280 */ 00281 00282 /** @defgroup DAC_Channel_selection DAC Channel selection 00283 * @{ 00284 */ 00285 #define DAC_CHANNEL_1 ((uint32_t)0x00000000) 00286 #if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || \ 00287 defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || defined (STM32L496xx) || defined (STM32L4A6xx) || \ 00288 defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined(STM32L4S9xx) 00289 #define DAC_CHANNEL_2 ((uint32_t)0x00000010) 00290 #endif /* STM32L431xx STM32L432xx STM32L433xx STM32L442xx STM32L443xx */ 00291 /* STM32L471xx STM32L475xx STM32L476xx STM32L485xx STM32L486xx STM32L496xx STM32L4A6xx */ 00292 /* STM32L4R5xx STM32L4R7xx STM32L4R9xx STM32L4S5xx STM32L4S7xx STM32L4S9xx */ 00293 00294 /** 00295 * @} 00296 */ 00297 00298 /** @defgroup DAC_data_alignment DAC data alignment 00299 * @{ 00300 */ 00301 #define DAC_ALIGN_12B_R ((uint32_t)0x00000000) 00302 #define DAC_ALIGN_12B_L ((uint32_t)0x00000004) 00303 #define DAC_ALIGN_8B_R ((uint32_t)0x00000008) 00304 00305 /** 00306 * @} 00307 */ 00308 00309 /** @defgroup DAC_flags_definition DAC flags definition 00310 * @{ 00311 */ 00312 #define DAC_FLAG_DMAUDR1 ((uint32_t)DAC_SR_DMAUDR1) 00313 #define DAC_FLAG_DMAUDR2 ((uint32_t)DAC_SR_DMAUDR2) 00314 00315 /** 00316 * @} 00317 */ 00318 00319 /** @defgroup DAC_IT_definition DAC IT definition 00320 * @{ 00321 */ 00322 #define DAC_IT_DMAUDR1 ((uint32_t)DAC_SR_DMAUDR1) 00323 #define DAC_IT_DMAUDR2 ((uint32_t)DAC_SR_DMAUDR2) 00324 00325 /** 00326 * @} 00327 */ 00328 00329 /** @defgroup DAC_ConnectOnChipPeripheral DAC ConnectOnChipPeripheral 00330 * @{ 00331 */ 00332 #define DAC_CHIPCONNECT_DISABLE ((uint32_t)0x00000000) 00333 #define DAC_CHIPCONNECT_ENABLE ((uint32_t)DAC_MCR_MODE1_0) 00334 00335 /** 00336 * @} 00337 */ 00338 00339 /** @defgroup DAC_UserTrimming DAC User Trimming 00340 * @{ 00341 */ 00342 00343 #define DAC_TRIMMING_FACTORY ((uint32_t)0x00000000) /*!< Factory trimming */ 00344 #define DAC_TRIMMING_USER ((uint32_t)0x00000001) /*!< User trimming */ 00345 00346 /** 00347 * @} 00348 */ 00349 00350 /** @defgroup DAC_SampleAndHold DAC power mode 00351 * @{ 00352 */ 00353 #define DAC_SAMPLEANDHOLD_DISABLE ((uint32_t)0x00000000) 00354 #define DAC_SAMPLEANDHOLD_ENABLE ((uint32_t)DAC_MCR_MODE1_2) 00355 00356 /** 00357 * @} 00358 */ 00359 #if defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined(STM32L4S9xx) 00360 /** @defgroup DAC_HighFrequency DAC high frequency interface mode 00361 * @{ 00362 */ 00363 #define DAC_HIGH_FREQUENCY_INTERFACE_MODE_DISABLE ((uint32_t)0x00000000) /*!< High frequency interface mode disabled */ 00364 #define DAC_HIGH_FREQUENCY_INTERFACE_MODE_ABOVE_80MHZ ((uint32_t)DAC_CR_HFSEL) /*!< High frequency interface mode enabled */ 00365 #define DAC_HIGH_FREQUENCY_INTERFACE_MODE_AUTOMATIC ((uint32_t)0x00000002) /*!< High frequency interface mode automatic */ 00366 00367 /** 00368 * @} 00369 */ 00370 #endif /* STM32L4R5xx STM32L4R7xx STM32L4R9xx STM32L4S5xx STM32L4S7xx STM32L4S9xx */ 00371 00372 /** 00373 * @} 00374 */ 00375 00376 /* Exported macro ------------------------------------------------------------*/ 00377 00378 /** @defgroup DAC_Exported_Macros DAC Exported Macros 00379 * @{ 00380 */ 00381 00382 /** @brief Reset DAC handle state. 00383 * @param __HANDLE__: specifies the DAC handle. 00384 * @retval None 00385 */ 00386 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 00387 #define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) do { \ 00388 (__HANDLE__)->State = HAL_DAC_STATE_RESET; \ 00389 (__HANDLE__)->MspInitCallback = NULL; \ 00390 (__HANDLE__)->MspDeInitCallback = NULL; \ 00391 } while(0) 00392 #else 00393 #define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DAC_STATE_RESET) 00394 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 00395 00396 /** @brief Enable the DAC channel. 00397 * @param __HANDLE__: specifies the DAC handle. 00398 * @param __DAC_Channel__: specifies the DAC channel 00399 * @retval None 00400 */ 00401 #define __HAL_DAC_ENABLE(__HANDLE__, __DAC_Channel__) \ 00402 ((__HANDLE__)->Instance->CR |= (DAC_CR_EN1 << (__DAC_Channel__))) 00403 00404 /** @brief Disable the DAC channel. 00405 * @param __HANDLE__: specifies the DAC handle 00406 * @param __DAC_Channel__: specifies the DAC channel. 00407 * @retval None 00408 */ 00409 #define __HAL_DAC_DISABLE(__HANDLE__, __DAC_Channel__) \ 00410 ((__HANDLE__)->Instance->CR &= ~(DAC_CR_EN1 << (__DAC_Channel__))) 00411 00412 /** @brief Set DHR12R1 alignment. 00413 * @param __ALIGNMENT__: specifies the DAC alignment 00414 * @retval None 00415 */ 00416 #define DAC_DHR12R1_ALIGNMENT(__ALIGNMENT__) (((uint32_t)0x00000008) + (__ALIGNMENT__)) 00417 00418 /** @brief Set DHR12R2 alignment. 00419 * @param __ALIGNMENT__: specifies the DAC alignment 00420 * @retval None 00421 */ 00422 #define DAC_DHR12R2_ALIGNMENT(__ALIGNMENT__) (((uint32_t)0x00000014) + (__ALIGNMENT__)) 00423 00424 /** @brief Set DHR12RD alignment. 00425 * @param __ALIGNMENT__: specifies the DAC alignment 00426 * @retval None 00427 */ 00428 #define DAC_DHR12RD_ALIGNMENT(__ALIGNMENT__) (((uint32_t)0x00000020) + (__ALIGNMENT__)) 00429 00430 /** @brief Enable the DAC interrupt. 00431 * @param __HANDLE__: specifies the DAC handle 00432 * @param __INTERRUPT__: specifies the DAC interrupt. 00433 * This parameter can be any combination of the following values: 00434 * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt 00435 * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt 00436 * @retval None 00437 */ 00438 #define __HAL_DAC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) |= (__INTERRUPT__)) 00439 00440 /** @brief Disable the DAC interrupt. 00441 * @param __HANDLE__: specifies the DAC handle 00442 * @param __INTERRUPT__: specifies the DAC interrupt. 00443 * This parameter can be any combination of the following values: 00444 * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt 00445 * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt 00446 * @retval None 00447 */ 00448 #define __HAL_DAC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) &= ~(__INTERRUPT__)) 00449 00450 /** @brief Check whether the specified DAC interrupt source is enabled or not. 00451 * @param __HANDLE__: DAC handle 00452 * @param __INTERRUPT__: DAC interrupt source to check 00453 * This parameter can be any combination of the following values: 00454 * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt 00455 * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt 00456 * @retval State of interruption (SET or RESET) 00457 */ 00458 #define __HAL_DAC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR & (__INTERRUPT__)) == (__INTERRUPT__)) 00459 00460 /** @brief Get the selected DAC's flag status. 00461 * @param __HANDLE__: specifies the DAC handle. 00462 * @param __FLAG__: specifies the DAC flag to get. 00463 * This parameter can be any combination of the following values: 00464 * @arg DAC_FLAG_DMAUDR1: DAC channel 1 DMA underrun flag 00465 * @arg DAC_FLAG_DMAUDR2: DAC channel 2 DMA underrun flag 00466 * @retval None 00467 */ 00468 #define __HAL_DAC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) 00469 00470 /** @brief Clear the DAC's flag. 00471 * @param __HANDLE__: specifies the DAC handle. 00472 * @param __FLAG__: specifies the DAC flag to clear. 00473 * This parameter can be any combination of the following values: 00474 * @arg DAC_FLAG_DMAUDR1: DAC channel 1 DMA underrun flag 00475 * @arg DAC_FLAG_DMAUDR2: DAC channel 2 DMA underrun flag 00476 * @retval None 00477 */ 00478 #define __HAL_DAC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR) = (__FLAG__)) 00479 00480 /** 00481 * @} 00482 */ 00483 00484 /* Private macro -------------------------------------------------------------*/ 00485 00486 /** @defgroup DAC_Private_Macros DAC Private Macros 00487 * @{ 00488 */ 00489 #define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OUTPUTBUFFER_ENABLE) || \ 00490 ((STATE) == DAC_OUTPUTBUFFER_DISABLE)) 00491 00492 #if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || \ 00493 defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || defined (STM32L496xx) || defined (STM32L4A6xx) || \ 00494 defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined(STM32L4S9xx) 00495 #define IS_DAC_CHANNEL(CHANNEL) (((CHANNEL) == DAC_CHANNEL_1) || \ 00496 ((CHANNEL) == DAC_CHANNEL_2)) 00497 #endif /* STM32L431xx STM32L432xx STM32L433xx STM32L442xx STM32L443xx */ 00498 /* STM32L471xx STM32L475xx STM32L476xx STM32L485xx STM32L486xx STM32L496xx STM32L4A6xx */ 00499 /* STM32L4R5xx STM32L4R7xx STM32L4R9xx STM32L4S5xx STM32L4S7xx STM32L4S9xx */ 00500 00501 #if defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) 00502 #define IS_DAC_CHANNEL(CHANNEL) ((CHANNEL) == DAC_CHANNEL_1) 00503 #endif /* STM32L451xx STM32L452xx STM32L462xx */ 00504 00505 #define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_ALIGN_12B_R) || \ 00506 ((ALIGN) == DAC_ALIGN_12B_L) || \ 00507 ((ALIGN) == DAC_ALIGN_8B_R)) 00508 00509 #define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0) 00510 00511 #define IS_DAC_REFRESHTIME(TIME) ((TIME) <= 0x000000FF) 00512 00513 /** 00514 * @} 00515 */ 00516 00517 /* Include DAC HAL Extended module */ 00518 #include "stm32l4xx_hal_dac_ex.h" 00519 00520 /* Exported functions --------------------------------------------------------*/ 00521 00522 /** @addtogroup DAC_Exported_Functions 00523 * @{ 00524 */ 00525 00526 /** @addtogroup DAC_Exported_Functions_Group1 00527 * @{ 00528 */ 00529 /* Initialization and de-initialization functions *****************************/ 00530 HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac); 00531 HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef* hdac); 00532 void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac); 00533 void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac); 00534 00535 /** 00536 * @} 00537 */ 00538 00539 /** @addtogroup DAC_Exported_Functions_Group2 00540 * @{ 00541 */ 00542 /* IO operation functions *****************************************************/ 00543 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel); 00544 HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef* hdac, uint32_t Channel); 00545 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment); 00546 HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel); 00547 00548 void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac); 00549 00550 HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data); 00551 00552 void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef* hdac); 00553 void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef* hdac); 00554 void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac); 00555 void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac); 00556 00557 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 00558 /* DAC callback registering/unregistering */ 00559 HAL_StatusTypeDef HAL_DAC_RegisterCallback (DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID, pDAC_CallbackTypeDef pCallback); 00560 HAL_StatusTypeDef HAL_DAC_UnRegisterCallback (DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID); 00561 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 00562 00563 /** 00564 * @} 00565 */ 00566 00567 /** @addtogroup DAC_Exported_Functions_Group3 00568 * @{ 00569 */ 00570 /* Peripheral Control functions ***********************************************/ 00571 uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel); 00572 00573 HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel); 00574 /** 00575 * @} 00576 */ 00577 00578 /** @addtogroup DAC_Exported_Functions_Group4 00579 * @{ 00580 */ 00581 /* Peripheral State and Error functions ***************************************/ 00582 HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef* hdac); 00583 uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac); 00584 00585 /** 00586 * @} 00587 */ 00588 00589 /** 00590 * @} 00591 */ 00592 00593 /** 00594 * @} 00595 */ 00596 00597 /** 00598 * @} 00599 */ 00600 00601 #ifdef __cplusplus 00602 } 00603 #endif 00604 00605 00606 #endif /*__STM32L4xx_HAL_DAC_H */ 00607 00608 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 00609
1.7.6.1