STM32L486xx HAL User Manual
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32l4xx_hal_can.h 00004 * @author MCD Application Team 00005 * @brief Header file of CAN HAL module. 00006 ****************************************************************************** 00007 * @attention 00008 * 00009 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> 00010 * 00011 * Redistribution and use in source and binary forms, with or without modification, 00012 * are permitted provided that the following conditions are met: 00013 * 1. Redistributions of source code must retain the above copyright notice, 00014 * this list of conditions and the following disclaimer. 00015 * 2. Redistributions in binary form must reproduce the above copyright notice, 00016 * this list of conditions and the following disclaimer in the documentation 00017 * and/or other materials provided with the distribution. 00018 * 3. Neither the name of STMicroelectronics nor the names of its contributors 00019 * may be used to endorse or promote products derived from this software 00020 * without specific prior written permission. 00021 * 00022 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 00023 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 00024 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 00025 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 00026 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 00027 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 00028 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00029 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 00030 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 00031 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00032 * 00033 ****************************************************************************** 00034 */ 00035 00036 /* Define to prevent recursive inclusion -------------------------------------*/ 00037 #ifndef STM32L4xx_HAL_CAN_H 00038 #define STM32L4xx_HAL_CAN_H 00039 00040 #ifdef __cplusplus 00041 extern "C" { 00042 #endif 00043 00044 /* Includes ------------------------------------------------------------------*/ 00045 #include "stm32l4xx_hal_def.h" 00046 00047 /** @addtogroup STM32L4xx_HAL_Driver 00048 * @{ 00049 */ 00050 00051 #if defined (CAN1) 00052 /** @addtogroup CAN 00053 * @{ 00054 */ 00055 00056 /* Exported types ------------------------------------------------------------*/ 00057 /** @defgroup CAN_Exported_Types CAN Exported Types 00058 * @{ 00059 */ 00060 /** 00061 * @brief HAL State structures definition 00062 */ 00063 typedef enum 00064 { 00065 HAL_CAN_STATE_RESET = 0x00U, /*!< CAN not yet initialized or disabled */ 00066 HAL_CAN_STATE_READY = 0x01U, /*!< CAN initialized and ready for use */ 00067 HAL_CAN_STATE_LISTENING = 0x02U, /*!< CAN receive process is ongoing */ 00068 HAL_CAN_STATE_SLEEP_PENDING = 0x03U, /*!< CAN sleep request is pending */ 00069 HAL_CAN_STATE_SLEEP_ACTIVE = 0x04U, /*!< CAN sleep mode is active */ 00070 HAL_CAN_STATE_ERROR = 0x05U /*!< CAN error state */ 00071 00072 } HAL_CAN_StateTypeDef; 00073 00074 /** 00075 * @brief CAN init structure definition 00076 */ 00077 typedef struct 00078 { 00079 uint32_t Prescaler; /*!< Specifies the length of a time quantum. 00080 This parameter must be a number between Min_Data = 1 and Max_Data = 1024. */ 00081 00082 uint32_t Mode; /*!< Specifies the CAN operating mode. 00083 This parameter can be a value of @ref CAN_operating_mode */ 00084 00085 uint32_t SyncJumpWidth; /*!< Specifies the maximum number of time quanta the CAN hardware 00086 is allowed to lengthen or shorten a bit to perform resynchronization. 00087 This parameter can be a value of @ref CAN_synchronisation_jump_width */ 00088 00089 uint32_t TimeSeg1; /*!< Specifies the number of time quanta in Bit Segment 1. 00090 This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_1 */ 00091 00092 uint32_t TimeSeg2; /*!< Specifies the number of time quanta in Bit Segment 2. 00093 This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_2 */ 00094 00095 FunctionalState TimeTriggeredMode; /*!< Enable or disable the time triggered communication mode. 00096 This parameter can be set to ENABLE or DISABLE. */ 00097 00098 FunctionalState AutoBusOff; /*!< Enable or disable the automatic bus-off management. 00099 This parameter can be set to ENABLE or DISABLE. */ 00100 00101 FunctionalState AutoWakeUp; /*!< Enable or disable the automatic wake-up mode. 00102 This parameter can be set to ENABLE or DISABLE. */ 00103 00104 FunctionalState AutoRetransmission; /*!< Enable or disable the non-automatic retransmission mode. 00105 This parameter can be set to ENABLE or DISABLE. */ 00106 00107 FunctionalState ReceiveFifoLocked; /*!< Enable or disable the Receive FIFO Locked mode. 00108 This parameter can be set to ENABLE or DISABLE. */ 00109 00110 FunctionalState TransmitFifoPriority;/*!< Enable or disable the transmit FIFO priority. 00111 This parameter can be set to ENABLE or DISABLE. */ 00112 00113 } CAN_InitTypeDef; 00114 00115 /** 00116 * @brief CAN filter configuration structure definition 00117 */ 00118 typedef struct 00119 { 00120 uint32_t FilterIdHigh; /*!< Specifies the filter identification number (MSBs for a 32-bit 00121 configuration, first one for a 16-bit configuration). 00122 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */ 00123 00124 uint32_t FilterIdLow; /*!< Specifies the filter identification number (LSBs for a 32-bit 00125 configuration, second one for a 16-bit configuration). 00126 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */ 00127 00128 uint32_t FilterMaskIdHigh; /*!< Specifies the filter mask number or identification number, 00129 according to the mode (MSBs for a 32-bit configuration, 00130 first one for a 16-bit configuration). 00131 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */ 00132 00133 uint32_t FilterMaskIdLow; /*!< Specifies the filter mask number or identification number, 00134 according to the mode (LSBs for a 32-bit configuration, 00135 second one for a 16-bit configuration). 00136 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */ 00137 00138 uint32_t FilterFIFOAssignment; /*!< Specifies the FIFO (0 or 1U) which will be assigned to the filter. 00139 This parameter can be a value of @ref CAN_filter_FIFO */ 00140 00141 uint32_t FilterBank; /*!< Specifies the filter bank which will be initialized. 00142 For single CAN instance(14 dedicated filter banks), 00143 this parameter must be a number between Min_Data = 0 and Max_Data = 13. 00144 For dual CAN instances(28 filter banks shared), 00145 this parameter must be a number between Min_Data = 0 and Max_Data = 27. */ 00146 00147 uint32_t FilterMode; /*!< Specifies the filter mode to be initialized. 00148 This parameter can be a value of @ref CAN_filter_mode */ 00149 00150 uint32_t FilterScale; /*!< Specifies the filter scale. 00151 This parameter can be a value of @ref CAN_filter_scale */ 00152 00153 uint32_t FilterActivation; /*!< Enable or disable the filter. 00154 This parameter can be a value of @ref CAN_filter_activation */ 00155 00156 uint32_t SlaveStartFilterBank; /*!< Select the start filter bank for the slave CAN instance. 00157 For single CAN instances, this parameter is meaningless. 00158 For dual CAN instances, all filter banks with lower index are assigned to master 00159 CAN instance, whereas all filter banks with greater index are assigned to slave 00160 CAN instance. 00161 This parameter must be a number between Min_Data = 0 and Max_Data = 27. */ 00162 00163 } CAN_FilterTypeDef; 00164 00165 /** 00166 * @brief CAN Tx message header structure definition 00167 */ 00168 typedef struct 00169 { 00170 uint32_t StdId; /*!< Specifies the standard identifier. 00171 This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF. */ 00172 00173 uint32_t ExtId; /*!< Specifies the extended identifier. 00174 This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF. */ 00175 00176 uint32_t IDE; /*!< Specifies the type of identifier for the message that will be transmitted. 00177 This parameter can be a value of @ref CAN_identifier_type */ 00178 00179 uint32_t RTR; /*!< Specifies the type of frame for the message that will be transmitted. 00180 This parameter can be a value of @ref CAN_remote_transmission_request */ 00181 00182 uint32_t DLC; /*!< Specifies the length of the frame that will be transmitted. 00183 This parameter must be a number between Min_Data = 0 and Max_Data = 8. */ 00184 00185 FunctionalState TransmitGlobalTime; /*!< Specifies whether the timestamp counter value captured on start 00186 of frame transmission, is sent in DATA6 and DATA7 replacing pData[6] and pData[7]. 00187 @note: Time Triggered Communication Mode must be enabled. 00188 @note: DLC must be programmed as 8 bytes, in order these 2 bytes are sent. 00189 This parameter can be set to ENABLE or DISABLE. */ 00190 00191 } CAN_TxHeaderTypeDef; 00192 00193 /** 00194 * @brief CAN Rx message header structure definition 00195 */ 00196 typedef struct 00197 { 00198 uint32_t StdId; /*!< Specifies the standard identifier. 00199 This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF. */ 00200 00201 uint32_t ExtId; /*!< Specifies the extended identifier. 00202 This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF. */ 00203 00204 uint32_t IDE; /*!< Specifies the type of identifier for the message that will be transmitted. 00205 This parameter can be a value of @ref CAN_identifier_type */ 00206 00207 uint32_t RTR; /*!< Specifies the type of frame for the message that will be transmitted. 00208 This parameter can be a value of @ref CAN_remote_transmission_request */ 00209 00210 uint32_t DLC; /*!< Specifies the length of the frame that will be transmitted. 00211 This parameter must be a number between Min_Data = 0 and Max_Data = 8. */ 00212 00213 uint32_t Timestamp; /*!< Specifies the timestamp counter value captured on start of frame reception. 00214 @note: Time Triggered Communication Mode must be enabled. 00215 This parameter must be a number between Min_Data = 0 and Max_Data = 0xFFFF. */ 00216 00217 uint32_t FilterMatchIndex; /*!< Specifies the index of matching acceptance filter element. 00218 This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF. */ 00219 00220 } CAN_RxHeaderTypeDef; 00221 00222 /** 00223 * @brief CAN handle Structure definition 00224 */ 00225 typedef struct __CAN_HandleTypeDef 00226 { 00227 CAN_TypeDef *Instance; /*!< Register base address */ 00228 00229 CAN_InitTypeDef Init; /*!< CAN required parameters */ 00230 00231 __IO HAL_CAN_StateTypeDef State; /*!< CAN communication state */ 00232 00233 __IO uint32_t ErrorCode; /*!< CAN Error code. 00234 This parameter can be a value of @ref CAN_Error_Code */ 00235 00236 #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 00237 void (* TxMailbox0CompleteCallback)(struct __CAN_HandleTypeDef *hcan);/*!< CAN Tx Mailbox 0 complete callback */ 00238 void (* TxMailbox1CompleteCallback)(struct __CAN_HandleTypeDef *hcan);/*!< CAN Tx Mailbox 1 complete callback */ 00239 void (* TxMailbox2CompleteCallback)(struct __CAN_HandleTypeDef *hcan);/*!< CAN Tx Mailbox 2 complete callback */ 00240 void (* TxMailbox0AbortCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Tx Mailbox 0 abort callback */ 00241 void (* TxMailbox1AbortCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Tx Mailbox 1 abort callback */ 00242 void (* TxMailbox2AbortCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Tx Mailbox 2 abort callback */ 00243 void (* RxFifo0MsgPendingCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Rx FIFO 0 msg pending callback */ 00244 void (* RxFifo0FullCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Rx FIFO 0 full callback */ 00245 void (* RxFifo1MsgPendingCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Rx FIFO 1 msg pending callback */ 00246 void (* RxFifo1FullCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Rx FIFO 1 full callback */ 00247 void (* SleepCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Sleep callback */ 00248 void (* WakeUpFromRxMsgCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Wake Up from Rx msg callback */ 00249 void (* ErrorCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Error callback */ 00250 00251 void (* MspInitCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Msp Init callback */ 00252 void (* MspDeInitCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Msp DeInit callback */ 00253 00254 #endif /* (USE_HAL_CAN_REGISTER_CALLBACKS) */ 00255 } CAN_HandleTypeDef; 00256 00257 #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 00258 /** 00259 * @brief HAL CAN common Callback ID enumeration definition 00260 */ 00261 typedef enum 00262 { 00263 HAL_CAN_TX_MAILBOX0_COMPLETE_CB_ID = 0x00U, /*!< CAN Tx Mailbox 0 complete callback ID */ 00264 HAL_CAN_TX_MAILBOX1_COMPLETE_CB_ID = 0x01U, /*!< CAN Tx Mailbox 1 complete callback ID */ 00265 HAL_CAN_TX_MAILBOX2_COMPLETE_CB_ID = 0x02U, /*!< CAN Tx Mailbox 2 complete callback ID */ 00266 HAL_CAN_TX_MAILBOX0_ABORT_CB_ID = 0x03U, /*!< CAN Tx Mailbox 0 abort callback ID */ 00267 HAL_CAN_TX_MAILBOX1_ABORT_CB_ID = 0x04U, /*!< CAN Tx Mailbox 1 abort callback ID */ 00268 HAL_CAN_TX_MAILBOX2_ABORT_CB_ID = 0x05U, /*!< CAN Tx Mailbox 2 abort callback ID */ 00269 HAL_CAN_RX_FIFO0_MSG_PENDING_CB_ID = 0x06U, /*!< CAN Rx FIFO 0 message pending callback ID */ 00270 HAL_CAN_RX_FIFO0_FULL_CB_ID = 0x07U, /*!< CAN Rx FIFO 0 full callback ID */ 00271 HAL_CAN_RX_FIFO1_MSG_PENDING_CB_ID = 0x08U, /*!< CAN Rx FIFO 1 message pending callback ID */ 00272 HAL_CAN_RX_FIFO1_FULL_CB_ID = 0x09U, /*!< CAN Rx FIFO 1 full callback ID */ 00273 HAL_CAN_SLEEP_CB_ID = 0x0AU, /*!< CAN Sleep callback ID */ 00274 HAL_CAN_WAKEUP_FROM_RX_MSG_CB_ID = 0x0BU, /*!< CAN Wake Up fropm Rx msg callback ID */ 00275 HAL_CAN_ERROR_CB_ID = 0x0CU, /*!< CAN Error callback ID */ 00276 00277 HAL_CAN_MSPINIT_CB_ID = 0x0DU, /*!< CAN MspInit callback ID */ 00278 HAL_CAN_MSPDEINIT_CB_ID = 0x0EU, /*!< CAN MspDeInit callback ID */ 00279 00280 } HAL_CAN_CallbackIDTypeDef; 00281 00282 /** 00283 * @brief HAL CAN Callback pointer definition 00284 */ 00285 typedef void (*pCAN_CallbackTypeDef)(CAN_HandleTypeDef *hcan); /*!< pointer to a CAN callback function */ 00286 00287 #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ 00288 /** 00289 * @} 00290 */ 00291 00292 /* Exported constants --------------------------------------------------------*/ 00293 00294 /** @defgroup CAN_Exported_Constants CAN Exported Constants 00295 * @{ 00296 */ 00297 00298 /** @defgroup CAN_Error_Code CAN Error Code 00299 * @{ 00300 */ 00301 #define HAL_CAN_ERROR_NONE (0x00000000U) /*!< No error */ 00302 #define HAL_CAN_ERROR_EWG (0x00000001U) /*!< Protocol Error Warning */ 00303 #define HAL_CAN_ERROR_EPV (0x00000002U) /*!< Error Passive */ 00304 #define HAL_CAN_ERROR_BOF (0x00000004U) /*!< Bus-off error */ 00305 #define HAL_CAN_ERROR_STF (0x00000008U) /*!< Stuff error */ 00306 #define HAL_CAN_ERROR_FOR (0x00000010U) /*!< Form error */ 00307 #define HAL_CAN_ERROR_ACK (0x00000020U) /*!< Acknowledgment error */ 00308 #define HAL_CAN_ERROR_BR (0x00000040U) /*!< Bit recessive error */ 00309 #define HAL_CAN_ERROR_BD (0x00000080U) /*!< Bit dominant error */ 00310 #define HAL_CAN_ERROR_CRC (0x00000100U) /*!< CRC error */ 00311 #define HAL_CAN_ERROR_RX_FOV0 (0x00000200U) /*!< Rx FIFO0 overrun error */ 00312 #define HAL_CAN_ERROR_RX_FOV1 (0x00000400U) /*!< Rx FIFO1 overrun error */ 00313 #define HAL_CAN_ERROR_TX_ALST0 (0x00000800U) /*!< TxMailbox 0 transmit failure due to arbitration lost */ 00314 #define HAL_CAN_ERROR_TX_TERR0 (0x00001000U) /*!< TxMailbox 1 transmit failure due to tranmit error */ 00315 #define HAL_CAN_ERROR_TX_ALST1 (0x00002000U) /*!< TxMailbox 0 transmit failure due to arbitration lost */ 00316 #define HAL_CAN_ERROR_TX_TERR1 (0x00004000U) /*!< TxMailbox 1 transmit failure due to tranmit error */ 00317 #define HAL_CAN_ERROR_TX_ALST2 (0x00008000U) /*!< TxMailbox 0 transmit failure due to arbitration lost */ 00318 #define HAL_CAN_ERROR_TX_TERR2 (0x00010000U) /*!< TxMailbox 1 transmit failure due to tranmit error */ 00319 #define HAL_CAN_ERROR_TIMEOUT (0x00020000U) /*!< Timeout error */ 00320 #define HAL_CAN_ERROR_NOT_INITIALIZED (0x00040000U) /*!< Peripheral not initialized */ 00321 #define HAL_CAN_ERROR_NOT_READY (0x00080000U) /*!< Peripheral not ready */ 00322 #define HAL_CAN_ERROR_NOT_STARTED (0x00100000U) /*!< Peripheral not started */ 00323 #define HAL_CAN_ERROR_PARAM (0x00200000U) /*!< Parameter error */ 00324 00325 #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 00326 #define HAL_CAN_ERROR_INVALID_CALLBACK (0x00400000U) /*!< Invalid Callback error */ 00327 #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ 00328 #define HAL_CAN_ERROR_INTERNAL (0x00800000U) /*!< Internal error */ 00329 00330 /** 00331 * @} 00332 */ 00333 00334 /** @defgroup CAN_InitStatus CAN InitStatus 00335 * @{ 00336 */ 00337 #define CAN_INITSTATUS_FAILED (0x00000000U) /*!< CAN initialization failed */ 00338 #define CAN_INITSTATUS_SUCCESS (0x00000001U) /*!< CAN initialization OK */ 00339 /** 00340 * @} 00341 */ 00342 00343 /** @defgroup CAN_operating_mode CAN Operating Mode 00344 * @{ 00345 */ 00346 #define CAN_MODE_NORMAL (0x00000000U) /*!< Normal mode */ 00347 #define CAN_MODE_LOOPBACK ((uint32_t)CAN_BTR_LBKM) /*!< Loopback mode */ 00348 #define CAN_MODE_SILENT ((uint32_t)CAN_BTR_SILM) /*!< Silent mode */ 00349 #define CAN_MODE_SILENT_LOOPBACK ((uint32_t)(CAN_BTR_LBKM | CAN_BTR_SILM)) /*!< Loopback combined with silent mode */ 00350 /** 00351 * @} 00352 */ 00353 00354 00355 /** @defgroup CAN_synchronisation_jump_width CAN Synchronization Jump Width 00356 * @{ 00357 */ 00358 #define CAN_SJW_1TQ (0x00000000U) /*!< 1 time quantum */ 00359 #define CAN_SJW_2TQ ((uint32_t)CAN_BTR_SJW_0) /*!< 2 time quantum */ 00360 #define CAN_SJW_3TQ ((uint32_t)CAN_BTR_SJW_1) /*!< 3 time quantum */ 00361 #define CAN_SJW_4TQ ((uint32_t)CAN_BTR_SJW) /*!< 4 time quantum */ 00362 /** 00363 * @} 00364 */ 00365 00366 /** @defgroup CAN_time_quantum_in_bit_segment_1 CAN Time Quantum in Bit Segment 1 00367 * @{ 00368 */ 00369 #define CAN_BS1_1TQ (0x00000000U) /*!< 1 time quantum */ 00370 #define CAN_BS1_2TQ ((uint32_t)CAN_BTR_TS1_0) /*!< 2 time quantum */ 00371 #define CAN_BS1_3TQ ((uint32_t)CAN_BTR_TS1_1) /*!< 3 time quantum */ 00372 #define CAN_BS1_4TQ ((uint32_t)(CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 4 time quantum */ 00373 #define CAN_BS1_5TQ ((uint32_t)CAN_BTR_TS1_2) /*!< 5 time quantum */ 00374 #define CAN_BS1_6TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_0)) /*!< 6 time quantum */ 00375 #define CAN_BS1_7TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1)) /*!< 7 time quantum */ 00376 #define CAN_BS1_8TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 8 time quantum */ 00377 #define CAN_BS1_9TQ ((uint32_t)CAN_BTR_TS1_3) /*!< 9 time quantum */ 00378 #define CAN_BS1_10TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_0)) /*!< 10 time quantum */ 00379 #define CAN_BS1_11TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1)) /*!< 11 time quantum */ 00380 #define CAN_BS1_12TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 12 time quantum */ 00381 #define CAN_BS1_13TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2)) /*!< 13 time quantum */ 00382 #define CAN_BS1_14TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_0)) /*!< 14 time quantum */ 00383 #define CAN_BS1_15TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_1)) /*!< 15 time quantum */ 00384 #define CAN_BS1_16TQ ((uint32_t)CAN_BTR_TS1) /*!< 16 time quantum */ 00385 /** 00386 * @} 00387 */ 00388 00389 /** @defgroup CAN_time_quantum_in_bit_segment_2 CAN Time Quantum in Bit Segment 2 00390 * @{ 00391 */ 00392 #define CAN_BS2_1TQ (0x00000000U) /*!< 1 time quantum */ 00393 #define CAN_BS2_2TQ ((uint32_t)CAN_BTR_TS2_0) /*!< 2 time quantum */ 00394 #define CAN_BS2_3TQ ((uint32_t)CAN_BTR_TS2_1) /*!< 3 time quantum */ 00395 #define CAN_BS2_4TQ ((uint32_t)(CAN_BTR_TS2_1 | CAN_BTR_TS2_0)) /*!< 4 time quantum */ 00396 #define CAN_BS2_5TQ ((uint32_t)CAN_BTR_TS2_2) /*!< 5 time quantum */ 00397 #define CAN_BS2_6TQ ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_0)) /*!< 6 time quantum */ 00398 #define CAN_BS2_7TQ ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_1)) /*!< 7 time quantum */ 00399 #define CAN_BS2_8TQ ((uint32_t)CAN_BTR_TS2) /*!< 8 time quantum */ 00400 /** 00401 * @} 00402 */ 00403 00404 /** @defgroup CAN_filter_mode CAN Filter Mode 00405 * @{ 00406 */ 00407 #define CAN_FILTERMODE_IDMASK (0x00000000U) /*!< Identifier mask mode */ 00408 #define CAN_FILTERMODE_IDLIST (0x00000001U) /*!< Identifier list mode */ 00409 /** 00410 * @} 00411 */ 00412 00413 /** @defgroup CAN_filter_scale CAN Filter Scale 00414 * @{ 00415 */ 00416 #define CAN_FILTERSCALE_16BIT (0x00000000U) /*!< Two 16-bit filters */ 00417 #define CAN_FILTERSCALE_32BIT (0x00000001U) /*!< One 32-bit filter */ 00418 /** 00419 * @} 00420 */ 00421 00422 /** @defgroup CAN_filter_activation CAN Filter Activation 00423 * @{ 00424 */ 00425 #define CAN_FILTER_DISABLE (0x00000000U) /*!< Disable filter */ 00426 #define CAN_FILTER_ENABLE (0x00000001U) /*!< Enable filter */ 00427 /** 00428 * @} 00429 */ 00430 00431 /** @defgroup CAN_filter_FIFO CAN Filter FIFO 00432 * @{ 00433 */ 00434 #define CAN_FILTER_FIFO0 (0x00000000U) /*!< Filter FIFO 0 assignment for filter x */ 00435 #define CAN_FILTER_FIFO1 (0x00000001U) /*!< Filter FIFO 1 assignment for filter x */ 00436 /** 00437 * @} 00438 */ 00439 00440 /** @defgroup CAN_identifier_type CAN Identifier Type 00441 * @{ 00442 */ 00443 #define CAN_ID_STD (0x00000000U) /*!< Standard Id */ 00444 #define CAN_ID_EXT (0x00000004U) /*!< Extended Id */ 00445 /** 00446 * @} 00447 */ 00448 00449 /** @defgroup CAN_remote_transmission_request CAN Remote Transmission Request 00450 * @{ 00451 */ 00452 #define CAN_RTR_DATA (0x00000000U) /*!< Data frame */ 00453 #define CAN_RTR_REMOTE (0x00000002U) /*!< Remote frame */ 00454 /** 00455 * @} 00456 */ 00457 00458 /** @defgroup CAN_receive_FIFO_number CAN Receive FIFO Number 00459 * @{ 00460 */ 00461 #define CAN_RX_FIFO0 (0x00000000U) /*!< CAN receive FIFO 0 */ 00462 #define CAN_RX_FIFO1 (0x00000001U) /*!< CAN receive FIFO 1 */ 00463 /** 00464 * @} 00465 */ 00466 00467 /** @defgroup CAN_Tx_Mailboxes CAN Tx Mailboxes 00468 * @{ 00469 */ 00470 #define CAN_TX_MAILBOX0 (0x00000001U) /*!< Tx Mailbox 0 */ 00471 #define CAN_TX_MAILBOX1 (0x00000002U) /*!< Tx Mailbox 1 */ 00472 #define CAN_TX_MAILBOX2 (0x00000004U) /*!< Tx Mailbox 2 */ 00473 /** 00474 * @} 00475 */ 00476 00477 /** @defgroup CAN_flags CAN Flags 00478 * @{ 00479 */ 00480 /* Transmit Flags */ 00481 #define CAN_FLAG_RQCP0 (0x00000500U) /*!< Request complete MailBox 0 flag */ 00482 #define CAN_FLAG_TXOK0 (0x00000501U) /*!< Transmission OK MailBox 0 flag */ 00483 #define CAN_FLAG_ALST0 (0x00000502U) /*!< Arbitration Lost MailBox 0 flag */ 00484 #define CAN_FLAG_TERR0 (0x00000503U) /*!< Transmission error MailBox 0 flag */ 00485 #define CAN_FLAG_RQCP1 (0x00000508U) /*!< Request complete MailBox1 flag */ 00486 #define CAN_FLAG_TXOK1 (0x00000509U) /*!< Transmission OK MailBox 1 flag */ 00487 #define CAN_FLAG_ALST1 (0x0000050AU) /*!< Arbitration Lost MailBox 1 flag */ 00488 #define CAN_FLAG_TERR1 (0x0000050BU) /*!< Transmission error MailBox 1 flag */ 00489 #define CAN_FLAG_RQCP2 (0x00000510U) /*!< Request complete MailBox2 flag */ 00490 #define CAN_FLAG_TXOK2 (0x00000511U) /*!< Transmission OK MailBox 2 flag */ 00491 #define CAN_FLAG_ALST2 (0x00000512U) /*!< Arbitration Lost MailBox 2 flag */ 00492 #define CAN_FLAG_TERR2 (0x00000513U) /*!< Transmission error MailBox 2 flag */ 00493 #define CAN_FLAG_TME0 (0x0000051AU) /*!< Transmit mailbox 0 empty flag */ 00494 #define CAN_FLAG_TME1 (0x0000051BU) /*!< Transmit mailbox 1 empty flag */ 00495 #define CAN_FLAG_TME2 (0x0000051CU) /*!< Transmit mailbox 2 empty flag */ 00496 #define CAN_FLAG_LOW0 (0x0000051DU) /*!< Lowest priority mailbox 0 flag */ 00497 #define CAN_FLAG_LOW1 (0x0000051EU) /*!< Lowest priority mailbox 1 flag */ 00498 #define CAN_FLAG_LOW2 (0x0000051FU) /*!< Lowest priority mailbox 2 flag */ 00499 00500 /* Receive Flags */ 00501 #define CAN_FLAG_FF0 (0x00000203U) /*!< RX FIFO 0 Full flag */ 00502 #define CAN_FLAG_FOV0 (0x00000204U) /*!< RX FIFO 0 Overrun flag */ 00503 #define CAN_FLAG_FF1 (0x00000403U) /*!< RX FIFO 1 Full flag */ 00504 #define CAN_FLAG_FOV1 (0x00000404U) /*!< RX FIFO 1 Overrun flag */ 00505 00506 /* Operating Mode Flags */ 00507 #define CAN_FLAG_INAK (0x00000100U) /*!< Initialization acknowledge flag */ 00508 #define CAN_FLAG_SLAK (0x00000101U) /*!< Sleep acknowledge flag */ 00509 #define CAN_FLAG_ERRI (0x00000102U) /*!< Error flag */ 00510 #define CAN_FLAG_WKU (0x00000103U) /*!< Wake up interrupt flag */ 00511 #define CAN_FLAG_SLAKI (0x00000104U) /*!< Sleep acknowledge interrupt flag */ 00512 00513 /* Error Flags */ 00514 #define CAN_FLAG_EWG (0x00000300U) /*!< Error warning flag */ 00515 #define CAN_FLAG_EPV (0x00000301U) /*!< Error passive flag */ 00516 #define CAN_FLAG_BOF (0x00000302U) /*!< Bus-Off flag */ 00517 /** 00518 * @} 00519 */ 00520 00521 00522 /** @defgroup CAN_Interrupts CAN Interrupts 00523 * @{ 00524 */ 00525 /* Transmit Interrupt */ 00526 #define CAN_IT_TX_MAILBOX_EMPTY ((uint32_t)CAN_IER_TMEIE) /*!< Transmit mailbox empty interrupt */ 00527 00528 /* Receive Interrupts */ 00529 #define CAN_IT_RX_FIFO0_MSG_PENDING ((uint32_t)CAN_IER_FMPIE0) /*!< FIFO 0 message pending interrupt */ 00530 #define CAN_IT_RX_FIFO0_FULL ((uint32_t)CAN_IER_FFIE0) /*!< FIFO 0 full interrupt */ 00531 #define CAN_IT_RX_FIFO0_OVERRUN ((uint32_t)CAN_IER_FOVIE0) /*!< FIFO 0 overrun interrupt */ 00532 #define CAN_IT_RX_FIFO1_MSG_PENDING ((uint32_t)CAN_IER_FMPIE1) /*!< FIFO 1 message pending interrupt */ 00533 #define CAN_IT_RX_FIFO1_FULL ((uint32_t)CAN_IER_FFIE1) /*!< FIFO 1 full interrupt */ 00534 #define CAN_IT_RX_FIFO1_OVERRUN ((uint32_t)CAN_IER_FOVIE1) /*!< FIFO 1 overrun interrupt */ 00535 00536 /* Operating Mode Interrupts */ 00537 #define CAN_IT_WAKEUP ((uint32_t)CAN_IER_WKUIE) /*!< Wake-up interrupt */ 00538 #define CAN_IT_SLEEP_ACK ((uint32_t)CAN_IER_SLKIE) /*!< Sleep acknowledge interrupt */ 00539 00540 /* Error Interrupts */ 00541 #define CAN_IT_ERROR_WARNING ((uint32_t)CAN_IER_EWGIE) /*!< Error warning interrupt */ 00542 #define CAN_IT_ERROR_PASSIVE ((uint32_t)CAN_IER_EPVIE) /*!< Error passive interrupt */ 00543 #define CAN_IT_BUSOFF ((uint32_t)CAN_IER_BOFIE) /*!< Bus-off interrupt */ 00544 #define CAN_IT_LAST_ERROR_CODE ((uint32_t)CAN_IER_LECIE) /*!< Last error code interrupt */ 00545 #define CAN_IT_ERROR ((uint32_t)CAN_IER_ERRIE) /*!< Error Interrupt */ 00546 /** 00547 * @} 00548 */ 00549 00550 /** 00551 * @} 00552 */ 00553 00554 /* Exported macros -----------------------------------------------------------*/ 00555 /** @defgroup CAN_Exported_Macros CAN Exported Macros 00556 * @{ 00557 */ 00558 00559 /** @brief Reset CAN handle state 00560 * @param __HANDLE__ CAN handle. 00561 * @retval None 00562 */ 00563 #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 00564 #define __HAL_CAN_RESET_HANDLE_STATE(__HANDLE__) do{ \ 00565 (__HANDLE__)->State = HAL_CAN_STATE_RESET; \ 00566 (__HANDLE__)->MspInitCallback = NULL; \ 00567 (__HANDLE__)->MspDeInitCallback = NULL; \ 00568 } while(0) 00569 #else 00570 #define __HAL_CAN_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CAN_STATE_RESET) 00571 #endif /*USE_HAL_CAN_REGISTER_CALLBACKS */ 00572 00573 /** 00574 * @brief Enable the specified CAN interrupts. 00575 * @param __HANDLE__ CAN handle. 00576 * @param __INTERRUPT__ CAN Interrupt sources to enable. 00577 * This parameter can be any combination of @arg CAN_Interrupts 00578 * @retval None 00579 */ 00580 #define __HAL_CAN_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) |= (__INTERRUPT__)) 00581 00582 /** 00583 * @brief Disable the specified CAN interrupts. 00584 * @param __HANDLE__ CAN handle. 00585 * @param __INTERRUPT__ CAN Interrupt sources to disable. 00586 * This parameter can be any combination of @arg CAN_Interrupts 00587 * @retval None 00588 */ 00589 #define __HAL_CAN_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) &= ~(__INTERRUPT__)) 00590 00591 /** @brief Check if the specified CAN interrupt source is enabled or disabled. 00592 * @param __HANDLE__ specifies the CAN Handle. 00593 * @param __INTERRUPT__ specifies the CAN interrupt source to check. 00594 * This parameter can be a value of @arg CAN_Interrupts 00595 * @retval The state of __IT__ (TRUE or FALSE). 00596 */ 00597 #define __HAL_CAN_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) & (__INTERRUPT__)) 00598 00599 /** @brief Check whether the specified CAN flag is set or not. 00600 * @param __HANDLE__ specifies the CAN Handle. 00601 * @param __FLAG__ specifies the flag to check. 00602 * This parameter can be one of @arg CAN_flags 00603 * @retval The state of __FLAG__ (TRUE or FALSE). 00604 */ 00605 #define __HAL_CAN_GET_FLAG(__HANDLE__, __FLAG__) \ 00606 ((((__FLAG__) >> 8U) == 5U)? ((((__HANDLE__)->Instance->TSR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ 00607 (((__FLAG__) >> 8U) == 2U)? ((((__HANDLE__)->Instance->RF0R) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ 00608 (((__FLAG__) >> 8U) == 4U)? ((((__HANDLE__)->Instance->RF1R) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ 00609 (((__FLAG__) >> 8U) == 1U)? ((((__HANDLE__)->Instance->MSR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ 00610 (((__FLAG__) >> 8U) == 3U)? ((((__HANDLE__)->Instance->ESR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): 0U) 00611 00612 /** @brief Clear the specified CAN pending flag. 00613 * @param __HANDLE__ specifies the CAN Handle. 00614 * @param __FLAG__ specifies the flag to check. 00615 * This parameter can be one of the following values: 00616 * @arg CAN_FLAG_RQCP0: Request complete MailBox 0 Flag 00617 * @arg CAN_FLAG_TXOK0: Transmission OK MailBox 0 Flag 00618 * @arg CAN_FLAG_ALST0: Arbitration Lost MailBox 0 Flag 00619 * @arg CAN_FLAG_TERR0: Transmission error MailBox 0 Flag 00620 * @arg CAN_FLAG_RQCP1: Request complete MailBox 1 Flag 00621 * @arg CAN_FLAG_TXOK1: Transmission OK MailBox 1 Flag 00622 * @arg CAN_FLAG_ALST1: Arbitration Lost MailBox 1 Flag 00623 * @arg CAN_FLAG_TERR1: Transmission error MailBox 1 Flag 00624 * @arg CAN_FLAG_RQCP2: Request complete MailBox 2 Flag 00625 * @arg CAN_FLAG_TXOK2: Transmission OK MailBox 2 Flag 00626 * @arg CAN_FLAG_ALST2: Arbitration Lost MailBox 2 Flag 00627 * @arg CAN_FLAG_TERR2: Transmission error MailBox 2 Flag 00628 * @arg CAN_FLAG_FF0: RX FIFO 0 Full Flag 00629 * @arg CAN_FLAG_FOV0: RX FIFO 0 Overrun Flag 00630 * @arg CAN_FLAG_FF1: RX FIFO 1 Full Flag 00631 * @arg CAN_FLAG_FOV1: RX FIFO 1 Overrun Flag 00632 * @arg CAN_FLAG_WKUI: Wake up Interrupt Flag 00633 * @arg CAN_FLAG_SLAKI: Sleep acknowledge Interrupt Flag 00634 * @retval None 00635 */ 00636 #define __HAL_CAN_CLEAR_FLAG(__HANDLE__, __FLAG__) \ 00637 ((((__FLAG__) >> 8U) == 5U)? (((__HANDLE__)->Instance->TSR) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ 00638 (((__FLAG__) >> 8U) == 2U)? (((__HANDLE__)->Instance->RF0R) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ 00639 (((__FLAG__) >> 8U) == 4U)? (((__HANDLE__)->Instance->RF1R) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ 00640 (((__FLAG__) >> 8U) == 1U)? (((__HANDLE__)->Instance->MSR) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): 0U) 00641 00642 /** 00643 * @} 00644 */ 00645 00646 /* Exported functions --------------------------------------------------------*/ 00647 /** @addtogroup CAN_Exported_Functions CAN Exported Functions 00648 * @{ 00649 */ 00650 00651 /** @addtogroup CAN_Exported_Functions_Group1 Initialization and de-initialization functions 00652 * @brief Initialization and Configuration functions 00653 * @{ 00654 */ 00655 00656 /* Initialization and de-initialization functions *****************************/ 00657 HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef *hcan); 00658 HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef *hcan); 00659 void HAL_CAN_MspInit(CAN_HandleTypeDef *hcan); 00660 void HAL_CAN_MspDeInit(CAN_HandleTypeDef *hcan); 00661 00662 #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 00663 /* Callbacks Register/UnRegister functions ***********************************/ 00664 HAL_StatusTypeDef HAL_CAN_RegisterCallback(CAN_HandleTypeDef *hcan, HAL_CAN_CallbackIDTypeDef CallbackID, void (* pCallback)(CAN_HandleTypeDef *_hcan)); 00665 HAL_StatusTypeDef HAL_CAN_UnRegisterCallback(CAN_HandleTypeDef *hcan, HAL_CAN_CallbackIDTypeDef CallbackID); 00666 00667 #endif /* (USE_HAL_CAN_REGISTER_CALLBACKS) */ 00668 /** 00669 * @} 00670 */ 00671 00672 /** @addtogroup CAN_Exported_Functions_Group2 Configuration functions 00673 * @brief Configuration functions 00674 * @{ 00675 */ 00676 00677 /* Configuration functions ****************************************************/ 00678 HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef *hcan, CAN_FilterTypeDef *sFilterConfig); 00679 00680 /** 00681 * @} 00682 */ 00683 00684 /** @addtogroup CAN_Exported_Functions_Group3 Control functions 00685 * @brief Control functions 00686 * @{ 00687 */ 00688 00689 /* Control functions **********************************************************/ 00690 HAL_StatusTypeDef HAL_CAN_Start(CAN_HandleTypeDef *hcan); 00691 HAL_StatusTypeDef HAL_CAN_Stop(CAN_HandleTypeDef *hcan); 00692 HAL_StatusTypeDef HAL_CAN_RequestSleep(CAN_HandleTypeDef *hcan); 00693 HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef *hcan); 00694 uint32_t HAL_CAN_IsSleepActive(CAN_HandleTypeDef *hcan); 00695 HAL_StatusTypeDef HAL_CAN_AddTxMessage(CAN_HandleTypeDef *hcan, CAN_TxHeaderTypeDef *pHeader, uint8_t aData[], uint32_t *pTxMailbox); 00696 HAL_StatusTypeDef HAL_CAN_AbortTxRequest(CAN_HandleTypeDef *hcan, uint32_t TxMailboxes); 00697 uint32_t HAL_CAN_GetTxMailboxesFreeLevel(CAN_HandleTypeDef *hcan); 00698 uint32_t HAL_CAN_IsTxMessagePending(CAN_HandleTypeDef *hcan, uint32_t TxMailboxes); 00699 uint32_t HAL_CAN_GetTxTimestamp(CAN_HandleTypeDef *hcan, uint32_t TxMailbox); 00700 HAL_StatusTypeDef HAL_CAN_GetRxMessage(CAN_HandleTypeDef *hcan, uint32_t RxFifo, CAN_RxHeaderTypeDef *pHeader, uint8_t aData[]); 00701 uint32_t HAL_CAN_GetRxFifoFillLevel(CAN_HandleTypeDef *hcan, uint32_t RxFifo); 00702 00703 /** 00704 * @} 00705 */ 00706 00707 /** @addtogroup CAN_Exported_Functions_Group4 Interrupts management 00708 * @brief Interrupts management 00709 * @{ 00710 */ 00711 /* Interrupts management ******************************************************/ 00712 HAL_StatusTypeDef HAL_CAN_ActivateNotification(CAN_HandleTypeDef *hcan, uint32_t ActiveITs); 00713 HAL_StatusTypeDef HAL_CAN_DeactivateNotification(CAN_HandleTypeDef *hcan, uint32_t InactiveITs); 00714 void HAL_CAN_IRQHandler(CAN_HandleTypeDef *hcan); 00715 00716 /** 00717 * @} 00718 */ 00719 00720 /** @addtogroup CAN_Exported_Functions_Group5 Callback functions 00721 * @brief Callback functions 00722 * @{ 00723 */ 00724 /* Callbacks functions ********************************************************/ 00725 00726 void HAL_CAN_TxMailbox0CompleteCallback(CAN_HandleTypeDef *hcan); 00727 void HAL_CAN_TxMailbox1CompleteCallback(CAN_HandleTypeDef *hcan); 00728 void HAL_CAN_TxMailbox2CompleteCallback(CAN_HandleTypeDef *hcan); 00729 void HAL_CAN_TxMailbox0AbortCallback(CAN_HandleTypeDef *hcan); 00730 void HAL_CAN_TxMailbox1AbortCallback(CAN_HandleTypeDef *hcan); 00731 void HAL_CAN_TxMailbox2AbortCallback(CAN_HandleTypeDef *hcan); 00732 void HAL_CAN_RxFifo0MsgPendingCallback(CAN_HandleTypeDef *hcan); 00733 void HAL_CAN_RxFifo0FullCallback(CAN_HandleTypeDef *hcan); 00734 void HAL_CAN_RxFifo1MsgPendingCallback(CAN_HandleTypeDef *hcan); 00735 void HAL_CAN_RxFifo1FullCallback(CAN_HandleTypeDef *hcan); 00736 void HAL_CAN_SleepCallback(CAN_HandleTypeDef *hcan); 00737 void HAL_CAN_WakeUpFromRxMsgCallback(CAN_HandleTypeDef *hcan); 00738 void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan); 00739 00740 /** 00741 * @} 00742 */ 00743 00744 /** @addtogroup CAN_Exported_Functions_Group6 Peripheral State and Error functions 00745 * @brief CAN Peripheral State functions 00746 * @{ 00747 */ 00748 /* Peripheral State and Error functions ***************************************/ 00749 HAL_CAN_StateTypeDef HAL_CAN_GetState(CAN_HandleTypeDef *hcan); 00750 uint32_t HAL_CAN_GetError(CAN_HandleTypeDef *hcan); 00751 HAL_StatusTypeDef HAL_CAN_ResetError(CAN_HandleTypeDef *hcan); 00752 00753 /** 00754 * @} 00755 */ 00756 00757 /** 00758 * @} 00759 */ 00760 00761 /* Private types -------------------------------------------------------------*/ 00762 /** @defgroup CAN_Private_Types CAN Private Types 00763 * @{ 00764 */ 00765 00766 /** 00767 * @} 00768 */ 00769 00770 /* Private variables ---------------------------------------------------------*/ 00771 /** @defgroup CAN_Private_Variables CAN Private Variables 00772 * @{ 00773 */ 00774 00775 /** 00776 * @} 00777 */ 00778 00779 /* Private constants ---------------------------------------------------------*/ 00780 /** @defgroup CAN_Private_Constants CAN Private Constants 00781 * @{ 00782 */ 00783 #define CAN_FLAG_MASK (0x000000FFU) 00784 /** 00785 * @} 00786 */ 00787 00788 /* Private Macros -----------------------------------------------------------*/ 00789 /** @defgroup CAN_Private_Macros CAN Private Macros 00790 * @{ 00791 */ 00792 00793 #define IS_CAN_MODE(MODE) (((MODE) == CAN_MODE_NORMAL) || \ 00794 ((MODE) == CAN_MODE_LOOPBACK)|| \ 00795 ((MODE) == CAN_MODE_SILENT) || \ 00796 ((MODE) == CAN_MODE_SILENT_LOOPBACK)) 00797 #define IS_CAN_SJW(SJW) (((SJW) == CAN_SJW_1TQ) || ((SJW) == CAN_SJW_2TQ) || \ 00798 ((SJW) == CAN_SJW_3TQ) || ((SJW) == CAN_SJW_4TQ)) 00799 #define IS_CAN_BS1(BS1) (((BS1) == CAN_BS1_1TQ) || ((BS1) == CAN_BS1_2TQ) || \ 00800 ((BS1) == CAN_BS1_3TQ) || ((BS1) == CAN_BS1_4TQ) || \ 00801 ((BS1) == CAN_BS1_5TQ) || ((BS1) == CAN_BS1_6TQ) || \ 00802 ((BS1) == CAN_BS1_7TQ) || ((BS1) == CAN_BS1_8TQ) || \ 00803 ((BS1) == CAN_BS1_9TQ) || ((BS1) == CAN_BS1_10TQ)|| \ 00804 ((BS1) == CAN_BS1_11TQ)|| ((BS1) == CAN_BS1_12TQ)|| \ 00805 ((BS1) == CAN_BS1_13TQ)|| ((BS1) == CAN_BS1_14TQ)|| \ 00806 ((BS1) == CAN_BS1_15TQ)|| ((BS1) == CAN_BS1_16TQ)) 00807 #define IS_CAN_BS2(BS2) (((BS2) == CAN_BS2_1TQ) || ((BS2) == CAN_BS2_2TQ) || \ 00808 ((BS2) == CAN_BS2_3TQ) || ((BS2) == CAN_BS2_4TQ) || \ 00809 ((BS2) == CAN_BS2_5TQ) || ((BS2) == CAN_BS2_6TQ) || \ 00810 ((BS2) == CAN_BS2_7TQ) || ((BS2) == CAN_BS2_8TQ)) 00811 #define IS_CAN_PRESCALER(PRESCALER) (((PRESCALER) >= 1U) && ((PRESCALER) <= 1024U)) 00812 #define IS_CAN_FILTER_ID_HALFWORD(HALFWORD) ((HALFWORD) <= 0xFFFFU) 00813 #define IS_CAN_FILTER_BANK_DUAL(BANK) ((BANK) <= 27U) 00814 #define IS_CAN_FILTER_BANK_SINGLE(BANK) ((BANK) <= 13U) 00815 #define IS_CAN_FILTER_MODE(MODE) (((MODE) == CAN_FILTERMODE_IDMASK) || \ 00816 ((MODE) == CAN_FILTERMODE_IDLIST)) 00817 #define IS_CAN_FILTER_SCALE(SCALE) (((SCALE) == CAN_FILTERSCALE_16BIT) || \ 00818 ((SCALE) == CAN_FILTERSCALE_32BIT)) 00819 #define IS_CAN_FILTER_ACTIVATION(ACTIVATION) (((ACTIVATION) == CAN_FILTER_DISABLE) || \ 00820 ((ACTIVATION) == CAN_FILTER_ENABLE)) 00821 #define IS_CAN_FILTER_FIFO(FIFO) (((FIFO) == CAN_FILTER_FIFO0) || \ 00822 ((FIFO) == CAN_FILTER_FIFO1)) 00823 #define IS_CAN_TX_MAILBOX(TRANSMITMAILBOX) (((TRANSMITMAILBOX) == CAN_TX_MAILBOX0 ) || \ 00824 ((TRANSMITMAILBOX) == CAN_TX_MAILBOX1 ) || \ 00825 ((TRANSMITMAILBOX) == CAN_TX_MAILBOX2 )) 00826 #define IS_CAN_TX_MAILBOX_LIST(TRANSMITMAILBOX) ((TRANSMITMAILBOX) <= (CAN_TX_MAILBOX0 | CAN_TX_MAILBOX1 | CAN_TX_MAILBOX2)) 00827 #define IS_CAN_STDID(STDID) ((STDID) <= 0x7FFU) 00828 #define IS_CAN_EXTID(EXTID) ((EXTID) <= 0x1FFFFFFFU) 00829 #define IS_CAN_DLC(DLC) ((DLC) <= 8U) 00830 #define IS_CAN_IDTYPE(IDTYPE) (((IDTYPE) == CAN_ID_STD) || \ 00831 ((IDTYPE) == CAN_ID_EXT)) 00832 #define IS_CAN_RTR(RTR) (((RTR) == CAN_RTR_DATA) || ((RTR) == CAN_RTR_REMOTE)) 00833 #define IS_CAN_RX_FIFO(FIFO) (((FIFO) == CAN_RX_FIFO0) || ((FIFO) == CAN_RX_FIFO1)) 00834 #define IS_CAN_IT(IT) ((IT) <= (CAN_IT_TX_MAILBOX_EMPTY | CAN_IT_RX_FIFO0_MSG_PENDING | \ 00835 CAN_IT_RX_FIFO0_FULL | CAN_IT_RX_FIFO0_OVERRUN | \ 00836 CAN_IT_RX_FIFO1_MSG_PENDING | CAN_IT_RX_FIFO1_FULL | \ 00837 CAN_IT_RX_FIFO1_OVERRUN | CAN_IT_WAKEUP | \ 00838 CAN_IT_SLEEP_ACK | CAN_IT_ERROR_WARNING | \ 00839 CAN_IT_ERROR_PASSIVE | CAN_IT_BUSOFF | \ 00840 CAN_IT_LAST_ERROR_CODE | CAN_IT_ERROR)) 00841 00842 /** 00843 * @} 00844 */ 00845 /* End of private macros -----------------------------------------------------*/ 00846 00847 /** 00848 * @} 00849 */ 00850 00851 00852 #endif /* CAN1 */ 00853 /** 00854 * @} 00855 */ 00856 00857 #ifdef __cplusplus 00858 } 00859 #endif 00860 00861 #endif /* STM32L4xx_HAL_CAN_H */ 00862 00863 00864 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/