STM32L486xx HAL User Manual
Modules
RCC
STM32L4xx_LL_Driver

Modules

 RCC Private functions
 RCC Private Variables
 RCC Private Constants
 RCC Private Macros
 RCC Exported Types
 RCC Exported Constants
 RCC Exported Macros
 RCC Exported Functions

Reference Manual to LL API cross reference

The following table provide a mapping between the registers and bits, as they appears inside product reference manual, and the functions provided by the Low Layer interface.

This table gives the correspondance for RCC registers.

Register Bit Function
BDCR BDRST LL_RCC_ForceBackupDomainReset
LL_RCC_ReleaseBackupDomainReset
LSCOEN LL_RCC_LSCO_Disable
LL_RCC_LSCO_Enable
LSCOSEL LL_RCC_LSCO_GetSource
LL_RCC_LSCO_SetSource
LSEBYP LL_RCC_LSE_DisableBypass
LL_RCC_LSE_EnableBypass
LSECSSD LL_RCC_LSE_IsCSSDetected
LSECSSON LL_RCC_LSE_DisableCSS
LL_RCC_LSE_EnableCSS
LSEDRV LL_RCC_LSE_GetDriveCapability
LL_RCC_LSE_SetDriveCapability
LSEON LL_RCC_LSE_Disable
LL_RCC_LSE_Enable
LSERDY LL_RCC_LSE_IsReady
RTCEN LL_RCC_DisableRTC
LL_RCC_EnableRTC
LL_RCC_IsEnabledRTC
RTCSEL LL_RCC_GetRTCClockSource
LL_RCC_SetRTCClockSource
CCIPR ADCSEL LL_RCC_GetADCClockSource
LL_RCC_SetADCClockSource
CLK48SEL LL_RCC_GetRNGClockSource
LL_RCC_GetSDMMCClockSource
LL_RCC_GetUSBClockSource
LL_RCC_SetRNGClockSource
LL_RCC_SetSDMMCClockSource
LL_RCC_SetUSBClockSource
DFSDM1SEL LL_RCC_GetDFSDMClockSource
LL_RCC_SetDFSDMClockSource
I2CxSEL LL_RCC_GetI2CClockSource
LL_RCC_SetI2CClockSource
LPTIMxSEL LL_RCC_GetLPTIMClockSource
LL_RCC_SetLPTIMClockSource
LPUART1SEL LL_RCC_GetLPUARTClockSource
LL_RCC_SetLPUARTClockSource
SAIxSEL LL_RCC_GetSAIClockSource
LL_RCC_SetSAIClockSource
SWPMI1SEL LL_RCC_GetSWPMIClockSource
LL_RCC_SetSWPMIClockSource
UARTxSEL LL_RCC_GetUARTClockSource
LL_RCC_SetUARTClockSource
USARTxSEL LL_RCC_GetUSARTClockSource
LL_RCC_SetUSARTClockSource
CFGR HPRE LL_RCC_GetAHBPrescaler
LL_RCC_SetAHBPrescaler
MCOPRE LL_RCC_ConfigMCO
MCOSEL LL_RCC_ConfigMCO
PPRE1 LL_RCC_GetAPB1Prescaler
LL_RCC_SetAPB1Prescaler
PPRE2 LL_RCC_GetAPB2Prescaler
LL_RCC_SetAPB2Prescaler
STOPWUCK LL_RCC_GetClkAfterWakeFromStop
LL_RCC_SetClkAfterWakeFromStop
SW LL_RCC_SetSysClkSource
SWS LL_RCC_GetSysClkSource
CICR CSSC LL_RCC_ClearFlag_HSECSS
HSERDYC LL_RCC_ClearFlag_HSERDY
HSIRDYC LL_RCC_ClearFlag_HSIRDY
LSECSSC LL_RCC_ClearFlag_LSECSS
LSERDYC LL_RCC_ClearFlag_LSERDY
LSIRDYC LL_RCC_ClearFlag_LSIRDY
MSIRDYC LL_RCC_ClearFlag_MSIRDY
PLLRDYC LL_RCC_ClearFlag_PLLRDY
PLLSAI1RDYC LL_RCC_ClearFlag_PLLSAI1RDY
PLLSAI2RDYC LL_RCC_ClearFlag_PLLSAI2RDY
CIER HSERDYIE LL_RCC_DisableIT_HSERDY
LL_RCC_EnableIT_HSERDY
LL_RCC_IsEnabledIT_HSERDY
HSIRDYIE LL_RCC_DisableIT_HSIRDY
LL_RCC_EnableIT_HSIRDY
LL_RCC_IsEnabledIT_HSIRDY
LSECSSIE LL_RCC_DisableIT_LSECSS
LL_RCC_EnableIT_LSECSS
LL_RCC_IsEnabledIT_LSECSS
LSERDYIE LL_RCC_DisableIT_LSERDY
LL_RCC_EnableIT_LSERDY
LL_RCC_IsEnabledIT_LSERDY
LSIRDYIE LL_RCC_DisableIT_LSIRDY
LL_RCC_EnableIT_LSIRDY
LL_RCC_IsEnabledIT_LSIRDY
MSIRDYIE LL_RCC_DisableIT_MSIRDY
LL_RCC_EnableIT_MSIRDY
LL_RCC_IsEnabledIT_MSIRDY
PLLRDYIE LL_RCC_DisableIT_PLLRDY
LL_RCC_EnableIT_PLLRDY
LL_RCC_IsEnabledIT_PLLRDY
PLLSAI1RDYIE LL_RCC_DisableIT_PLLSAI1RDY
LL_RCC_EnableIT_PLLSAI1RDY
LL_RCC_IsEnabledIT_PLLSAI1RDY
PLLSAI2RDYIE LL_RCC_DisableIT_PLLSAI2RDY
LL_RCC_EnableIT_PLLSAI2RDY
LL_RCC_IsEnabledIT_PLLSAI2RDY
CIFR CSSF LL_RCC_IsActiveFlag_HSECSS
HSERDYF LL_RCC_IsActiveFlag_HSERDY
HSIRDYF LL_RCC_IsActiveFlag_HSIRDY
LSECSSF LL_RCC_IsActiveFlag_LSECSS
LSERDYF LL_RCC_IsActiveFlag_LSERDY
LSIRDYF LL_RCC_IsActiveFlag_LSIRDY
MSIRDYF LL_RCC_IsActiveFlag_MSIRDY
PLLRDYF LL_RCC_IsActiveFlag_PLLRDY
PLLSAI1RDYF LL_RCC_IsActiveFlag_PLLSAI1RDY
PLLSAI2RDYF LL_RCC_IsActiveFlag_PLLSAI2RDY
CR CSSON LL_RCC_HSE_EnableCSS
HSEBYP LL_RCC_HSE_DisableBypass
LL_RCC_HSE_EnableBypass
HSEON LL_RCC_HSE_Disable
LL_RCC_HSE_Enable
HSERDY LL_RCC_HSE_IsReady
HSIASFS LL_RCC_HSI_DisableAutoFromStop
LL_RCC_HSI_EnableAutoFromStop
HSIKERON LL_RCC_HSI_DisableInStopMode
LL_RCC_HSI_EnableInStopMode
LL_RCC_HSI_IsEnabledInStopMode
HSION LL_RCC_HSI_Disable
LL_RCC_HSI_Enable
HSIRDY LL_RCC_HSI_IsReady
MSION LL_RCC_MSI_Disable
LL_RCC_MSI_Enable
MSIPLLEN LL_RCC_MSI_DisablePLLMode
LL_RCC_MSI_EnablePLLMode
MSIRANGE LL_RCC_MSI_GetRange
LL_RCC_MSI_SetRange
MSIRDY LL_RCC_MSI_IsReady
MSIRGSEL LL_RCC_MSI_EnableRangeSelection
LL_RCC_MSI_IsEnabledRangeSelect
PLLON LL_RCC_PLL_Disable
LL_RCC_PLL_Enable
PLLRDY LL_RCC_PLL_IsReady
PLLSAI1ON LL_RCC_PLLSAI1_Disable
LL_RCC_PLLSAI1_Enable
PLLSAI1RDY LL_RCC_PLLSAI1_IsReady
PLLSAI2ON LL_RCC_PLLSAI2_Disable
LL_RCC_PLLSAI2_Enable
PLLSAI2RDY LL_RCC_PLLSAI2_IsReady
CSR BORRSTF LL_RCC_IsActiveFlag_BORRST
FWRSTF LL_RCC_IsActiveFlag_FWRST
IWDGRSTF LL_RCC_IsActiveFlag_IWDGRST
LPWRRSTF LL_RCC_IsActiveFlag_LPWRRST
LSION LL_RCC_LSI_Disable
LL_RCC_LSI_Enable
LSIRDY LL_RCC_LSI_IsReady
MSISRANGE LL_RCC_MSI_GetRangeAfterStandby
LL_RCC_MSI_SetRangeAfterStandby
OBLRSTF LL_RCC_IsActiveFlag_OBLRST
PINRSTF LL_RCC_IsActiveFlag_PINRST
RMVF LL_RCC_ClearResetFlags
SFTRSTF LL_RCC_IsActiveFlag_SFTRST
WWDGRSTF LL_RCC_IsActiveFlag_WWDGRST
ICSCR HSICAL LL_RCC_HSI_GetCalibration
HSITRIM LL_RCC_HSI_GetCalibTrimming
LL_RCC_HSI_SetCalibTrimming
MSICAL LL_RCC_MSI_GetCalibration
MSITRIM LL_RCC_MSI_GetCalibTrimming
LL_RCC_MSI_SetCalibTrimming
PLLCFGR PLLM LL_RCC_PLLSAI1_ConfigDomain_48M
LL_RCC_PLLSAI1_ConfigDomain_ADC
LL_RCC_PLLSAI1_ConfigDomain_SAI
LL_RCC_PLLSAI2_ConfigDomain_ADC
LL_RCC_PLLSAI2_ConfigDomain_SAI
LL_RCC_PLL_ConfigDomain_48M
LL_RCC_PLL_ConfigDomain_SAI
LL_RCC_PLL_ConfigDomain_SYS
LL_RCC_PLL_GetDivider
PLLN LL_RCC_PLL_ConfigDomain_48M
LL_RCC_PLL_ConfigDomain_SAI
LL_RCC_PLL_ConfigDomain_SYS
LL_RCC_PLL_GetN
PLLP LL_RCC_PLL_ConfigDomain_SAI
LL_RCC_PLL_GetP
PLLPEN LL_RCC_PLL_DisableDomain_SAI
LL_RCC_PLL_EnableDomain_SAI
PLLQ LL_RCC_PLL_ConfigDomain_48M
LL_RCC_PLL_GetQ
PLLQEN LL_RCC_PLL_DisableDomain_48M
LL_RCC_PLL_EnableDomain_48M
PLLR LL_RCC_PLL_ConfigDomain_SYS
LL_RCC_PLL_GetR
PLLREN LL_RCC_PLL_DisableDomain_SYS
LL_RCC_PLL_EnableDomain_SYS
PLLSRC LL_RCC_PLLSAI1_ConfigDomain_48M
LL_RCC_PLLSAI1_ConfigDomain_ADC
LL_RCC_PLLSAI1_ConfigDomain_SAI
LL_RCC_PLLSAI2_ConfigDomain_ADC
LL_RCC_PLLSAI2_ConfigDomain_SAI
LL_RCC_PLL_ConfigDomain_48M
LL_RCC_PLL_ConfigDomain_SAI
LL_RCC_PLL_ConfigDomain_SYS
LL_RCC_PLL_GetMainSource
LL_RCC_PLL_SetMainSource
PLLSAI1CFGR PLLSAI1N LL_RCC_PLLSAI1_ConfigDomain_48M
LL_RCC_PLLSAI1_ConfigDomain_ADC
LL_RCC_PLLSAI1_ConfigDomain_SAI
LL_RCC_PLLSAI1_GetN
PLLSAI1P LL_RCC_PLLSAI1_ConfigDomain_SAI
LL_RCC_PLLSAI1_GetP
PLLSAI1PEN LL_RCC_PLLSAI1_DisableDomain_SAI
LL_RCC_PLLSAI1_EnableDomain_SAI
PLLSAI1Q LL_RCC_PLLSAI1_ConfigDomain_48M
LL_RCC_PLLSAI1_GetQ
PLLSAI1QEN LL_RCC_PLLSAI1_DisableDomain_48M
LL_RCC_PLLSAI1_EnableDomain_48M
PLLSAI1R LL_RCC_PLLSAI1_ConfigDomain_ADC
LL_RCC_PLLSAI1_GetR
PLLSAI1REN LL_RCC_PLLSAI1_DisableDomain_ADC
LL_RCC_PLLSAI1_EnableDomain_ADC
PLLSAI2CFGR PLLSAI2N LL_RCC_PLLSAI2_ConfigDomain_ADC
LL_RCC_PLLSAI2_ConfigDomain_SAI
LL_RCC_PLLSAI2_GetN
PLLSAI2P LL_RCC_PLLSAI2_ConfigDomain_SAI
LL_RCC_PLLSAI2_GetP
PLLSAI2PEN LL_RCC_PLLSAI2_DisableDomain_SAI
LL_RCC_PLLSAI2_EnableDomain_SAI
PLLSAI2R LL_RCC_PLLSAI2_ConfigDomain_ADC
LL_RCC_PLLSAI2_GetR
PLLSAI2REN LL_RCC_PLLSAI2_DisableDomain_ADC
LL_RCC_PLLSAI2_EnableDomain_ADC